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imx23_olinuxino_machdep.c revision 1.5 
      1 /* $Id: imx23_olinuxino_machdep.c,v 1.5 2015/01/10 12:11:39 jmcneill Exp $ */
      2 
      3 /*
      4  * Copyright (c) 2012 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Petri Laakso.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  * POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 #include "opt_imx.h"
     33 
     34 #include <sys/bus.h>
     35 #include <sys/cdefs.h>
     36 #include <sys/device.h>
     37 #include <sys/mount.h>
     38 #include <sys/reboot.h>
     39 #include <sys/systm.h>
     40 #include <sys/termios.h>
     41 #include <sys/types.h>
     42 
     43 #include <uvm/uvm_prot.h>
     44 
     45 #include <machine/bootconfig.h>
     46 #include <machine/db_machdep.h>
     47 #include <machine/pmap.h>
     48 
     49 #include <arm/armreg.h>
     50 #include <arm/cpu.h>
     51 #include <arm/cpufunc.h>
     52 #include <arm/locore.h>
     53 
     54 #include <arm/arm32/machdep.h>
     55 #include <arm/arm32/pte.h>
     56 
     57 #include <arm/imx/imx23_clkctrlreg.h>
     58 #include <arm/imx/imx23_digctlreg.h>
     59 #include <arm/imx/imx23_rtcreg.h>
     60 #include <arm/imx/imx23_uartdbgreg.h>
     61 #include <arm/imx/imx23var.h>
     62 
     63 #include "plcom.h"
     64 #if (NPLCOM > 0)
     65 #include <evbarm/dev/plcomreg.h>
     66 #include <evbarm/dev/plcomvar.h>
     67 #endif
     68 
     69 #include "opt_evbarm_boardtype.h"
     70 
     71 #define	KERNEL_VM_BASE	(KERNEL_BASE + 0x8000000)
     72 #define	KERNEL_VM_SIZE	0x20000000
     73 
     74 #define L1_PAGE_TABLE (DRAM_BASE + MEMSIZE * 1024 * 1024 - L1_TABLE_SIZE)
     75 #define BOOTIMX23_ARGS (L1_PAGE_TABLE - MAX_BOOT_STRING - 1)
     76 
     77 #define PLCONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
     78 #define PLCONSPEED 115200
     79 
     80 #define REG_RD(reg) *(volatile uint32_t *)(reg)
     81 #define REG_WR(reg, val)						\
     82 do {									\
     83 	*(volatile uint32_t *)((reg)) = val;				\
     84 } while (0)
     85 
     86 #define KERNEL_BASE_PHYS ((paddr_t)&KERNEL_BASE_phys)
     87 #define KERNEL_BASE_VIRT ((vaddr_t)&KERNEL_BASE_virt)
     88 #define KERN_VTOPHYS(va) \
     89         ((paddr_t)((vaddr_t)(va) - KERNEL_BASE + KERNEL_BASE_PHYS))
     90 #define KERN_PHYSTOV(pa) \
     91         ((vaddr_t)((paddr_t)(pa) + KERNEL_BASE_VIRT + KERNEL_BASE))
     92 
     93 /*
     94  * Static device map for i.MX23 peripheral address space.
     95  */
     96 #define _A(a)	((a) & ~L1_S_OFFSET)
     97 #define _S(s)	(((s) + L1_S_SIZE - 1) & ~(L1_S_SIZE-1))
     98 static const struct pmap_devmap devmap[] = {
     99 	{
    100 		_A(APBH_BASE),			/* Virtual address. */
    101 		_A(APBH_BASE),			/* Physical address. */
    102 		_S(APBH_SIZE + APBX_SIZE),	/* APBX located after APBH. */
    103 		VM_PROT_READ|VM_PROT_WRITE,	/* Protection bits. */
    104 		PTE_NOCACHE			/* Cache attributes. */
    105 	},
    106 	{ 0, 0, 0, 0, 0 }
    107 };
    108 #undef _A
    109 #undef _S
    110 
    111 static struct plcom_instance imx23_pi = {
    112 	.pi_type = PLCOM_TYPE_PL011,
    113 	.pi_iot = &imx23_bus_space,
    114 	.pi_size = PL011COM_UART_SIZE,
    115 	.pi_iobase = HW_UARTDBG_BASE
    116 };
    117 
    118 extern char KERNEL_BASE_phys;
    119 extern char KERNEL_BASE_virt;
    120 BootConfig bootconfig;
    121 char *boot_args;
    122 static char kernel_boot_args[MAX_BOOT_STRING];
    123 
    124 #define SSP_DIV 2
    125 #define IO_FRAC 27
    126 
    127 static void power_vddio_from_dcdc(int, int);
    128 static void set_ssp_div(unsigned int);
    129 static void set_io_frac(unsigned int);
    130 static void bypass_ssp(void);
    131 
    132 /*
    133  * Initialize ARM and return new SVC stack pointer.
    134  */
    135 u_int
    136 initarm(void *arg)
    137 {
    138         psize_t ram_size;
    139 
    140 	if (set_cpufuncs())
    141 		panic("set_cpufuncs failed");
    142 
    143 	pmap_devmap_register(devmap);
    144 	consinit();
    145 
    146 #define BDSTR(s)	_BDSTR(s)
    147 #define _BDSTR(s)	#s
    148 	printf("\nNetBSD/evbarm (" BDSTR(EVBARM_BOARDTYPE) ") booting ...\n");
    149 #undef BDSTR
    150 #undef _BDSTR
    151 
    152 	/*
    153 	 * SSP_CLK setup was postponed here from bootimx23 because SB wasn't
    154 	 * able to load kernel if clocks were changed.
    155 	 */
    156 	power_vddio_from_dcdc(3300, 2925);
    157 	set_ssp_div(SSP_DIV);
    158 	set_io_frac(IO_FRAC);
    159 	bypass_ssp();
    160 
    161 	cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
    162 
    163 	/* Copy boot arguments passed from bootimx23. */
    164 	boot_args = (char *)KERN_PHYSTOV(BOOTIMX23_ARGS);
    165 	memcpy(kernel_boot_args, boot_args, MAX_BOOT_STRING);
    166 	boot_args = kernel_boot_args;
    167 #ifdef VERBOSE_INIT_ARM
    168 	printf("boot_args @ %lx: '%s'\n", KERN_PHYSTOV(BOOTIMX23_ARGS),
    169 	    boot_args);
    170 #endif
    171 	parse_mi_bootargs(boot_args);
    172 
    173 	ram_size = MEMSIZE * 1024 * 1024;
    174 
    175 	bootconfig.dramblocks = 1;
    176 	bootconfig.dram[0].address = DRAM_BASE;
    177 	bootconfig.dram[0].pages = ram_size / PAGE_SIZE;
    178 	bootconfig.dram[0].flags = BOOT_DRAM_CAN_DMA | BOOT_DRAM_PREFER;
    179 
    180         arm32_bootmem_init(bootconfig.dram[0].address, ram_size,
    181             ((vsize_t)&KERNEL_BASE_phys));
    182 
    183         arm32_kernel_vm_init(KERNEL_VM_BASE, ARM_VECTORS_HIGH, 0, devmap,
    184 	    false);
    185 
    186         return initarm_common(KERNEL_VM_BASE, KERNEL_VM_SIZE, NULL, 0);
    187 }
    188 
    189 /*
    190  * Initialize console.
    191  */
    192 void
    193 consinit(void)
    194 {
    195 	/* consinit() is called from also from the main(). */
    196 	static int consinit_called = 0;
    197 
    198 	if (consinit_called)
    199 		return;
    200 
    201 	plcomcnattach(&imx23_pi, PLCONSPEED, IMX23_UART_CLK, PLCONMODE, 0);
    202 
    203 	consinit_called = 1;
    204 
    205 	return;
    206 }
    207 
    208 /*
    209  * Reboot or halt the system.
    210  */
    211 void
    212 cpu_reboot(int howto, char *bootstr)
    213 {
    214 	static int cpu_reboot_called = 0;
    215 
    216 	boothowto |= howto;
    217 
    218 	/*
    219 	 * If this is the first invocation of cpu_reboot() and the RB_NOSYNC
    220 	 * flag is not set in howto; sync and unmount the system disks by
    221 	 * calling vfs_shutdown(9) and set the time of day clock by calling
    222 	 * resettodr(9).
    223 	 */
    224 	if (!cpu_reboot_called && !(boothowto & RB_NOSYNC)) {
    225 		vfs_shutdown();
    226 		resettodr();
    227 	}
    228 
    229 	cpu_reboot_called = 1;
    230 
    231 	IRQdisable;	/* FIQ's stays on because they are special. */
    232 
    233 	/*
    234 	 * If rebooting after a crash (i.e., if RB_DUMP is set in howto, but
    235 	 * RB_HALT is not), save a system crash dump.
    236 	 */
    237 	if ((boothowto & RB_DUMP) && !(boothowto & RB_HALT)) {
    238 		panic("please implement crash dump!"); // XXX
    239 		for(;;);
    240 		/* NOTREACHED */
    241 	}
    242 
    243 	/* Run any shutdown hooks by calling pmf_system_shutdown(9). */
    244 	pmf_system_shutdown(boothowto);
    245 
    246 	printf("system %s.\n", boothowto & RB_HALT ? "halted" : "rebooted");
    247 
    248 	if (boothowto & RB_HALT) {
    249 		/* Enable i.MX233 wait-for-interrupt mode. */
    250 		REG_WR(HW_CLKCTRL_BASE + HW_CLKCTRL_CPU,
    251 		    (REG_RD(HW_CLKCTRL_BASE + HW_CLKCTRL_CPU) |
    252 		    HW_CLKCTRL_CPU_INTERRUPT_WAIT));
    253 
    254 		/* Disable FIQ's and wait for interrupt (which never arrives) */
    255 		__asm volatile(				\
    256 		    "mrs r0, cpsr\n\t"			\
    257 		    "orr r0, #0x40\n\t"			\
    258 		    "msr cpsr_c, r0\n\t"		\
    259 		    "mov r0, #0\n\t"			\
    260 		    "mcr p15, 0, r0, c7, c0, 4\n\t"
    261 		);
    262 
    263 		for(;;);
    264 
    265 		/* NOT REACHED */
    266 	}
    267 
    268 	/* Reboot the system. */
    269 	REG_WR(HW_RTC_BASE + HW_RTC_WATCHDOG, 10000);
    270 	REG_WR(HW_RTC_BASE + HW_RTC_CTRL_SET, HW_RTC_CTRL_WATCHDOGEN);
    271 	REG_WR(HW_RTC_BASE + HW_RTC_WATCHDOG, 0);
    272 
    273 	for(;;);
    274 
    275 	/* NOT REACHED */
    276 }
    277 
    278 /*
    279  * Delay us microseconds.
    280  */
    281 void
    282 delay(unsigned int us)
    283 {
    284 	uint32_t start;
    285 	uint32_t now;
    286 	uint32_t elapsed;
    287 	uint32_t total;
    288 	uint32_t last;
    289 
    290 	total = 0;
    291 	last = 0;
    292 	start = REG_RD(HW_DIGCTL_BASE + HW_DIGCTL_MICROSECONDS);
    293 
    294 	do {
    295 		now = REG_RD(HW_DIGCTL_BASE + HW_DIGCTL_MICROSECONDS);
    296 
    297 		if (start <= now)
    298 			elapsed = now - start;
    299 		else	/* Take care of overflow. */
    300 			elapsed = (UINT32_MAX - start) + 1 + now;
    301 
    302 		total += elapsed - last;
    303 		last = elapsed;
    304 
    305 	} while (total < us);
    306 
    307 	return;
    308 }
    309 #include <arm/imx/imx23_powerreg.h>
    310 #define PWR_VDDIOCTRL   (HW_POWER_BASE + HW_POWER_VDDIOCTRL)
    311 #define PWR_CTRL        (HW_POWER_BASE + HW_POWER_CTRL)
    312 #define PWR_CTRL_S      (HW_POWER_BASE + HW_POWER_CTRL_SET)
    313 #define PWR_CTRL_C      (HW_POWER_BASE + HW_POWER_CTRL_CLR)
    314 
    315 static void
    316 power_vddio_from_dcdc(int target, int brownout)
    317 {
    318         uint32_t tmp_r;
    319 
    320         /* BO_OFFSET must be withing 2700mV - 3475mV */
    321         if (brownout > 3475)
    322                 brownout = 3475;
    323         else if (brownout < 2700)
    324                 brownout = 2700;
    325 
    326 
    327         /* Set LINREG_OFFSET one step below TRG. */
    328         tmp_r = REG_RD(PWR_VDDIOCTRL);
    329         tmp_r &= ~HW_POWER_VDDIOCTRL_LINREG_OFFSET;
    330         tmp_r |= __SHIFTIN(2, HW_POWER_VDDIOCTRL_LINREG_OFFSET);
    331         REG_WR(PWR_VDDIOCTRL, tmp_r);
    332         delay(10000);
    333 
    334         /* Enable VDDIO switching converter output. */
    335         tmp_r = REG_RD(PWR_VDDIOCTRL);
    336         tmp_r &= ~HW_POWER_VDDIOCTRL_DISABLE_FET;
    337         REG_WR(PWR_VDDIOCTRL, tmp_r);
    338         delay(10000);
    339 
    340         /* Set target voltage and brownout level. */
    341         tmp_r = REG_RD(PWR_VDDIOCTRL);
    342         tmp_r &= ~(HW_POWER_VDDIOCTRL_BO_OFFSET | HW_POWER_VDDIOCTRL_TRG);
    343         tmp_r |= __SHIFTIN(((target - brownout) / 25),
    344                 HW_POWER_VDDIOCTRL_BO_OFFSET);
    345         tmp_r |= __SHIFTIN(((target - 2800) / 25), HW_POWER_VDDIOCTRL_TRG);
    346         REG_WR(PWR_VDDIOCTRL, tmp_r);
    347         delay(10000);
    348 
    349         /* Enable PWDN_BRNOUT. */
    350         REG_WR(PWR_CTRL_C, HW_POWER_CTRL_VDDIO_BO_IRQ);
    351 
    352         tmp_r = REG_RD(PWR_VDDIOCTRL);
    353         tmp_r |= HW_POWER_VDDIOCTRL_PWDN_BRNOUT;
    354         REG_WR(PWR_VDDIOCTRL, tmp_r);
    355 
    356         return;
    357 }
    358 #include <arm/imx/imx23_clkctrlreg.h>
    359 #define CLKCTRL_SSP     (HW_CLKCTRL_BASE + HW_CLKCTRL_SSP)
    360 #define CLKCTRL_FRAC    (HW_CLKCTRL_BASE + HW_CLKCTRL_FRAC)
    361 #define CLKCTRL_SEQ_C   (HW_CLKCTRL_BASE + HW_CLKCTRL_CLKSEQ_CLR)
    362 
    363 static
    364 void set_ssp_div(unsigned int div)
    365 {
    366         uint32_t tmp_r;
    367 
    368         tmp_r = REG_RD(CLKCTRL_SSP);
    369         tmp_r &= ~HW_CLKCTRL_SSP_CLKGATE;
    370         REG_WR(CLKCTRL_SSP, tmp_r);
    371 
    372         while (REG_RD(CLKCTRL_SSP) & HW_CLKCTRL_SSP_BUSY)
    373                 ;
    374 
    375         tmp_r = REG_RD(CLKCTRL_SSP);
    376         tmp_r &= ~HW_CLKCTRL_SSP_DIV;
    377         tmp_r |= __SHIFTIN(div, HW_CLKCTRL_SSP_DIV);
    378         REG_WR(CLKCTRL_SSP, tmp_r);
    379 
    380         while (REG_RD(CLKCTRL_SSP) & HW_CLKCTRL_SSP_BUSY)
    381                 ;
    382 
    383         return;
    384 
    385 }
    386 static
    387 void set_io_frac(unsigned int frac)
    388 {
    389         uint8_t *io_frac;
    390         uint32_t tmp_r;
    391 
    392         io_frac = (uint8_t *)(CLKCTRL_FRAC);
    393         io_frac++; /* emi */
    394         io_frac++; /* pix */
    395         io_frac++; /* io */
    396         tmp_r = (*io_frac)<<24;
    397         tmp_r &= ~(HW_CLKCTRL_FRAC_CLKGATEIO | HW_CLKCTRL_FRAC_IOFRAC);
    398         tmp_r |= __SHIFTIN(frac, HW_CLKCTRL_FRAC_IOFRAC);
    399 
    400         *io_frac = (uint8_t)(tmp_r>>24);
    401 
    402         return;
    403 }
    404 static
    405 void bypass_ssp(void)
    406 {
    407         REG_WR(CLKCTRL_SEQ_C, HW_CLKCTRL_CLKSEQ_BYPASS_SSP);
    408 
    409         return;
    410 }
    411 
    412 
    413