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imx23_olinuxino_machdep.c revision 1.6 
      1 /* $Id: imx23_olinuxino_machdep.c,v 1.6 2015/01/10 12:18:09 jmcneill Exp $ */
      2 
      3 /*
      4  * Copyright (c) 2012 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Petri Laakso.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  * POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 #include "opt_imx.h"
     33 
     34 #include <sys/bus.h>
     35 #include <sys/cdefs.h>
     36 #include <sys/device.h>
     37 #include <sys/mount.h>
     38 #include <sys/reboot.h>
     39 #include <sys/systm.h>
     40 #include <sys/termios.h>
     41 #include <sys/types.h>
     42 
     43 #include <uvm/uvm_prot.h>
     44 
     45 #include <machine/bootconfig.h>
     46 #include <machine/db_machdep.h>
     47 #include <machine/pmap.h>
     48 
     49 #include <arm/armreg.h>
     50 #include <arm/cpu.h>
     51 #include <arm/cpufunc.h>
     52 #include <arm/locore.h>
     53 
     54 #include <arm/arm32/machdep.h>
     55 #include <arm/arm32/pte.h>
     56 
     57 #include <arm/imx/imx23_clkctrlreg.h>
     58 #include <arm/imx/imx23_digctlreg.h>
     59 #include <arm/imx/imx23_rtcreg.h>
     60 #include <arm/imx/imx23_uartdbgreg.h>
     61 #include <arm/imx/imx23var.h>
     62 
     63 #include "plcom.h"
     64 #if (NPLCOM > 0)
     65 #include <evbarm/dev/plcomreg.h>
     66 #include <evbarm/dev/plcomvar.h>
     67 #endif
     68 
     69 #include "opt_evbarm_boardtype.h"
     70 #include "opt_machdep.h"
     71 
     72 #define	KERNEL_VM_BASE	(KERNEL_BASE + 0x8000000)
     73 #define	KERNEL_VM_SIZE	0x20000000
     74 
     75 #define L1_PAGE_TABLE (DRAM_BASE + MEMSIZE * 1024 * 1024 - L1_TABLE_SIZE)
     76 #define BOOTIMX23_ARGS (L1_PAGE_TABLE - MAX_BOOT_STRING - 1)
     77 
     78 #define PLCONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
     79 #define PLCONSPEED 115200
     80 
     81 #define REG_RD(reg) *(volatile uint32_t *)(reg)
     82 #define REG_WR(reg, val)						\
     83 do {									\
     84 	*(volatile uint32_t *)((reg)) = val;				\
     85 } while (0)
     86 
     87 #define KERNEL_BASE_PHYS ((paddr_t)&KERNEL_BASE_phys)
     88 #define KERNEL_BASE_VIRT ((vaddr_t)&KERNEL_BASE_virt)
     89 #define KERN_VTOPHYS(va) \
     90         ((paddr_t)((vaddr_t)(va) - KERNEL_BASE + KERNEL_BASE_PHYS))
     91 #define KERN_PHYSTOV(pa) \
     92         ((vaddr_t)((paddr_t)(pa) + KERNEL_BASE_VIRT + KERNEL_BASE))
     93 
     94 /*
     95  * Static device map for i.MX23 peripheral address space.
     96  */
     97 #define _A(a)	((a) & ~L1_S_OFFSET)
     98 #define _S(s)	(((s) + L1_S_SIZE - 1) & ~(L1_S_SIZE-1))
     99 static const struct pmap_devmap devmap[] = {
    100 	{
    101 		_A(APBH_BASE),			/* Virtual address. */
    102 		_A(APBH_BASE),			/* Physical address. */
    103 		_S(APBH_SIZE + APBX_SIZE),	/* APBX located after APBH. */
    104 		VM_PROT_READ|VM_PROT_WRITE,	/* Protection bits. */
    105 		PTE_NOCACHE			/* Cache attributes. */
    106 	},
    107 	{ 0, 0, 0, 0, 0 }
    108 };
    109 #undef _A
    110 #undef _S
    111 
    112 static struct plcom_instance imx23_pi = {
    113 	.pi_type = PLCOM_TYPE_PL011,
    114 	.pi_iot = &imx23_bus_space,
    115 	.pi_size = PL011COM_UART_SIZE,
    116 	.pi_iobase = HW_UARTDBG_BASE
    117 };
    118 
    119 extern char KERNEL_BASE_phys;
    120 extern char KERNEL_BASE_virt;
    121 BootConfig bootconfig;
    122 char *boot_args;
    123 static char kernel_boot_args[MAX_BOOT_STRING];
    124 
    125 #define SSP_DIV 2
    126 #define IO_FRAC 27
    127 
    128 static void power_vddio_from_dcdc(int, int);
    129 static void set_ssp_div(unsigned int);
    130 static void set_io_frac(unsigned int);
    131 static void bypass_ssp(void);
    132 
    133 /*
    134  * Initialize ARM and return new SVC stack pointer.
    135  */
    136 u_int
    137 initarm(void *arg)
    138 {
    139         psize_t ram_size;
    140 
    141 	if (set_cpufuncs())
    142 		panic("set_cpufuncs failed");
    143 
    144 	pmap_devmap_register(devmap);
    145 	consinit();
    146 
    147 #define BDSTR(s)	_BDSTR(s)
    148 #define _BDSTR(s)	#s
    149 	printf("\nNetBSD/evbarm (" BDSTR(EVBARM_BOARDTYPE) ") booting ...\n");
    150 #undef BDSTR
    151 #undef _BDSTR
    152 
    153 	/*
    154 	 * SSP_CLK setup was postponed here from bootimx23 because SB wasn't
    155 	 * able to load kernel if clocks were changed.
    156 	 */
    157 	power_vddio_from_dcdc(3300, 2925);
    158 	set_ssp_div(SSP_DIV);
    159 	set_io_frac(IO_FRAC);
    160 	bypass_ssp();
    161 
    162 	cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
    163 
    164 	/* Copy boot arguments passed from bootimx23. */
    165 	boot_args = (char *)KERN_PHYSTOV(BOOTIMX23_ARGS);
    166 	memcpy(kernel_boot_args, boot_args, MAX_BOOT_STRING);
    167 #ifdef BOOT_ARGS
    168 	strcpy(kernel_boot_args, BOOT_ARGS);
    169 #endif
    170 	boot_args = kernel_boot_args;
    171 #ifdef VERBOSE_INIT_ARM
    172 	printf("boot_args @ %lx: '%s'\n", KERN_PHYSTOV(BOOTIMX23_ARGS),
    173 	    boot_args);
    174 #endif
    175 	parse_mi_bootargs(boot_args);
    176 
    177 	ram_size = MEMSIZE * 1024 * 1024;
    178 
    179 	bootconfig.dramblocks = 1;
    180 	bootconfig.dram[0].address = DRAM_BASE;
    181 	bootconfig.dram[0].pages = ram_size / PAGE_SIZE;
    182 	bootconfig.dram[0].flags = BOOT_DRAM_CAN_DMA | BOOT_DRAM_PREFER;
    183 
    184         arm32_bootmem_init(bootconfig.dram[0].address, ram_size,
    185             ((vsize_t)&KERNEL_BASE_phys));
    186 
    187         arm32_kernel_vm_init(KERNEL_VM_BASE, ARM_VECTORS_HIGH, 0, devmap,
    188 	    false);
    189 
    190         return initarm_common(KERNEL_VM_BASE, KERNEL_VM_SIZE, NULL, 0);
    191 }
    192 
    193 /*
    194  * Initialize console.
    195  */
    196 void
    197 consinit(void)
    198 {
    199 	/* consinit() is called from also from the main(). */
    200 	static int consinit_called = 0;
    201 
    202 	if (consinit_called)
    203 		return;
    204 
    205 	plcomcnattach(&imx23_pi, PLCONSPEED, IMX23_UART_CLK, PLCONMODE, 0);
    206 
    207 	consinit_called = 1;
    208 
    209 	return;
    210 }
    211 
    212 /*
    213  * Reboot or halt the system.
    214  */
    215 void
    216 cpu_reboot(int howto, char *bootstr)
    217 {
    218 	static int cpu_reboot_called = 0;
    219 
    220 	boothowto |= howto;
    221 
    222 	/*
    223 	 * If this is the first invocation of cpu_reboot() and the RB_NOSYNC
    224 	 * flag is not set in howto; sync and unmount the system disks by
    225 	 * calling vfs_shutdown(9) and set the time of day clock by calling
    226 	 * resettodr(9).
    227 	 */
    228 	if (!cpu_reboot_called && !(boothowto & RB_NOSYNC)) {
    229 		vfs_shutdown();
    230 		resettodr();
    231 	}
    232 
    233 	cpu_reboot_called = 1;
    234 
    235 	IRQdisable;	/* FIQ's stays on because they are special. */
    236 
    237 	/*
    238 	 * If rebooting after a crash (i.e., if RB_DUMP is set in howto, but
    239 	 * RB_HALT is not), save a system crash dump.
    240 	 */
    241 	if ((boothowto & RB_DUMP) && !(boothowto & RB_HALT)) {
    242 		panic("please implement crash dump!"); // XXX
    243 		for(;;);
    244 		/* NOTREACHED */
    245 	}
    246 
    247 	/* Run any shutdown hooks by calling pmf_system_shutdown(9). */
    248 	pmf_system_shutdown(boothowto);
    249 
    250 	printf("system %s.\n", boothowto & RB_HALT ? "halted" : "rebooted");
    251 
    252 	if (boothowto & RB_HALT) {
    253 		/* Enable i.MX233 wait-for-interrupt mode. */
    254 		REG_WR(HW_CLKCTRL_BASE + HW_CLKCTRL_CPU,
    255 		    (REG_RD(HW_CLKCTRL_BASE + HW_CLKCTRL_CPU) |
    256 		    HW_CLKCTRL_CPU_INTERRUPT_WAIT));
    257 
    258 		/* Disable FIQ's and wait for interrupt (which never arrives) */
    259 		__asm volatile(				\
    260 		    "mrs r0, cpsr\n\t"			\
    261 		    "orr r0, #0x40\n\t"			\
    262 		    "msr cpsr_c, r0\n\t"		\
    263 		    "mov r0, #0\n\t"			\
    264 		    "mcr p15, 0, r0, c7, c0, 4\n\t"
    265 		);
    266 
    267 		for(;;);
    268 
    269 		/* NOT REACHED */
    270 	}
    271 
    272 	/* Reboot the system. */
    273 	REG_WR(HW_RTC_BASE + HW_RTC_WATCHDOG, 10000);
    274 	REG_WR(HW_RTC_BASE + HW_RTC_CTRL_SET, HW_RTC_CTRL_WATCHDOGEN);
    275 	REG_WR(HW_RTC_BASE + HW_RTC_WATCHDOG, 0);
    276 
    277 	for(;;);
    278 
    279 	/* NOT REACHED */
    280 }
    281 
    282 /*
    283  * Delay us microseconds.
    284  */
    285 void
    286 delay(unsigned int us)
    287 {
    288 	uint32_t start;
    289 	uint32_t now;
    290 	uint32_t elapsed;
    291 	uint32_t total;
    292 	uint32_t last;
    293 
    294 	total = 0;
    295 	last = 0;
    296 	start = REG_RD(HW_DIGCTL_BASE + HW_DIGCTL_MICROSECONDS);
    297 
    298 	do {
    299 		now = REG_RD(HW_DIGCTL_BASE + HW_DIGCTL_MICROSECONDS);
    300 
    301 		if (start <= now)
    302 			elapsed = now - start;
    303 		else	/* Take care of overflow. */
    304 			elapsed = (UINT32_MAX - start) + 1 + now;
    305 
    306 		total += elapsed - last;
    307 		last = elapsed;
    308 
    309 	} while (total < us);
    310 
    311 	return;
    312 }
    313 #include <arm/imx/imx23_powerreg.h>
    314 #define PWR_VDDIOCTRL   (HW_POWER_BASE + HW_POWER_VDDIOCTRL)
    315 #define PWR_CTRL        (HW_POWER_BASE + HW_POWER_CTRL)
    316 #define PWR_CTRL_S      (HW_POWER_BASE + HW_POWER_CTRL_SET)
    317 #define PWR_CTRL_C      (HW_POWER_BASE + HW_POWER_CTRL_CLR)
    318 
    319 static void
    320 power_vddio_from_dcdc(int target, int brownout)
    321 {
    322         uint32_t tmp_r;
    323 
    324         /* BO_OFFSET must be withing 2700mV - 3475mV */
    325         if (brownout > 3475)
    326                 brownout = 3475;
    327         else if (brownout < 2700)
    328                 brownout = 2700;
    329 
    330 
    331         /* Set LINREG_OFFSET one step below TRG. */
    332         tmp_r = REG_RD(PWR_VDDIOCTRL);
    333         tmp_r &= ~HW_POWER_VDDIOCTRL_LINREG_OFFSET;
    334         tmp_r |= __SHIFTIN(2, HW_POWER_VDDIOCTRL_LINREG_OFFSET);
    335         REG_WR(PWR_VDDIOCTRL, tmp_r);
    336         delay(10000);
    337 
    338         /* Enable VDDIO switching converter output. */
    339         tmp_r = REG_RD(PWR_VDDIOCTRL);
    340         tmp_r &= ~HW_POWER_VDDIOCTRL_DISABLE_FET;
    341         REG_WR(PWR_VDDIOCTRL, tmp_r);
    342         delay(10000);
    343 
    344         /* Set target voltage and brownout level. */
    345         tmp_r = REG_RD(PWR_VDDIOCTRL);
    346         tmp_r &= ~(HW_POWER_VDDIOCTRL_BO_OFFSET | HW_POWER_VDDIOCTRL_TRG);
    347         tmp_r |= __SHIFTIN(((target - brownout) / 25),
    348                 HW_POWER_VDDIOCTRL_BO_OFFSET);
    349         tmp_r |= __SHIFTIN(((target - 2800) / 25), HW_POWER_VDDIOCTRL_TRG);
    350         REG_WR(PWR_VDDIOCTRL, tmp_r);
    351         delay(10000);
    352 
    353         /* Enable PWDN_BRNOUT. */
    354         REG_WR(PWR_CTRL_C, HW_POWER_CTRL_VDDIO_BO_IRQ);
    355 
    356         tmp_r = REG_RD(PWR_VDDIOCTRL);
    357         tmp_r |= HW_POWER_VDDIOCTRL_PWDN_BRNOUT;
    358         REG_WR(PWR_VDDIOCTRL, tmp_r);
    359 
    360         return;
    361 }
    362 #include <arm/imx/imx23_clkctrlreg.h>
    363 #define CLKCTRL_SSP     (HW_CLKCTRL_BASE + HW_CLKCTRL_SSP)
    364 #define CLKCTRL_FRAC    (HW_CLKCTRL_BASE + HW_CLKCTRL_FRAC)
    365 #define CLKCTRL_SEQ_C   (HW_CLKCTRL_BASE + HW_CLKCTRL_CLKSEQ_CLR)
    366 
    367 static
    368 void set_ssp_div(unsigned int div)
    369 {
    370         uint32_t tmp_r;
    371 
    372         tmp_r = REG_RD(CLKCTRL_SSP);
    373         tmp_r &= ~HW_CLKCTRL_SSP_CLKGATE;
    374         REG_WR(CLKCTRL_SSP, tmp_r);
    375 
    376         while (REG_RD(CLKCTRL_SSP) & HW_CLKCTRL_SSP_BUSY)
    377                 ;
    378 
    379         tmp_r = REG_RD(CLKCTRL_SSP);
    380         tmp_r &= ~HW_CLKCTRL_SSP_DIV;
    381         tmp_r |= __SHIFTIN(div, HW_CLKCTRL_SSP_DIV);
    382         REG_WR(CLKCTRL_SSP, tmp_r);
    383 
    384         while (REG_RD(CLKCTRL_SSP) & HW_CLKCTRL_SSP_BUSY)
    385                 ;
    386 
    387         return;
    388 
    389 }
    390 static
    391 void set_io_frac(unsigned int frac)
    392 {
    393         uint8_t *io_frac;
    394         uint32_t tmp_r;
    395 
    396         io_frac = (uint8_t *)(CLKCTRL_FRAC);
    397         io_frac++; /* emi */
    398         io_frac++; /* pix */
    399         io_frac++; /* io */
    400         tmp_r = (*io_frac)<<24;
    401         tmp_r &= ~(HW_CLKCTRL_FRAC_CLKGATEIO | HW_CLKCTRL_FRAC_IOFRAC);
    402         tmp_r |= __SHIFTIN(frac, HW_CLKCTRL_FRAC_IOFRAC);
    403 
    404         *io_frac = (uint8_t)(tmp_r>>24);
    405 
    406         return;
    407 }
    408 static
    409 void bypass_ssp(void)
    410 {
    411         REG_WR(CLKCTRL_SEQ_C, HW_CLKCTRL_CLKSEQ_BYPASS_SSP);
    412 
    413         return;
    414 }
    415 
    416 
    417