imx31lk_start.S revision 1.4
11.4Smatt/*	$NetBSD: imx31lk_start.S,v 1.4 2011/01/31 06:28:03 matt Exp $	*/
21.4Smatt/*-
31.4Smatt * Copyright (c) 2011 The NetBSD Foundation, Inc.
41.4Smatt * All rights reserved.
51.4Smatt *
61.4Smatt * This code is derived from software contributed to The NetBSD Foundation
71.4Smatt * by Matt Thomas of 3am Software Foundry.
81.4Smatt *
91.4Smatt * Redistribution and use in source and binary forms, with or without
101.4Smatt * modification, are permitted provided that the following conditions
111.4Smatt * are met:
121.4Smatt * 1. Redistributions of source code must retain the above copyright
131.4Smatt *    notice, this list of conditions and the following disclaimer.
141.4Smatt * 2. Redistributions in binary form must reproduce the above copyright
151.4Smatt *    notice, this list of conditions and the following disclaimer in the
161.4Smatt *    documentation and/or other materials provided with the distribution.
171.4Smatt *
181.4Smatt * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
191.4Smatt * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
201.4Smatt * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
211.4Smatt * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
221.4Smatt * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
231.4Smatt * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
241.4Smatt * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
251.4Smatt * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
261.4Smatt * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
271.4Smatt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
281.4Smatt * POSSIBILITY OF SUCH DAMAGE.
291.4Smatt */
301.2Smatt
311.2Smatt#include <machine/asm.h>
321.2Smatt#include <arm/armreg.h>
331.4Smatt#include "assym.h"
341.2Smatt
351.4SmattRCSID("$NetBSD: imx31lk_start.S,v 1.4 2011/01/31 06:28:03 matt Exp $")
361.2Smatt
371.2Smatt/*
381.2Smatt */
391.2Smatt
401.2Smatt#define CPWAIT_BRANCH							 \
411.2Smatt	sub	pc, pc, #4
421.2Smatt
431.2Smatt#define CPWAIT(tmp)							 \
441.2Smatt	mrc	p15, 0, tmp, c2, c0, 0  /* arbitrary read of CP15 */	;\
451.2Smatt	mov	tmp, tmp		/* wait for it to complete */	;\
461.2Smatt	CPWAIT_BRANCH			/* branch to next insn */
471.2Smatt
481.2Smatt
491.2Smatt#ifndef SDRAM_START
501.2Smatt#define SDRAM_START 0x80000000
511.2Smatt#endif
521.2Smatt
531.3Suebayasi#define IMX31_DCACHE_SIZE 0x4000	/* 16KB L1 */
541.2Smatt
551.3Suebayasi/*
561.3Suebayasi * L1 == "Level One" == "first-level"
571.3Suebayasi * L2 == "Level Two" == "second-level"
581.3Suebayasi */
591.2Smatt
601.2Smatt	.text
611.2Smatt
621.2Smatt	.global _C_LABEL(imx31lk_start)
631.2Smatt_C_LABEL(imx31lk_start):
641.2Smatt	/* Figure out where we want to jump to when the time comes */
651.2Smatt	adr	r8, .Lstart
661.2Smatt	ldr	r8, [r8]
671.2Smatt
681.2Smatt	/*
691.2Smatt	 * set up virtual address space mapping
701.2Smatt	 * for initial bootstrap.
711.2Smatt	 */
721.2Smatt	mov     r2, #(L1_S_SIZE)		/* 1MB chunks */
731.2Smatt
741.2Smatt	/*
751.2Smatt	 * Firmware already mapped SDRAM VA == PA. at 0x800..
761.2Smatt	 * now map SDRAM also at VA 0x800...
771.2Smatt	 */
781.3Suebayasi	mrc	p15, 0, r0, c2, c0, 0		/* L1 table addr into r0 */
791.2Smatt	add	r0, r0, #(0x800 * 4)		/* offset to 0x80000000 */
801.2Smatt
811.2Smatt	mov	r3, #SDRAM_START		/* map to 0x800.. */
821.4Smatt	orr	r3, r3, #(L1_S_AP_KRW)		/* the usual perms & stuff */
831.2Smatt	orr	r3, r3, #(L1_TYPE_S)
841.4Smatt	orr	r3, r3, #(L1_S_DOM_KERNEL)
851.2Smatt
861.2Smatt	mov	r1, #0x80			/* 128 1MB entries */
871.2Smatt1:
881.2Smatt	/* and looplooploop */
891.2Smatt	str	r3, [r0], #4
901.2Smatt	add	r3, r3, r2
911.2Smatt	subs	r1, r1, #1
921.2Smatt	bgt	1b
931.2Smatt
941.2Smatt	/*
951.2Smatt	 * Map an L1 section for each device to make this easy.
961.2Smatt	 */
971.2Smatt	/* UART1 */
981.3Suebayasi	mrc	p15, 0, r0, c2, c0, 0		/* L1 table addr into r0 */
991.2Smatt	add	r0, r0, #(0xfd0 * 4)		/* offset to 0xfd000000 */
1001.2Smatt
1011.2Smatt	mov	r3,	#0x43000000
1021.2Smatt	orr	r3, r3,	#0x00f00000
1031.4Smatt	orr	r3, r3, #(L1_S_AP_KRW)
1041.2Smatt	orr	r3, r3, #(L1_TYPE_S)
1051.4Smatt	orr	r3, r3, #(L1_S_DOM_KERNEL)
1061.2Smatt	str	r3, [r0], #4			/* note autoinc */
1071.2Smatt
1081.2Smatt	/* etc, TBD... */
1091.2Smatt
1101.2Smatt	/*
1111.2Smatt	 * Make domain control go full art.
1121.2Smatt	 */
1131.2Smatt	mov	r0, #0xffffffff
1141.2Smatt	mcr	p15, 0, r0, c3, c0, 0
1151.2Smatt
1161.2Smatt	/*
1171.2Smatt	 * Now let's clean the cache again to make sure everything
1181.2Smatt	 * is in place.
1191.2Smatt	 *
1201.2Smatt	 * XXX: should this take into account the XScale cache clean bug?
1211.2Smatt	 */
1221.3Suebayasi	mov	r3, #(IMX31_DCACHE_SIZE)
1231.2Smatt	subs	r3, r3, #32
1241.2Smatt1:
1251.2Smatt	mcr	p15, 0, r3, c7, c10, 2
1261.2Smatt	subs	r3, r3, #32
1271.2Smatt	bne	1b
1281.2Smatt	CPWAIT(r3)
1291.2Smatt
1301.2Smatt	/* Drain write buffer */
1311.2Smatt	mcr	p15, 0, r6, c7, c10, 4
1321.2Smatt
1331.2Smatt	/* Invalidate TLBs just to be sure */
1341.2Smatt	mcr     p15, 0, r0, c8, c7, 0
1351.2Smatt
1361.2Smatt	/*
1371.2Smatt	 * You are standing at the gate to NetBSD. --More--
1381.2Smatt	 * Unspeakable cruelty and harm lurk down there. --More--
1391.2Smatt	 * Are you sure you want to enter?
1401.2Smatt	 */
1411.2Smatt	adr	r8, .Lstart
1421.2Smatt	ldr	r8, [r8]
1431.2Smatt	mov	pc, r8				/* So be it */
1441.2Smatt
1451.2Smatt/* symbol to use for address calculation in the right VA */
1461.2Smatt.Lstart:
1471.2Smatt	.word	start
1481.2Smatt
1491.2Smatt
1501.2Smatt/*
1511.2Smatt * Calculate size of kernel to copy.  Don't bother to copy bss,
1521.2Smatt * although I guess the CPU could use the warmup exercise ...
1531.2Smatt */
1541.2Smatt.Lcopy_size:
1551.2Smatt        .word _edata - _C_LABEL(imx31lk_start)
1561.2Smatt
157