intr.h revision 1.11
11.11Sbsh/*	$NetBSD: intr.h,v 1.11 2003/02/27 14:55:41 bsh Exp $	*/
21.1Smatt
31.1Smatt/*
41.10Sthorpej * Copyright (c) 2001, 2003 Wasabi Systems, Inc.
51.1Smatt * All rights reserved.
61.1Smatt *
71.7Sthorpej * Written by Jason R. Thorpe for Wasabi Systems, Inc.
81.7Sthorpej *
91.1Smatt * Redistribution and use in source and binary forms, with or without
101.1Smatt * modification, are permitted provided that the following conditions
111.1Smatt * are met:
121.1Smatt * 1. Redistributions of source code must retain the above copyright
131.1Smatt *    notice, this list of conditions and the following disclaimer.
141.1Smatt * 2. Redistributions in binary form must reproduce the above copyright
151.1Smatt *    notice, this list of conditions and the following disclaimer in the
161.1Smatt *    documentation and/or other materials provided with the distribution.
171.1Smatt * 3. All advertising materials mentioning features or use of this software
181.1Smatt *    must display the following acknowledgement:
191.7Sthorpej *	This product includes software developed for the NetBSD Project by
201.7Sthorpej *	Wasabi Systems, Inc.
211.7Sthorpej * 4. The name of Wasabi Systems, Inc. may not be used to endorse
221.7Sthorpej *    or promote products derived from this software without specific prior
231.7Sthorpej *    written permission.
241.1Smatt *
251.7Sthorpej * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
261.7Sthorpej * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
271.7Sthorpej * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
281.7Sthorpej * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
291.7Sthorpej * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
301.7Sthorpej * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
311.7Sthorpej * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
321.7Sthorpej * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
331.7Sthorpej * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
341.7Sthorpej * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
351.7Sthorpej * POSSIBILITY OF SUCH DAMAGE.
361.1Smatt */
371.1Smatt
381.7Sthorpej#ifndef	_EVBARM_INTR_H_
391.7Sthorpej#define	_EVBARM_INTR_H_
401.3Srearnsha
411.7Sthorpej#ifdef _KERNEL
421.3Srearnsha
431.7Sthorpej/* Interrupt priority "levels". */
441.7Sthorpej#define	IPL_NONE	0	/* nothing */
451.7Sthorpej#define	IPL_SOFT	1	/* generic software interrupts */
461.7Sthorpej#define	IPL_SOFTCLOCK	2	/* software clock interrupt */
471.7Sthorpej#define	IPL_SOFTNET	3	/* software network interrupt */
481.7Sthorpej#define	IPL_BIO		4	/* block I/O */
491.7Sthorpej#define	IPL_NET		5	/* network */
501.7Sthorpej#define	IPL_SOFTSERIAL	6	/* software serial interrupt */
511.7Sthorpej#define	IPL_TTY		7	/* terminals */
521.7Sthorpej#define	IPL_IMP		8	/* memory allocation */
531.7Sthorpej#define	IPL_AUDIO	9	/* audio device */
541.7Sthorpej#define	IPL_CLOCK	10	/* clock interrupt */
551.7Sthorpej#define	IPL_STATCLOCK	11	/* statistics clock interrupt */
561.7Sthorpej#define	IPL_HIGH	12	/* everything */
571.7Sthorpej#define	IPL_SERIAL	13	/* serial device */
581.3Srearnsha
591.7Sthorpej#define	NIPL		14
601.3Srearnsha
611.7Sthorpej/* Interrupt sharing types. */
621.7Sthorpej#define	IST_NONE	0	/* none */
631.3Srearnsha#define	IST_PULSE	1	/* pulsed */
641.3Srearnsha#define	IST_EDGE	2	/* edge-triggered */
651.3Srearnsha#define	IST_LEVEL	3	/* level-triggered */
661.11Sbsh
671.11Sbsh#define IST_LEVEL_LOW	 IST_LEVEL
681.11Sbsh#define IST_LEVEL_HIGH   4
691.11Sbsh#define IST_EDGE_FALLING IST_EDGE
701.11Sbsh#define IST_EDGE_RISING  5
711.11Sbsh#define IST_EDGE_BOTH    6
721.3Srearnsha
731.7Sthorpej#ifdef __OLD_INTERRUPT_CODE	/* XXX XXX XXX */
741.7Sthorpej
751.3Srearnsha/* Software interrupt priority levels */
761.3Srearnsha
771.7Sthorpej#define SOFTIRQ_CLOCK   0
781.7Sthorpej#define SOFTIRQ_NET     1
791.7Sthorpej#define SOFTIRQ_SERIAL  2
801.3Srearnsha
811.7Sthorpej#define SOFTIRQ_BIT(x)  (1 << x)
821.3Srearnsha
831.6Sthorpej#include <arm/arm32/psl.h>
841.1Smatt
851.7Sthorpej#else /* ! __OLD_INTERRUPT_CODE */
861.7Sthorpej
871.7Sthorpej#define	__NEWINTR	/* enables new hooks in cpu_fork()/cpu_switch() */
881.7Sthorpej
891.7Sthorpej#ifndef _LOCORE
901.7Sthorpej
911.7Sthorpej#include <sys/device.h>
921.7Sthorpej#include <sys/queue.h>
931.7Sthorpej
941.8Sbriggs#if defined(_LKM)
951.8Sbriggs
961.8Sbriggsint	_splraise(int);
971.8Sbriggsint	_spllower(int);
981.8Sbriggsvoid	splx(int);
991.8Sbriggsvoid	_setsoftintr(int);
1001.8Sbriggs
1011.8Sbriggs#else	/* _LKM */
1021.8Sbriggs
1031.10Sthorpej#include "opt_arm_intr_impl.h"
1041.8Sbriggs
1051.10Sthorpej#if defined(ARM_INTR_IMPL)
1061.8Sbriggs
1071.8Sbriggs/*
1081.8Sbriggs * Each board needs to define the following functions:
1091.8Sbriggs *
1101.8Sbriggs * int	_splraise(int);
1111.8Sbriggs * int	_spllower(int);
1121.8Sbriggs * void	splx(int);
1131.8Sbriggs * void	_setsoftintr(int);
1141.8Sbriggs *
1151.8Sbriggs * These may be defined as functions, static __inline functions, or macros,
1161.8Sbriggs * but there must be a _spllower() and splx() defined as functions callable
1171.8Sbriggs * from assembly language (for cpu_switch()).  However, since it's quite
1181.8Sbriggs * useful to be able to inline splx(), you could do something like the
1191.8Sbriggs * following:
1201.8Sbriggs *
1211.8Sbriggs * in <boardtype>_intr.h:
1221.8Sbriggs * 	static __inline int
1231.8Sbriggs *	boardtype_splx(int spl)
1241.8Sbriggs *	{...}
1251.8Sbriggs *
1261.8Sbriggs *	#define splx(nspl)	boardtype_splx(nspl)
1271.8Sbriggs *	...
1281.8Sbriggs * and in boardtype's machdep code:
1291.8Sbriggs *
1301.8Sbriggs *	...
1311.8Sbriggs *	#undef splx
1321.8Sbriggs *	int
1331.8Sbriggs *	splx(int spl)
1341.8Sbriggs *	{
1351.8Sbriggs *		return boardtype_splx(spl);
1361.8Sbriggs *	}
1371.8Sbriggs */
1381.8Sbriggs
1391.10Sthorpej#include ARM_INTR_IMPL
1401.8Sbriggs
1411.10Sthorpej#else /* ARM_INTR_IMPL */
1421.8Sbriggs
1431.10Sthorpej#error ARM_INTR_IMPL not defined.
1441.8Sbriggs
1451.10Sthorpej#endif	/* ARM_INTR_IMPL */
1461.8Sbriggs
1471.10Sthorpej#endif /* _LKM */
1481.7Sthorpej
1491.7Sthorpej#define	splhigh()	_splraise(IPL_HIGH)
1501.7Sthorpej#define	splsoft()	_splraise(IPL_SOFT)
1511.7Sthorpej#define	splsoftclock()	_splraise(IPL_SOFTCLOCK)
1521.7Sthorpej#define	splsoftnet()	_splraise(IPL_SOFTNET)
1531.7Sthorpej#define	splbio()	_splraise(IPL_BIO)
1541.7Sthorpej#define	splnet()	_splraise(IPL_NET)
1551.7Sthorpej#define	spltty()	_splraise(IPL_TTY)
1561.7Sthorpej#define	splvm()		_splraise(IPL_IMP)
1571.7Sthorpej#define	splaudio()	_splraise(IPL_AUDIO)
1581.7Sthorpej#define	splclock()	_splraise(IPL_CLOCK)
1591.7Sthorpej#define	splstatclock()	_splraise(IPL_STATCLOCK)
1601.7Sthorpej#define	splserial()	_splraise(IPL_SERIAL)
1611.7Sthorpej
1621.7Sthorpej#define	spl0()		_spllower(IPL_NONE)
1631.7Sthorpej#define	spllowersoftclock() _spllower(IPL_SOFTCLOCK)
1641.7Sthorpej
1651.7Sthorpej#define	splsched()	splhigh()
1661.7Sthorpej#define	spllock()	splhigh()
1671.7Sthorpej
1681.7Sthorpej/* Use generic software interrupt support. */
1691.7Sthorpej#include <arm/softintr.h>
1701.7Sthorpej
1711.10Sthorpej#endif /* ! _LOCORE */
1721.7Sthorpej
1731.7Sthorpej#endif /* __OLD_INTERRUPT_CODE */
1741.7Sthorpej
1751.7Sthorpej#endif /* _KERNEL */
1761.7Sthorpej
1771.7Sthorpej#endif	/* _EVBARM_INTR_H_ */
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