intr.h revision 1.18
11.18Sad/*	$NetBSD: intr.h,v 1.18 2007/12/03 15:33:32 ad Exp $	*/
21.1Smatt
31.1Smatt/*
41.10Sthorpej * Copyright (c) 2001, 2003 Wasabi Systems, Inc.
51.1Smatt * All rights reserved.
61.1Smatt *
71.7Sthorpej * Written by Jason R. Thorpe for Wasabi Systems, Inc.
81.7Sthorpej *
91.1Smatt * Redistribution and use in source and binary forms, with or without
101.1Smatt * modification, are permitted provided that the following conditions
111.1Smatt * are met:
121.1Smatt * 1. Redistributions of source code must retain the above copyright
131.1Smatt *    notice, this list of conditions and the following disclaimer.
141.1Smatt * 2. Redistributions in binary form must reproduce the above copyright
151.1Smatt *    notice, this list of conditions and the following disclaimer in the
161.1Smatt *    documentation and/or other materials provided with the distribution.
171.1Smatt * 3. All advertising materials mentioning features or use of this software
181.1Smatt *    must display the following acknowledgement:
191.7Sthorpej *	This product includes software developed for the NetBSD Project by
201.7Sthorpej *	Wasabi Systems, Inc.
211.7Sthorpej * 4. The name of Wasabi Systems, Inc. may not be used to endorse
221.7Sthorpej *    or promote products derived from this software without specific prior
231.7Sthorpej *    written permission.
241.1Smatt *
251.7Sthorpej * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
261.7Sthorpej * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
271.7Sthorpej * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
281.7Sthorpej * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
291.7Sthorpej * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
301.7Sthorpej * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
311.7Sthorpej * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
321.7Sthorpej * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
331.7Sthorpej * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
341.7Sthorpej * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
351.7Sthorpej * POSSIBILITY OF SUCH DAMAGE.
361.1Smatt */
371.1Smatt
381.7Sthorpej#ifndef	_EVBARM_INTR_H_
391.7Sthorpej#define	_EVBARM_INTR_H_
401.3Srearnsha
411.7Sthorpej#ifdef _KERNEL
421.3Srearnsha
431.7Sthorpej/* Interrupt priority "levels". */
441.7Sthorpej#define	IPL_NONE	0	/* nothing */
451.18Sad#define	IPL_SOFTCLOCK	1	/* clock */
461.18Sad#define	IPL_SOFTBIO	2	/* block I/O */
471.7Sthorpej#define	IPL_SOFTNET	3	/* software network interrupt */
481.18Sad#define	IPL_SOFTSERIAL	4	/* software serial interrupt */
491.18Sad#define	IPL_VM		5	/* memory allocation */
501.18Sad#define	IPL_SCHED	6	/* clock interrupt */
511.18Sad#define	IPL_HIGH	7	/* everything */
521.3Srearnsha
531.18Sad#define	NIPL		8
541.3Srearnsha
551.7Sthorpej/* Interrupt sharing types. */
561.7Sthorpej#define	IST_NONE	0	/* none */
571.3Srearnsha#define	IST_PULSE	1	/* pulsed */
581.3Srearnsha#define	IST_EDGE	2	/* edge-triggered */
591.3Srearnsha#define	IST_LEVEL	3	/* level-triggered */
601.11Sbsh
611.11Sbsh#define IST_LEVEL_LOW	 IST_LEVEL
621.11Sbsh#define IST_LEVEL_HIGH   4
631.11Sbsh#define IST_EDGE_FALLING IST_EDGE
641.11Sbsh#define IST_EDGE_RISING  5
651.11Sbsh#define IST_EDGE_BOTH    6
661.3Srearnsha
671.7Sthorpej#ifdef __OLD_INTERRUPT_CODE	/* XXX XXX XXX */
681.7Sthorpej
691.3Srearnsha/* Software interrupt priority levels */
701.3Srearnsha
711.7Sthorpej#define SOFTIRQ_CLOCK   0
721.18Sad#define SOFTIRQ_BIO     1
731.18Sad#define SOFTIRQ_NET     2
741.18Sad#define SOFTIRQ_SERIAL  3
751.3Srearnsha
761.7Sthorpej#define SOFTIRQ_BIT(x)  (1 << x)
771.3Srearnsha
781.6Sthorpej#include <arm/arm32/psl.h>
791.1Smatt
801.7Sthorpej#else /* ! __OLD_INTERRUPT_CODE */
811.7Sthorpej
821.7Sthorpej#define	__NEWINTR	/* enables new hooks in cpu_fork()/cpu_switch() */
831.7Sthorpej
841.7Sthorpej#ifndef _LOCORE
851.7Sthorpej
861.7Sthorpej#include <sys/device.h>
871.7Sthorpej#include <sys/queue.h>
881.7Sthorpej
891.8Sbriggs#if defined(_LKM)
901.8Sbriggs
911.8Sbriggsint	_splraise(int);
921.8Sbriggsint	_spllower(int);
931.8Sbriggsvoid	splx(int);
941.8Sbriggsvoid	_setsoftintr(int);
951.8Sbriggs
961.8Sbriggs#else	/* _LKM */
971.8Sbriggs
981.10Sthorpej#include "opt_arm_intr_impl.h"
991.8Sbriggs
1001.10Sthorpej#if defined(ARM_INTR_IMPL)
1011.8Sbriggs
1021.8Sbriggs/*
1031.8Sbriggs * Each board needs to define the following functions:
1041.8Sbriggs *
1051.8Sbriggs * int	_splraise(int);
1061.8Sbriggs * int	_spllower(int);
1071.8Sbriggs * void	splx(int);
1081.8Sbriggs * void	_setsoftintr(int);
1091.8Sbriggs *
1101.13Sperry * These may be defined as functions, static inline functions, or macros,
1111.8Sbriggs * but there must be a _spllower() and splx() defined as functions callable
1121.8Sbriggs * from assembly language (for cpu_switch()).  However, since it's quite
1131.8Sbriggs * useful to be able to inline splx(), you could do something like the
1141.8Sbriggs * following:
1151.8Sbriggs *
1161.8Sbriggs * in <boardtype>_intr.h:
1171.13Sperry * 	static inline int
1181.8Sbriggs *	boardtype_splx(int spl)
1191.8Sbriggs *	{...}
1201.8Sbriggs *
1211.8Sbriggs *	#define splx(nspl)	boardtype_splx(nspl)
1221.8Sbriggs *	...
1231.8Sbriggs * and in boardtype's machdep code:
1241.8Sbriggs *
1251.8Sbriggs *	...
1261.8Sbriggs *	#undef splx
1271.8Sbriggs *	int
1281.8Sbriggs *	splx(int spl)
1291.8Sbriggs *	{
1301.8Sbriggs *		return boardtype_splx(spl);
1311.8Sbriggs *	}
1321.8Sbriggs */
1331.8Sbriggs
1341.10Sthorpej#include ARM_INTR_IMPL
1351.8Sbriggs
1361.10Sthorpej#else /* ARM_INTR_IMPL */
1371.8Sbriggs
1381.10Sthorpej#error ARM_INTR_IMPL not defined.
1391.8Sbriggs
1401.10Sthorpej#endif	/* ARM_INTR_IMPL */
1411.8Sbriggs
1421.10Sthorpej#endif /* _LKM */
1431.7Sthorpej
1441.7Sthorpej#define	splsoft()	_splraise(IPL_SOFT)
1451.15Syamt
1461.17Sthorpejtypedef uint8_t ipl_t;
1471.15Syamttypedef struct {
1481.15Syamt	ipl_t _ipl;
1491.15Syamt} ipl_cookie_t;
1501.15Syamt
1511.15Syamtstatic inline ipl_cookie_t
1521.15Syamtmakeiplcookie(ipl_t ipl)
1531.15Syamt{
1541.15Syamt
1551.15Syamt	return (ipl_cookie_t){._ipl = ipl};
1561.15Syamt}
1571.15Syamt
1581.15Syamtstatic inline int
1591.15Syamtsplraiseipl(ipl_cookie_t icookie)
1601.15Syamt{
1611.15Syamt
1621.15Syamt	return _splraise(icookie._ipl);
1631.15Syamt}
1641.7Sthorpej
1651.7Sthorpej#define	spl0()		_spllower(IPL_NONE)
1661.7Sthorpej
1671.14Syamt#include <sys/spl.h>
1681.7Sthorpej
1691.7Sthorpej/* Use generic software interrupt support. */
1701.7Sthorpej#include <arm/softintr.h>
1711.7Sthorpej
1721.10Sthorpej#endif /* ! _LOCORE */
1731.7Sthorpej
1741.7Sthorpej#endif /* __OLD_INTERRUPT_CODE */
1751.7Sthorpej
1761.7Sthorpej#endif /* _KERNEL */
1771.7Sthorpej
1781.7Sthorpej#endif	/* _EVBARM_INTR_H_ */
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