integrator_machdep.c revision 1.26
1 /* $NetBSD: integrator_machdep.c,v 1.26 2002/08/21 18:34:32 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 2001,2002 ARM Ltd 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the company may not be used to endorse or promote 16 * products derived from this software without specific prior written 17 * permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ARM LTD 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * Copyright (c) 1997,1998 Mark Brinicombe. 34 * Copyright (c) 1997,1998 Causality Limited. 35 * All rights reserved. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 1. Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * 2. Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in the 44 * documentation and/or other materials provided with the distribution. 45 * 3. All advertising materials mentioning features or use of this software 46 * must display the following acknowledgement: 47 * This product includes software developed by Mark Brinicombe 48 * for the NetBSD Project. 49 * 4. The name of the company nor the name of the author may be used to 50 * endorse or promote products derived from this software without specific 51 * prior written permission. 52 * 53 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 54 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 55 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 56 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 57 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 58 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 59 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 60 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 61 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 62 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 63 * SUCH DAMAGE. 64 * 65 * Machine dependant functions for kernel setup for integrator board 66 * 67 * Created : 24/11/97 68 */ 69 70 #include "opt_ddb.h" 71 #include "opt_pmap_debug.h" 72 73 #include <sys/param.h> 74 #include <sys/device.h> 75 #include <sys/systm.h> 76 #include <sys/kernel.h> 77 #include <sys/exec.h> 78 #include <sys/proc.h> 79 #include <sys/msgbuf.h> 80 #include <sys/reboot.h> 81 #include <sys/termios.h> 82 83 #include <dev/cons.h> 84 85 #include <machine/db_machdep.h> 86 #include <ddb/db_sym.h> 87 #include <ddb/db_extern.h> 88 89 #include <machine/bootconfig.h> 90 #include <machine/bus.h> 91 #include <machine/cpu.h> 92 #include <machine/frame.h> 93 #include <machine/intr.h> 94 #include <evbarm/ifpga/irqhandler.h> /* XXX XXX XXX */ 95 #include <arm/undefined.h> 96 97 #include <arm/arm32/machdep.h> 98 99 #include <evbarm/integrator/integrator_boot.h> 100 101 #include "opt_ipkdb.h" 102 #include "pci.h" 103 104 void ifpga_reset(void) __attribute__((noreturn)); 105 /* 106 * Address to call from cpu_reset() to reset the machine. 107 * This is machine architecture dependant as it varies depending 108 * on where the ROM appears when you turn the MMU off. 109 */ 110 111 u_int cpu_reset_address = (u_int) ifpga_reset; 112 113 /* Define various stack sizes in pages */ 114 #define IRQ_STACK_SIZE 1 115 #define ABT_STACK_SIZE 1 116 #ifdef IPKDB 117 #define UND_STACK_SIZE 2 118 #else 119 #define UND_STACK_SIZE 1 120 #endif 121 122 BootConfig bootconfig; /* Boot config storage */ 123 char *boot_args = NULL; 124 char *boot_file = NULL; 125 126 vm_offset_t physical_start; 127 vm_offset_t physical_freestart; 128 vm_offset_t physical_freeend; 129 vm_offset_t physical_end; 130 u_int free_pages; 131 vm_offset_t pagetables_start; 132 int physmem = 0; 133 134 /*int debug_flags;*/ 135 #ifndef PMAP_STATIC_L1S 136 int max_processes = 64; /* Default number */ 137 #endif /* !PMAP_STATIC_L1S */ 138 139 /* Physical and virtual addresses for some global pages */ 140 pv_addr_t systempage; 141 pv_addr_t irqstack; 142 pv_addr_t undstack; 143 pv_addr_t abtstack; 144 pv_addr_t kernelstack; 145 146 vm_offset_t msgbufphys; 147 148 extern u_int data_abort_handler_address; 149 extern u_int prefetch_abort_handler_address; 150 extern u_int undefined_handler_address; 151 152 #ifdef PMAP_DEBUG 153 extern int pmap_debug_level; 154 #endif 155 156 #define KERNEL_PT_SYS 0 /* L2 table for mapping zero page */ 157 158 #define KERNEL_PT_KERNEL 1 /* L2 table for mapping kernel */ 159 #define KERNEL_PT_KERNEL_NUM 2 160 /* L2 tables for mapping kernel VM */ 161 #define KERNEL_PT_VMDATA (KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM) 162 #define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */ 163 #define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM) 164 165 pv_addr_t kernel_pt_table[NUM_KERNEL_PTS]; 166 167 struct user *proc0paddr; 168 169 /* Prototypes */ 170 171 static void integrator_sdram_bounds (paddr_t *, psize_t *); 172 173 void consinit(void); 174 175 /* A load of console goo. */ 176 #include "vga.h" 177 #if NVGA > 0 178 #include <dev/ic/mc6845reg.h> 179 #include <dev/ic/pcdisplayvar.h> 180 #include <dev/ic/vgareg.h> 181 #include <dev/ic/vgavar.h> 182 #endif 183 184 #include "pckbc.h" 185 #if NPCKBC > 0 186 #include <dev/ic/i8042reg.h> 187 #include <dev/ic/pckbcvar.h> 188 #endif 189 190 #include "com.h" 191 #if NCOM > 0 192 #include <dev/ic/comreg.h> 193 #include <dev/ic/comvar.h> 194 #ifndef CONCOMADDR 195 #define CONCOMADDR 0x3f8 196 #endif 197 #endif 198 199 /* 200 * Define the default console speed for the board. This is generally 201 * what the firmware provided with the board defaults to. 202 */ 203 #define CONSPEED B115200 204 #ifndef CONSPEED 205 #define CONSPEED B9600 /* TTYDEF_SPEED */ 206 #endif 207 #ifndef CONMODE 208 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 209 #endif 210 211 int comcnspeed = CONSPEED; 212 int comcnmode = CONMODE; 213 214 #include "plcom.h" 215 #if (NPLCOM > 0) 216 #include <evbarm/dev/plcomreg.h> 217 #include <evbarm/dev/plcomvar.h> 218 219 #include <evbarm/ifpga/ifpgamem.h> 220 #include <evbarm/ifpga/ifpgareg.h> 221 #include <evbarm/ifpga/ifpgavar.h> 222 #endif 223 224 #ifndef CONSDEVNAME 225 #define CONSDEVNAME "plcom" 226 #endif 227 228 #ifndef PLCONSPEED 229 #define PLCONSPEED B38400 230 #endif 231 #ifndef PLCONMODE 232 #define PLCONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 233 #endif 234 #ifndef PLCOMCNUNIT 235 #define PLCOMCNUNIT -1 236 #endif 237 238 int plcomcnspeed = PLCONSPEED; 239 int plcomcnmode = PLCONMODE; 240 241 #if 0 242 extern struct consdev kcomcons; 243 static void kcomcnputc(dev_t, int); 244 #endif 245 246 /* 247 * void cpu_reboot(int howto, char *bootstr) 248 * 249 * Reboots the system 250 * 251 * Deal with any syncing, unmounting, dumping and shutdown hooks, 252 * then reset the CPU. 253 */ 254 void 255 cpu_reboot(int howto, char *bootstr) 256 { 257 #ifdef DIAGNOSTIC 258 /* info */ 259 printf("boot: howto=%08x curproc=%p\n", howto, curproc); 260 #endif 261 262 /* 263 * If we are still cold then hit the air brakes 264 * and crash to earth fast 265 */ 266 if (cold) { 267 doshutdownhooks(); 268 printf("The operating system has halted.\n"); 269 printf("Please press any key to reboot.\n\n"); 270 cngetc(); 271 printf("rebooting...\n"); 272 ifpga_reset(); 273 /*NOTREACHED*/ 274 } 275 276 /* Disable console buffering */ 277 278 /* 279 * If RB_NOSYNC was not specified sync the discs. 280 * Note: Unless cold is set to 1 here, syslogd will die during the 281 * unmount. It looks like syslogd is getting woken up only to find 282 * that it cannot page part of the binary in as the filesystem has 283 * been unmounted. 284 */ 285 if (!(howto & RB_NOSYNC)) 286 bootsync(); 287 288 /* Say NO to interrupts */ 289 splhigh(); 290 291 /* Do a dump if requested. */ 292 if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP) 293 dumpsys(); 294 295 /* Run any shutdown hooks */ 296 doshutdownhooks(); 297 298 /* Make sure IRQ's are disabled */ 299 IRQdisable; 300 301 if (howto & RB_HALT) { 302 printf("The operating system has halted.\n"); 303 printf("Please press any key to reboot.\n\n"); 304 cngetc(); 305 } 306 307 printf("rebooting...\n"); 308 ifpga_reset(); 309 /*NOTREACHED*/ 310 } 311 312 /* 313 * Mapping table for core kernel memory. This memory is mapped at init 314 * time with section mappings. 315 */ 316 struct l1_sec_map { 317 vaddr_t va; 318 vaddr_t pa; 319 vsize_t size; 320 vm_prot_t prot; 321 int cache; 322 } l1_sec_table[] = { 323 #if NPLCOM > 0 && defined(PLCONSOLE) 324 { 325 UART0_BOOT_BASE, 326 IFPGA_IO_BASE + IFPGA_UART0, 327 1024 * 1024, 328 VM_PROT_READ|VM_PROT_WRITE, 329 PTE_NOCACHE 330 }, 331 332 { 333 UART1_BOOT_BASE, 334 IFPGA_IO_BASE + IFPGA_UART1, 335 1024 * 1024, 336 VM_PROT_READ|VM_PROT_WRITE, 337 PTE_NOCACHE 338 }, 339 #endif 340 #if NPCI > 0 341 { 342 IFPGA_PCI_IO_VBASE, 343 IFPGA_PCI_IO_BASE, 344 IFPGA_PCI_IO_VSIZE, 345 VM_PROT_READ|VM_PROT_WRITE, 346 PTE_NOCACHE 347 }, 348 349 { 350 IFPGA_PCI_CONF_VBASE, 351 IFPGA_PCI_CONF_BASE, 352 IFPGA_PCI_CONF_VSIZE, 353 VM_PROT_READ|VM_PROT_WRITE, 354 PTE_NOCACHE }, 355 #endif 356 357 { 358 0, 359 0, 360 0, 361 0, 362 0 363 } 364 }; 365 366 /* 367 * u_int initarm(...) 368 * 369 * Initial entry point on startup. This gets called before main() is 370 * entered. 371 * It should be responsible for setting up everything that must be 372 * in place when main is called. 373 * This includes 374 * Taking a copy of the boot configuration structure. 375 * Initialising the physical console so characters can be printed. 376 * Setting up page tables for the kernel 377 * Relocating the kernel to the bottom of physical memory 378 */ 379 380 u_int 381 initarm(void *arg) 382 { 383 int loop; 384 int loop1; 385 u_int l1pagetable; 386 extern int etext asm ("_etext"); 387 extern int end asm ("_end"); 388 pv_addr_t kernel_l1pt; 389 pv_addr_t kernel_ptpt; 390 paddr_t memstart; 391 psize_t memsize; 392 #if NPLCOM > 0 && defined(PLCONSOLE) 393 static struct bus_space plcom_bus_space; 394 #endif 395 396 /* 397 * Heads up ... Setup the CPU / MMU / TLB functions 398 */ 399 if (set_cpufuncs()) 400 panic("cpu not recognized!"); 401 402 #if NPLCOM > 0 && defined(PLCONSOLE) 403 /* 404 * Initialise the diagnostic serial console 405 * This allows a means of generating output during initarm(). 406 * Once all the memory map changes are complete we can call consinit() 407 * and not have to worry about things moving. 408 */ 409 410 if (PLCOMCNUNIT == 0) { 411 ifpga_create_io_bs_tag(&plcom_bus_space, (void*)0xfd600000); 412 plcomcnattach(&plcom_bus_space, 0, plcomcnspeed, 413 IFPGA_UART_CLK, plcomcnmode, PLCOMCNUNIT); 414 } else if (PLCOMCNUNIT == 1) { 415 ifpga_create_io_bs_tag(&plcom_bus_space, (void*)0xfd700000); 416 plcomcnattach(&plcom_bus_space, 0, plcomcnspeed, 417 IFPGA_UART_CLK, plcomcnmode, PLCOMCNUNIT); 418 } 419 #endif 420 421 /* Talk to the user */ 422 printf("\nNetBSD/evbarm (Integrator) booting ...\n"); 423 424 /* 425 * Ok we have the following memory map 426 * 427 * XXX NO WE DON'T 428 * 429 * virtual address == physical address apart from the areas: 430 * 0x00000000 -> 0x000fffff which is mapped to 431 * top 1MB of physical memory 432 * 0x00100000 -> 0x0fffffff which is mapped to 433 * physical addresses 0x00100000 -> 0x0fffffff 434 * 0x10000000 -> 0x1fffffff which is mapped to 435 * physical addresses 0x00000000 -> 0x0fffffff 436 * 0x20000000 -> 0xefffffff which is mapped to 437 * physical addresses 0x20000000 -> 0xefffffff 438 * 0xf0000000 -> 0xf03fffff which is mapped to 439 * physical addresses 0x00000000 -> 0x003fffff 440 * 441 * This means that the kernel is mapped suitably for continuing 442 * execution, all I/O is mapped 1:1 virtual to physical and 443 * physical memory is accessible. 444 * 445 * The initarm() has the responsibility for creating the kernel 446 * page tables. 447 * It must also set up various memory pointers that are used 448 * by pmap etc. 449 */ 450 451 /* 452 * Fetch the SDRAM start/size from the CM configuration registers. 453 */ 454 integrator_sdram_bounds(&memstart, &memsize); 455 456 printf("initarm: Configuring system ...\n"); 457 458 /* Fake bootconfig structure for the benefit of pmap.c */ 459 /* XXX must make the memory description h/w independent */ 460 bootconfig.dramblocks = 1; 461 bootconfig.dram[0].address = memstart; 462 bootconfig.dram[0].pages = memsize / NBPG; 463 464 /* 465 * Set up the variables that define the availablilty of 466 * physical memory. For now, we're going to set 467 * physical_freestart to 0x00200000 (where the kernel 468 * was loaded), and allocate the memory we need downwards. 469 * If we get too close to the L1 table that we set up, we 470 * will panic. We will update physical_freestart and 471 * physical_freeend later to reflect what pmap_bootstrap() 472 * wants to see. 473 * 474 * XXX pmap_bootstrap() needs an enema. 475 */ 476 physical_start = bootconfig.dram[0].address; 477 physical_end = physical_start + (bootconfig.dram[0].pages * NBPG); 478 479 physical_freestart = 0x00009000UL; 480 physical_freeend = 0x00200000UL; 481 482 physmem = (physical_end - physical_start) / NBPG; 483 484 /* Tell the user about the memory */ 485 printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem, 486 physical_start, physical_end - 1); 487 488 /* 489 * Okay, the kernel starts 2MB in from the bottom of physical 490 * memory. We are going to allocate our bootstrap pages downwards 491 * from there. 492 * 493 * We need to allocate some fixed page tables to get the kernel 494 * going. We allocate one page directory and a number of page 495 * tables and store the physical addresses in the kernel_pt_table 496 * array. 497 * 498 * The kernel page directory must be on a 16K boundary. The page 499 * tables must be on 4K bounaries. What we do is allocate the 500 * page directory on the first 16K boundary that we encounter, and 501 * the page tables on 4K boundaries otherwise. Since we allocate 502 * at least 3 L2 page tables, we are guaranteed to encounter at 503 * least one 16K aligned region. 504 */ 505 506 #ifdef VERBOSE_INIT_ARM 507 printf("Allocating page tables\n"); 508 #endif 509 510 free_pages = (physical_freeend - physical_freestart) / NBPG; 511 512 #ifdef VERBOSE_INIT_ARM 513 printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n", 514 physical_freestart, free_pages, free_pages); 515 #endif 516 517 /* Define a macro to simplify memory allocation */ 518 #define valloc_pages(var, np) \ 519 alloc_pages((var).pv_pa, (np)); \ 520 (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start; 521 522 #define alloc_pages(var, np) \ 523 physical_freeend -= ((np) * NBPG); \ 524 if (physical_freeend < physical_freestart) \ 525 panic("initarm: out of memory"); \ 526 (var) = physical_freeend; \ 527 free_pages -= (np); \ 528 memset((char *)(var), 0, ((np) * NBPG)); 529 530 loop1 = 0; 531 kernel_l1pt.pv_pa = 0; 532 for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) { 533 /* Are we 16KB aligned for an L1 ? */ 534 if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0 535 && kernel_l1pt.pv_pa == 0) { 536 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / NBPG); 537 } else { 538 alloc_pages(kernel_pt_table[loop1].pv_pa, 539 L2_TABLE_SIZE / NBPG); 540 kernel_pt_table[loop1].pv_va = 541 kernel_pt_table[loop1].pv_pa; 542 ++loop1; 543 } 544 } 545 546 /* This should never be able to happen but better confirm that. */ 547 if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE-1)) != 0) 548 panic("initarm: Failed to align the kernel page directory\n"); 549 550 /* 551 * Allocate a page for the system page mapped to V0x00000000 552 * This page will just contain the system vectors and can be 553 * shared by all processes. 554 */ 555 alloc_pages(systempage.pv_pa, 1); 556 557 /* Allocate a page for the page table to map kernel page tables. */ 558 valloc_pages(kernel_ptpt, L2_TABLE_SIZE / NBPG); 559 560 /* Allocate stacks for all modes */ 561 valloc_pages(irqstack, IRQ_STACK_SIZE); 562 valloc_pages(abtstack, ABT_STACK_SIZE); 563 valloc_pages(undstack, UND_STACK_SIZE); 564 valloc_pages(kernelstack, UPAGES); 565 566 #ifdef VERBOSE_INIT_ARM 567 printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa, 568 irqstack.pv_va); 569 printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa, 570 abtstack.pv_va); 571 printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa, 572 undstack.pv_va); 573 printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa, 574 kernelstack.pv_va); 575 #endif 576 577 alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / NBPG); 578 579 /* 580 * Ok we have allocated physical pages for the primary kernel 581 * page tables 582 */ 583 584 #ifdef VERBOSE_INIT_ARM 585 printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa); 586 #endif 587 588 /* 589 * Now we start construction of the L1 page table 590 * We start by mapping the L2 page tables into the L1. 591 * This means that we can replace L1 mappings later on if necessary 592 */ 593 l1pagetable = kernel_l1pt.pv_pa; 594 595 /* Map the L2 pages tables in the L1 page table */ 596 pmap_link_l2pt(l1pagetable, 0x00000000, 597 &kernel_pt_table[KERNEL_PT_SYS]); 598 for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++) 599 pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000, 600 &kernel_pt_table[KERNEL_PT_KERNEL + loop]); 601 for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++) 602 pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000, 603 &kernel_pt_table[KERNEL_PT_VMDATA + loop]); 604 pmap_link_l2pt(l1pagetable, PTE_BASE, &kernel_ptpt); 605 606 /* update the top of the kernel VM */ 607 pmap_curmaxkvaddr = 608 KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000); 609 610 #ifdef VERBOSE_INIT_ARM 611 printf("Mapping kernel\n"); 612 #endif 613 614 /* Now we fill in the L2 pagetable for the kernel static code/data */ 615 { 616 size_t textsize = (uintptr_t) &etext - KERNEL_TEXT_BASE; 617 size_t totalsize = (uintptr_t) &end - KERNEL_TEXT_BASE; 618 u_int logical; 619 620 textsize = (textsize + PGOFSET) & ~PGOFSET; 621 totalsize = (totalsize + PGOFSET) & ~PGOFSET; 622 623 logical = 0x00200000; /* offset of kernel in RAM */ 624 625 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical, 626 physical_start + logical, textsize, 627 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 628 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical, 629 physical_start + logical, totalsize - textsize, 630 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 631 } 632 633 #ifdef VERBOSE_INIT_ARM 634 printf("Constructing L2 page tables\n"); 635 #endif 636 637 /* Map the stack pages */ 638 pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa, 639 IRQ_STACK_SIZE * NBPG, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 640 pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa, 641 ABT_STACK_SIZE * NBPG, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 642 pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa, 643 UND_STACK_SIZE * NBPG, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 644 pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa, 645 UPAGES * NBPG, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 646 647 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa, 648 L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 649 650 /* Map the page table that maps the kernel pages */ 651 pmap_map_entry(l1pagetable, kernel_ptpt.pv_va, kernel_ptpt.pv_pa, 652 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE); 653 654 /* 655 * Map entries in the page table used to map PTE's 656 * Basically every kernel page table gets mapped here 657 */ 658 /* The -2 is slightly bogus, it should be -log2(sizeof(pt_entry_t)) */ 659 for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++) { 660 pmap_map_entry(l1pagetable, 661 PTE_BASE + ((KERNEL_BASE + 662 (loop * 0x00400000)) >> (PGSHIFT-2)), 663 kernel_pt_table[KERNEL_PT_KERNEL + loop].pv_pa, 664 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE); 665 } 666 pmap_map_entry(l1pagetable, 667 PTE_BASE + (PTE_BASE >> (PGSHIFT-2)), 668 kernel_ptpt.pv_pa, VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE); 669 pmap_map_entry(l1pagetable, 670 PTE_BASE + (0x00000000 >> (PGSHIFT-2)), 671 kernel_pt_table[KERNEL_PT_SYS].pv_pa, 672 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE); 673 for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++) 674 pmap_map_entry(l1pagetable, 675 PTE_BASE + ((KERNEL_VM_BASE + 676 (loop * 0x00400000)) >> (PGSHIFT-2)), 677 kernel_pt_table[KERNEL_PT_VMDATA + loop].pv_pa, 678 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE); 679 680 /* Map the vector page. */ 681 #if 1 682 /* MULTI-ICE requires that page 0 is NC/NB so that it can download 683 the cache-clean code there. */ 684 pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa, 685 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE); 686 #else 687 pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa, 688 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 689 #endif 690 /* Map the core memory needed before autoconfig */ 691 loop = 0; 692 while (l1_sec_table[loop].size) { 693 vm_size_t sz; 694 695 #ifdef VERBOSE_INIT_ARM 696 printf("%08lx -> %08lx @ %08lx\n", l1_sec_table[loop].pa, 697 l1_sec_table[loop].pa + l1_sec_table[loop].size - 1, 698 l1_sec_table[loop].va); 699 #endif 700 for (sz = 0; sz < l1_sec_table[loop].size; sz += L1_S_SIZE) 701 pmap_map_section(l1pagetable, 702 l1_sec_table[loop].va + sz, 703 l1_sec_table[loop].pa + sz, 704 l1_sec_table[loop].prot, 705 l1_sec_table[loop].cache); 706 ++loop; 707 } 708 709 /* 710 * Now we have the real page tables in place so we can switch to them. 711 * Once this is done we will be running with the REAL kernel page 712 * tables. 713 */ 714 715 /* 716 * Update the physical_freestart/physical_freeend/free_pages 717 * variables. 718 */ 719 { 720 physical_freestart = physical_start + 721 (((((uintptr_t) &end) + PGOFSET) & ~PGOFSET) - 722 KERNEL_BASE); 723 physical_freeend = physical_end; 724 free_pages = (physical_freeend - physical_freestart) / NBPG; 725 } 726 727 /* Switch tables */ 728 #ifdef VERBOSE_INIT_ARM 729 printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n", 730 physical_freestart, free_pages, free_pages); 731 printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa); 732 #endif 733 setttb(kernel_l1pt.pv_pa); 734 cpu_tlb_flushID(); 735 736 #ifdef VERBOSE_INIT_ARM 737 printf("done!\n"); 738 #endif 739 740 #ifdef PLCONSOLE 741 /* 742 * The IFPGA registers have just moved. 743 * Detach the diagnostic serial port and reattach at the new address. 744 */ 745 plcomcndetach(); 746 #endif 747 748 /* 749 * XXX this should only be done in main() but it useful to 750 * have output earlier ... 751 */ 752 consinit(); 753 754 #ifdef VERBOSE_INIT_ARM 755 printf("bootstrap done.\n"); 756 #endif 757 758 arm32_vector_init(ARM_VECTORS_LOW, ARM_VEC_ALL); 759 760 /* 761 * Pages were allocated during the secondary bootstrap for the 762 * stacks for different CPU modes. 763 * We must now set the r13 registers in the different CPU modes to 764 * point to these stacks. 765 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 766 * of the stack memory. 767 */ 768 printf("init subsystems: stacks "); 769 770 set_stackptr(PSR_IRQ32_MODE, irqstack.pv_va + IRQ_STACK_SIZE * NBPG); 771 set_stackptr(PSR_ABT32_MODE, abtstack.pv_va + ABT_STACK_SIZE * NBPG); 772 set_stackptr(PSR_UND32_MODE, undstack.pv_va + UND_STACK_SIZE * NBPG); 773 774 /* 775 * Well we should set a data abort handler. 776 * Once things get going this will change as we will need a proper 777 * handler. 778 * Until then we will use a handler that just panics but tells us 779 * why. 780 * Initialisation of the vectors will just panic on a data abort. 781 * This just fills in a slighly better one. 782 */ 783 printf("vectors "); 784 data_abort_handler_address = (u_int)data_abort_handler; 785 prefetch_abort_handler_address = (u_int)prefetch_abort_handler; 786 undefined_handler_address = (u_int)undefinedinstruction_bounce; 787 788 /* Initialise the undefined instruction handlers */ 789 printf("undefined "); 790 undefined_init(); 791 792 /* Load memory into UVM. */ 793 printf("page "); 794 uvm_setpagesize(); /* initialize PAGE_SIZE-dependent variables */ 795 uvm_page_physload(atop(physical_freestart), atop(physical_freeend), 796 atop(physical_freestart), atop(physical_freeend), 797 VM_FREELIST_DEFAULT); 798 799 /* Boot strap pmap telling it where the kernel page table is */ 800 printf("pmap "); 801 pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, kernel_ptpt); 802 803 /* Setup the IRQ system */ 804 printf("irq "); 805 irq_init(); 806 807 printf("done.\n"); 808 809 #ifdef IPKDB 810 /* Initialise ipkdb */ 811 ipkdb_init(); 812 if (boothowto & RB_KDB) 813 ipkdb_connect(0); 814 #endif 815 816 #ifdef DDB 817 db_machine_init(); 818 819 /* Firmware doesn't load symbols. */ 820 ddb_init(0, NULL, NULL); 821 822 if (boothowto & RB_KDB) 823 Debugger(); 824 #endif 825 826 /* We return the new stack pointer address */ 827 return(kernelstack.pv_va + USPACE_SVC_STACK_TOP); 828 } 829 830 void 831 consinit(void) 832 { 833 static int consinit_called = 0; 834 #if NPLCOM > 0 && defined(PLCONSOLE) 835 static struct bus_space plcom_bus_space; 836 #endif 837 #if 0 838 char *console = CONSDEVNAME; 839 #endif 840 841 if (consinit_called != 0) 842 return; 843 844 consinit_called = 1; 845 846 #if NPLCOM > 0 && defined(PLCONSOLE) 847 if (PLCOMCNUNIT == 0) { 848 ifpga_create_io_bs_tag(&plcom_bus_space, 849 (void*)UART0_BOOT_BASE); 850 if (plcomcnattach(&plcom_bus_space, 0, plcomcnspeed, 851 IFPGA_UART_CLK, plcomcnmode, PLCOMCNUNIT)) 852 panic("can't init serial console"); 853 return; 854 } else if (PLCOMCNUNIT == 1) { 855 ifpga_create_io_bs_tag(&plcom_bus_space, 856 (void*)UART0_BOOT_BASE); 857 if (plcomcnattach(&plcom_bus_space, 0, plcomcnspeed, 858 IFPGA_UART_CLK, plcomcnmode, PLCOMCNUNIT)) 859 panic("can't init serial console"); 860 return; 861 } 862 #endif 863 #if (NCOM > 0) 864 if (comcnattach(&isa_io_bs_tag, CONCOMADDR, comcnspeed, 865 COM_FREQ, comcnmode)) 866 panic("can't init serial console @%x", CONCOMADDR); 867 return; 868 #endif 869 panic("No serial console configured"); 870 } 871 872 static void 873 integrator_sdram_bounds(paddr_t *memstart, psize_t *memsize) 874 { 875 volatile unsigned long *cm_sdram 876 = (volatile unsigned long *)0x10000020; 877 878 *memstart = 0; 879 880 switch ((*cm_sdram >> 2) & 0x7) 881 { 882 case 0: 883 *memsize = 16 * 1024 * 1024; 884 break; 885 case 1: 886 *memsize = 32 * 1024 * 1024; 887 break; 888 case 2: 889 *memsize = 64 * 1024 * 1024; 890 break; 891 case 3: 892 *memsize = 128 * 1024 * 1024; 893 break; 894 case 4: 895 *memsize = 256 * 1024 * 1024; 896 break; 897 default: 898 printf("CM_SDRAM retuns unknown value, using 16M\n"); 899 *memsize = 16 * 1024 * 1024; 900 break; 901 } 902 } 903
Indexes created Tue Sep 30 07:10:03 GMT 2025