i80312_mainbus.c revision 1.3.2.2
1 1.3.2.2 thorpej /* $NetBSD: i80312_mainbus.c,v 1.3.2.2 2001/11/12 21:16:52 thorpej Exp $ */ 2 1.3.2.2 thorpej 3 1.3.2.2 thorpej /* 4 1.3.2.2 thorpej * Copyright (c) 2001 Wasabi Systems, Inc. 5 1.3.2.2 thorpej * All rights reserved. 6 1.3.2.2 thorpej * 7 1.3.2.2 thorpej * Written by Jason R. Thorpe for Wasabi Systems, Inc. 8 1.3.2.2 thorpej * 9 1.3.2.2 thorpej * Redistribution and use in source and binary forms, with or without 10 1.3.2.2 thorpej * modification, are permitted provided that the following conditions 11 1.3.2.2 thorpej * are met: 12 1.3.2.2 thorpej * 1. Redistributions of source code must retain the above copyright 13 1.3.2.2 thorpej * notice, this list of conditions and the following disclaimer. 14 1.3.2.2 thorpej * 2. Redistributions in binary form must reproduce the above copyright 15 1.3.2.2 thorpej * notice, this list of conditions and the following disclaimer in the 16 1.3.2.2 thorpej * documentation and/or other materials provided with the distribution. 17 1.3.2.2 thorpej * 3. All advertising materials mentioning features or use of this software 18 1.3.2.2 thorpej * must display the following acknowledgement: 19 1.3.2.2 thorpej * This product includes software developed for the NetBSD Project by 20 1.3.2.2 thorpej * Wasabi Systems, Inc. 21 1.3.2.2 thorpej * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 1.3.2.2 thorpej * or promote products derived from this software without specific prior 23 1.3.2.2 thorpej * written permission. 24 1.3.2.2 thorpej * 25 1.3.2.2 thorpej * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 1.3.2.2 thorpej * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 1.3.2.2 thorpej * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 1.3.2.2 thorpej * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 1.3.2.2 thorpej * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 1.3.2.2 thorpej * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 1.3.2.2 thorpej * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 1.3.2.2 thorpej * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 1.3.2.2 thorpej * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 1.3.2.2 thorpej * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 1.3.2.2 thorpej * POSSIBILITY OF SUCH DAMAGE. 36 1.3.2.2 thorpej */ 37 1.3.2.2 thorpej 38 1.3.2.2 thorpej /* 39 1.3.2.2 thorpej * IQ80310 front-end for the i80312 Companion I/O chip. We take care 40 1.3.2.2 thorpej * of setting up the i80312 memory map, PCI interrupt routing, etc., 41 1.3.2.2 thorpej * which are all specific to the board the i80312 is wired up to. 42 1.3.2.2 thorpej */ 43 1.3.2.2 thorpej 44 1.3.2.2 thorpej #include <sys/param.h> 45 1.3.2.2 thorpej #include <sys/systm.h> 46 1.3.2.2 thorpej #include <sys/device.h> 47 1.3.2.2 thorpej 48 1.3.2.2 thorpej #include <machine/autoconf.h> 49 1.3.2.2 thorpej #include <machine/bus.h> 50 1.3.2.2 thorpej 51 1.3.2.2 thorpej #include <evbarm/iq80310/iq80310reg.h> 52 1.3.2.2 thorpej #include <evbarm/iq80310/iq80310var.h> 53 1.3.2.2 thorpej 54 1.3.2.2 thorpej #include <arm/xscale/i80312reg.h> 55 1.3.2.2 thorpej #include <arm/xscale/i80312var.h> 56 1.3.2.2 thorpej 57 1.3.2.2 thorpej #include <dev/pci/pcireg.h> 58 1.3.2.2 thorpej #include <dev/pci/pcidevs.h> 59 1.3.2.2 thorpej 60 1.3.2.2 thorpej int i80312_mainbus_match(struct device *, struct cfdata *, void *); 61 1.3.2.2 thorpej void i80312_mainbus_attach(struct device *, struct device *, void *); 62 1.3.2.2 thorpej 63 1.3.2.2 thorpej struct cfattach iopxs_mainbus_ca = { 64 1.3.2.2 thorpej sizeof(struct i80312_softc), i80312_mainbus_match, 65 1.3.2.2 thorpej i80312_mainbus_attach, 66 1.3.2.2 thorpej }; 67 1.3.2.2 thorpej 68 1.3.2.2 thorpej /* There can be only one. */ 69 1.3.2.2 thorpej int i80312_mainbus_found; 70 1.3.2.2 thorpej 71 1.3.2.2 thorpej int 72 1.3.2.2 thorpej i80312_mainbus_match(struct device *parent, struct cfdata *cf, void *aux) 73 1.3.2.2 thorpej { 74 1.3.2.2 thorpej #if 0 75 1.3.2.2 thorpej struct mainbus_attach_args *ma = aux; 76 1.3.2.2 thorpej #endif 77 1.3.2.2 thorpej 78 1.3.2.2 thorpej if (i80312_mainbus_found) 79 1.3.2.2 thorpej return (0); 80 1.3.2.2 thorpej 81 1.3.2.2 thorpej #if 1 82 1.3.2.2 thorpej /* XXX Shoot arch/arm/mainbus in the head. */ 83 1.3.2.2 thorpej return (1); 84 1.3.2.2 thorpej #else 85 1.3.2.2 thorpej if (strcmp(cf->cf_driver->cd_name, ma->ma_name) == 0) 86 1.3.2.2 thorpej return (1); 87 1.3.2.2 thorpej 88 1.3.2.2 thorpej return (0); 89 1.3.2.2 thorpej #endif 90 1.3.2.2 thorpej } 91 1.3.2.2 thorpej 92 1.3.2.2 thorpej void 93 1.3.2.2 thorpej i80312_mainbus_attach(struct device *parent, struct device *self, void *aux) 94 1.3.2.2 thorpej { 95 1.3.2.2 thorpej struct i80312_softc *sc = (void *) self; 96 1.3.2.2 thorpej paddr_t memstart; 97 1.3.2.2 thorpej psize_t memsize; 98 1.3.2.2 thorpej 99 1.3.2.2 thorpej i80312_mainbus_found = 1; 100 1.3.2.2 thorpej 101 1.3.2.2 thorpej /* 102 1.3.2.2 thorpej * Fill in the space tag for the i80312's own devices, 103 1.3.2.2 thorpej * and hand-craft the space handle for it (the device 104 1.3.2.2 thorpej * was mapped during early bootstrap). 105 1.3.2.2 thorpej */ 106 1.3.2.2 thorpej i80312_bs_init(&i80312_bs_tag, sc); 107 1.3.2.2 thorpej sc->sc_st = &i80312_bs_tag; 108 1.3.2.2 thorpej sc->sc_sh = IQ80310_80312_VBASE; 109 1.3.2.2 thorpej 110 1.3.2.2 thorpej /* 111 1.3.2.2 thorpej * Slice off a subregion for the Memory Controller -- we need it 112 1.3.2.2 thorpej * here in order read the memory size. 113 1.3.2.2 thorpej */ 114 1.3.2.2 thorpej if (bus_space_subregion(sc->sc_st, sc->sc_sh, I80312_MEM_BASE, 115 1.3.2.2 thorpej I80312_MEM_SIZE, &sc->sc_mem_sh)) 116 1.3.2.2 thorpej panic("%s: unable to subregion MEM registers\n", 117 1.3.2.2 thorpej sc->sc_dev.dv_xname); 118 1.3.2.2 thorpej 119 1.3.2.2 thorpej /* 120 1.3.2.2 thorpej * We have mapped the the PCI I/O windows in the early 121 1.3.2.2 thorpej * bootstrap phase. 122 1.3.2.2 thorpej */ 123 1.3.2.2 thorpej sc->sc_piow_vaddr = IQ80310_PIOW_VBASE; 124 1.3.2.2 thorpej sc->sc_siow_vaddr = IQ80310_SIOW_VBASE; 125 1.3.2.2 thorpej 126 1.3.2.2 thorpej sc->sc_is_host = CPLD_READ(IQ80310_BACKPLANE_DET) & 1; 127 1.3.2.2 thorpej 128 1.3.2.2 thorpej printf(": i80312 Companion I/O, acting as PCI %s\n", 129 1.3.2.2 thorpej sc->sc_is_host ? "host" : "slave"); 130 1.3.2.2 thorpej 131 1.3.2.2 thorpej /* 132 1.3.2.2 thorpej * Set the subsystem vendor/device IDs to "Cyclone" "PCI-700", 133 1.3.2.2 thorpej * which is the board-specific identification. 134 1.3.2.2 thorpej */ 135 1.3.2.2 thorpej bus_space_write_4(sc->sc_st, sc->sc_sh, 136 1.3.2.2 thorpej I80312_ATU_BASE + PCI_SUBSYS_ID_REG, 137 1.3.2.2 thorpej PCI_ID_CODE(PCI_VENDOR_CYCLONE, PCI_PRODUCT_CYCLONE_PCI_700)); 138 1.3.2.2 thorpej 139 1.3.2.2 thorpej i80312_sdram_bounds(sc->sc_st, sc->sc_mem_sh, &memstart, &memsize); 140 1.3.2.2 thorpej 141 1.3.2.2 thorpej /* 142 1.3.2.2 thorpej * Set the Primary Inbound window xlate base to the start 143 1.3.2.2 thorpej * of RAM. Set the size to 4K, for now. Just for testing 144 1.3.2.2 thorpej * in a host. This obviously has to be customized for each 145 1.3.2.2 thorpej * IQ310 application. 146 1.3.2.2 thorpej * 147 1.3.2.2 thorpej * Note the first 4K of the window is reserved for the 148 1.3.2.2 thorpej * messaging unit, so no RAM is going to be accessed here. 149 1.3.2.2 thorpej * 150 1.3.2.2 thorpej * ..unless we're a host -- in which case, make it work like 151 1.3.2.2 thorpej * the Secondary Inbound window (below). 152 1.3.2.2 thorpej */ 153 1.3.2.2 thorpej if (sc->sc_is_host) { 154 1.3.2.2 thorpej sc->sc_pin_base = memstart; 155 1.3.2.2 thorpej sc->sc_pin_xlate = memstart; 156 1.3.2.2 thorpej sc->sc_pin_size = memsize; 157 1.3.2.2 thorpej } else { 158 1.3.2.2 thorpej sc->sc_pin_xlate = memstart; 159 1.3.2.2 thorpej sc->sc_pin_size = 4096; 160 1.3.2.2 thorpej } 161 1.3.2.2 thorpej 162 1.3.2.2 thorpej /* 163 1.3.2.2 thorpej * Map the Secondary Inbound window 1:1 with local RAM. 164 1.3.2.2 thorpej */ 165 1.3.2.2 thorpej sc->sc_sin_base = memstart; 166 1.3.2.2 thorpej sc->sc_sin_xlate = memstart; 167 1.3.2.2 thorpej sc->sc_sin_size = memsize; 168 1.3.2.2 thorpej 169 1.3.2.2 thorpej /* 170 1.3.2.2 thorpej * XXX Don't use the Primary Outbound windows, for now. 171 1.3.2.2 thorpej */ 172 1.3.2.2 thorpej sc->sc_pmemout_size = 0; 173 1.3.2.2 thorpej sc->sc_pioout_size = 0; 174 1.3.2.2 thorpej 175 1.3.2.2 thorpej /* 176 1.3.2.2 thorpej * Set the Secondary Outbound Memory window to map 1:1 177 1.3.2.2 thorpej * PCI:Local. 178 1.3.2.2 thorpej */ 179 1.3.2.2 thorpej sc->sc_smemout_base = I80312_PCI_XLATE_SMW_BASE; 180 1.3.2.2 thorpej sc->sc_smemout_size = I80312_PCI_XLATE_MSIZE; 181 1.3.2.2 thorpej 182 1.3.2.2 thorpej /* 183 1.3.2.2 thorpej * Set the Secondary Outbound I/O window to map 184 1.3.2.2 thorpej * to PCI address 0 for all 64K of the I/O space. 185 1.3.2.2 thorpej */ 186 1.3.2.2 thorpej sc->sc_sioout_base = 0; 187 1.3.2.2 thorpej sc->sc_sioout_size = I80312_PCI_XLATE_IOSIZE; 188 1.3.2.2 thorpej 189 1.3.2.2 thorpej /* 190 1.3.2.2 thorpej * XXX For now, suppress all secondary IDSELs (thus making all 191 1.3.2.2 thorpej * devices from S_AD[11]..S_AD[25] private). 192 1.3.2.2 thorpej */ 193 1.3.2.2 thorpej sc->sc_sisr = 0x3ff; 194 1.3.2.2 thorpej 195 1.3.2.2 thorpej /* 196 1.3.2.2 thorpej * XXX For now, make the entire Secondary Outbound address 197 1.3.2.2 thorpej * spaces private. 198 1.3.2.2 thorpej */ 199 1.3.2.2 thorpej sc->sc_privio_base = sc->sc_sioout_base; 200 1.3.2.2 thorpej sc->sc_privio_size = sc->sc_sioout_size; 201 1.3.2.2 thorpej sc->sc_privmem_base = sc->sc_smemout_base; 202 1.3.2.2 thorpej sc->sc_privmem_size = sc->sc_smemout_size; 203 1.3.2.2 thorpej 204 1.3.2.2 thorpej /* 205 1.3.2.2 thorpej * Initialize the interrupt part of our PCI chipset tag. 206 1.3.2.2 thorpej */ 207 1.3.2.2 thorpej iq80310_pci_init(&sc->sc_pci_chipset, sc); 208 1.3.2.2 thorpej 209 1.3.2.2 thorpej i80312_attach(sc); 210 1.3.2.2 thorpej } 211
Indexes created Thu Oct 30 23:09:54 GMT 2025