iq80310_machdep.c revision 1.20 1 1.20 thorpej /* $NetBSD: iq80310_machdep.c,v 1.20 2002/02/08 03:41:56 thorpej Exp $ */
2 1.12 thorpej
3 1.12 thorpej /*
4 1.15 thorpej * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
5 1.12 thorpej * All rights reserved.
6 1.12 thorpej *
7 1.12 thorpej * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8 1.12 thorpej *
9 1.12 thorpej * Redistribution and use in source and binary forms, with or without
10 1.12 thorpej * modification, are permitted provided that the following conditions
11 1.12 thorpej * are met:
12 1.12 thorpej * 1. Redistributions of source code must retain the above copyright
13 1.12 thorpej * notice, this list of conditions and the following disclaimer.
14 1.12 thorpej * 2. Redistributions in binary form must reproduce the above copyright
15 1.12 thorpej * notice, this list of conditions and the following disclaimer in the
16 1.12 thorpej * documentation and/or other materials provided with the distribution.
17 1.12 thorpej * 3. All advertising materials mentioning features or use of this software
18 1.12 thorpej * must display the following acknowledgement:
19 1.12 thorpej * This product includes software developed for the NetBSD Project by
20 1.12 thorpej * Wasabi Systems, Inc.
21 1.12 thorpej * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 1.12 thorpej * or promote products derived from this software without specific prior
23 1.12 thorpej * written permission.
24 1.12 thorpej *
25 1.12 thorpej * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 1.12 thorpej * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 1.12 thorpej * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 1.12 thorpej * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 1.12 thorpej * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 1.12 thorpej * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 1.12 thorpej * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 1.12 thorpej * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 1.12 thorpej * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 1.12 thorpej * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 1.12 thorpej * POSSIBILITY OF SUCH DAMAGE.
36 1.12 thorpej */
37 1.1 matt
38 1.1 matt /*
39 1.1 matt * Copyright (c) 1997,1998 Mark Brinicombe.
40 1.1 matt * Copyright (c) 1997,1998 Causality Limited.
41 1.1 matt * All rights reserved.
42 1.1 matt *
43 1.1 matt * Redistribution and use in source and binary forms, with or without
44 1.1 matt * modification, are permitted provided that the following conditions
45 1.1 matt * are met:
46 1.1 matt * 1. Redistributions of source code must retain the above copyright
47 1.1 matt * notice, this list of conditions and the following disclaimer.
48 1.1 matt * 2. Redistributions in binary form must reproduce the above copyright
49 1.1 matt * notice, this list of conditions and the following disclaimer in the
50 1.1 matt * documentation and/or other materials provided with the distribution.
51 1.1 matt * 3. All advertising materials mentioning features or use of this software
52 1.1 matt * must display the following acknowledgement:
53 1.1 matt * This product includes software developed by Mark Brinicombe
54 1.1 matt * for the NetBSD Project.
55 1.1 matt * 4. The name of the company nor the name of the author may be used to
56 1.1 matt * endorse or promote products derived from this software without specific
57 1.1 matt * prior written permission.
58 1.1 matt *
59 1.1 matt * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
60 1.1 matt * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
61 1.1 matt * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
62 1.1 matt * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
63 1.1 matt * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
64 1.1 matt * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
65 1.1 matt * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
66 1.1 matt * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
67 1.1 matt * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
68 1.1 matt * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
69 1.1 matt * SUCH DAMAGE.
70 1.1 matt *
71 1.2 thorpej * Machine dependant functions for kernel setup for Intel IQ80310 evaluation
72 1.2 thorpej * boards using RedBoot firmware.
73 1.1 matt */
74 1.1 matt
75 1.1 matt #include "opt_ddb.h"
76 1.1 matt #include "opt_pmap_debug.h"
77 1.1 matt
78 1.1 matt #include <sys/param.h>
79 1.1 matt #include <sys/device.h>
80 1.1 matt #include <sys/systm.h>
81 1.1 matt #include <sys/kernel.h>
82 1.1 matt #include <sys/exec.h>
83 1.1 matt #include <sys/proc.h>
84 1.1 matt #include <sys/msgbuf.h>
85 1.1 matt #include <sys/reboot.h>
86 1.1 matt #include <sys/termios.h>
87 1.1 matt
88 1.1 matt #include <dev/cons.h>
89 1.1 matt
90 1.1 matt #include <machine/db_machdep.h>
91 1.1 matt #include <ddb/db_sym.h>
92 1.1 matt #include <ddb/db_extern.h>
93 1.1 matt
94 1.1 matt #include <machine/bootconfig.h>
95 1.1 matt #include <machine/bus.h>
96 1.1 matt #include <machine/cpu.h>
97 1.1 matt #include <machine/frame.h>
98 1.10 thorpej #include <arm/undefined.h>
99 1.1 matt
100 1.16 thorpej #include <arm/arm32/machdep.h>
101 1.16 thorpej
102 1.1 matt #include <arm/xscale/i80312reg.h>
103 1.1 matt #include <arm/xscale/i80312var.h>
104 1.1 matt
105 1.3 thorpej #include <dev/pci/ppbreg.h>
106 1.3 thorpej
107 1.2 thorpej #include <evbarm/iq80310/iq80310reg.h>
108 1.2 thorpej #include <evbarm/iq80310/iq80310var.h>
109 1.2 thorpej #include <evbarm/iq80310/obiovar.h>
110 1.2 thorpej
111 1.1 matt #include "opt_ipkdb.h"
112 1.1 matt
113 1.1 matt /*
114 1.1 matt * Address to call from cpu_reset() to reset the machine.
115 1.1 matt * This is machine architecture dependant as it varies depending
116 1.1 matt * on where the ROM appears when you turn the MMU off.
117 1.1 matt */
118 1.1 matt
119 1.2 thorpej u_int cpu_reset_address = 0;
120 1.1 matt
121 1.1 matt /* Define various stack sizes in pages */
122 1.1 matt #define IRQ_STACK_SIZE 1
123 1.1 matt #define ABT_STACK_SIZE 1
124 1.1 matt #ifdef IPKDB
125 1.1 matt #define UND_STACK_SIZE 2
126 1.1 matt #else
127 1.1 matt #define UND_STACK_SIZE 1
128 1.1 matt #endif
129 1.1 matt
130 1.1 matt BootConfig bootconfig; /* Boot config storage */
131 1.1 matt char *boot_args = NULL;
132 1.1 matt char *boot_file = NULL;
133 1.1 matt
134 1.1 matt vm_offset_t physical_start;
135 1.1 matt vm_offset_t physical_freestart;
136 1.1 matt vm_offset_t physical_freeend;
137 1.1 matt vm_offset_t physical_end;
138 1.1 matt u_int free_pages;
139 1.1 matt vm_offset_t pagetables_start;
140 1.1 matt int physmem = 0;
141 1.1 matt
142 1.1 matt /*int debug_flags;*/
143 1.1 matt #ifndef PMAP_STATIC_L1S
144 1.1 matt int max_processes = 64; /* Default number */
145 1.1 matt #endif /* !PMAP_STATIC_L1S */
146 1.1 matt
147 1.1 matt /* Physical and virtual addresses for some global pages */
148 1.1 matt pv_addr_t systempage;
149 1.1 matt pv_addr_t irqstack;
150 1.1 matt pv_addr_t undstack;
151 1.1 matt pv_addr_t abtstack;
152 1.1 matt pv_addr_t kernelstack;
153 1.8 thorpej pv_addr_t minidataclean;
154 1.1 matt
155 1.1 matt vm_offset_t msgbufphys;
156 1.1 matt
157 1.1 matt extern u_int data_abort_handler_address;
158 1.1 matt extern u_int prefetch_abort_handler_address;
159 1.1 matt extern u_int undefined_handler_address;
160 1.1 matt
161 1.1 matt #ifdef PMAP_DEBUG
162 1.1 matt extern int pmap_debug_level;
163 1.1 matt #endif
164 1.1 matt
165 1.1 matt #define KERNEL_PT_SYS 0 /* Page table for mapping proc0 zero page */
166 1.1 matt #define KERNEL_PT_KERNEL 1 /* Page table for mapping kernel */
167 1.3 thorpej #define KERNEL_PT_IOPXS 2 /* Page table for mapping i80312 */
168 1.3 thorpej #define KERNEL_PT_VMDATA 3 /* Page tables for mapping kernel VM */
169 1.1 matt #define KERNEL_PT_VMDATA_NUM (KERNEL_VM_SIZE >> (PDSHIFT + 2))
170 1.1 matt #define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
171 1.1 matt
172 1.1 matt pt_entry_t kernel_pt_table[NUM_KERNEL_PTS];
173 1.1 matt
174 1.1 matt struct user *proc0paddr;
175 1.1 matt
176 1.1 matt /* Prototypes */
177 1.1 matt
178 1.2 thorpej void consinit(void);
179 1.1 matt
180 1.1 matt #include "com.h"
181 1.2 thorpej #if NCOM > 0
182 1.1 matt #include <dev/ic/comreg.h>
183 1.1 matt #include <dev/ic/comvar.h>
184 1.1 matt #endif
185 1.1 matt
186 1.20 thorpej /*
187 1.20 thorpej * Define the default console speed for the board. This is generally
188 1.20 thorpej * what the firmware provided with the board defaults to.
189 1.20 thorpej */
190 1.1 matt #ifndef CONSPEED
191 1.20 thorpej #if defined(IOP310_TEAMASA_NPWR)
192 1.20 thorpej #define CONSPEED B19200
193 1.20 thorpej #else /* Default to stock IQ80310 */
194 1.20 thorpej #define CONSPEED B115200
195 1.20 thorpej #endif /* list of IQ80310-based designs */
196 1.20 thorpej #endif /* ! CONSPEED */
197 1.20 thorpej
198 1.20 thorpej #ifndef CONUNIT
199 1.20 thorpej #define CONUNIT 0
200 1.1 matt #endif
201 1.20 thorpej
202 1.1 matt #ifndef CONMODE
203 1.1 matt #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
204 1.15 thorpej #endif
205 1.1 matt
206 1.1 matt int comcnspeed = CONSPEED;
207 1.1 matt int comcnmode = CONMODE;
208 1.15 thorpej int comcnunit = CONUNIT;
209 1.1 matt
210 1.1 matt /*
211 1.1 matt * void cpu_reboot(int howto, char *bootstr)
212 1.1 matt *
213 1.1 matt * Reboots the system
214 1.1 matt *
215 1.1 matt * Deal with any syncing, unmounting, dumping and shutdown hooks,
216 1.1 matt * then reset the CPU.
217 1.1 matt */
218 1.1 matt void
219 1.1 matt cpu_reboot(int howto, char *bootstr)
220 1.1 matt {
221 1.1 matt #ifdef DIAGNOSTIC
222 1.1 matt /* info */
223 1.1 matt printf("boot: howto=%08x curproc=%p\n", howto, curproc);
224 1.1 matt #endif
225 1.1 matt
226 1.1 matt /*
227 1.1 matt * If we are still cold then hit the air brakes
228 1.1 matt * and crash to earth fast
229 1.1 matt */
230 1.1 matt if (cold) {
231 1.1 matt doshutdownhooks();
232 1.1 matt printf("The operating system has halted.\n");
233 1.1 matt printf("Please press any key to reboot.\n\n");
234 1.1 matt cngetc();
235 1.1 matt printf("rebooting...\n");
236 1.1 matt cpu_reset();
237 1.1 matt /*NOTREACHED*/
238 1.1 matt }
239 1.1 matt
240 1.1 matt /* Disable console buffering */
241 1.1 matt
242 1.1 matt /*
243 1.1 matt * If RB_NOSYNC was not specified sync the discs.
244 1.2 thorpej * Note: Unless cold is set to 1 here, syslogd will die during the
245 1.2 thorpej * unmount. It looks like syslogd is getting woken up only to find
246 1.2 thorpej * that it cannot page part of the binary in as the filesystem has
247 1.2 thorpej * been unmounted.
248 1.1 matt */
249 1.1 matt if (!(howto & RB_NOSYNC))
250 1.1 matt bootsync();
251 1.1 matt
252 1.1 matt /* Say NO to interrupts */
253 1.1 matt splhigh();
254 1.1 matt
255 1.1 matt /* Do a dump if requested. */
256 1.1 matt if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
257 1.1 matt dumpsys();
258 1.1 matt
259 1.1 matt /* Run any shutdown hooks */
260 1.1 matt doshutdownhooks();
261 1.1 matt
262 1.1 matt /* Make sure IRQ's are disabled */
263 1.1 matt IRQdisable;
264 1.1 matt
265 1.1 matt if (howto & RB_HALT) {
266 1.1 matt printf("The operating system has halted.\n");
267 1.1 matt printf("Please press any key to reboot.\n\n");
268 1.1 matt cngetc();
269 1.1 matt }
270 1.1 matt
271 1.1 matt printf("rebooting...\n");
272 1.1 matt cpu_reset();
273 1.1 matt /*NOTREACHED*/
274 1.1 matt }
275 1.1 matt
276 1.1 matt /*
277 1.1 matt * Mapping table for core kernel memory. This memory is mapped at init
278 1.1 matt * time with section mappings.
279 1.1 matt */
280 1.1 matt struct l1_sec_map {
281 1.1 matt vaddr_t va;
282 1.1 matt vaddr_t pa;
283 1.1 matt vsize_t size;
284 1.1 matt int flags;
285 1.1 matt } l1_sec_table[] = {
286 1.2 thorpej /*
287 1.2 thorpej * Map the on-board devices VA == PA so that we can access them
288 1.2 thorpej * with the MMU on or off.
289 1.2 thorpej */
290 1.2 thorpej {
291 1.2 thorpej IQ80310_OBIO_BASE,
292 1.2 thorpej IQ80310_OBIO_BASE,
293 1.2 thorpej IQ80310_OBIO_SIZE,
294 1.2 thorpej 0,
295 1.2 thorpej },
296 1.2 thorpej
297 1.1 matt {
298 1.1 matt 0,
299 1.1 matt 0,
300 1.1 matt 0,
301 1.1 matt 0,
302 1.1 matt }
303 1.1 matt };
304 1.1 matt
305 1.1 matt /*
306 1.2 thorpej * u_int initarm(...)
307 1.1 matt *
308 1.1 matt * Initial entry point on startup. This gets called before main() is
309 1.1 matt * entered.
310 1.1 matt * It should be responsible for setting up everything that must be
311 1.1 matt * in place when main is called.
312 1.1 matt * This includes
313 1.1 matt * Taking a copy of the boot configuration structure.
314 1.1 matt * Initialising the physical console so characters can be printed.
315 1.1 matt * Setting up page tables for the kernel
316 1.1 matt * Relocating the kernel to the bottom of physical memory
317 1.1 matt */
318 1.1 matt u_int
319 1.16 thorpej initarm(void *arg)
320 1.1 matt {
321 1.8 thorpej extern vaddr_t xscale_cache_clean_addr, xscale_minidata_clean_addr;
322 1.8 thorpej extern vsize_t xscale_minidata_clean_size;
323 1.1 matt int loop;
324 1.1 matt int loop1;
325 1.1 matt u_int l1pagetable;
326 1.1 matt u_int l2pagetable;
327 1.1 matt extern char page0[], page0_end[];
328 1.1 matt pv_addr_t kernel_l1pt;
329 1.1 matt pv_addr_t kernel_ptpt;
330 1.2 thorpej paddr_t memstart;
331 1.2 thorpej psize_t memsize;
332 1.2 thorpej
333 1.2 thorpej /*
334 1.2 thorpej * Clear out the 7-segment display. Whee, the first visual
335 1.2 thorpej * indication that we're running kernel code.
336 1.2 thorpej */
337 1.2 thorpej iq80310_7seg(' ', ' ');
338 1.1 matt
339 1.1 matt /*
340 1.1 matt * Heads up ... Setup the CPU / MMU / TLB functions
341 1.1 matt */
342 1.1 matt if (set_cpufuncs())
343 1.1 matt panic("cpu not recognized!");
344 1.1 matt
345 1.2 thorpej /* Calibrate the delay loop. */
346 1.2 thorpej iq80310_calibrate_delay();
347 1.1 matt
348 1.1 matt /*
349 1.2 thorpej * Since we map the on-board devices VA==PA, and the kernel
350 1.2 thorpej * is running VA==PA, it's possible for us to initialize
351 1.2 thorpej * the console now.
352 1.1 matt */
353 1.2 thorpej consinit();
354 1.1 matt
355 1.1 matt /* Talk to the user */
356 1.2 thorpej printf("\nNetBSD/evbarm (IQ80310) booting ...\n");
357 1.1 matt
358 1.1 matt /*
359 1.3 thorpej * Reset the secondary PCI bus. RedBoot doesn't stop devices
360 1.3 thorpej * on the PCI bus before handing us control, so we have to
361 1.3 thorpej * do this.
362 1.3 thorpej *
363 1.3 thorpej * XXX This is arguably a bug in RedBoot, and doing this reset
364 1.3 thorpej * XXX could be problematic in the future if we encounter an
365 1.3 thorpej * XXX application where the PPB in the i80312 is used as a
366 1.3 thorpej * XXX PPB.
367 1.3 thorpej */
368 1.3 thorpej {
369 1.3 thorpej uint32_t reg;
370 1.3 thorpej
371 1.3 thorpej printf("Resetting secondary PCI bus...\n");
372 1.3 thorpej reg = bus_space_read_4(&obio_bs_tag,
373 1.3 thorpej I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL);
374 1.3 thorpej bus_space_write_4(&obio_bs_tag,
375 1.3 thorpej I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL,
376 1.3 thorpej reg | PPB_BC_SECONDARY_RESET);
377 1.3 thorpej delay(10 * 1000); /* 10ms enough? */
378 1.3 thorpej bus_space_write_4(&obio_bs_tag,
379 1.3 thorpej I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL,
380 1.3 thorpej reg);
381 1.3 thorpej }
382 1.3 thorpej
383 1.3 thorpej /*
384 1.2 thorpej * Okay, RedBoot has provided us with the following memory map:
385 1.2 thorpej *
386 1.2 thorpej * Physical Address Range Description
387 1.2 thorpej * ----------------------- ----------------------------------
388 1.2 thorpej * 0x00000000 - 0x00000fff flash Memory
389 1.2 thorpej * 0x00001000 - 0x00001fff 80312 Internal Registers
390 1.2 thorpej * 0x00002000 - 0x007fffff flash Memory
391 1.2 thorpej * 0x00800000 - 0x7fffffff PCI ATU Outbound Direct Window
392 1.2 thorpej * 0x80000000 - 0x83ffffff Primary PCI 32-bit Memory
393 1.2 thorpej * 0x84000000 - 0x87ffffff Primary PCI 64-bit Memory
394 1.2 thorpej * 0x88000000 - 0x8bffffff Secondary PCI 32-bit Memory
395 1.2 thorpej * 0x8c000000 - 0x8fffffff Secondary PCI 64-bit Memory
396 1.2 thorpej * 0x90000000 - 0x9000ffff Primary PCI IO Space
397 1.2 thorpej * 0x90010000 - 0x9001ffff Secondary PCI IO Space
398 1.2 thorpej * 0x90020000 - 0x9fffffff Unused
399 1.2 thorpej * 0xa0000000 - 0xbfffffff SDRAM
400 1.2 thorpej * 0xc0000000 - 0xefffffff Unused
401 1.2 thorpej * 0xf0000000 - 0xffffffff 80200 Internal Registers
402 1.2 thorpej *
403 1.1 matt *
404 1.2 thorpej * Virtual Address Range C B Description
405 1.2 thorpej * ----------------------- - - ----------------------------------
406 1.2 thorpej * 0x00000000 - 0x00000fff Y Y SDRAM
407 1.2 thorpej * 0x00001000 - 0x00001fff N N 80312 Internal Registers
408 1.2 thorpej * 0x00002000 - 0x007fffff Y N flash Memory
409 1.2 thorpej * 0x00800000 - 0x7fffffff N N PCI ATU Outbound Direct Window
410 1.2 thorpej * 0x80000000 - 0x83ffffff N N Primary PCI 32-bit Memory
411 1.2 thorpej * 0x84000000 - 0x87ffffff N N Primary PCI 64-bit Memory
412 1.2 thorpej * 0x88000000 - 0x8bffffff N N Secondary PCI 32-bit Memory
413 1.2 thorpej * 0x8c000000 - 0x8fffffff N N Secondary PCI 64-bit Memory
414 1.2 thorpej * 0x90000000 - 0x9000ffff N N Primary PCI IO Space
415 1.2 thorpej * 0x90010000 - 0x9001ffff N N Secondary PCI IO Space
416 1.2 thorpej * 0xa0000000 - 0xa0000fff Y N flash
417 1.2 thorpej * 0xa0001000 - 0xbfffffff Y Y SDRAM
418 1.2 thorpej * 0xc0000000 - 0xcfffffff Y Y Cache Flush Region
419 1.2 thorpej * 0xf0000000 - 0xffffffff N N 80200 Internal Registers
420 1.1 matt *
421 1.2 thorpej * The first level page table is at 0xa0004000. There are also
422 1.2 thorpej * 2 second-level tables at 0xa0008000 and 0xa0008400.
423 1.1 matt *
424 1.2 thorpej * This corresponds roughly to the physical memory map, i.e.
425 1.2 thorpej * we are quite nearly running VA==PA.
426 1.1 matt */
427 1.1 matt
428 1.1 matt /*
429 1.1 matt * Examine the boot args string for options we need to know about
430 1.1 matt * now.
431 1.1 matt */
432 1.1 matt #if 0
433 1.1 matt process_kernel_args((char *)nwbootinfo.bt_args);
434 1.1 matt #endif
435 1.1 matt
436 1.2 thorpej /*
437 1.2 thorpej * Fetch the SDRAM start/size from the i80312 SDRAM configration
438 1.2 thorpej * registers.
439 1.2 thorpej */
440 1.3 thorpej i80312_sdram_bounds(&obio_bs_tag, I80312_PMMR_BASE + I80312_MEM_BASE,
441 1.3 thorpej &memstart, &memsize);
442 1.2 thorpej
443 1.1 matt printf("initarm: Configuring system ...\n");
444 1.1 matt
445 1.2 thorpej /* Fake bootconfig structure for the benefit of pmap.c */
446 1.2 thorpej /* XXX must make the memory description h/w independant */
447 1.2 thorpej bootconfig.dramblocks = 1;
448 1.2 thorpej bootconfig.dram[0].address = memstart;
449 1.2 thorpej bootconfig.dram[0].pages = memsize / NBPG;
450 1.2 thorpej
451 1.1 matt /*
452 1.1 matt * Set up the variables that define the availablilty of
453 1.2 thorpej * physical memory. For now, we're going to set
454 1.2 thorpej * physical_freestart to 0xa0200000 (where the kernel
455 1.2 thorpej * was loaded), and allocate the memory we need downwards.
456 1.2 thorpej * If we get too close to the page tables that RedBoot
457 1.2 thorpej * set up, we will panic. We will update physical_freestart
458 1.2 thorpej * and physical_freeend later to reflect what pmap_bootstrap()
459 1.2 thorpej * wants to see.
460 1.2 thorpej *
461 1.2 thorpej * XXX pmap_bootstrap() needs an enema.
462 1.1 matt */
463 1.2 thorpej physical_start = bootconfig.dram[0].address;
464 1.2 thorpej physical_end = physical_start + (bootconfig.dram[0].pages * NBPG);
465 1.2 thorpej
466 1.2 thorpej physical_freestart = 0xa0009000UL;
467 1.2 thorpej physical_freeend = 0xa0200000UL;
468 1.2 thorpej
469 1.1 matt physmem = (physical_end - physical_start) / NBPG;
470 1.1 matt
471 1.1 matt /* Tell the user about the memory */
472 1.1 matt printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem,
473 1.1 matt physical_start, physical_end - 1);
474 1.1 matt
475 1.1 matt /*
476 1.2 thorpej * Okay, the kernel starts 2MB in from the bottom of physical
477 1.2 thorpej * memory. We are going to allocate our bootstrap pages downwards
478 1.2 thorpej * from there.
479 1.2 thorpej *
480 1.2 thorpej * We need to allocate some fixed page tables to get the kernel
481 1.2 thorpej * going. We allocate one page directory and a number of page
482 1.2 thorpej * tables and store the physical addresses in the kernel_pt_table
483 1.2 thorpej * array.
484 1.1 matt *
485 1.2 thorpej * The kernel page directory must be on a 16K boundary. The page
486 1.2 thorpej * tables must be on 4K bounaries. What we do is allocate the
487 1.2 thorpej * page directory on the first 16K boundary that we encounter, and
488 1.2 thorpej * the page tables on 4K boundaries otherwise. Since we allocate
489 1.2 thorpej * at least 3 L2 page tables, we are guaranteed to encounter at
490 1.2 thorpej * least one 16K aligned region.
491 1.1 matt */
492 1.1 matt
493 1.1 matt #ifdef VERBOSE_INIT_ARM
494 1.1 matt printf("Allocating page tables\n");
495 1.1 matt #endif
496 1.1 matt
497 1.2 thorpej free_pages = (physical_freeend - physical_freestart) / NBPG;
498 1.1 matt
499 1.1 matt #ifdef VERBOSE_INIT_ARM
500 1.2 thorpej printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n",
501 1.1 matt physical_freestart, free_pages, free_pages);
502 1.1 matt #endif
503 1.1 matt
504 1.1 matt /* Define a macro to simplify memory allocation */
505 1.2 thorpej #define valloc_pages(var, np) \
506 1.2 thorpej alloc_pages((var).pv_pa, (np)); \
507 1.1 matt (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start;
508 1.1 matt
509 1.2 thorpej #define alloc_pages(var, np) \
510 1.2 thorpej physical_freeend -= ((np) * NBPG); \
511 1.2 thorpej if (physical_freeend < physical_freestart) \
512 1.2 thorpej panic("initarm: out of memory"); \
513 1.2 thorpej (var) = physical_freeend; \
514 1.2 thorpej free_pages -= (np); \
515 1.1 matt memset((char *)(var), 0, ((np) * NBPG));
516 1.1 matt
517 1.1 matt loop1 = 0;
518 1.1 matt kernel_l1pt.pv_pa = 0;
519 1.1 matt for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
520 1.1 matt /* Are we 16KB aligned for an L1 ? */
521 1.2 thorpej if (((physical_freeend - PD_SIZE) & (PD_SIZE - 1)) == 0
522 1.1 matt && kernel_l1pt.pv_pa == 0) {
523 1.1 matt valloc_pages(kernel_l1pt, PD_SIZE / NBPG);
524 1.1 matt } else {
525 1.1 matt alloc_pages(kernel_pt_table[loop1], PT_SIZE / NBPG);
526 1.1 matt ++loop1;
527 1.1 matt }
528 1.1 matt }
529 1.1 matt
530 1.1 matt /* This should never be able to happen but better confirm that. */
531 1.1 matt if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (PD_SIZE-1)) != 0)
532 1.1 matt panic("initarm: Failed to align the kernel page directory\n");
533 1.1 matt
534 1.1 matt /*
535 1.1 matt * Allocate a page for the system page mapped to V0x00000000
536 1.1 matt * This page will just contain the system vectors and can be
537 1.1 matt * shared by all processes.
538 1.1 matt */
539 1.1 matt alloc_pages(systempage.pv_pa, 1);
540 1.1 matt
541 1.2 thorpej /* Allocate a page for the page table to map kernel page tables. */
542 1.1 matt valloc_pages(kernel_ptpt, PT_SIZE / NBPG);
543 1.1 matt
544 1.1 matt /* Allocate stacks for all modes */
545 1.1 matt valloc_pages(irqstack, IRQ_STACK_SIZE);
546 1.1 matt valloc_pages(abtstack, ABT_STACK_SIZE);
547 1.1 matt valloc_pages(undstack, UND_STACK_SIZE);
548 1.1 matt valloc_pages(kernelstack, UPAGES);
549 1.1 matt
550 1.8 thorpej /* Allocate enough pages for cleaning the Mini-Data cache. */
551 1.8 thorpej KASSERT(xscale_minidata_clean_size <= NBPG);
552 1.8 thorpej valloc_pages(minidataclean, 1);
553 1.8 thorpej xscale_minidata_clean_addr = minidataclean.pv_va;
554 1.8 thorpej
555 1.1 matt #ifdef VERBOSE_INIT_ARM
556 1.2 thorpej printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa,
557 1.2 thorpej irqstack.pv_va);
558 1.2 thorpej printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa,
559 1.2 thorpej abtstack.pv_va);
560 1.2 thorpej printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa,
561 1.2 thorpej undstack.pv_va);
562 1.2 thorpej printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa,
563 1.2 thorpej kernelstack.pv_va);
564 1.1 matt #endif
565 1.1 matt
566 1.2 thorpej /*
567 1.2 thorpej * XXX Defer this to later so that we can reclaim the memory
568 1.2 thorpej * XXX used by the RedBoot page tables.
569 1.2 thorpej */
570 1.1 matt alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / NBPG);
571 1.1 matt
572 1.1 matt /*
573 1.1 matt * Ok we have allocated physical pages for the primary kernel
574 1.1 matt * page tables
575 1.1 matt */
576 1.1 matt
577 1.1 matt #ifdef VERBOSE_INIT_ARM
578 1.2 thorpej printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa);
579 1.1 matt #endif
580 1.1 matt
581 1.1 matt /*
582 1.1 matt * Now we start consturction of the L1 page table
583 1.1 matt * We start by mapping the L2 page tables into the L1.
584 1.1 matt * This means that we can replace L1 mappings later on if necessary
585 1.1 matt */
586 1.1 matt l1pagetable = kernel_l1pt.pv_pa;
587 1.1 matt
588 1.1 matt /* Map the L2 pages tables in the L1 page table */
589 1.1 matt map_pagetable(l1pagetable, 0x00000000,
590 1.1 matt kernel_pt_table[KERNEL_PT_SYS]);
591 1.1 matt map_pagetable(l1pagetable, KERNEL_BASE,
592 1.1 matt kernel_pt_table[KERNEL_PT_KERNEL]);
593 1.3 thorpej map_pagetable(l1pagetable, IQ80310_IOPXS_VBASE,
594 1.3 thorpej kernel_pt_table[KERNEL_PT_IOPXS]);
595 1.1 matt for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; ++loop)
596 1.1 matt map_pagetable(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
597 1.1 matt kernel_pt_table[KERNEL_PT_VMDATA + loop]);
598 1.1 matt map_pagetable(l1pagetable, PROCESS_PAGE_TBLS_BASE,
599 1.1 matt kernel_ptpt.pv_pa);
600 1.1 matt
601 1.1 matt #ifdef VERBOSE_INIT_ARM
602 1.1 matt printf("Mapping kernel\n");
603 1.1 matt #endif
604 1.1 matt
605 1.1 matt /* Now we fill in the L2 pagetable for the kernel static code/data */
606 1.1 matt l2pagetable = kernel_pt_table[KERNEL_PT_KERNEL];
607 1.1 matt
608 1.1 matt {
609 1.2 thorpej extern char etext[], _end[];
610 1.2 thorpej size_t textsize = (uintptr_t) etext - KERNEL_TEXT_BASE;
611 1.2 thorpej size_t totalsize = (uintptr_t) _end - KERNEL_TEXT_BASE;
612 1.1 matt u_int logical;
613 1.1 matt
614 1.14 thorpej textsize = (textsize + PGOFSET) & ~PGOFSET;
615 1.1 matt totalsize = (totalsize + PGOFSET) & ~PGOFSET;
616 1.2 thorpej
617 1.2 thorpej logical = 0x00200000; /* offset of kernel in RAM */
618 1.2 thorpej
619 1.2 thorpej /*
620 1.2 thorpej * This maps the kernel text/data/bss VA==PA.
621 1.2 thorpej */
622 1.14 thorpej logical += map_chunk(l1pagetable, l2pagetable,
623 1.14 thorpej KERNEL_BASE + logical,
624 1.1 matt physical_start + logical, textsize,
625 1.1 matt AP_KRW, PT_CACHEABLE);
626 1.14 thorpej logical += map_chunk(l1pagetable, l2pagetable,
627 1.14 thorpej KERNEL_BASE + logical,
628 1.1 matt physical_start + logical, totalsize - textsize,
629 1.1 matt AP_KRW, PT_CACHEABLE);
630 1.2 thorpej
631 1.2 thorpej #if 0 /* XXX No symbols yet. */
632 1.14 thorpej logical += map_chunk(l1pagetable, l2pagetable,
633 1.14 thorpej KERNEL_BASE + logical,
634 1.1 matt physical_start + logical, kernexec->a_syms + sizeof(int)
635 1.1 matt + *(u_int *)((int)end + kernexec->a_syms + sizeof(int)),
636 1.1 matt AP_KRW, PT_CACHEABLE);
637 1.1 matt #endif
638 1.1 matt }
639 1.1 matt
640 1.1 matt #ifdef VERBOSE_INIT_ARM
641 1.1 matt printf("Constructing L2 page tables\n");
642 1.1 matt #endif
643 1.1 matt
644 1.1 matt /* Map the stack pages */
645 1.1 matt map_chunk(0, l2pagetable, irqstack.pv_va, irqstack.pv_pa,
646 1.1 matt IRQ_STACK_SIZE * NBPG, AP_KRW, PT_CACHEABLE);
647 1.1 matt map_chunk(0, l2pagetable, abtstack.pv_va, abtstack.pv_pa,
648 1.1 matt ABT_STACK_SIZE * NBPG, AP_KRW, PT_CACHEABLE);
649 1.1 matt map_chunk(0, l2pagetable, undstack.pv_va, undstack.pv_pa,
650 1.1 matt UND_STACK_SIZE * NBPG, AP_KRW, PT_CACHEABLE);
651 1.1 matt map_chunk(0, l2pagetable, kernelstack.pv_va, kernelstack.pv_pa,
652 1.1 matt UPAGES * NBPG, AP_KRW, PT_CACHEABLE);
653 1.1 matt map_chunk(0, l2pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
654 1.1 matt PD_SIZE, AP_KRW, 0);
655 1.1 matt
656 1.8 thorpej /* Map the Mini-Data cache clean area. */
657 1.8 thorpej map_chunk(0, l2pagetable, minidataclean.pv_va, minidataclean.pv_pa,
658 1.8 thorpej NBPG, AP_KRW, PT_CACHEABLE);
659 1.8 thorpej
660 1.1 matt /* Map the page table that maps the kernel pages */
661 1.1 matt map_entry_nc(l2pagetable, kernel_ptpt.pv_pa, kernel_ptpt.pv_pa);
662 1.1 matt
663 1.1 matt /*
664 1.1 matt * Map entries in the page table used to map PTE's
665 1.1 matt * Basically every kernel page table gets mapped here
666 1.1 matt */
667 1.1 matt /* The -2 is slightly bogus, it should be -log2(sizeof(pt_entry_t)) */
668 1.1 matt l2pagetable = kernel_ptpt.pv_pa;
669 1.1 matt map_entry_nc(l2pagetable, (KERNEL_BASE >> (PGSHIFT-2)),
670 1.1 matt kernel_pt_table[KERNEL_PT_KERNEL]);
671 1.1 matt map_entry_nc(l2pagetable, (PROCESS_PAGE_TBLS_BASE >> (PGSHIFT-2)),
672 1.1 matt kernel_ptpt.pv_pa);
673 1.1 matt map_entry_nc(l2pagetable, (0x00000000 >> (PGSHIFT-2)),
674 1.1 matt kernel_pt_table[KERNEL_PT_SYS]);
675 1.1 matt for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; ++loop)
676 1.1 matt map_entry_nc(l2pagetable, ((KERNEL_VM_BASE +
677 1.1 matt (loop * 0x00400000)) >> (PGSHIFT-2)),
678 1.1 matt kernel_pt_table[KERNEL_PT_VMDATA + loop]);
679 1.1 matt
680 1.1 matt /*
681 1.1 matt * Map the system page in the kernel page table for the bottom 1Meg
682 1.1 matt * of the virtual memory map.
683 1.1 matt */
684 1.1 matt l2pagetable = kernel_pt_table[KERNEL_PT_SYS];
685 1.1 matt map_entry(l2pagetable, 0x00000000, systempage.pv_pa);
686 1.1 matt
687 1.3 thorpej /*
688 1.3 thorpej * Map devices we can map w/ section mappings.
689 1.3 thorpej */
690 1.1 matt loop = 0;
691 1.1 matt while (l1_sec_table[loop].size) {
692 1.1 matt vm_size_t sz;
693 1.1 matt
694 1.1 matt #ifdef VERBOSE_INIT_ARM
695 1.1 matt printf("%08lx -> %08lx @ %08lx\n", l1_sec_table[loop].pa,
696 1.1 matt l1_sec_table[loop].pa + l1_sec_table[loop].size - 1,
697 1.1 matt l1_sec_table[loop].va);
698 1.1 matt #endif
699 1.1 matt for (sz = 0; sz < l1_sec_table[loop].size; sz += L1_SEC_SIZE)
700 1.1 matt map_section(l1pagetable, l1_sec_table[loop].va + sz,
701 1.1 matt l1_sec_table[loop].pa + sz,
702 1.1 matt l1_sec_table[loop].flags);
703 1.1 matt ++loop;
704 1.1 matt }
705 1.3 thorpej
706 1.3 thorpej /*
707 1.3 thorpej * Map the PCI I/O spaces and i80312 registers. These are too
708 1.3 thorpej * small to be mapped w/ section mappings.
709 1.3 thorpej */
710 1.3 thorpej l2pagetable = kernel_pt_table[KERNEL_PT_IOPXS];
711 1.3 thorpej #ifdef VERBOSE_INIT_ARM
712 1.3 thorpej printf("Mapping PIOW 0x%08lx -> 0x%08lx @ 0x%08lx\n",
713 1.3 thorpej I80312_PCI_XLATE_PIOW_BASE,
714 1.3 thorpej I80312_PCI_XLATE_PIOW_BASE + I80312_PCI_XLATE_IOSIZE - 1,
715 1.3 thorpej IQ80310_PIOW_VBASE);
716 1.3 thorpej #endif
717 1.3 thorpej map_chunk(0, l2pagetable, IQ80310_PIOW_VBASE,
718 1.3 thorpej I80312_PCI_XLATE_PIOW_BASE, I80312_PCI_XLATE_IOSIZE, AP_KRW, 0);
719 1.3 thorpej
720 1.3 thorpej #ifdef VERBOSE_INIT_ARM
721 1.3 thorpej printf("Mapping SIOW 0x%08lx -> 0x%08lx @ 0x%08lx\n",
722 1.3 thorpej I80312_PCI_XLATE_SIOW_BASE,
723 1.3 thorpej I80312_PCI_XLATE_SIOW_BASE + I80312_PCI_XLATE_IOSIZE - 1,
724 1.3 thorpej IQ80310_SIOW_VBASE);
725 1.3 thorpej #endif
726 1.3 thorpej map_chunk(0, l2pagetable, IQ80310_SIOW_VBASE,
727 1.3 thorpej I80312_PCI_XLATE_SIOW_BASE, I80312_PCI_XLATE_IOSIZE, AP_KRW, 0);
728 1.3 thorpej
729 1.3 thorpej #ifdef VERBOSE_INIT_ARM
730 1.4 thorpej printf("Mapping 80312 0x%08lx -> 0x%08lx @ 0x%08lx\n",
731 1.3 thorpej I80312_PMMR_BASE,
732 1.3 thorpej I80312_PMMR_BASE + I80312_PMMR_SIZE - 1,
733 1.3 thorpej IQ80310_80312_VBASE);
734 1.3 thorpej #endif
735 1.3 thorpej map_chunk(0, l2pagetable, IQ80310_80312_VBASE,
736 1.3 thorpej I80312_PMMR_BASE, I80312_PMMR_SIZE, AP_KRW, 0);
737 1.8 thorpej
738 1.8 thorpej /*
739 1.8 thorpej * Give the XScale global cache clean code an appropriately
740 1.8 thorpej * sized chunk of unmapped VA space starting at 0xff000000
741 1.8 thorpej * (our device mappings end before this address).
742 1.8 thorpej */
743 1.8 thorpej xscale_cache_clean_addr = 0xff000000U;
744 1.1 matt
745 1.1 matt /*
746 1.1 matt * Now we have the real page tables in place so we can switch to them.
747 1.2 thorpej * Once this is done we will be running with the REAL kernel page
748 1.2 thorpej * tables.
749 1.2 thorpej */
750 1.2 thorpej
751 1.2 thorpej /*
752 1.2 thorpej * Update the physical_freestart/physical_freeend/free_pages
753 1.2 thorpej * variables.
754 1.1 matt */
755 1.2 thorpej {
756 1.2 thorpej extern char _end[];
757 1.2 thorpej
758 1.2 thorpej physical_freestart = (((uintptr_t) _end) + PGOFSET) & ~PGOFSET;
759 1.2 thorpej physical_freeend = physical_end;
760 1.2 thorpej free_pages = (physical_freeend - physical_freestart) / NBPG;
761 1.2 thorpej }
762 1.1 matt
763 1.1 matt /* Switch tables */
764 1.1 matt #ifdef VERBOSE_INIT_ARM
765 1.2 thorpej printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
766 1.1 matt physical_freestart, free_pages, free_pages);
767 1.1 matt printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa);
768 1.1 matt #endif
769 1.1 matt setttb(kernel_l1pt.pv_pa);
770 1.1 matt
771 1.1 matt #ifdef VERBOSE_INIT_ARM
772 1.1 matt printf("done!\n");
773 1.1 matt #endif
774 1.1 matt
775 1.1 matt #ifdef VERBOSE_INIT_ARM
776 1.1 matt printf("bootstrap done.\n");
777 1.1 matt #endif
778 1.1 matt
779 1.2 thorpej /* Right, set up the vectors at the bottom of page 0 */
780 1.1 matt memcpy((char *)0x00000000, page0, page0_end - page0);
781 1.1 matt
782 1.1 matt /* We have modified a text page so sync the icache */
783 1.17 thorpej cpu_icache_sync_all();
784 1.1 matt
785 1.1 matt /*
786 1.1 matt * Pages were allocated during the secondary bootstrap for the
787 1.1 matt * stacks for different CPU modes.
788 1.1 matt * We must now set the r13 registers in the different CPU modes to
789 1.1 matt * point to these stacks.
790 1.1 matt * Since the ARM stacks use STMFD etc. we must set r13 to the top end
791 1.1 matt * of the stack memory.
792 1.1 matt */
793 1.1 matt printf("init subsystems: stacks ");
794 1.1 matt
795 1.1 matt set_stackptr(PSR_IRQ32_MODE, irqstack.pv_va + IRQ_STACK_SIZE * NBPG);
796 1.1 matt set_stackptr(PSR_ABT32_MODE, abtstack.pv_va + ABT_STACK_SIZE * NBPG);
797 1.1 matt set_stackptr(PSR_UND32_MODE, undstack.pv_va + UND_STACK_SIZE * NBPG);
798 1.1 matt
799 1.1 matt /*
800 1.1 matt * Well we should set a data abort handler.
801 1.2 thorpej * Once things get going this will change as we will need a proper
802 1.2 thorpej * handler.
803 1.1 matt * Until then we will use a handler that just panics but tells us
804 1.1 matt * why.
805 1.1 matt * Initialisation of the vectors will just panic on a data abort.
806 1.1 matt * This just fills in a slighly better one.
807 1.1 matt */
808 1.1 matt printf("vectors ");
809 1.1 matt data_abort_handler_address = (u_int)data_abort_handler;
810 1.1 matt prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
811 1.1 matt undefined_handler_address = (u_int)undefinedinstruction_bounce;
812 1.1 matt
813 1.1 matt /* At last !
814 1.1 matt * We now have the kernel in physical memory from the bottom upwards.
815 1.1 matt * Kernel page tables are physically above this.
816 1.1 matt * The kernel is mapped to KERNEL_TEXT_BASE
817 1.1 matt * The kernel data PTs will handle the mapping of 0xf1000000-0xf3ffffff
818 1.1 matt * The page tables are mapped to 0xefc00000
819 1.1 matt */
820 1.1 matt
821 1.1 matt /* Initialise the undefined instruction handlers */
822 1.1 matt printf("undefined ");
823 1.1 matt undefined_init();
824 1.1 matt
825 1.1 matt /* Boot strap pmap telling it where the kernel page table is */
826 1.1 matt printf("pmap ");
827 1.1 matt pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, kernel_ptpt);
828 1.1 matt
829 1.1 matt /* Setup the IRQ system */
830 1.1 matt printf("irq ");
831 1.18 thorpej iq80310_intr_init();
832 1.1 matt printf("done.\n");
833 1.1 matt
834 1.1 matt #ifdef IPKDB
835 1.1 matt /* Initialise ipkdb */
836 1.1 matt ipkdb_init();
837 1.1 matt if (boothowto & RB_KDB)
838 1.1 matt ipkdb_connect(0);
839 1.1 matt #endif
840 1.1 matt
841 1.1 matt #ifdef DDB
842 1.1 matt db_machine_init();
843 1.7 thorpej
844 1.7 thorpej /* Firmware doesn't load symbols. */
845 1.7 thorpej ddb_init(0, NULL, NULL);
846 1.1 matt
847 1.1 matt if (boothowto & RB_KDB)
848 1.1 matt Debugger();
849 1.1 matt #endif
850 1.1 matt
851 1.1 matt /* We return the new stack pointer address */
852 1.1 matt return(kernelstack.pv_va + USPACE_SVC_STACK_TOP);
853 1.1 matt }
854 1.1 matt
855 1.16 thorpej #if 0
856 1.1 matt void
857 1.2 thorpej process_kernel_args(char *args)
858 1.1 matt {
859 1.16 thorpej static char bootargs[MAX_BOOT_STRING + 1];
860 1.1 matt
861 1.1 matt boothowto = 0;
862 1.1 matt
863 1.1 matt /* Make a local copy of the bootargs */
864 1.1 matt strncpy(bootargs, args, MAX_BOOT_STRING);
865 1.1 matt
866 1.1 matt args = bootargs;
867 1.1 matt boot_file = bootargs;
868 1.1 matt
869 1.1 matt /* Skip the kernel image filename */
870 1.1 matt while (*args != ' ' && *args != 0)
871 1.1 matt ++args;
872 1.1 matt
873 1.1 matt if (*args != 0)
874 1.1 matt *args++ = 0;
875 1.1 matt
876 1.1 matt while (*args == ' ')
877 1.1 matt ++args;
878 1.1 matt
879 1.1 matt boot_args = args;
880 1.1 matt
881 1.1 matt printf("bootfile: %s\n", boot_file);
882 1.1 matt printf("bootargs: %s\n", boot_args);
883 1.1 matt
884 1.1 matt parse_mi_bootargs(boot_args);
885 1.1 matt }
886 1.16 thorpej #endif
887 1.1 matt
888 1.1 matt void
889 1.1 matt consinit(void)
890 1.1 matt {
891 1.15 thorpej static const bus_addr_t comcnaddrs[] = {
892 1.15 thorpej IQ80310_UART2, /* com0 (J9) */
893 1.15 thorpej IQ80310_UART1, /* com1 (J10) */
894 1.15 thorpej };
895 1.2 thorpej static int consinit_called;
896 1.1 matt
897 1.1 matt if (consinit_called != 0)
898 1.1 matt return;
899 1.1 matt
900 1.1 matt consinit_called = 1;
901 1.1 matt
902 1.2 thorpej #if NCOM > 0
903 1.15 thorpej if (comcnattach(&obio_bs_tag, comcnaddrs[comcnunit], comcnspeed,
904 1.2 thorpej COM_FREQ, comcnmode))
905 1.19 thorpej panic("can't init serial console @%lx", comcnaddrs[comcnunit]);
906 1.1 matt #else
907 1.19 thorpej panic("serial console @%lx not configured", comcnaddrs[comcnunit]);
908 1.1 matt #endif
909 1.1 matt }
910