iq80310_machdep.c revision 1.49 1 1.49 thorpej /* $NetBSD: iq80310_machdep.c,v 1.49 2003/04/22 14:09:47 thorpej Exp $ */
2 1.12 thorpej
3 1.12 thorpej /*
4 1.48 thorpej * Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
5 1.12 thorpej * All rights reserved.
6 1.12 thorpej *
7 1.12 thorpej * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8 1.12 thorpej *
9 1.12 thorpej * Redistribution and use in source and binary forms, with or without
10 1.12 thorpej * modification, are permitted provided that the following conditions
11 1.12 thorpej * are met:
12 1.12 thorpej * 1. Redistributions of source code must retain the above copyright
13 1.12 thorpej * notice, this list of conditions and the following disclaimer.
14 1.12 thorpej * 2. Redistributions in binary form must reproduce the above copyright
15 1.12 thorpej * notice, this list of conditions and the following disclaimer in the
16 1.12 thorpej * documentation and/or other materials provided with the distribution.
17 1.12 thorpej * 3. All advertising materials mentioning features or use of this software
18 1.12 thorpej * must display the following acknowledgement:
19 1.12 thorpej * This product includes software developed for the NetBSD Project by
20 1.12 thorpej * Wasabi Systems, Inc.
21 1.12 thorpej * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 1.12 thorpej * or promote products derived from this software without specific prior
23 1.12 thorpej * written permission.
24 1.12 thorpej *
25 1.12 thorpej * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 1.12 thorpej * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 1.12 thorpej * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 1.12 thorpej * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 1.12 thorpej * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 1.12 thorpej * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 1.12 thorpej * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 1.12 thorpej * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 1.12 thorpej * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 1.12 thorpej * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 1.12 thorpej * POSSIBILITY OF SUCH DAMAGE.
36 1.12 thorpej */
37 1.1 matt
38 1.1 matt /*
39 1.1 matt * Copyright (c) 1997,1998 Mark Brinicombe.
40 1.1 matt * Copyright (c) 1997,1998 Causality Limited.
41 1.1 matt * All rights reserved.
42 1.1 matt *
43 1.1 matt * Redistribution and use in source and binary forms, with or without
44 1.1 matt * modification, are permitted provided that the following conditions
45 1.1 matt * are met:
46 1.1 matt * 1. Redistributions of source code must retain the above copyright
47 1.1 matt * notice, this list of conditions and the following disclaimer.
48 1.1 matt * 2. Redistributions in binary form must reproduce the above copyright
49 1.1 matt * notice, this list of conditions and the following disclaimer in the
50 1.1 matt * documentation and/or other materials provided with the distribution.
51 1.1 matt * 3. All advertising materials mentioning features or use of this software
52 1.1 matt * must display the following acknowledgement:
53 1.1 matt * This product includes software developed by Mark Brinicombe
54 1.1 matt * for the NetBSD Project.
55 1.1 matt * 4. The name of the company nor the name of the author may be used to
56 1.1 matt * endorse or promote products derived from this software without specific
57 1.1 matt * prior written permission.
58 1.1 matt *
59 1.1 matt * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
60 1.1 matt * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
61 1.1 matt * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
62 1.1 matt * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
63 1.1 matt * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
64 1.1 matt * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
65 1.1 matt * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
66 1.1 matt * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
67 1.1 matt * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
68 1.1 matt * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
69 1.1 matt * SUCH DAMAGE.
70 1.1 matt *
71 1.2 thorpej * Machine dependant functions for kernel setup for Intel IQ80310 evaluation
72 1.2 thorpej * boards using RedBoot firmware.
73 1.1 matt */
74 1.1 matt
75 1.1 matt #include "opt_ddb.h"
76 1.1 matt #include "opt_pmap_debug.h"
77 1.1 matt
78 1.1 matt #include <sys/param.h>
79 1.1 matt #include <sys/device.h>
80 1.1 matt #include <sys/systm.h>
81 1.1 matt #include <sys/kernel.h>
82 1.1 matt #include <sys/exec.h>
83 1.1 matt #include <sys/proc.h>
84 1.1 matt #include <sys/msgbuf.h>
85 1.1 matt #include <sys/reboot.h>
86 1.1 matt #include <sys/termios.h>
87 1.1 matt
88 1.47 thorpej #include <uvm/uvm_extern.h>
89 1.47 thorpej
90 1.1 matt #include <dev/cons.h>
91 1.1 matt
92 1.1 matt #include <machine/db_machdep.h>
93 1.1 matt #include <ddb/db_sym.h>
94 1.1 matt #include <ddb/db_extern.h>
95 1.1 matt
96 1.1 matt #include <machine/bootconfig.h>
97 1.1 matt #include <machine/bus.h>
98 1.1 matt #include <machine/cpu.h>
99 1.1 matt #include <machine/frame.h>
100 1.10 thorpej #include <arm/undefined.h>
101 1.1 matt
102 1.16 thorpej #include <arm/arm32/machdep.h>
103 1.16 thorpej
104 1.1 matt #include <arm/xscale/i80312reg.h>
105 1.1 matt #include <arm/xscale/i80312var.h>
106 1.1 matt
107 1.3 thorpej #include <dev/pci/ppbreg.h>
108 1.3 thorpej
109 1.2 thorpej #include <evbarm/iq80310/iq80310reg.h>
110 1.2 thorpej #include <evbarm/iq80310/iq80310var.h>
111 1.2 thorpej #include <evbarm/iq80310/obiovar.h>
112 1.2 thorpej
113 1.1 matt #include "opt_ipkdb.h"
114 1.1 matt
115 1.1 matt /*
116 1.1 matt * Address to call from cpu_reset() to reset the machine.
117 1.1 matt * This is machine architecture dependant as it varies depending
118 1.1 matt * on where the ROM appears when you turn the MMU off.
119 1.1 matt */
120 1.1 matt
121 1.2 thorpej u_int cpu_reset_address = 0;
122 1.1 matt
123 1.1 matt /* Define various stack sizes in pages */
124 1.1 matt #define IRQ_STACK_SIZE 1
125 1.1 matt #define ABT_STACK_SIZE 1
126 1.1 matt #ifdef IPKDB
127 1.1 matt #define UND_STACK_SIZE 2
128 1.1 matt #else
129 1.1 matt #define UND_STACK_SIZE 1
130 1.1 matt #endif
131 1.1 matt
132 1.1 matt BootConfig bootconfig; /* Boot config storage */
133 1.1 matt char *boot_args = NULL;
134 1.1 matt char *boot_file = NULL;
135 1.1 matt
136 1.1 matt vm_offset_t physical_start;
137 1.1 matt vm_offset_t physical_freestart;
138 1.1 matt vm_offset_t physical_freeend;
139 1.1 matt vm_offset_t physical_end;
140 1.1 matt u_int free_pages;
141 1.1 matt vm_offset_t pagetables_start;
142 1.1 matt int physmem = 0;
143 1.1 matt
144 1.1 matt /*int debug_flags;*/
145 1.1 matt #ifndef PMAP_STATIC_L1S
146 1.1 matt int max_processes = 64; /* Default number */
147 1.1 matt #endif /* !PMAP_STATIC_L1S */
148 1.1 matt
149 1.1 matt /* Physical and virtual addresses for some global pages */
150 1.1 matt pv_addr_t systempage;
151 1.1 matt pv_addr_t irqstack;
152 1.1 matt pv_addr_t undstack;
153 1.1 matt pv_addr_t abtstack;
154 1.1 matt pv_addr_t kernelstack;
155 1.8 thorpej pv_addr_t minidataclean;
156 1.1 matt
157 1.1 matt vm_offset_t msgbufphys;
158 1.1 matt
159 1.1 matt extern u_int data_abort_handler_address;
160 1.1 matt extern u_int prefetch_abort_handler_address;
161 1.1 matt extern u_int undefined_handler_address;
162 1.1 matt
163 1.1 matt #ifdef PMAP_DEBUG
164 1.1 matt extern int pmap_debug_level;
165 1.1 matt #endif
166 1.1 matt
167 1.27 thorpej #define KERNEL_PT_SYS 0 /* L2 table for mapping zero page */
168 1.27 thorpej
169 1.27 thorpej #define KERNEL_PT_KERNEL 1 /* L2 table for mapping kernel */
170 1.27 thorpej #define KERNEL_PT_KERNEL_NUM 2
171 1.27 thorpej
172 1.27 thorpej /* L2 table for mapping i80312 */
173 1.27 thorpej #define KERNEL_PT_IOPXS (KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM)
174 1.27 thorpej
175 1.27 thorpej /* L2 tables for mapping kernel VM */
176 1.27 thorpej #define KERNEL_PT_VMDATA (KERNEL_PT_IOPXS + 1)
177 1.32 chris #define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */
178 1.1 matt #define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
179 1.1 matt
180 1.27 thorpej pv_addr_t kernel_pt_table[NUM_KERNEL_PTS];
181 1.1 matt
182 1.1 matt struct user *proc0paddr;
183 1.1 matt
184 1.1 matt /* Prototypes */
185 1.1 matt
186 1.2 thorpej void consinit(void);
187 1.1 matt
188 1.1 matt #include "com.h"
189 1.2 thorpej #if NCOM > 0
190 1.1 matt #include <dev/ic/comreg.h>
191 1.1 matt #include <dev/ic/comvar.h>
192 1.1 matt #endif
193 1.1 matt
194 1.20 thorpej /*
195 1.20 thorpej * Define the default console speed for the board. This is generally
196 1.20 thorpej * what the firmware provided with the board defaults to.
197 1.20 thorpej */
198 1.1 matt #ifndef CONSPEED
199 1.20 thorpej #define CONSPEED B115200
200 1.20 thorpej #endif /* ! CONSPEED */
201 1.20 thorpej
202 1.20 thorpej #ifndef CONUNIT
203 1.20 thorpej #define CONUNIT 0
204 1.1 matt #endif
205 1.20 thorpej
206 1.1 matt #ifndef CONMODE
207 1.1 matt #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
208 1.15 thorpej #endif
209 1.1 matt
210 1.1 matt int comcnspeed = CONSPEED;
211 1.1 matt int comcnmode = CONMODE;
212 1.15 thorpej int comcnunit = CONUNIT;
213 1.1 matt
214 1.1 matt /*
215 1.1 matt * void cpu_reboot(int howto, char *bootstr)
216 1.1 matt *
217 1.1 matt * Reboots the system
218 1.1 matt *
219 1.1 matt * Deal with any syncing, unmounting, dumping and shutdown hooks,
220 1.1 matt * then reset the CPU.
221 1.1 matt */
222 1.1 matt void
223 1.1 matt cpu_reboot(int howto, char *bootstr)
224 1.1 matt {
225 1.1 matt #ifdef DIAGNOSTIC
226 1.1 matt /* info */
227 1.46 thorpej printf("boot: howto=%08x curlwp=%p\n", howto, curlwp);
228 1.1 matt #endif
229 1.1 matt
230 1.1 matt /*
231 1.1 matt * If we are still cold then hit the air brakes
232 1.1 matt * and crash to earth fast
233 1.1 matt */
234 1.1 matt if (cold) {
235 1.1 matt doshutdownhooks();
236 1.1 matt printf("The operating system has halted.\n");
237 1.1 matt printf("Please press any key to reboot.\n\n");
238 1.1 matt cngetc();
239 1.1 matt printf("rebooting...\n");
240 1.1 matt cpu_reset();
241 1.1 matt /*NOTREACHED*/
242 1.1 matt }
243 1.1 matt
244 1.1 matt /* Disable console buffering */
245 1.1 matt
246 1.1 matt /*
247 1.1 matt * If RB_NOSYNC was not specified sync the discs.
248 1.2 thorpej * Note: Unless cold is set to 1 here, syslogd will die during the
249 1.2 thorpej * unmount. It looks like syslogd is getting woken up only to find
250 1.2 thorpej * that it cannot page part of the binary in as the filesystem has
251 1.2 thorpej * been unmounted.
252 1.1 matt */
253 1.1 matt if (!(howto & RB_NOSYNC))
254 1.1 matt bootsync();
255 1.1 matt
256 1.1 matt /* Say NO to interrupts */
257 1.1 matt splhigh();
258 1.1 matt
259 1.1 matt /* Do a dump if requested. */
260 1.1 matt if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
261 1.1 matt dumpsys();
262 1.1 matt
263 1.1 matt /* Run any shutdown hooks */
264 1.1 matt doshutdownhooks();
265 1.1 matt
266 1.1 matt /* Make sure IRQ's are disabled */
267 1.1 matt IRQdisable;
268 1.1 matt
269 1.1 matt if (howto & RB_HALT) {
270 1.40 thorpej iq80310_7seg('.', '.');
271 1.1 matt printf("The operating system has halted.\n");
272 1.1 matt printf("Please press any key to reboot.\n\n");
273 1.1 matt cngetc();
274 1.1 matt }
275 1.1 matt
276 1.1 matt printf("rebooting...\n");
277 1.1 matt cpu_reset();
278 1.1 matt /*NOTREACHED*/
279 1.1 matt }
280 1.1 matt
281 1.1 matt /*
282 1.1 matt * Mapping table for core kernel memory. This memory is mapped at init
283 1.1 matt * time with section mappings.
284 1.1 matt */
285 1.1 matt struct l1_sec_map {
286 1.1 matt vaddr_t va;
287 1.1 matt vaddr_t pa;
288 1.1 matt vsize_t size;
289 1.21 thorpej vm_prot_t prot;
290 1.21 thorpej int cache;
291 1.1 matt } l1_sec_table[] = {
292 1.2 thorpej /*
293 1.2 thorpej * Map the on-board devices VA == PA so that we can access them
294 1.2 thorpej * with the MMU on or off.
295 1.2 thorpej */
296 1.2 thorpej {
297 1.2 thorpej IQ80310_OBIO_BASE,
298 1.2 thorpej IQ80310_OBIO_BASE,
299 1.2 thorpej IQ80310_OBIO_SIZE,
300 1.21 thorpej VM_PROT_READ|VM_PROT_WRITE,
301 1.21 thorpej PTE_NOCACHE,
302 1.2 thorpej },
303 1.2 thorpej
304 1.1 matt {
305 1.1 matt 0,
306 1.1 matt 0,
307 1.1 matt 0,
308 1.1 matt 0,
309 1.21 thorpej 0,
310 1.1 matt }
311 1.1 matt };
312 1.1 matt
313 1.1 matt /*
314 1.2 thorpej * u_int initarm(...)
315 1.1 matt *
316 1.1 matt * Initial entry point on startup. This gets called before main() is
317 1.1 matt * entered.
318 1.1 matt * It should be responsible for setting up everything that must be
319 1.1 matt * in place when main is called.
320 1.1 matt * This includes
321 1.1 matt * Taking a copy of the boot configuration structure.
322 1.1 matt * Initialising the physical console so characters can be printed.
323 1.1 matt * Setting up page tables for the kernel
324 1.1 matt * Relocating the kernel to the bottom of physical memory
325 1.1 matt */
326 1.1 matt u_int
327 1.16 thorpej initarm(void *arg)
328 1.1 matt {
329 1.38 thorpej extern vaddr_t xscale_cache_clean_addr;
330 1.46 thorpej #ifdef DIAGNOSTIC
331 1.8 thorpej extern vsize_t xscale_minidata_clean_size;
332 1.46 thorpej #endif
333 1.1 matt int loop;
334 1.1 matt int loop1;
335 1.1 matt u_int l1pagetable;
336 1.1 matt pv_addr_t kernel_l1pt;
337 1.1 matt pv_addr_t kernel_ptpt;
338 1.2 thorpej paddr_t memstart;
339 1.2 thorpej psize_t memsize;
340 1.2 thorpej
341 1.2 thorpej /*
342 1.2 thorpej * Clear out the 7-segment display. Whee, the first visual
343 1.2 thorpej * indication that we're running kernel code.
344 1.2 thorpej */
345 1.2 thorpej iq80310_7seg(' ', ' ');
346 1.1 matt
347 1.1 matt /*
348 1.1 matt * Heads up ... Setup the CPU / MMU / TLB functions
349 1.1 matt */
350 1.1 matt if (set_cpufuncs())
351 1.1 matt panic("cpu not recognized!");
352 1.1 matt
353 1.2 thorpej /* Calibrate the delay loop. */
354 1.2 thorpej iq80310_calibrate_delay();
355 1.1 matt
356 1.1 matt /*
357 1.2 thorpej * Since we map the on-board devices VA==PA, and the kernel
358 1.2 thorpej * is running VA==PA, it's possible for us to initialize
359 1.2 thorpej * the console now.
360 1.1 matt */
361 1.2 thorpej consinit();
362 1.1 matt
363 1.1 matt /* Talk to the user */
364 1.2 thorpej printf("\nNetBSD/evbarm (IQ80310) booting ...\n");
365 1.1 matt
366 1.1 matt /*
367 1.3 thorpej * Reset the secondary PCI bus. RedBoot doesn't stop devices
368 1.3 thorpej * on the PCI bus before handing us control, so we have to
369 1.3 thorpej * do this.
370 1.3 thorpej *
371 1.3 thorpej * XXX This is arguably a bug in RedBoot, and doing this reset
372 1.3 thorpej * XXX could be problematic in the future if we encounter an
373 1.3 thorpej * XXX application where the PPB in the i80312 is used as a
374 1.3 thorpej * XXX PPB.
375 1.3 thorpej */
376 1.3 thorpej {
377 1.3 thorpej uint32_t reg;
378 1.3 thorpej
379 1.3 thorpej printf("Resetting secondary PCI bus...\n");
380 1.3 thorpej reg = bus_space_read_4(&obio_bs_tag,
381 1.3 thorpej I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL);
382 1.3 thorpej bus_space_write_4(&obio_bs_tag,
383 1.3 thorpej I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL,
384 1.3 thorpej reg | PPB_BC_SECONDARY_RESET);
385 1.3 thorpej delay(10 * 1000); /* 10ms enough? */
386 1.3 thorpej bus_space_write_4(&obio_bs_tag,
387 1.3 thorpej I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL,
388 1.3 thorpej reg);
389 1.3 thorpej }
390 1.3 thorpej
391 1.3 thorpej /*
392 1.33 thorpej * We are currently running with the MMU enabled and the
393 1.33 thorpej * entire address space mapped VA==PA, except for the
394 1.33 thorpej * first 64M of RAM is also double-mapped at 0xc0000000.
395 1.33 thorpej * There is an L1 page table at 0xa0004000.
396 1.1 matt */
397 1.1 matt
398 1.2 thorpej /*
399 1.2 thorpej * Fetch the SDRAM start/size from the i80312 SDRAM configration
400 1.2 thorpej * registers.
401 1.2 thorpej */
402 1.3 thorpej i80312_sdram_bounds(&obio_bs_tag, I80312_PMMR_BASE + I80312_MEM_BASE,
403 1.3 thorpej &memstart, &memsize);
404 1.2 thorpej
405 1.1 matt printf("initarm: Configuring system ...\n");
406 1.1 matt
407 1.2 thorpej /* Fake bootconfig structure for the benefit of pmap.c */
408 1.2 thorpej /* XXX must make the memory description h/w independant */
409 1.2 thorpej bootconfig.dramblocks = 1;
410 1.2 thorpej bootconfig.dram[0].address = memstart;
411 1.47 thorpej bootconfig.dram[0].pages = memsize / PAGE_SIZE;
412 1.2 thorpej
413 1.1 matt /*
414 1.1 matt * Set up the variables that define the availablilty of
415 1.2 thorpej * physical memory. For now, we're going to set
416 1.2 thorpej * physical_freestart to 0xa0200000 (where the kernel
417 1.2 thorpej * was loaded), and allocate the memory we need downwards.
418 1.33 thorpej * If we get too close to the L1 table that we set up, we
419 1.33 thorpej * will panic. We will update physical_freestart and
420 1.33 thorpej * physical_freeend later to reflect what pmap_bootstrap()
421 1.2 thorpej * wants to see.
422 1.2 thorpej *
423 1.2 thorpej * XXX pmap_bootstrap() needs an enema.
424 1.1 matt */
425 1.2 thorpej physical_start = bootconfig.dram[0].address;
426 1.47 thorpej physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE);
427 1.2 thorpej
428 1.2 thorpej physical_freestart = 0xa0009000UL;
429 1.2 thorpej physical_freeend = 0xa0200000UL;
430 1.2 thorpej
431 1.47 thorpej physmem = (physical_end - physical_start) / PAGE_SIZE;
432 1.1 matt
433 1.1 matt /* Tell the user about the memory */
434 1.1 matt printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem,
435 1.1 matt physical_start, physical_end - 1);
436 1.1 matt
437 1.1 matt /*
438 1.2 thorpej * Okay, the kernel starts 2MB in from the bottom of physical
439 1.2 thorpej * memory. We are going to allocate our bootstrap pages downwards
440 1.2 thorpej * from there.
441 1.2 thorpej *
442 1.2 thorpej * We need to allocate some fixed page tables to get the kernel
443 1.2 thorpej * going. We allocate one page directory and a number of page
444 1.2 thorpej * tables and store the physical addresses in the kernel_pt_table
445 1.2 thorpej * array.
446 1.1 matt *
447 1.2 thorpej * The kernel page directory must be on a 16K boundary. The page
448 1.2 thorpej * tables must be on 4K bounaries. What we do is allocate the
449 1.2 thorpej * page directory on the first 16K boundary that we encounter, and
450 1.2 thorpej * the page tables on 4K boundaries otherwise. Since we allocate
451 1.2 thorpej * at least 3 L2 page tables, we are guaranteed to encounter at
452 1.2 thorpej * least one 16K aligned region.
453 1.1 matt */
454 1.1 matt
455 1.1 matt #ifdef VERBOSE_INIT_ARM
456 1.1 matt printf("Allocating page tables\n");
457 1.1 matt #endif
458 1.1 matt
459 1.47 thorpej free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE;
460 1.1 matt
461 1.1 matt #ifdef VERBOSE_INIT_ARM
462 1.2 thorpej printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n",
463 1.1 matt physical_freestart, free_pages, free_pages);
464 1.1 matt #endif
465 1.1 matt
466 1.1 matt /* Define a macro to simplify memory allocation */
467 1.2 thorpej #define valloc_pages(var, np) \
468 1.2 thorpej alloc_pages((var).pv_pa, (np)); \
469 1.1 matt (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start;
470 1.1 matt
471 1.2 thorpej #define alloc_pages(var, np) \
472 1.47 thorpej physical_freeend -= ((np) * PAGE_SIZE); \
473 1.2 thorpej if (physical_freeend < physical_freestart) \
474 1.2 thorpej panic("initarm: out of memory"); \
475 1.2 thorpej (var) = physical_freeend; \
476 1.2 thorpej free_pages -= (np); \
477 1.47 thorpej memset((char *)(var), 0, ((np) * PAGE_SIZE));
478 1.1 matt
479 1.1 matt loop1 = 0;
480 1.1 matt kernel_l1pt.pv_pa = 0;
481 1.1 matt for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
482 1.1 matt /* Are we 16KB aligned for an L1 ? */
483 1.37 thorpej if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0
484 1.1 matt && kernel_l1pt.pv_pa == 0) {
485 1.47 thorpej valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
486 1.1 matt } else {
487 1.48 thorpej #ifdef ARM32_PMAP_NEW
488 1.48 thorpej valloc_pages(kernel_pt_table[loop1],
489 1.48 thorpej L2_TABLE_SIZE / PAGE_SIZE);
490 1.48 thorpej #else
491 1.27 thorpej alloc_pages(kernel_pt_table[loop1].pv_pa,
492 1.47 thorpej L2_TABLE_SIZE / PAGE_SIZE);
493 1.27 thorpej kernel_pt_table[loop1].pv_va =
494 1.27 thorpej kernel_pt_table[loop1].pv_pa;
495 1.48 thorpej #endif
496 1.1 matt ++loop1;
497 1.1 matt }
498 1.1 matt }
499 1.1 matt
500 1.1 matt /* This should never be able to happen but better confirm that. */
501 1.37 thorpej if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE-1)) != 0)
502 1.45 provos panic("initarm: Failed to align the kernel page directory");
503 1.1 matt
504 1.1 matt /*
505 1.1 matt * Allocate a page for the system page mapped to V0x00000000
506 1.1 matt * This page will just contain the system vectors and can be
507 1.1 matt * shared by all processes.
508 1.1 matt */
509 1.1 matt alloc_pages(systempage.pv_pa, 1);
510 1.1 matt
511 1.2 thorpej /* Allocate a page for the page table to map kernel page tables. */
512 1.47 thorpej valloc_pages(kernel_ptpt, L2_TABLE_SIZE / PAGE_SIZE);
513 1.1 matt
514 1.1 matt /* Allocate stacks for all modes */
515 1.1 matt valloc_pages(irqstack, IRQ_STACK_SIZE);
516 1.1 matt valloc_pages(abtstack, ABT_STACK_SIZE);
517 1.1 matt valloc_pages(undstack, UND_STACK_SIZE);
518 1.1 matt valloc_pages(kernelstack, UPAGES);
519 1.1 matt
520 1.8 thorpej /* Allocate enough pages for cleaning the Mini-Data cache. */
521 1.47 thorpej KASSERT(xscale_minidata_clean_size <= PAGE_SIZE);
522 1.8 thorpej valloc_pages(minidataclean, 1);
523 1.8 thorpej
524 1.1 matt #ifdef VERBOSE_INIT_ARM
525 1.2 thorpej printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa,
526 1.2 thorpej irqstack.pv_va);
527 1.2 thorpej printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa,
528 1.2 thorpej abtstack.pv_va);
529 1.2 thorpej printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa,
530 1.2 thorpej undstack.pv_va);
531 1.2 thorpej printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa,
532 1.2 thorpej kernelstack.pv_va);
533 1.1 matt #endif
534 1.1 matt
535 1.2 thorpej /*
536 1.2 thorpej * XXX Defer this to later so that we can reclaim the memory
537 1.2 thorpej * XXX used by the RedBoot page tables.
538 1.2 thorpej */
539 1.47 thorpej alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE);
540 1.1 matt
541 1.1 matt /*
542 1.1 matt * Ok we have allocated physical pages for the primary kernel
543 1.1 matt * page tables
544 1.1 matt */
545 1.1 matt
546 1.1 matt #ifdef VERBOSE_INIT_ARM
547 1.2 thorpej printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa);
548 1.1 matt #endif
549 1.1 matt
550 1.1 matt /*
551 1.24 skrll * Now we start construction of the L1 page table
552 1.1 matt * We start by mapping the L2 page tables into the L1.
553 1.1 matt * This means that we can replace L1 mappings later on if necessary
554 1.1 matt */
555 1.1 matt l1pagetable = kernel_l1pt.pv_pa;
556 1.1 matt
557 1.1 matt /* Map the L2 pages tables in the L1 page table */
558 1.49 thorpej pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH & ~(0x00400000 - 1),
559 1.27 thorpej &kernel_pt_table[KERNEL_PT_SYS]);
560 1.27 thorpej for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++)
561 1.27 thorpej pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000,
562 1.27 thorpej &kernel_pt_table[KERNEL_PT_KERNEL + loop]);
563 1.23 thorpej pmap_link_l2pt(l1pagetable, IQ80310_IOPXS_VBASE,
564 1.27 thorpej &kernel_pt_table[KERNEL_PT_IOPXS]);
565 1.27 thorpej for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
566 1.23 thorpej pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
567 1.27 thorpej &kernel_pt_table[KERNEL_PT_VMDATA + loop]);
568 1.34 thorpej pmap_link_l2pt(l1pagetable, PTE_BASE, &kernel_ptpt);
569 1.32 chris
570 1.32 chris /* update the top of the kernel VM */
571 1.33 thorpej pmap_curmaxkvaddr =
572 1.35 thorpej KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000);
573 1.1 matt
574 1.1 matt #ifdef VERBOSE_INIT_ARM
575 1.1 matt printf("Mapping kernel\n");
576 1.1 matt #endif
577 1.1 matt
578 1.1 matt /* Now we fill in the L2 pagetable for the kernel static code/data */
579 1.1 matt {
580 1.2 thorpej extern char etext[], _end[];
581 1.2 thorpej size_t textsize = (uintptr_t) etext - KERNEL_TEXT_BASE;
582 1.2 thorpej size_t totalsize = (uintptr_t) _end - KERNEL_TEXT_BASE;
583 1.1 matt u_int logical;
584 1.1 matt
585 1.14 thorpej textsize = (textsize + PGOFSET) & ~PGOFSET;
586 1.1 matt totalsize = (totalsize + PGOFSET) & ~PGOFSET;
587 1.2 thorpej
588 1.2 thorpej logical = 0x00200000; /* offset of kernel in RAM */
589 1.2 thorpej
590 1.27 thorpej logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
591 1.1 matt physical_start + logical, textsize,
592 1.25 thorpej VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
593 1.27 thorpej logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
594 1.1 matt physical_start + logical, totalsize - textsize,
595 1.25 thorpej VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
596 1.1 matt }
597 1.1 matt
598 1.1 matt #ifdef VERBOSE_INIT_ARM
599 1.1 matt printf("Constructing L2 page tables\n");
600 1.1 matt #endif
601 1.1 matt
602 1.1 matt /* Map the stack pages */
603 1.27 thorpej pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
604 1.47 thorpej IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
605 1.27 thorpej pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
606 1.47 thorpej ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
607 1.27 thorpej pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
608 1.47 thorpej UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
609 1.27 thorpej pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
610 1.47 thorpej UPAGES * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
611 1.25 thorpej
612 1.48 thorpej #ifndef ARM32_PMAP_NEW
613 1.27 thorpej pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
614 1.43 thorpej L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
615 1.48 thorpej #else
616 1.48 thorpej pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
617 1.48 thorpej L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
618 1.48 thorpej
619 1.48 thorpej for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
620 1.48 thorpej pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va,
621 1.48 thorpej kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
622 1.48 thorpej VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
623 1.48 thorpej }
624 1.48 thorpej #endif
625 1.1 matt
626 1.8 thorpej /* Map the Mini-Data cache clean area. */
627 1.38 thorpej xscale_setup_minidata(l1pagetable, minidataclean.pv_va,
628 1.38 thorpej minidataclean.pv_pa);
629 1.8 thorpej
630 1.1 matt /* Map the page table that maps the kernel pages */
631 1.29 thorpej pmap_map_entry(l1pagetable, kernel_ptpt.pv_va, kernel_ptpt.pv_pa,
632 1.48 thorpej #ifndef ARM32_PMAP_NEW
633 1.22 thorpej VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
634 1.48 thorpej #else
635 1.48 thorpej VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
636 1.48 thorpej #endif
637 1.1 matt
638 1.1 matt /*
639 1.1 matt * Map entries in the page table used to map PTE's
640 1.1 matt * Basically every kernel page table gets mapped here
641 1.1 matt */
642 1.1 matt /* The -2 is slightly bogus, it should be -log2(sizeof(pt_entry_t)) */
643 1.28 thorpej for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++) {
644 1.28 thorpej pmap_map_entry(l1pagetable,
645 1.34 thorpej PTE_BASE + ((KERNEL_BASE +
646 1.27 thorpej (loop * 0x00400000)) >> (PGSHIFT-2)),
647 1.27 thorpej kernel_pt_table[KERNEL_PT_KERNEL + loop].pv_pa,
648 1.48 thorpej #ifndef ARM32_PMAP_NEW
649 1.44 thorpej VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
650 1.48 thorpej #else
651 1.48 thorpej VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
652 1.48 thorpej #endif
653 1.28 thorpej }
654 1.28 thorpej pmap_map_entry(l1pagetable,
655 1.34 thorpej PTE_BASE + (PTE_BASE >> (PGSHIFT-2)),
656 1.48 thorpej #ifndef ARM32_PMAP_NEW
657 1.28 thorpej kernel_ptpt.pv_pa, VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
658 1.48 thorpej #else
659 1.48 thorpej kernel_ptpt.pv_pa, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
660 1.48 thorpej #endif
661 1.28 thorpej pmap_map_entry(l1pagetable,
662 1.49 thorpej trunc_page(PTE_BASE + (ARM_VECTORS_HIGH >> (PGSHIFT-2))),
663 1.27 thorpej kernel_pt_table[KERNEL_PT_SYS].pv_pa,
664 1.44 thorpej VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
665 1.27 thorpej for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
666 1.28 thorpej pmap_map_entry(l1pagetable,
667 1.34 thorpej PTE_BASE + ((KERNEL_VM_BASE +
668 1.1 matt (loop * 0x00400000)) >> (PGSHIFT-2)),
669 1.27 thorpej kernel_pt_table[KERNEL_PT_VMDATA + loop].pv_pa,
670 1.44 thorpej VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
671 1.1 matt
672 1.36 thorpej /* Map the vector page. */
673 1.49 thorpej pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
674 1.22 thorpej VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
675 1.1 matt
676 1.3 thorpej /*
677 1.3 thorpej * Map devices we can map w/ section mappings.
678 1.3 thorpej */
679 1.1 matt loop = 0;
680 1.1 matt while (l1_sec_table[loop].size) {
681 1.1 matt vm_size_t sz;
682 1.1 matt
683 1.1 matt #ifdef VERBOSE_INIT_ARM
684 1.1 matt printf("%08lx -> %08lx @ %08lx\n", l1_sec_table[loop].pa,
685 1.1 matt l1_sec_table[loop].pa + l1_sec_table[loop].size - 1,
686 1.1 matt l1_sec_table[loop].va);
687 1.1 matt #endif
688 1.37 thorpej for (sz = 0; sz < l1_sec_table[loop].size; sz += L1_S_SIZE)
689 1.21 thorpej pmap_map_section(l1pagetable,
690 1.21 thorpej l1_sec_table[loop].va + sz,
691 1.1 matt l1_sec_table[loop].pa + sz,
692 1.21 thorpej l1_sec_table[loop].prot,
693 1.21 thorpej l1_sec_table[loop].cache);
694 1.1 matt ++loop;
695 1.1 matt }
696 1.3 thorpej
697 1.3 thorpej /*
698 1.3 thorpej * Map the PCI I/O spaces and i80312 registers. These are too
699 1.3 thorpej * small to be mapped w/ section mappings.
700 1.3 thorpej */
701 1.3 thorpej #ifdef VERBOSE_INIT_ARM
702 1.3 thorpej printf("Mapping PIOW 0x%08lx -> 0x%08lx @ 0x%08lx\n",
703 1.3 thorpej I80312_PCI_XLATE_PIOW_BASE,
704 1.3 thorpej I80312_PCI_XLATE_PIOW_BASE + I80312_PCI_XLATE_IOSIZE - 1,
705 1.3 thorpej IQ80310_PIOW_VBASE);
706 1.3 thorpej #endif
707 1.27 thorpej pmap_map_chunk(l1pagetable, IQ80310_PIOW_VBASE,
708 1.25 thorpej I80312_PCI_XLATE_PIOW_BASE, I80312_PCI_XLATE_IOSIZE,
709 1.25 thorpej VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
710 1.3 thorpej
711 1.3 thorpej #ifdef VERBOSE_INIT_ARM
712 1.3 thorpej printf("Mapping SIOW 0x%08lx -> 0x%08lx @ 0x%08lx\n",
713 1.3 thorpej I80312_PCI_XLATE_SIOW_BASE,
714 1.3 thorpej I80312_PCI_XLATE_SIOW_BASE + I80312_PCI_XLATE_IOSIZE - 1,
715 1.3 thorpej IQ80310_SIOW_VBASE);
716 1.3 thorpej #endif
717 1.27 thorpej pmap_map_chunk(l1pagetable, IQ80310_SIOW_VBASE,
718 1.25 thorpej I80312_PCI_XLATE_SIOW_BASE, I80312_PCI_XLATE_IOSIZE,
719 1.25 thorpej VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
720 1.3 thorpej
721 1.3 thorpej #ifdef VERBOSE_INIT_ARM
722 1.4 thorpej printf("Mapping 80312 0x%08lx -> 0x%08lx @ 0x%08lx\n",
723 1.3 thorpej I80312_PMMR_BASE,
724 1.3 thorpej I80312_PMMR_BASE + I80312_PMMR_SIZE - 1,
725 1.3 thorpej IQ80310_80312_VBASE);
726 1.3 thorpej #endif
727 1.27 thorpej pmap_map_chunk(l1pagetable, IQ80310_80312_VBASE,
728 1.25 thorpej I80312_PMMR_BASE, I80312_PMMR_SIZE,
729 1.25 thorpej VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
730 1.8 thorpej
731 1.8 thorpej /*
732 1.8 thorpej * Give the XScale global cache clean code an appropriately
733 1.8 thorpej * sized chunk of unmapped VA space starting at 0xff000000
734 1.8 thorpej * (our device mappings end before this address).
735 1.8 thorpej */
736 1.8 thorpej xscale_cache_clean_addr = 0xff000000U;
737 1.1 matt
738 1.1 matt /*
739 1.1 matt * Now we have the real page tables in place so we can switch to them.
740 1.2 thorpej * Once this is done we will be running with the REAL kernel page
741 1.2 thorpej * tables.
742 1.2 thorpej */
743 1.2 thorpej
744 1.2 thorpej /*
745 1.2 thorpej * Update the physical_freestart/physical_freeend/free_pages
746 1.2 thorpej * variables.
747 1.1 matt */
748 1.2 thorpej {
749 1.2 thorpej extern char _end[];
750 1.2 thorpej
751 1.33 thorpej physical_freestart = physical_start +
752 1.33 thorpej (((((uintptr_t) _end) + PGOFSET) & ~PGOFSET) -
753 1.33 thorpej KERNEL_BASE);
754 1.2 thorpej physical_freeend = physical_end;
755 1.47 thorpej free_pages =
756 1.47 thorpej (physical_freeend - physical_freestart) / PAGE_SIZE;
757 1.2 thorpej }
758 1.1 matt
759 1.1 matt /* Switch tables */
760 1.1 matt #ifdef VERBOSE_INIT_ARM
761 1.2 thorpej printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
762 1.1 matt physical_freestart, free_pages, free_pages);
763 1.1 matt printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa);
764 1.1 matt #endif
765 1.48 thorpej #ifdef ARM32_PMAP_NEW
766 1.48 thorpej cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
767 1.48 thorpej #endif
768 1.1 matt setttb(kernel_l1pt.pv_pa);
769 1.30 thorpej cpu_tlb_flushID();
770 1.48 thorpej #ifdef ARM32_PMAP_NEW
771 1.48 thorpej cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
772 1.48 thorpej
773 1.48 thorpej /*
774 1.48 thorpej * Moved from cpu_startup() as data_abort_handler() references
775 1.48 thorpej * this during uvm init
776 1.48 thorpej */
777 1.48 thorpej proc0paddr = (struct user *)kernelstack.pv_va;
778 1.48 thorpej lwp0.l_addr = proc0paddr;
779 1.48 thorpej #endif
780 1.1 matt
781 1.1 matt #ifdef VERBOSE_INIT_ARM
782 1.1 matt printf("done!\n");
783 1.1 matt #endif
784 1.1 matt
785 1.1 matt #ifdef VERBOSE_INIT_ARM
786 1.1 matt printf("bootstrap done.\n");
787 1.1 matt #endif
788 1.1 matt
789 1.49 thorpej arm32_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
790 1.1 matt
791 1.1 matt /*
792 1.1 matt * Pages were allocated during the secondary bootstrap for the
793 1.1 matt * stacks for different CPU modes.
794 1.1 matt * We must now set the r13 registers in the different CPU modes to
795 1.1 matt * point to these stacks.
796 1.1 matt * Since the ARM stacks use STMFD etc. we must set r13 to the top end
797 1.1 matt * of the stack memory.
798 1.1 matt */
799 1.1 matt printf("init subsystems: stacks ");
800 1.1 matt
801 1.47 thorpej set_stackptr(PSR_IRQ32_MODE,
802 1.47 thorpej irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
803 1.47 thorpej set_stackptr(PSR_ABT32_MODE,
804 1.47 thorpej abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
805 1.47 thorpej set_stackptr(PSR_UND32_MODE,
806 1.47 thorpej undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
807 1.1 matt
808 1.1 matt /*
809 1.1 matt * Well we should set a data abort handler.
810 1.2 thorpej * Once things get going this will change as we will need a proper
811 1.2 thorpej * handler.
812 1.1 matt * Until then we will use a handler that just panics but tells us
813 1.1 matt * why.
814 1.1 matt * Initialisation of the vectors will just panic on a data abort.
815 1.1 matt * This just fills in a slighly better one.
816 1.1 matt */
817 1.1 matt printf("vectors ");
818 1.1 matt data_abort_handler_address = (u_int)data_abort_handler;
819 1.1 matt prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
820 1.1 matt undefined_handler_address = (u_int)undefinedinstruction_bounce;
821 1.1 matt
822 1.1 matt /* Initialise the undefined instruction handlers */
823 1.1 matt printf("undefined ");
824 1.1 matt undefined_init();
825 1.1 matt
826 1.42 thorpej /* Load memory into UVM. */
827 1.42 thorpej printf("page ");
828 1.42 thorpej uvm_setpagesize(); /* initialize PAGE_SIZE-dependent variables */
829 1.42 thorpej uvm_page_physload(atop(physical_freestart), atop(physical_freeend),
830 1.42 thorpej atop(physical_freestart), atop(physical_freeend),
831 1.42 thorpej VM_FREELIST_DEFAULT);
832 1.42 thorpej
833 1.1 matt /* Boot strap pmap telling it where the kernel page table is */
834 1.1 matt printf("pmap ");
835 1.48 thorpej #ifdef ARM32_PMAP_NEW
836 1.48 thorpej pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va);
837 1.48 thorpej #else
838 1.1 matt pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, kernel_ptpt);
839 1.48 thorpej #endif
840 1.1 matt
841 1.1 matt /* Setup the IRQ system */
842 1.1 matt printf("irq ");
843 1.18 thorpej iq80310_intr_init();
844 1.1 matt printf("done.\n");
845 1.1 matt
846 1.1 matt #ifdef IPKDB
847 1.1 matt /* Initialise ipkdb */
848 1.1 matt ipkdb_init();
849 1.1 matt if (boothowto & RB_KDB)
850 1.1 matt ipkdb_connect(0);
851 1.1 matt #endif
852 1.1 matt
853 1.1 matt #ifdef DDB
854 1.1 matt db_machine_init();
855 1.7 thorpej
856 1.7 thorpej /* Firmware doesn't load symbols. */
857 1.7 thorpej ddb_init(0, NULL, NULL);
858 1.1 matt
859 1.1 matt if (boothowto & RB_KDB)
860 1.1 matt Debugger();
861 1.1 matt #endif
862 1.1 matt
863 1.1 matt /* We return the new stack pointer address */
864 1.1 matt return(kernelstack.pv_va + USPACE_SVC_STACK_TOP);
865 1.1 matt }
866 1.1 matt
867 1.1 matt void
868 1.1 matt consinit(void)
869 1.1 matt {
870 1.15 thorpej static const bus_addr_t comcnaddrs[] = {
871 1.15 thorpej IQ80310_UART2, /* com0 (J9) */
872 1.15 thorpej IQ80310_UART1, /* com1 (J10) */
873 1.15 thorpej };
874 1.2 thorpej static int consinit_called;
875 1.1 matt
876 1.1 matt if (consinit_called != 0)
877 1.1 matt return;
878 1.1 matt
879 1.1 matt consinit_called = 1;
880 1.1 matt
881 1.2 thorpej #if NCOM > 0
882 1.15 thorpej if (comcnattach(&obio_bs_tag, comcnaddrs[comcnunit], comcnspeed,
883 1.2 thorpej COM_FREQ, comcnmode))
884 1.19 thorpej panic("can't init serial console @%lx", comcnaddrs[comcnunit]);
885 1.1 matt #else
886 1.19 thorpej panic("serial console @%lx not configured", comcnaddrs[comcnunit]);
887 1.1 matt #endif
888 1.1 matt }
889