iq80310_machdep.c revision 1.8.2.11 1 1.8.2.11 thorpej /* $NetBSD: iq80310_machdep.c,v 1.8.2.11 2002/12/11 05:58:32 thorpej Exp $ */
2 1.8.2.2 nathanw
3 1.8.2.2 nathanw /*
4 1.8.2.4 nathanw * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
5 1.8.2.2 nathanw * All rights reserved.
6 1.8.2.2 nathanw *
7 1.8.2.2 nathanw * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8 1.8.2.2 nathanw *
9 1.8.2.2 nathanw * Redistribution and use in source and binary forms, with or without
10 1.8.2.2 nathanw * modification, are permitted provided that the following conditions
11 1.8.2.2 nathanw * are met:
12 1.8.2.2 nathanw * 1. Redistributions of source code must retain the above copyright
13 1.8.2.2 nathanw * notice, this list of conditions and the following disclaimer.
14 1.8.2.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright
15 1.8.2.2 nathanw * notice, this list of conditions and the following disclaimer in the
16 1.8.2.2 nathanw * documentation and/or other materials provided with the distribution.
17 1.8.2.2 nathanw * 3. All advertising materials mentioning features or use of this software
18 1.8.2.2 nathanw * must display the following acknowledgement:
19 1.8.2.2 nathanw * This product includes software developed for the NetBSD Project by
20 1.8.2.2 nathanw * Wasabi Systems, Inc.
21 1.8.2.2 nathanw * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 1.8.2.2 nathanw * or promote products derived from this software without specific prior
23 1.8.2.2 nathanw * written permission.
24 1.8.2.2 nathanw *
25 1.8.2.2 nathanw * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 1.8.2.2 nathanw * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 1.8.2.2 nathanw * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 1.8.2.2 nathanw * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 1.8.2.2 nathanw * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 1.8.2.2 nathanw * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 1.8.2.2 nathanw * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 1.8.2.2 nathanw * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 1.8.2.2 nathanw * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 1.8.2.2 nathanw * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 1.8.2.2 nathanw * POSSIBILITY OF SUCH DAMAGE.
36 1.8.2.2 nathanw */
37 1.8.2.2 nathanw
38 1.8.2.2 nathanw /*
39 1.8.2.2 nathanw * Copyright (c) 1997,1998 Mark Brinicombe.
40 1.8.2.2 nathanw * Copyright (c) 1997,1998 Causality Limited.
41 1.8.2.2 nathanw * All rights reserved.
42 1.8.2.2 nathanw *
43 1.8.2.2 nathanw * Redistribution and use in source and binary forms, with or without
44 1.8.2.2 nathanw * modification, are permitted provided that the following conditions
45 1.8.2.2 nathanw * are met:
46 1.8.2.2 nathanw * 1. Redistributions of source code must retain the above copyright
47 1.8.2.2 nathanw * notice, this list of conditions and the following disclaimer.
48 1.8.2.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright
49 1.8.2.2 nathanw * notice, this list of conditions and the following disclaimer in the
50 1.8.2.2 nathanw * documentation and/or other materials provided with the distribution.
51 1.8.2.2 nathanw * 3. All advertising materials mentioning features or use of this software
52 1.8.2.2 nathanw * must display the following acknowledgement:
53 1.8.2.2 nathanw * This product includes software developed by Mark Brinicombe
54 1.8.2.2 nathanw * for the NetBSD Project.
55 1.8.2.2 nathanw * 4. The name of the company nor the name of the author may be used to
56 1.8.2.2 nathanw * endorse or promote products derived from this software without specific
57 1.8.2.2 nathanw * prior written permission.
58 1.8.2.2 nathanw *
59 1.8.2.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
60 1.8.2.2 nathanw * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
61 1.8.2.2 nathanw * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
62 1.8.2.2 nathanw * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
63 1.8.2.2 nathanw * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
64 1.8.2.2 nathanw * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
65 1.8.2.2 nathanw * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
66 1.8.2.2 nathanw * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
67 1.8.2.2 nathanw * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
68 1.8.2.2 nathanw * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
69 1.8.2.2 nathanw * SUCH DAMAGE.
70 1.8.2.2 nathanw *
71 1.8.2.2 nathanw * Machine dependant functions for kernel setup for Intel IQ80310 evaluation
72 1.8.2.2 nathanw * boards using RedBoot firmware.
73 1.8.2.2 nathanw */
74 1.8.2.2 nathanw
75 1.8.2.2 nathanw #include "opt_ddb.h"
76 1.8.2.2 nathanw #include "opt_pmap_debug.h"
77 1.8.2.2 nathanw
78 1.8.2.2 nathanw #include <sys/param.h>
79 1.8.2.2 nathanw #include <sys/device.h>
80 1.8.2.2 nathanw #include <sys/systm.h>
81 1.8.2.2 nathanw #include <sys/kernel.h>
82 1.8.2.2 nathanw #include <sys/exec.h>
83 1.8.2.2 nathanw #include <sys/proc.h>
84 1.8.2.2 nathanw #include <sys/msgbuf.h>
85 1.8.2.2 nathanw #include <sys/reboot.h>
86 1.8.2.2 nathanw #include <sys/termios.h>
87 1.8.2.2 nathanw
88 1.8.2.2 nathanw #include <dev/cons.h>
89 1.8.2.2 nathanw
90 1.8.2.2 nathanw #include <machine/db_machdep.h>
91 1.8.2.2 nathanw #include <ddb/db_sym.h>
92 1.8.2.2 nathanw #include <ddb/db_extern.h>
93 1.8.2.2 nathanw
94 1.8.2.2 nathanw #include <machine/bootconfig.h>
95 1.8.2.2 nathanw #include <machine/bus.h>
96 1.8.2.2 nathanw #include <machine/cpu.h>
97 1.8.2.2 nathanw #include <machine/frame.h>
98 1.8.2.2 nathanw #include <arm/undefined.h>
99 1.8.2.2 nathanw
100 1.8.2.4 nathanw #include <arm/arm32/machdep.h>
101 1.8.2.4 nathanw
102 1.8.2.2 nathanw #include <arm/xscale/i80312reg.h>
103 1.8.2.2 nathanw #include <arm/xscale/i80312var.h>
104 1.8.2.2 nathanw
105 1.8.2.2 nathanw #include <dev/pci/ppbreg.h>
106 1.8.2.2 nathanw
107 1.8.2.2 nathanw #include <evbarm/iq80310/iq80310reg.h>
108 1.8.2.2 nathanw #include <evbarm/iq80310/iq80310var.h>
109 1.8.2.2 nathanw #include <evbarm/iq80310/obiovar.h>
110 1.8.2.2 nathanw
111 1.8.2.2 nathanw #include "opt_ipkdb.h"
112 1.8.2.2 nathanw
113 1.8.2.2 nathanw /*
114 1.8.2.2 nathanw * Address to call from cpu_reset() to reset the machine.
115 1.8.2.2 nathanw * This is machine architecture dependant as it varies depending
116 1.8.2.2 nathanw * on where the ROM appears when you turn the MMU off.
117 1.8.2.2 nathanw */
118 1.8.2.2 nathanw
119 1.8.2.2 nathanw u_int cpu_reset_address = 0;
120 1.8.2.2 nathanw
121 1.8.2.2 nathanw /* Define various stack sizes in pages */
122 1.8.2.2 nathanw #define IRQ_STACK_SIZE 1
123 1.8.2.2 nathanw #define ABT_STACK_SIZE 1
124 1.8.2.2 nathanw #ifdef IPKDB
125 1.8.2.2 nathanw #define UND_STACK_SIZE 2
126 1.8.2.2 nathanw #else
127 1.8.2.2 nathanw #define UND_STACK_SIZE 1
128 1.8.2.2 nathanw #endif
129 1.8.2.2 nathanw
130 1.8.2.2 nathanw BootConfig bootconfig; /* Boot config storage */
131 1.8.2.2 nathanw char *boot_args = NULL;
132 1.8.2.2 nathanw char *boot_file = NULL;
133 1.8.2.2 nathanw
134 1.8.2.2 nathanw vm_offset_t physical_start;
135 1.8.2.2 nathanw vm_offset_t physical_freestart;
136 1.8.2.2 nathanw vm_offset_t physical_freeend;
137 1.8.2.2 nathanw vm_offset_t physical_end;
138 1.8.2.2 nathanw u_int free_pages;
139 1.8.2.2 nathanw vm_offset_t pagetables_start;
140 1.8.2.2 nathanw int physmem = 0;
141 1.8.2.2 nathanw
142 1.8.2.2 nathanw /*int debug_flags;*/
143 1.8.2.2 nathanw #ifndef PMAP_STATIC_L1S
144 1.8.2.2 nathanw int max_processes = 64; /* Default number */
145 1.8.2.2 nathanw #endif /* !PMAP_STATIC_L1S */
146 1.8.2.2 nathanw
147 1.8.2.2 nathanw /* Physical and virtual addresses for some global pages */
148 1.8.2.2 nathanw pv_addr_t systempage;
149 1.8.2.2 nathanw pv_addr_t irqstack;
150 1.8.2.2 nathanw pv_addr_t undstack;
151 1.8.2.2 nathanw pv_addr_t abtstack;
152 1.8.2.2 nathanw pv_addr_t kernelstack;
153 1.8.2.2 nathanw pv_addr_t minidataclean;
154 1.8.2.2 nathanw
155 1.8.2.2 nathanw vm_offset_t msgbufphys;
156 1.8.2.2 nathanw
157 1.8.2.2 nathanw extern u_int data_abort_handler_address;
158 1.8.2.2 nathanw extern u_int prefetch_abort_handler_address;
159 1.8.2.2 nathanw extern u_int undefined_handler_address;
160 1.8.2.2 nathanw
161 1.8.2.2 nathanw #ifdef PMAP_DEBUG
162 1.8.2.2 nathanw extern int pmap_debug_level;
163 1.8.2.2 nathanw #endif
164 1.8.2.2 nathanw
165 1.8.2.4 nathanw #define KERNEL_PT_SYS 0 /* L2 table for mapping zero page */
166 1.8.2.4 nathanw
167 1.8.2.4 nathanw #define KERNEL_PT_KERNEL 1 /* L2 table for mapping kernel */
168 1.8.2.4 nathanw #define KERNEL_PT_KERNEL_NUM 2
169 1.8.2.4 nathanw
170 1.8.2.4 nathanw /* L2 table for mapping i80312 */
171 1.8.2.4 nathanw #define KERNEL_PT_IOPXS (KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM)
172 1.8.2.4 nathanw
173 1.8.2.4 nathanw /* L2 tables for mapping kernel VM */
174 1.8.2.4 nathanw #define KERNEL_PT_VMDATA (KERNEL_PT_IOPXS + 1)
175 1.8.2.5 nathanw #define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */
176 1.8.2.2 nathanw #define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
177 1.8.2.2 nathanw
178 1.8.2.4 nathanw pv_addr_t kernel_pt_table[NUM_KERNEL_PTS];
179 1.8.2.2 nathanw
180 1.8.2.2 nathanw struct user *proc0paddr;
181 1.8.2.2 nathanw
182 1.8.2.2 nathanw /* Prototypes */
183 1.8.2.2 nathanw
184 1.8.2.2 nathanw void consinit(void);
185 1.8.2.2 nathanw
186 1.8.2.2 nathanw #include "com.h"
187 1.8.2.2 nathanw #if NCOM > 0
188 1.8.2.2 nathanw #include <dev/ic/comreg.h>
189 1.8.2.2 nathanw #include <dev/ic/comvar.h>
190 1.8.2.2 nathanw #endif
191 1.8.2.2 nathanw
192 1.8.2.4 nathanw /*
193 1.8.2.4 nathanw * Define the default console speed for the board. This is generally
194 1.8.2.4 nathanw * what the firmware provided with the board defaults to.
195 1.8.2.4 nathanw */
196 1.8.2.2 nathanw #ifndef CONSPEED
197 1.8.2.4 nathanw #define CONSPEED B115200
198 1.8.2.4 nathanw #endif /* ! CONSPEED */
199 1.8.2.4 nathanw
200 1.8.2.4 nathanw #ifndef CONUNIT
201 1.8.2.4 nathanw #define CONUNIT 0
202 1.8.2.2 nathanw #endif
203 1.8.2.4 nathanw
204 1.8.2.2 nathanw #ifndef CONMODE
205 1.8.2.2 nathanw #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
206 1.8.2.2 nathanw #endif
207 1.8.2.2 nathanw
208 1.8.2.2 nathanw int comcnspeed = CONSPEED;
209 1.8.2.2 nathanw int comcnmode = CONMODE;
210 1.8.2.4 nathanw int comcnunit = CONUNIT;
211 1.8.2.2 nathanw
212 1.8.2.2 nathanw /*
213 1.8.2.2 nathanw * void cpu_reboot(int howto, char *bootstr)
214 1.8.2.2 nathanw *
215 1.8.2.2 nathanw * Reboots the system
216 1.8.2.2 nathanw *
217 1.8.2.2 nathanw * Deal with any syncing, unmounting, dumping and shutdown hooks,
218 1.8.2.2 nathanw * then reset the CPU.
219 1.8.2.2 nathanw */
220 1.8.2.2 nathanw void
221 1.8.2.2 nathanw cpu_reboot(int howto, char *bootstr)
222 1.8.2.2 nathanw {
223 1.8.2.2 nathanw #ifdef DIAGNOSTIC
224 1.8.2.2 nathanw /* info */
225 1.8.2.7 nathanw printf("boot: howto=%08x curlwp=%p\n", howto, curlwp);
226 1.8.2.2 nathanw #endif
227 1.8.2.2 nathanw
228 1.8.2.2 nathanw /*
229 1.8.2.2 nathanw * If we are still cold then hit the air brakes
230 1.8.2.2 nathanw * and crash to earth fast
231 1.8.2.2 nathanw */
232 1.8.2.2 nathanw if (cold) {
233 1.8.2.2 nathanw doshutdownhooks();
234 1.8.2.2 nathanw printf("The operating system has halted.\n");
235 1.8.2.2 nathanw printf("Please press any key to reboot.\n\n");
236 1.8.2.2 nathanw cngetc();
237 1.8.2.2 nathanw printf("rebooting...\n");
238 1.8.2.2 nathanw cpu_reset();
239 1.8.2.2 nathanw /*NOTREACHED*/
240 1.8.2.2 nathanw }
241 1.8.2.2 nathanw
242 1.8.2.2 nathanw /* Disable console buffering */
243 1.8.2.2 nathanw
244 1.8.2.2 nathanw /*
245 1.8.2.2 nathanw * If RB_NOSYNC was not specified sync the discs.
246 1.8.2.2 nathanw * Note: Unless cold is set to 1 here, syslogd will die during the
247 1.8.2.2 nathanw * unmount. It looks like syslogd is getting woken up only to find
248 1.8.2.2 nathanw * that it cannot page part of the binary in as the filesystem has
249 1.8.2.2 nathanw * been unmounted.
250 1.8.2.2 nathanw */
251 1.8.2.2 nathanw if (!(howto & RB_NOSYNC))
252 1.8.2.2 nathanw bootsync();
253 1.8.2.2 nathanw
254 1.8.2.2 nathanw /* Say NO to interrupts */
255 1.8.2.2 nathanw splhigh();
256 1.8.2.2 nathanw
257 1.8.2.2 nathanw /* Do a dump if requested. */
258 1.8.2.2 nathanw if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
259 1.8.2.2 nathanw dumpsys();
260 1.8.2.2 nathanw
261 1.8.2.2 nathanw /* Run any shutdown hooks */
262 1.8.2.2 nathanw doshutdownhooks();
263 1.8.2.2 nathanw
264 1.8.2.2 nathanw /* Make sure IRQ's are disabled */
265 1.8.2.2 nathanw IRQdisable;
266 1.8.2.2 nathanw
267 1.8.2.2 nathanw if (howto & RB_HALT) {
268 1.8.2.6 nathanw iq80310_7seg('.', '.');
269 1.8.2.2 nathanw printf("The operating system has halted.\n");
270 1.8.2.2 nathanw printf("Please press any key to reboot.\n\n");
271 1.8.2.2 nathanw cngetc();
272 1.8.2.2 nathanw }
273 1.8.2.2 nathanw
274 1.8.2.2 nathanw printf("rebooting...\n");
275 1.8.2.2 nathanw cpu_reset();
276 1.8.2.2 nathanw /*NOTREACHED*/
277 1.8.2.2 nathanw }
278 1.8.2.2 nathanw
279 1.8.2.2 nathanw /*
280 1.8.2.2 nathanw * Mapping table for core kernel memory. This memory is mapped at init
281 1.8.2.2 nathanw * time with section mappings.
282 1.8.2.2 nathanw */
283 1.8.2.2 nathanw struct l1_sec_map {
284 1.8.2.2 nathanw vaddr_t va;
285 1.8.2.2 nathanw vaddr_t pa;
286 1.8.2.2 nathanw vsize_t size;
287 1.8.2.4 nathanw vm_prot_t prot;
288 1.8.2.4 nathanw int cache;
289 1.8.2.2 nathanw } l1_sec_table[] = {
290 1.8.2.2 nathanw /*
291 1.8.2.2 nathanw * Map the on-board devices VA == PA so that we can access them
292 1.8.2.2 nathanw * with the MMU on or off.
293 1.8.2.2 nathanw */
294 1.8.2.2 nathanw {
295 1.8.2.2 nathanw IQ80310_OBIO_BASE,
296 1.8.2.2 nathanw IQ80310_OBIO_BASE,
297 1.8.2.2 nathanw IQ80310_OBIO_SIZE,
298 1.8.2.4 nathanw VM_PROT_READ|VM_PROT_WRITE,
299 1.8.2.4 nathanw PTE_NOCACHE,
300 1.8.2.2 nathanw },
301 1.8.2.2 nathanw
302 1.8.2.2 nathanw {
303 1.8.2.2 nathanw 0,
304 1.8.2.2 nathanw 0,
305 1.8.2.2 nathanw 0,
306 1.8.2.2 nathanw 0,
307 1.8.2.4 nathanw 0,
308 1.8.2.2 nathanw }
309 1.8.2.2 nathanw };
310 1.8.2.2 nathanw
311 1.8.2.2 nathanw /*
312 1.8.2.2 nathanw * u_int initarm(...)
313 1.8.2.2 nathanw *
314 1.8.2.2 nathanw * Initial entry point on startup. This gets called before main() is
315 1.8.2.2 nathanw * entered.
316 1.8.2.2 nathanw * It should be responsible for setting up everything that must be
317 1.8.2.2 nathanw * in place when main is called.
318 1.8.2.2 nathanw * This includes
319 1.8.2.2 nathanw * Taking a copy of the boot configuration structure.
320 1.8.2.2 nathanw * Initialising the physical console so characters can be printed.
321 1.8.2.2 nathanw * Setting up page tables for the kernel
322 1.8.2.2 nathanw * Relocating the kernel to the bottom of physical memory
323 1.8.2.2 nathanw */
324 1.8.2.2 nathanw u_int
325 1.8.2.4 nathanw initarm(void *arg)
326 1.8.2.2 nathanw {
327 1.8.2.6 nathanw extern vaddr_t xscale_cache_clean_addr;
328 1.8.2.11 thorpej #ifdef DIAGNOSTIC
329 1.8.2.2 nathanw extern vsize_t xscale_minidata_clean_size;
330 1.8.2.11 thorpej #endif
331 1.8.2.2 nathanw int loop;
332 1.8.2.2 nathanw int loop1;
333 1.8.2.2 nathanw u_int l1pagetable;
334 1.8.2.2 nathanw pv_addr_t kernel_l1pt;
335 1.8.2.2 nathanw pv_addr_t kernel_ptpt;
336 1.8.2.2 nathanw paddr_t memstart;
337 1.8.2.2 nathanw psize_t memsize;
338 1.8.2.2 nathanw
339 1.8.2.2 nathanw /*
340 1.8.2.2 nathanw * Clear out the 7-segment display. Whee, the first visual
341 1.8.2.2 nathanw * indication that we're running kernel code.
342 1.8.2.2 nathanw */
343 1.8.2.2 nathanw iq80310_7seg(' ', ' ');
344 1.8.2.2 nathanw
345 1.8.2.2 nathanw /*
346 1.8.2.2 nathanw * Heads up ... Setup the CPU / MMU / TLB functions
347 1.8.2.2 nathanw */
348 1.8.2.2 nathanw if (set_cpufuncs())
349 1.8.2.2 nathanw panic("cpu not recognized!");
350 1.8.2.2 nathanw
351 1.8.2.2 nathanw /* Calibrate the delay loop. */
352 1.8.2.2 nathanw iq80310_calibrate_delay();
353 1.8.2.2 nathanw
354 1.8.2.2 nathanw /*
355 1.8.2.2 nathanw * Since we map the on-board devices VA==PA, and the kernel
356 1.8.2.2 nathanw * is running VA==PA, it's possible for us to initialize
357 1.8.2.2 nathanw * the console now.
358 1.8.2.2 nathanw */
359 1.8.2.2 nathanw consinit();
360 1.8.2.2 nathanw
361 1.8.2.2 nathanw /* Talk to the user */
362 1.8.2.2 nathanw printf("\nNetBSD/evbarm (IQ80310) booting ...\n");
363 1.8.2.2 nathanw
364 1.8.2.2 nathanw /*
365 1.8.2.2 nathanw * Reset the secondary PCI bus. RedBoot doesn't stop devices
366 1.8.2.2 nathanw * on the PCI bus before handing us control, so we have to
367 1.8.2.2 nathanw * do this.
368 1.8.2.2 nathanw *
369 1.8.2.2 nathanw * XXX This is arguably a bug in RedBoot, and doing this reset
370 1.8.2.2 nathanw * XXX could be problematic in the future if we encounter an
371 1.8.2.2 nathanw * XXX application where the PPB in the i80312 is used as a
372 1.8.2.2 nathanw * XXX PPB.
373 1.8.2.2 nathanw */
374 1.8.2.2 nathanw {
375 1.8.2.2 nathanw uint32_t reg;
376 1.8.2.2 nathanw
377 1.8.2.2 nathanw printf("Resetting secondary PCI bus...\n");
378 1.8.2.2 nathanw reg = bus_space_read_4(&obio_bs_tag,
379 1.8.2.2 nathanw I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL);
380 1.8.2.2 nathanw bus_space_write_4(&obio_bs_tag,
381 1.8.2.2 nathanw I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL,
382 1.8.2.2 nathanw reg | PPB_BC_SECONDARY_RESET);
383 1.8.2.2 nathanw delay(10 * 1000); /* 10ms enough? */
384 1.8.2.2 nathanw bus_space_write_4(&obio_bs_tag,
385 1.8.2.2 nathanw I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL,
386 1.8.2.2 nathanw reg);
387 1.8.2.2 nathanw }
388 1.8.2.2 nathanw
389 1.8.2.2 nathanw /*
390 1.8.2.5 nathanw * We are currently running with the MMU enabled and the
391 1.8.2.5 nathanw * entire address space mapped VA==PA, except for the
392 1.8.2.5 nathanw * first 64M of RAM is also double-mapped at 0xc0000000.
393 1.8.2.5 nathanw * There is an L1 page table at 0xa0004000.
394 1.8.2.2 nathanw */
395 1.8.2.2 nathanw
396 1.8.2.2 nathanw /*
397 1.8.2.2 nathanw * Fetch the SDRAM start/size from the i80312 SDRAM configration
398 1.8.2.2 nathanw * registers.
399 1.8.2.2 nathanw */
400 1.8.2.2 nathanw i80312_sdram_bounds(&obio_bs_tag, I80312_PMMR_BASE + I80312_MEM_BASE,
401 1.8.2.2 nathanw &memstart, &memsize);
402 1.8.2.2 nathanw
403 1.8.2.2 nathanw printf("initarm: Configuring system ...\n");
404 1.8.2.2 nathanw
405 1.8.2.2 nathanw /* Fake bootconfig structure for the benefit of pmap.c */
406 1.8.2.2 nathanw /* XXX must make the memory description h/w independant */
407 1.8.2.2 nathanw bootconfig.dramblocks = 1;
408 1.8.2.2 nathanw bootconfig.dram[0].address = memstart;
409 1.8.2.2 nathanw bootconfig.dram[0].pages = memsize / NBPG;
410 1.8.2.2 nathanw
411 1.8.2.2 nathanw /*
412 1.8.2.2 nathanw * Set up the variables that define the availablilty of
413 1.8.2.2 nathanw * physical memory. For now, we're going to set
414 1.8.2.2 nathanw * physical_freestart to 0xa0200000 (where the kernel
415 1.8.2.2 nathanw * was loaded), and allocate the memory we need downwards.
416 1.8.2.5 nathanw * If we get too close to the L1 table that we set up, we
417 1.8.2.5 nathanw * will panic. We will update physical_freestart and
418 1.8.2.5 nathanw * physical_freeend later to reflect what pmap_bootstrap()
419 1.8.2.2 nathanw * wants to see.
420 1.8.2.2 nathanw *
421 1.8.2.2 nathanw * XXX pmap_bootstrap() needs an enema.
422 1.8.2.2 nathanw */
423 1.8.2.2 nathanw physical_start = bootconfig.dram[0].address;
424 1.8.2.2 nathanw physical_end = physical_start + (bootconfig.dram[0].pages * NBPG);
425 1.8.2.2 nathanw
426 1.8.2.2 nathanw physical_freestart = 0xa0009000UL;
427 1.8.2.2 nathanw physical_freeend = 0xa0200000UL;
428 1.8.2.2 nathanw
429 1.8.2.2 nathanw physmem = (physical_end - physical_start) / NBPG;
430 1.8.2.2 nathanw
431 1.8.2.2 nathanw /* Tell the user about the memory */
432 1.8.2.2 nathanw printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem,
433 1.8.2.2 nathanw physical_start, physical_end - 1);
434 1.8.2.2 nathanw
435 1.8.2.2 nathanw /*
436 1.8.2.2 nathanw * Okay, the kernel starts 2MB in from the bottom of physical
437 1.8.2.2 nathanw * memory. We are going to allocate our bootstrap pages downwards
438 1.8.2.2 nathanw * from there.
439 1.8.2.2 nathanw *
440 1.8.2.2 nathanw * We need to allocate some fixed page tables to get the kernel
441 1.8.2.2 nathanw * going. We allocate one page directory and a number of page
442 1.8.2.2 nathanw * tables and store the physical addresses in the kernel_pt_table
443 1.8.2.2 nathanw * array.
444 1.8.2.2 nathanw *
445 1.8.2.2 nathanw * The kernel page directory must be on a 16K boundary. The page
446 1.8.2.2 nathanw * tables must be on 4K bounaries. What we do is allocate the
447 1.8.2.2 nathanw * page directory on the first 16K boundary that we encounter, and
448 1.8.2.2 nathanw * the page tables on 4K boundaries otherwise. Since we allocate
449 1.8.2.2 nathanw * at least 3 L2 page tables, we are guaranteed to encounter at
450 1.8.2.2 nathanw * least one 16K aligned region.
451 1.8.2.2 nathanw */
452 1.8.2.2 nathanw
453 1.8.2.2 nathanw #ifdef VERBOSE_INIT_ARM
454 1.8.2.2 nathanw printf("Allocating page tables\n");
455 1.8.2.2 nathanw #endif
456 1.8.2.2 nathanw
457 1.8.2.2 nathanw free_pages = (physical_freeend - physical_freestart) / NBPG;
458 1.8.2.2 nathanw
459 1.8.2.2 nathanw #ifdef VERBOSE_INIT_ARM
460 1.8.2.2 nathanw printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n",
461 1.8.2.2 nathanw physical_freestart, free_pages, free_pages);
462 1.8.2.2 nathanw #endif
463 1.8.2.2 nathanw
464 1.8.2.2 nathanw /* Define a macro to simplify memory allocation */
465 1.8.2.2 nathanw #define valloc_pages(var, np) \
466 1.8.2.2 nathanw alloc_pages((var).pv_pa, (np)); \
467 1.8.2.2 nathanw (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start;
468 1.8.2.2 nathanw
469 1.8.2.2 nathanw #define alloc_pages(var, np) \
470 1.8.2.2 nathanw physical_freeend -= ((np) * NBPG); \
471 1.8.2.2 nathanw if (physical_freeend < physical_freestart) \
472 1.8.2.2 nathanw panic("initarm: out of memory"); \
473 1.8.2.2 nathanw (var) = physical_freeend; \
474 1.8.2.2 nathanw free_pages -= (np); \
475 1.8.2.2 nathanw memset((char *)(var), 0, ((np) * NBPG));
476 1.8.2.2 nathanw
477 1.8.2.2 nathanw loop1 = 0;
478 1.8.2.2 nathanw kernel_l1pt.pv_pa = 0;
479 1.8.2.2 nathanw for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
480 1.8.2.2 nathanw /* Are we 16KB aligned for an L1 ? */
481 1.8.2.6 nathanw if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0
482 1.8.2.2 nathanw && kernel_l1pt.pv_pa == 0) {
483 1.8.2.6 nathanw valloc_pages(kernel_l1pt, L1_TABLE_SIZE / NBPG);
484 1.8.2.2 nathanw } else {
485 1.8.2.4 nathanw alloc_pages(kernel_pt_table[loop1].pv_pa,
486 1.8.2.6 nathanw L2_TABLE_SIZE / NBPG);
487 1.8.2.4 nathanw kernel_pt_table[loop1].pv_va =
488 1.8.2.4 nathanw kernel_pt_table[loop1].pv_pa;
489 1.8.2.2 nathanw ++loop1;
490 1.8.2.2 nathanw }
491 1.8.2.2 nathanw }
492 1.8.2.2 nathanw
493 1.8.2.2 nathanw /* This should never be able to happen but better confirm that. */
494 1.8.2.6 nathanw if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE-1)) != 0)
495 1.8.2.10 nathanw panic("initarm: Failed to align the kernel page directory");
496 1.8.2.2 nathanw
497 1.8.2.2 nathanw /*
498 1.8.2.2 nathanw * Allocate a page for the system page mapped to V0x00000000
499 1.8.2.2 nathanw * This page will just contain the system vectors and can be
500 1.8.2.2 nathanw * shared by all processes.
501 1.8.2.2 nathanw */
502 1.8.2.2 nathanw alloc_pages(systempage.pv_pa, 1);
503 1.8.2.2 nathanw
504 1.8.2.2 nathanw /* Allocate a page for the page table to map kernel page tables. */
505 1.8.2.6 nathanw valloc_pages(kernel_ptpt, L2_TABLE_SIZE / NBPG);
506 1.8.2.2 nathanw
507 1.8.2.2 nathanw /* Allocate stacks for all modes */
508 1.8.2.2 nathanw valloc_pages(irqstack, IRQ_STACK_SIZE);
509 1.8.2.2 nathanw valloc_pages(abtstack, ABT_STACK_SIZE);
510 1.8.2.2 nathanw valloc_pages(undstack, UND_STACK_SIZE);
511 1.8.2.2 nathanw valloc_pages(kernelstack, UPAGES);
512 1.8.2.2 nathanw
513 1.8.2.2 nathanw /* Allocate enough pages for cleaning the Mini-Data cache. */
514 1.8.2.2 nathanw KASSERT(xscale_minidata_clean_size <= NBPG);
515 1.8.2.2 nathanw valloc_pages(minidataclean, 1);
516 1.8.2.2 nathanw
517 1.8.2.2 nathanw #ifdef VERBOSE_INIT_ARM
518 1.8.2.2 nathanw printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa,
519 1.8.2.2 nathanw irqstack.pv_va);
520 1.8.2.2 nathanw printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa,
521 1.8.2.2 nathanw abtstack.pv_va);
522 1.8.2.2 nathanw printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa,
523 1.8.2.2 nathanw undstack.pv_va);
524 1.8.2.2 nathanw printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa,
525 1.8.2.2 nathanw kernelstack.pv_va);
526 1.8.2.2 nathanw #endif
527 1.8.2.2 nathanw
528 1.8.2.2 nathanw /*
529 1.8.2.2 nathanw * XXX Defer this to later so that we can reclaim the memory
530 1.8.2.2 nathanw * XXX used by the RedBoot page tables.
531 1.8.2.2 nathanw */
532 1.8.2.2 nathanw alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / NBPG);
533 1.8.2.2 nathanw
534 1.8.2.2 nathanw /*
535 1.8.2.2 nathanw * Ok we have allocated physical pages for the primary kernel
536 1.8.2.2 nathanw * page tables
537 1.8.2.2 nathanw */
538 1.8.2.2 nathanw
539 1.8.2.2 nathanw #ifdef VERBOSE_INIT_ARM
540 1.8.2.2 nathanw printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa);
541 1.8.2.2 nathanw #endif
542 1.8.2.2 nathanw
543 1.8.2.2 nathanw /*
544 1.8.2.4 nathanw * Now we start construction of the L1 page table
545 1.8.2.2 nathanw * We start by mapping the L2 page tables into the L1.
546 1.8.2.2 nathanw * This means that we can replace L1 mappings later on if necessary
547 1.8.2.2 nathanw */
548 1.8.2.2 nathanw l1pagetable = kernel_l1pt.pv_pa;
549 1.8.2.2 nathanw
550 1.8.2.2 nathanw /* Map the L2 pages tables in the L1 page table */
551 1.8.2.4 nathanw pmap_link_l2pt(l1pagetable, 0x00000000,
552 1.8.2.4 nathanw &kernel_pt_table[KERNEL_PT_SYS]);
553 1.8.2.4 nathanw for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++)
554 1.8.2.4 nathanw pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000,
555 1.8.2.4 nathanw &kernel_pt_table[KERNEL_PT_KERNEL + loop]);
556 1.8.2.4 nathanw pmap_link_l2pt(l1pagetable, IQ80310_IOPXS_VBASE,
557 1.8.2.4 nathanw &kernel_pt_table[KERNEL_PT_IOPXS]);
558 1.8.2.4 nathanw for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
559 1.8.2.4 nathanw pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
560 1.8.2.4 nathanw &kernel_pt_table[KERNEL_PT_VMDATA + loop]);
561 1.8.2.5 nathanw pmap_link_l2pt(l1pagetable, PTE_BASE, &kernel_ptpt);
562 1.8.2.5 nathanw
563 1.8.2.5 nathanw /* update the top of the kernel VM */
564 1.8.2.5 nathanw pmap_curmaxkvaddr =
565 1.8.2.5 nathanw KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000);
566 1.8.2.2 nathanw
567 1.8.2.2 nathanw #ifdef VERBOSE_INIT_ARM
568 1.8.2.2 nathanw printf("Mapping kernel\n");
569 1.8.2.2 nathanw #endif
570 1.8.2.2 nathanw
571 1.8.2.2 nathanw /* Now we fill in the L2 pagetable for the kernel static code/data */
572 1.8.2.2 nathanw {
573 1.8.2.2 nathanw extern char etext[], _end[];
574 1.8.2.2 nathanw size_t textsize = (uintptr_t) etext - KERNEL_TEXT_BASE;
575 1.8.2.2 nathanw size_t totalsize = (uintptr_t) _end - KERNEL_TEXT_BASE;
576 1.8.2.2 nathanw u_int logical;
577 1.8.2.2 nathanw
578 1.8.2.4 nathanw textsize = (textsize + PGOFSET) & ~PGOFSET;
579 1.8.2.2 nathanw totalsize = (totalsize + PGOFSET) & ~PGOFSET;
580 1.8.2.2 nathanw
581 1.8.2.2 nathanw logical = 0x00200000; /* offset of kernel in RAM */
582 1.8.2.2 nathanw
583 1.8.2.4 nathanw logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
584 1.8.2.2 nathanw physical_start + logical, textsize,
585 1.8.2.4 nathanw VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
586 1.8.2.4 nathanw logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
587 1.8.2.2 nathanw physical_start + logical, totalsize - textsize,
588 1.8.2.4 nathanw VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
589 1.8.2.2 nathanw }
590 1.8.2.2 nathanw
591 1.8.2.2 nathanw #ifdef VERBOSE_INIT_ARM
592 1.8.2.2 nathanw printf("Constructing L2 page tables\n");
593 1.8.2.2 nathanw #endif
594 1.8.2.2 nathanw
595 1.8.2.2 nathanw /* Map the stack pages */
596 1.8.2.4 nathanw pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
597 1.8.2.4 nathanw IRQ_STACK_SIZE * NBPG, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
598 1.8.2.4 nathanw pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
599 1.8.2.4 nathanw ABT_STACK_SIZE * NBPG, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
600 1.8.2.4 nathanw pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
601 1.8.2.4 nathanw UND_STACK_SIZE * NBPG, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
602 1.8.2.4 nathanw pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
603 1.8.2.4 nathanw UPAGES * NBPG, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
604 1.8.2.4 nathanw
605 1.8.2.4 nathanw pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
606 1.8.2.9 thorpej L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
607 1.8.2.2 nathanw
608 1.8.2.2 nathanw /* Map the Mini-Data cache clean area. */
609 1.8.2.6 nathanw xscale_setup_minidata(l1pagetable, minidataclean.pv_va,
610 1.8.2.6 nathanw minidataclean.pv_pa);
611 1.8.2.2 nathanw
612 1.8.2.2 nathanw /* Map the page table that maps the kernel pages */
613 1.8.2.4 nathanw pmap_map_entry(l1pagetable, kernel_ptpt.pv_va, kernel_ptpt.pv_pa,
614 1.8.2.4 nathanw VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
615 1.8.2.2 nathanw
616 1.8.2.2 nathanw /*
617 1.8.2.2 nathanw * Map entries in the page table used to map PTE's
618 1.8.2.2 nathanw * Basically every kernel page table gets mapped here
619 1.8.2.2 nathanw */
620 1.8.2.2 nathanw /* The -2 is slightly bogus, it should be -log2(sizeof(pt_entry_t)) */
621 1.8.2.4 nathanw for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++) {
622 1.8.2.4 nathanw pmap_map_entry(l1pagetable,
623 1.8.2.5 nathanw PTE_BASE + ((KERNEL_BASE +
624 1.8.2.2 nathanw (loop * 0x00400000)) >> (PGSHIFT-2)),
625 1.8.2.4 nathanw kernel_pt_table[KERNEL_PT_KERNEL + loop].pv_pa,
626 1.8.2.9 thorpej VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
627 1.8.2.4 nathanw }
628 1.8.2.4 nathanw pmap_map_entry(l1pagetable,
629 1.8.2.5 nathanw PTE_BASE + (PTE_BASE >> (PGSHIFT-2)),
630 1.8.2.4 nathanw kernel_ptpt.pv_pa, VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
631 1.8.2.4 nathanw pmap_map_entry(l1pagetable,
632 1.8.2.5 nathanw PTE_BASE + (0x00000000 >> (PGSHIFT-2)),
633 1.8.2.4 nathanw kernel_pt_table[KERNEL_PT_SYS].pv_pa,
634 1.8.2.9 thorpej VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
635 1.8.2.4 nathanw for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
636 1.8.2.4 nathanw pmap_map_entry(l1pagetable,
637 1.8.2.5 nathanw PTE_BASE + ((KERNEL_VM_BASE +
638 1.8.2.4 nathanw (loop * 0x00400000)) >> (PGSHIFT-2)),
639 1.8.2.4 nathanw kernel_pt_table[KERNEL_PT_VMDATA + loop].pv_pa,
640 1.8.2.9 thorpej VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
641 1.8.2.2 nathanw
642 1.8.2.6 nathanw /* Map the vector page. */
643 1.8.2.6 nathanw pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa,
644 1.8.2.4 nathanw VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
645 1.8.2.2 nathanw
646 1.8.2.2 nathanw /*
647 1.8.2.2 nathanw * Map devices we can map w/ section mappings.
648 1.8.2.2 nathanw */
649 1.8.2.2 nathanw loop = 0;
650 1.8.2.2 nathanw while (l1_sec_table[loop].size) {
651 1.8.2.2 nathanw vm_size_t sz;
652 1.8.2.2 nathanw
653 1.8.2.2 nathanw #ifdef VERBOSE_INIT_ARM
654 1.8.2.2 nathanw printf("%08lx -> %08lx @ %08lx\n", l1_sec_table[loop].pa,
655 1.8.2.2 nathanw l1_sec_table[loop].pa + l1_sec_table[loop].size - 1,
656 1.8.2.2 nathanw l1_sec_table[loop].va);
657 1.8.2.2 nathanw #endif
658 1.8.2.6 nathanw for (sz = 0; sz < l1_sec_table[loop].size; sz += L1_S_SIZE)
659 1.8.2.4 nathanw pmap_map_section(l1pagetable,
660 1.8.2.4 nathanw l1_sec_table[loop].va + sz,
661 1.8.2.2 nathanw l1_sec_table[loop].pa + sz,
662 1.8.2.4 nathanw l1_sec_table[loop].prot,
663 1.8.2.4 nathanw l1_sec_table[loop].cache);
664 1.8.2.2 nathanw ++loop;
665 1.8.2.2 nathanw }
666 1.8.2.2 nathanw
667 1.8.2.2 nathanw /*
668 1.8.2.2 nathanw * Map the PCI I/O spaces and i80312 registers. These are too
669 1.8.2.2 nathanw * small to be mapped w/ section mappings.
670 1.8.2.2 nathanw */
671 1.8.2.2 nathanw #ifdef VERBOSE_INIT_ARM
672 1.8.2.2 nathanw printf("Mapping PIOW 0x%08lx -> 0x%08lx @ 0x%08lx\n",
673 1.8.2.2 nathanw I80312_PCI_XLATE_PIOW_BASE,
674 1.8.2.2 nathanw I80312_PCI_XLATE_PIOW_BASE + I80312_PCI_XLATE_IOSIZE - 1,
675 1.8.2.2 nathanw IQ80310_PIOW_VBASE);
676 1.8.2.2 nathanw #endif
677 1.8.2.4 nathanw pmap_map_chunk(l1pagetable, IQ80310_PIOW_VBASE,
678 1.8.2.4 nathanw I80312_PCI_XLATE_PIOW_BASE, I80312_PCI_XLATE_IOSIZE,
679 1.8.2.4 nathanw VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
680 1.8.2.2 nathanw
681 1.8.2.2 nathanw #ifdef VERBOSE_INIT_ARM
682 1.8.2.2 nathanw printf("Mapping SIOW 0x%08lx -> 0x%08lx @ 0x%08lx\n",
683 1.8.2.2 nathanw I80312_PCI_XLATE_SIOW_BASE,
684 1.8.2.2 nathanw I80312_PCI_XLATE_SIOW_BASE + I80312_PCI_XLATE_IOSIZE - 1,
685 1.8.2.2 nathanw IQ80310_SIOW_VBASE);
686 1.8.2.2 nathanw #endif
687 1.8.2.4 nathanw pmap_map_chunk(l1pagetable, IQ80310_SIOW_VBASE,
688 1.8.2.4 nathanw I80312_PCI_XLATE_SIOW_BASE, I80312_PCI_XLATE_IOSIZE,
689 1.8.2.4 nathanw VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
690 1.8.2.2 nathanw
691 1.8.2.2 nathanw #ifdef VERBOSE_INIT_ARM
692 1.8.2.2 nathanw printf("Mapping 80312 0x%08lx -> 0x%08lx @ 0x%08lx\n",
693 1.8.2.2 nathanw I80312_PMMR_BASE,
694 1.8.2.2 nathanw I80312_PMMR_BASE + I80312_PMMR_SIZE - 1,
695 1.8.2.2 nathanw IQ80310_80312_VBASE);
696 1.8.2.2 nathanw #endif
697 1.8.2.4 nathanw pmap_map_chunk(l1pagetable, IQ80310_80312_VBASE,
698 1.8.2.4 nathanw I80312_PMMR_BASE, I80312_PMMR_SIZE,
699 1.8.2.4 nathanw VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
700 1.8.2.2 nathanw
701 1.8.2.2 nathanw /*
702 1.8.2.2 nathanw * Give the XScale global cache clean code an appropriately
703 1.8.2.2 nathanw * sized chunk of unmapped VA space starting at 0xff000000
704 1.8.2.2 nathanw * (our device mappings end before this address).
705 1.8.2.2 nathanw */
706 1.8.2.2 nathanw xscale_cache_clean_addr = 0xff000000U;
707 1.8.2.2 nathanw
708 1.8.2.2 nathanw /*
709 1.8.2.2 nathanw * Now we have the real page tables in place so we can switch to them.
710 1.8.2.2 nathanw * Once this is done we will be running with the REAL kernel page
711 1.8.2.2 nathanw * tables.
712 1.8.2.2 nathanw */
713 1.8.2.2 nathanw
714 1.8.2.2 nathanw /*
715 1.8.2.2 nathanw * Update the physical_freestart/physical_freeend/free_pages
716 1.8.2.2 nathanw * variables.
717 1.8.2.2 nathanw */
718 1.8.2.2 nathanw {
719 1.8.2.2 nathanw extern char _end[];
720 1.8.2.2 nathanw
721 1.8.2.5 nathanw physical_freestart = physical_start +
722 1.8.2.5 nathanw (((((uintptr_t) _end) + PGOFSET) & ~PGOFSET) -
723 1.8.2.5 nathanw KERNEL_BASE);
724 1.8.2.2 nathanw physical_freeend = physical_end;
725 1.8.2.2 nathanw free_pages = (physical_freeend - physical_freestart) / NBPG;
726 1.8.2.2 nathanw }
727 1.8.2.2 nathanw
728 1.8.2.2 nathanw /* Switch tables */
729 1.8.2.2 nathanw #ifdef VERBOSE_INIT_ARM
730 1.8.2.2 nathanw printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
731 1.8.2.2 nathanw physical_freestart, free_pages, free_pages);
732 1.8.2.2 nathanw printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa);
733 1.8.2.2 nathanw #endif
734 1.8.2.2 nathanw setttb(kernel_l1pt.pv_pa);
735 1.8.2.4 nathanw cpu_tlb_flushID();
736 1.8.2.2 nathanw
737 1.8.2.2 nathanw #ifdef VERBOSE_INIT_ARM
738 1.8.2.2 nathanw printf("done!\n");
739 1.8.2.2 nathanw #endif
740 1.8.2.2 nathanw
741 1.8.2.2 nathanw #ifdef VERBOSE_INIT_ARM
742 1.8.2.2 nathanw printf("bootstrap done.\n");
743 1.8.2.2 nathanw #endif
744 1.8.2.2 nathanw
745 1.8.2.6 nathanw arm32_vector_init(ARM_VECTORS_LOW, ARM_VEC_ALL);
746 1.8.2.2 nathanw
747 1.8.2.2 nathanw /*
748 1.8.2.2 nathanw * Pages were allocated during the secondary bootstrap for the
749 1.8.2.2 nathanw * stacks for different CPU modes.
750 1.8.2.2 nathanw * We must now set the r13 registers in the different CPU modes to
751 1.8.2.2 nathanw * point to these stacks.
752 1.8.2.2 nathanw * Since the ARM stacks use STMFD etc. we must set r13 to the top end
753 1.8.2.2 nathanw * of the stack memory.
754 1.8.2.2 nathanw */
755 1.8.2.2 nathanw printf("init subsystems: stacks ");
756 1.8.2.2 nathanw
757 1.8.2.2 nathanw set_stackptr(PSR_IRQ32_MODE, irqstack.pv_va + IRQ_STACK_SIZE * NBPG);
758 1.8.2.2 nathanw set_stackptr(PSR_ABT32_MODE, abtstack.pv_va + ABT_STACK_SIZE * NBPG);
759 1.8.2.2 nathanw set_stackptr(PSR_UND32_MODE, undstack.pv_va + UND_STACK_SIZE * NBPG);
760 1.8.2.2 nathanw
761 1.8.2.2 nathanw /*
762 1.8.2.2 nathanw * Well we should set a data abort handler.
763 1.8.2.2 nathanw * Once things get going this will change as we will need a proper
764 1.8.2.2 nathanw * handler.
765 1.8.2.2 nathanw * Until then we will use a handler that just panics but tells us
766 1.8.2.2 nathanw * why.
767 1.8.2.2 nathanw * Initialisation of the vectors will just panic on a data abort.
768 1.8.2.2 nathanw * This just fills in a slighly better one.
769 1.8.2.2 nathanw */
770 1.8.2.2 nathanw printf("vectors ");
771 1.8.2.2 nathanw data_abort_handler_address = (u_int)data_abort_handler;
772 1.8.2.2 nathanw prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
773 1.8.2.2 nathanw undefined_handler_address = (u_int)undefinedinstruction_bounce;
774 1.8.2.2 nathanw
775 1.8.2.2 nathanw /* Initialise the undefined instruction handlers */
776 1.8.2.2 nathanw printf("undefined ");
777 1.8.2.2 nathanw undefined_init();
778 1.8.2.2 nathanw
779 1.8.2.8 nathanw /* Load memory into UVM. */
780 1.8.2.8 nathanw printf("page ");
781 1.8.2.8 nathanw uvm_setpagesize(); /* initialize PAGE_SIZE-dependent variables */
782 1.8.2.8 nathanw uvm_page_physload(atop(physical_freestart), atop(physical_freeend),
783 1.8.2.8 nathanw atop(physical_freestart), atop(physical_freeend),
784 1.8.2.8 nathanw VM_FREELIST_DEFAULT);
785 1.8.2.8 nathanw
786 1.8.2.2 nathanw /* Boot strap pmap telling it where the kernel page table is */
787 1.8.2.2 nathanw printf("pmap ");
788 1.8.2.2 nathanw pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, kernel_ptpt);
789 1.8.2.2 nathanw
790 1.8.2.2 nathanw /* Setup the IRQ system */
791 1.8.2.2 nathanw printf("irq ");
792 1.8.2.4 nathanw iq80310_intr_init();
793 1.8.2.2 nathanw printf("done.\n");
794 1.8.2.2 nathanw
795 1.8.2.2 nathanw #ifdef IPKDB
796 1.8.2.2 nathanw /* Initialise ipkdb */
797 1.8.2.2 nathanw ipkdb_init();
798 1.8.2.2 nathanw if (boothowto & RB_KDB)
799 1.8.2.2 nathanw ipkdb_connect(0);
800 1.8.2.2 nathanw #endif
801 1.8.2.2 nathanw
802 1.8.2.2 nathanw #ifdef DDB
803 1.8.2.2 nathanw db_machine_init();
804 1.8.2.2 nathanw
805 1.8.2.2 nathanw /* Firmware doesn't load symbols. */
806 1.8.2.2 nathanw ddb_init(0, NULL, NULL);
807 1.8.2.2 nathanw
808 1.8.2.2 nathanw if (boothowto & RB_KDB)
809 1.8.2.2 nathanw Debugger();
810 1.8.2.2 nathanw #endif
811 1.8.2.2 nathanw
812 1.8.2.2 nathanw /* We return the new stack pointer address */
813 1.8.2.2 nathanw return(kernelstack.pv_va + USPACE_SVC_STACK_TOP);
814 1.8.2.2 nathanw }
815 1.8.2.2 nathanw
816 1.8.2.2 nathanw void
817 1.8.2.2 nathanw consinit(void)
818 1.8.2.2 nathanw {
819 1.8.2.4 nathanw static const bus_addr_t comcnaddrs[] = {
820 1.8.2.4 nathanw IQ80310_UART2, /* com0 (J9) */
821 1.8.2.4 nathanw IQ80310_UART1, /* com1 (J10) */
822 1.8.2.4 nathanw };
823 1.8.2.2 nathanw static int consinit_called;
824 1.8.2.2 nathanw
825 1.8.2.2 nathanw if (consinit_called != 0)
826 1.8.2.2 nathanw return;
827 1.8.2.2 nathanw
828 1.8.2.2 nathanw consinit_called = 1;
829 1.8.2.2 nathanw
830 1.8.2.2 nathanw #if NCOM > 0
831 1.8.2.4 nathanw if (comcnattach(&obio_bs_tag, comcnaddrs[comcnunit], comcnspeed,
832 1.8.2.2 nathanw COM_FREQ, comcnmode))
833 1.8.2.4 nathanw panic("can't init serial console @%lx", comcnaddrs[comcnunit]);
834 1.8.2.2 nathanw #else
835 1.8.2.4 nathanw panic("serial console @%lx not configured", comcnaddrs[comcnunit]);
836 1.8.2.2 nathanw #endif
837 1.8.2.2 nathanw }
838