iq80310_machdep.c revision 1.8.2.2 1 1.8.2.2 nathanw /* $NetBSD: iq80310_machdep.c,v 1.8.2.2 2002/01/08 00:24:28 nathanw Exp $ */
2 1.8.2.2 nathanw
3 1.8.2.2 nathanw /*
4 1.8.2.2 nathanw * Copyright (c) 2001 Wasabi Systems, Inc.
5 1.8.2.2 nathanw * All rights reserved.
6 1.8.2.2 nathanw *
7 1.8.2.2 nathanw * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8 1.8.2.2 nathanw *
9 1.8.2.2 nathanw * Redistribution and use in source and binary forms, with or without
10 1.8.2.2 nathanw * modification, are permitted provided that the following conditions
11 1.8.2.2 nathanw * are met:
12 1.8.2.2 nathanw * 1. Redistributions of source code must retain the above copyright
13 1.8.2.2 nathanw * notice, this list of conditions and the following disclaimer.
14 1.8.2.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright
15 1.8.2.2 nathanw * notice, this list of conditions and the following disclaimer in the
16 1.8.2.2 nathanw * documentation and/or other materials provided with the distribution.
17 1.8.2.2 nathanw * 3. All advertising materials mentioning features or use of this software
18 1.8.2.2 nathanw * must display the following acknowledgement:
19 1.8.2.2 nathanw * This product includes software developed for the NetBSD Project by
20 1.8.2.2 nathanw * Wasabi Systems, Inc.
21 1.8.2.2 nathanw * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 1.8.2.2 nathanw * or promote products derived from this software without specific prior
23 1.8.2.2 nathanw * written permission.
24 1.8.2.2 nathanw *
25 1.8.2.2 nathanw * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 1.8.2.2 nathanw * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 1.8.2.2 nathanw * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 1.8.2.2 nathanw * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 1.8.2.2 nathanw * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 1.8.2.2 nathanw * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 1.8.2.2 nathanw * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 1.8.2.2 nathanw * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 1.8.2.2 nathanw * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 1.8.2.2 nathanw * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 1.8.2.2 nathanw * POSSIBILITY OF SUCH DAMAGE.
36 1.8.2.2 nathanw */
37 1.8.2.2 nathanw
38 1.8.2.2 nathanw /*
39 1.8.2.2 nathanw * Copyright (c) 1997,1998 Mark Brinicombe.
40 1.8.2.2 nathanw * Copyright (c) 1997,1998 Causality Limited.
41 1.8.2.2 nathanw * All rights reserved.
42 1.8.2.2 nathanw *
43 1.8.2.2 nathanw * Redistribution and use in source and binary forms, with or without
44 1.8.2.2 nathanw * modification, are permitted provided that the following conditions
45 1.8.2.2 nathanw * are met:
46 1.8.2.2 nathanw * 1. Redistributions of source code must retain the above copyright
47 1.8.2.2 nathanw * notice, this list of conditions and the following disclaimer.
48 1.8.2.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright
49 1.8.2.2 nathanw * notice, this list of conditions and the following disclaimer in the
50 1.8.2.2 nathanw * documentation and/or other materials provided with the distribution.
51 1.8.2.2 nathanw * 3. All advertising materials mentioning features or use of this software
52 1.8.2.2 nathanw * must display the following acknowledgement:
53 1.8.2.2 nathanw * This product includes software developed by Mark Brinicombe
54 1.8.2.2 nathanw * for the NetBSD Project.
55 1.8.2.2 nathanw * 4. The name of the company nor the name of the author may be used to
56 1.8.2.2 nathanw * endorse or promote products derived from this software without specific
57 1.8.2.2 nathanw * prior written permission.
58 1.8.2.2 nathanw *
59 1.8.2.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
60 1.8.2.2 nathanw * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
61 1.8.2.2 nathanw * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
62 1.8.2.2 nathanw * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
63 1.8.2.2 nathanw * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
64 1.8.2.2 nathanw * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
65 1.8.2.2 nathanw * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
66 1.8.2.2 nathanw * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
67 1.8.2.2 nathanw * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
68 1.8.2.2 nathanw * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
69 1.8.2.2 nathanw * SUCH DAMAGE.
70 1.8.2.2 nathanw *
71 1.8.2.2 nathanw * Machine dependant functions for kernel setup for Intel IQ80310 evaluation
72 1.8.2.2 nathanw * boards using RedBoot firmware.
73 1.8.2.2 nathanw */
74 1.8.2.2 nathanw
75 1.8.2.2 nathanw #include "opt_ddb.h"
76 1.8.2.2 nathanw #include "opt_pmap_debug.h"
77 1.8.2.2 nathanw
78 1.8.2.2 nathanw #include <sys/param.h>
79 1.8.2.2 nathanw #include <sys/device.h>
80 1.8.2.2 nathanw #include <sys/systm.h>
81 1.8.2.2 nathanw #include <sys/kernel.h>
82 1.8.2.2 nathanw #include <sys/exec.h>
83 1.8.2.2 nathanw #include <sys/proc.h>
84 1.8.2.2 nathanw #include <sys/msgbuf.h>
85 1.8.2.2 nathanw #include <sys/reboot.h>
86 1.8.2.2 nathanw #include <sys/termios.h>
87 1.8.2.2 nathanw
88 1.8.2.2 nathanw #include <dev/cons.h>
89 1.8.2.2 nathanw
90 1.8.2.2 nathanw #include <machine/db_machdep.h>
91 1.8.2.2 nathanw #include <ddb/db_sym.h>
92 1.8.2.2 nathanw #include <ddb/db_extern.h>
93 1.8.2.2 nathanw
94 1.8.2.2 nathanw #include <machine/bootconfig.h>
95 1.8.2.2 nathanw #include <machine/bus.h>
96 1.8.2.2 nathanw #include <machine/cpu.h>
97 1.8.2.2 nathanw #include <machine/frame.h>
98 1.8.2.2 nathanw #include <arm/undefined.h>
99 1.8.2.2 nathanw
100 1.8.2.2 nathanw #include <arm/xscale/i80312reg.h>
101 1.8.2.2 nathanw #include <arm/xscale/i80312var.h>
102 1.8.2.2 nathanw
103 1.8.2.2 nathanw #include <dev/pci/ppbreg.h>
104 1.8.2.2 nathanw
105 1.8.2.2 nathanw #include <evbarm/iq80310/iq80310reg.h>
106 1.8.2.2 nathanw #include <evbarm/iq80310/iq80310var.h>
107 1.8.2.2 nathanw #include <evbarm/iq80310/obiovar.h>
108 1.8.2.2 nathanw
109 1.8.2.2 nathanw #include "opt_ipkdb.h"
110 1.8.2.2 nathanw
111 1.8.2.2 nathanw /*
112 1.8.2.2 nathanw * Address to call from cpu_reset() to reset the machine.
113 1.8.2.2 nathanw * This is machine architecture dependant as it varies depending
114 1.8.2.2 nathanw * on where the ROM appears when you turn the MMU off.
115 1.8.2.2 nathanw */
116 1.8.2.2 nathanw
117 1.8.2.2 nathanw u_int cpu_reset_address = 0;
118 1.8.2.2 nathanw
119 1.8.2.2 nathanw /* Define various stack sizes in pages */
120 1.8.2.2 nathanw #define IRQ_STACK_SIZE 1
121 1.8.2.2 nathanw #define ABT_STACK_SIZE 1
122 1.8.2.2 nathanw #ifdef IPKDB
123 1.8.2.2 nathanw #define UND_STACK_SIZE 2
124 1.8.2.2 nathanw #else
125 1.8.2.2 nathanw #define UND_STACK_SIZE 1
126 1.8.2.2 nathanw #endif
127 1.8.2.2 nathanw
128 1.8.2.2 nathanw BootConfig bootconfig; /* Boot config storage */
129 1.8.2.2 nathanw static char bootargs[MAX_BOOT_STRING + 1];
130 1.8.2.2 nathanw char *boot_args = NULL;
131 1.8.2.2 nathanw char *boot_file = NULL;
132 1.8.2.2 nathanw
133 1.8.2.2 nathanw vm_offset_t physical_start;
134 1.8.2.2 nathanw vm_offset_t physical_freestart;
135 1.8.2.2 nathanw vm_offset_t physical_freeend;
136 1.8.2.2 nathanw vm_offset_t physical_end;
137 1.8.2.2 nathanw u_int free_pages;
138 1.8.2.2 nathanw vm_offset_t pagetables_start;
139 1.8.2.2 nathanw int physmem = 0;
140 1.8.2.2 nathanw
141 1.8.2.2 nathanw /*int debug_flags;*/
142 1.8.2.2 nathanw #ifndef PMAP_STATIC_L1S
143 1.8.2.2 nathanw int max_processes = 64; /* Default number */
144 1.8.2.2 nathanw #endif /* !PMAP_STATIC_L1S */
145 1.8.2.2 nathanw
146 1.8.2.2 nathanw /* Physical and virtual addresses for some global pages */
147 1.8.2.2 nathanw pv_addr_t systempage;
148 1.8.2.2 nathanw pv_addr_t irqstack;
149 1.8.2.2 nathanw pv_addr_t undstack;
150 1.8.2.2 nathanw pv_addr_t abtstack;
151 1.8.2.2 nathanw pv_addr_t kernelstack;
152 1.8.2.2 nathanw pv_addr_t minidataclean;
153 1.8.2.2 nathanw
154 1.8.2.2 nathanw vm_offset_t msgbufphys;
155 1.8.2.2 nathanw
156 1.8.2.2 nathanw extern u_int data_abort_handler_address;
157 1.8.2.2 nathanw extern u_int prefetch_abort_handler_address;
158 1.8.2.2 nathanw extern u_int undefined_handler_address;
159 1.8.2.2 nathanw
160 1.8.2.2 nathanw #ifdef PMAP_DEBUG
161 1.8.2.2 nathanw extern int pmap_debug_level;
162 1.8.2.2 nathanw #endif
163 1.8.2.2 nathanw
164 1.8.2.2 nathanw #define KERNEL_PT_SYS 0 /* Page table for mapping proc0 zero page */
165 1.8.2.2 nathanw #define KERNEL_PT_KERNEL 1 /* Page table for mapping kernel */
166 1.8.2.2 nathanw #define KERNEL_PT_IOPXS 2 /* Page table for mapping i80312 */
167 1.8.2.2 nathanw #define KERNEL_PT_VMDATA 3 /* Page tables for mapping kernel VM */
168 1.8.2.2 nathanw #define KERNEL_PT_VMDATA_NUM (KERNEL_VM_SIZE >> (PDSHIFT + 2))
169 1.8.2.2 nathanw #define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
170 1.8.2.2 nathanw
171 1.8.2.2 nathanw pt_entry_t kernel_pt_table[NUM_KERNEL_PTS];
172 1.8.2.2 nathanw
173 1.8.2.2 nathanw struct user *proc0paddr;
174 1.8.2.2 nathanw
175 1.8.2.2 nathanw /* Prototypes */
176 1.8.2.2 nathanw
177 1.8.2.2 nathanw void consinit(void);
178 1.8.2.2 nathanw
179 1.8.2.2 nathanw void map_section(vm_offset_t pt, vm_offset_t va, vm_offset_t pa,
180 1.8.2.2 nathanw int cacheable);
181 1.8.2.2 nathanw void map_pagetable(vm_offset_t pt, vm_offset_t va, vm_offset_t pa);
182 1.8.2.2 nathanw void map_entry(vm_offset_t pt, vm_offset_t va, vm_offset_t pa);
183 1.8.2.2 nathanw void map_entry_nc(vm_offset_t pt, vm_offset_t va, vm_offset_t pa);
184 1.8.2.2 nathanw void map_entry_ro(vm_offset_t pt, vm_offset_t va, vm_offset_t pa);
185 1.8.2.2 nathanw vm_size_t map_chunk(vm_offset_t pd, vm_offset_t pt, vm_offset_t va,
186 1.8.2.2 nathanw vm_offset_t pa, vm_size_t size, u_int acc, u_int flg);
187 1.8.2.2 nathanw
188 1.8.2.2 nathanw void process_kernel_args(char *);
189 1.8.2.2 nathanw void data_abort_handler(trapframe_t *frame);
190 1.8.2.2 nathanw void prefetch_abort_handler(trapframe_t *frame);
191 1.8.2.2 nathanw void undefinedinstruction_bounce(trapframe_t *frame);
192 1.8.2.2 nathanw
193 1.8.2.2 nathanw extern void parse_mi_bootargs(char *args);
194 1.8.2.2 nathanw extern void dumpsys(void);
195 1.8.2.2 nathanw
196 1.8.2.2 nathanw #include "com.h"
197 1.8.2.2 nathanw #if NCOM > 0
198 1.8.2.2 nathanw #include <dev/ic/comreg.h>
199 1.8.2.2 nathanw #include <dev/ic/comvar.h>
200 1.8.2.2 nathanw #endif
201 1.8.2.2 nathanw
202 1.8.2.2 nathanw #ifndef CONSPEED
203 1.8.2.2 nathanw #define CONSPEED B115200 /* What RedBoot uses */
204 1.8.2.2 nathanw #endif
205 1.8.2.2 nathanw #ifndef CONMODE
206 1.8.2.2 nathanw #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
207 1.8.2.2 nathanw #endif
208 1.8.2.2 nathanw
209 1.8.2.2 nathanw int comcnspeed = CONSPEED;
210 1.8.2.2 nathanw int comcnmode = CONMODE;
211 1.8.2.2 nathanw
212 1.8.2.2 nathanw /*
213 1.8.2.2 nathanw * void cpu_reboot(int howto, char *bootstr)
214 1.8.2.2 nathanw *
215 1.8.2.2 nathanw * Reboots the system
216 1.8.2.2 nathanw *
217 1.8.2.2 nathanw * Deal with any syncing, unmounting, dumping and shutdown hooks,
218 1.8.2.2 nathanw * then reset the CPU.
219 1.8.2.2 nathanw */
220 1.8.2.2 nathanw void
221 1.8.2.2 nathanw cpu_reboot(int howto, char *bootstr)
222 1.8.2.2 nathanw {
223 1.8.2.2 nathanw #ifdef DIAGNOSTIC
224 1.8.2.2 nathanw /* info */
225 1.8.2.2 nathanw printf("boot: howto=%08x curproc=%p\n", howto, curproc);
226 1.8.2.2 nathanw #endif
227 1.8.2.2 nathanw
228 1.8.2.2 nathanw /*
229 1.8.2.2 nathanw * If we are still cold then hit the air brakes
230 1.8.2.2 nathanw * and crash to earth fast
231 1.8.2.2 nathanw */
232 1.8.2.2 nathanw if (cold) {
233 1.8.2.2 nathanw doshutdownhooks();
234 1.8.2.2 nathanw printf("The operating system has halted.\n");
235 1.8.2.2 nathanw printf("Please press any key to reboot.\n\n");
236 1.8.2.2 nathanw cngetc();
237 1.8.2.2 nathanw printf("rebooting...\n");
238 1.8.2.2 nathanw cpu_reset();
239 1.8.2.2 nathanw /*NOTREACHED*/
240 1.8.2.2 nathanw }
241 1.8.2.2 nathanw
242 1.8.2.2 nathanw /* Disable console buffering */
243 1.8.2.2 nathanw /* cnpollc(1);*/
244 1.8.2.2 nathanw
245 1.8.2.2 nathanw /*
246 1.8.2.2 nathanw * If RB_NOSYNC was not specified sync the discs.
247 1.8.2.2 nathanw * Note: Unless cold is set to 1 here, syslogd will die during the
248 1.8.2.2 nathanw * unmount. It looks like syslogd is getting woken up only to find
249 1.8.2.2 nathanw * that it cannot page part of the binary in as the filesystem has
250 1.8.2.2 nathanw * been unmounted.
251 1.8.2.2 nathanw */
252 1.8.2.2 nathanw if (!(howto & RB_NOSYNC))
253 1.8.2.2 nathanw bootsync();
254 1.8.2.2 nathanw
255 1.8.2.2 nathanw /* Say NO to interrupts */
256 1.8.2.2 nathanw splhigh();
257 1.8.2.2 nathanw
258 1.8.2.2 nathanw /* Do a dump if requested. */
259 1.8.2.2 nathanw if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
260 1.8.2.2 nathanw dumpsys();
261 1.8.2.2 nathanw
262 1.8.2.2 nathanw /* Run any shutdown hooks */
263 1.8.2.2 nathanw doshutdownhooks();
264 1.8.2.2 nathanw
265 1.8.2.2 nathanw /* Make sure IRQ's are disabled */
266 1.8.2.2 nathanw IRQdisable;
267 1.8.2.2 nathanw
268 1.8.2.2 nathanw if (howto & RB_HALT) {
269 1.8.2.2 nathanw printf("The operating system has halted.\n");
270 1.8.2.2 nathanw printf("Please press any key to reboot.\n\n");
271 1.8.2.2 nathanw cngetc();
272 1.8.2.2 nathanw }
273 1.8.2.2 nathanw
274 1.8.2.2 nathanw printf("rebooting...\n");
275 1.8.2.2 nathanw cpu_reset();
276 1.8.2.2 nathanw /*NOTREACHED*/
277 1.8.2.2 nathanw }
278 1.8.2.2 nathanw
279 1.8.2.2 nathanw /*
280 1.8.2.2 nathanw * Mapping table for core kernel memory. This memory is mapped at init
281 1.8.2.2 nathanw * time with section mappings.
282 1.8.2.2 nathanw */
283 1.8.2.2 nathanw struct l1_sec_map {
284 1.8.2.2 nathanw vaddr_t va;
285 1.8.2.2 nathanw vaddr_t pa;
286 1.8.2.2 nathanw vsize_t size;
287 1.8.2.2 nathanw int flags;
288 1.8.2.2 nathanw } l1_sec_table[] = {
289 1.8.2.2 nathanw /*
290 1.8.2.2 nathanw * Map the on-board devices VA == PA so that we can access them
291 1.8.2.2 nathanw * with the MMU on or off.
292 1.8.2.2 nathanw */
293 1.8.2.2 nathanw {
294 1.8.2.2 nathanw IQ80310_OBIO_BASE,
295 1.8.2.2 nathanw IQ80310_OBIO_BASE,
296 1.8.2.2 nathanw IQ80310_OBIO_SIZE,
297 1.8.2.2 nathanw 0,
298 1.8.2.2 nathanw },
299 1.8.2.2 nathanw
300 1.8.2.2 nathanw {
301 1.8.2.2 nathanw 0,
302 1.8.2.2 nathanw 0,
303 1.8.2.2 nathanw 0,
304 1.8.2.2 nathanw 0,
305 1.8.2.2 nathanw }
306 1.8.2.2 nathanw };
307 1.8.2.2 nathanw
308 1.8.2.2 nathanw /*
309 1.8.2.2 nathanw * u_int initarm(...)
310 1.8.2.2 nathanw *
311 1.8.2.2 nathanw * Initial entry point on startup. This gets called before main() is
312 1.8.2.2 nathanw * entered.
313 1.8.2.2 nathanw * It should be responsible for setting up everything that must be
314 1.8.2.2 nathanw * in place when main is called.
315 1.8.2.2 nathanw * This includes
316 1.8.2.2 nathanw * Taking a copy of the boot configuration structure.
317 1.8.2.2 nathanw * Initialising the physical console so characters can be printed.
318 1.8.2.2 nathanw * Setting up page tables for the kernel
319 1.8.2.2 nathanw * Relocating the kernel to the bottom of physical memory
320 1.8.2.2 nathanw */
321 1.8.2.2 nathanw u_int
322 1.8.2.2 nathanw initarm(void)
323 1.8.2.2 nathanw {
324 1.8.2.2 nathanw extern vaddr_t xscale_cache_clean_addr, xscale_minidata_clean_addr;
325 1.8.2.2 nathanw extern vsize_t xscale_minidata_clean_size;
326 1.8.2.2 nathanw int loop;
327 1.8.2.2 nathanw int loop1;
328 1.8.2.2 nathanw u_int l1pagetable;
329 1.8.2.2 nathanw u_int l2pagetable;
330 1.8.2.2 nathanw extern char page0[], page0_end[];
331 1.8.2.2 nathanw pv_addr_t kernel_l1pt;
332 1.8.2.2 nathanw pv_addr_t kernel_ptpt;
333 1.8.2.2 nathanw paddr_t memstart;
334 1.8.2.2 nathanw psize_t memsize;
335 1.8.2.2 nathanw
336 1.8.2.2 nathanw /*
337 1.8.2.2 nathanw * Clear out the 7-segment display. Whee, the first visual
338 1.8.2.2 nathanw * indication that we're running kernel code.
339 1.8.2.2 nathanw */
340 1.8.2.2 nathanw iq80310_7seg(' ', ' ');
341 1.8.2.2 nathanw
342 1.8.2.2 nathanw /*
343 1.8.2.2 nathanw * Heads up ... Setup the CPU / MMU / TLB functions
344 1.8.2.2 nathanw */
345 1.8.2.2 nathanw if (set_cpufuncs())
346 1.8.2.2 nathanw panic("cpu not recognized!");
347 1.8.2.2 nathanw
348 1.8.2.2 nathanw /* Calibrate the delay loop. */
349 1.8.2.2 nathanw iq80310_calibrate_delay();
350 1.8.2.2 nathanw
351 1.8.2.2 nathanw /*
352 1.8.2.2 nathanw * Since we map the on-board devices VA==PA, and the kernel
353 1.8.2.2 nathanw * is running VA==PA, it's possible for us to initialize
354 1.8.2.2 nathanw * the console now.
355 1.8.2.2 nathanw */
356 1.8.2.2 nathanw consinit();
357 1.8.2.2 nathanw
358 1.8.2.2 nathanw /* Talk to the user */
359 1.8.2.2 nathanw printf("\nNetBSD/evbarm (IQ80310) booting ...\n");
360 1.8.2.2 nathanw
361 1.8.2.2 nathanw /*
362 1.8.2.2 nathanw * Reset the secondary PCI bus. RedBoot doesn't stop devices
363 1.8.2.2 nathanw * on the PCI bus before handing us control, so we have to
364 1.8.2.2 nathanw * do this.
365 1.8.2.2 nathanw *
366 1.8.2.2 nathanw * XXX This is arguably a bug in RedBoot, and doing this reset
367 1.8.2.2 nathanw * XXX could be problematic in the future if we encounter an
368 1.8.2.2 nathanw * XXX application where the PPB in the i80312 is used as a
369 1.8.2.2 nathanw * XXX PPB.
370 1.8.2.2 nathanw */
371 1.8.2.2 nathanw {
372 1.8.2.2 nathanw uint32_t reg;
373 1.8.2.2 nathanw
374 1.8.2.2 nathanw printf("Resetting secondary PCI bus...\n");
375 1.8.2.2 nathanw reg = bus_space_read_4(&obio_bs_tag,
376 1.8.2.2 nathanw I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL);
377 1.8.2.2 nathanw bus_space_write_4(&obio_bs_tag,
378 1.8.2.2 nathanw I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL,
379 1.8.2.2 nathanw reg | PPB_BC_SECONDARY_RESET);
380 1.8.2.2 nathanw delay(10 * 1000); /* 10ms enough? */
381 1.8.2.2 nathanw bus_space_write_4(&obio_bs_tag,
382 1.8.2.2 nathanw I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL,
383 1.8.2.2 nathanw reg);
384 1.8.2.2 nathanw }
385 1.8.2.2 nathanw
386 1.8.2.2 nathanw /*
387 1.8.2.2 nathanw * Okay, RedBoot has provided us with the following memory map:
388 1.8.2.2 nathanw *
389 1.8.2.2 nathanw * Physical Address Range Description
390 1.8.2.2 nathanw * ----------------------- ----------------------------------
391 1.8.2.2 nathanw * 0x00000000 - 0x00000fff flash Memory
392 1.8.2.2 nathanw * 0x00001000 - 0x00001fff 80312 Internal Registers
393 1.8.2.2 nathanw * 0x00002000 - 0x007fffff flash Memory
394 1.8.2.2 nathanw * 0x00800000 - 0x7fffffff PCI ATU Outbound Direct Window
395 1.8.2.2 nathanw * 0x80000000 - 0x83ffffff Primary PCI 32-bit Memory
396 1.8.2.2 nathanw * 0x84000000 - 0x87ffffff Primary PCI 64-bit Memory
397 1.8.2.2 nathanw * 0x88000000 - 0x8bffffff Secondary PCI 32-bit Memory
398 1.8.2.2 nathanw * 0x8c000000 - 0x8fffffff Secondary PCI 64-bit Memory
399 1.8.2.2 nathanw * 0x90000000 - 0x9000ffff Primary PCI IO Space
400 1.8.2.2 nathanw * 0x90010000 - 0x9001ffff Secondary PCI IO Space
401 1.8.2.2 nathanw * 0x90020000 - 0x9fffffff Unused
402 1.8.2.2 nathanw * 0xa0000000 - 0xbfffffff SDRAM
403 1.8.2.2 nathanw * 0xc0000000 - 0xefffffff Unused
404 1.8.2.2 nathanw * 0xf0000000 - 0xffffffff 80200 Internal Registers
405 1.8.2.2 nathanw *
406 1.8.2.2 nathanw *
407 1.8.2.2 nathanw * Virtual Address Range C B Description
408 1.8.2.2 nathanw * ----------------------- - - ----------------------------------
409 1.8.2.2 nathanw * 0x00000000 - 0x00000fff Y Y SDRAM
410 1.8.2.2 nathanw * 0x00001000 - 0x00001fff N N 80312 Internal Registers
411 1.8.2.2 nathanw * 0x00002000 - 0x007fffff Y N flash Memory
412 1.8.2.2 nathanw * 0x00800000 - 0x7fffffff N N PCI ATU Outbound Direct Window
413 1.8.2.2 nathanw * 0x80000000 - 0x83ffffff N N Primary PCI 32-bit Memory
414 1.8.2.2 nathanw * 0x84000000 - 0x87ffffff N N Primary PCI 64-bit Memory
415 1.8.2.2 nathanw * 0x88000000 - 0x8bffffff N N Secondary PCI 32-bit Memory
416 1.8.2.2 nathanw * 0x8c000000 - 0x8fffffff N N Secondary PCI 64-bit Memory
417 1.8.2.2 nathanw * 0x90000000 - 0x9000ffff N N Primary PCI IO Space
418 1.8.2.2 nathanw * 0x90010000 - 0x9001ffff N N Secondary PCI IO Space
419 1.8.2.2 nathanw * 0xa0000000 - 0xa0000fff Y N flash
420 1.8.2.2 nathanw * 0xa0001000 - 0xbfffffff Y Y SDRAM
421 1.8.2.2 nathanw * 0xc0000000 - 0xcfffffff Y Y Cache Flush Region
422 1.8.2.2 nathanw * 0xf0000000 - 0xffffffff N N 80200 Internal Registers
423 1.8.2.2 nathanw *
424 1.8.2.2 nathanw * The first level page table is at 0xa0004000. There are also
425 1.8.2.2 nathanw * 2 second-level tables at 0xa0008000 and 0xa0008400.
426 1.8.2.2 nathanw *
427 1.8.2.2 nathanw * This corresponds roughly to the physical memory map, i.e.
428 1.8.2.2 nathanw * we are quite nearly running VA==PA.
429 1.8.2.2 nathanw */
430 1.8.2.2 nathanw
431 1.8.2.2 nathanw /*
432 1.8.2.2 nathanw * Examine the boot args string for options we need to know about
433 1.8.2.2 nathanw * now.
434 1.8.2.2 nathanw */
435 1.8.2.2 nathanw #if 0
436 1.8.2.2 nathanw process_kernel_args((char *)nwbootinfo.bt_args);
437 1.8.2.2 nathanw #endif
438 1.8.2.2 nathanw
439 1.8.2.2 nathanw /*
440 1.8.2.2 nathanw * Fetch the SDRAM start/size from the i80312 SDRAM configration
441 1.8.2.2 nathanw * registers.
442 1.8.2.2 nathanw */
443 1.8.2.2 nathanw i80312_sdram_bounds(&obio_bs_tag, I80312_PMMR_BASE + I80312_MEM_BASE,
444 1.8.2.2 nathanw &memstart, &memsize);
445 1.8.2.2 nathanw
446 1.8.2.2 nathanw printf("initarm: Configuring system ...\n");
447 1.8.2.2 nathanw
448 1.8.2.2 nathanw /* Fake bootconfig structure for the benefit of pmap.c */
449 1.8.2.2 nathanw /* XXX must make the memory description h/w independant */
450 1.8.2.2 nathanw bootconfig.dramblocks = 1;
451 1.8.2.2 nathanw bootconfig.dram[0].address = memstart;
452 1.8.2.2 nathanw bootconfig.dram[0].pages = memsize / NBPG;
453 1.8.2.2 nathanw
454 1.8.2.2 nathanw /*
455 1.8.2.2 nathanw * Set up the variables that define the availablilty of
456 1.8.2.2 nathanw * physical memory. For now, we're going to set
457 1.8.2.2 nathanw * physical_freestart to 0xa0200000 (where the kernel
458 1.8.2.2 nathanw * was loaded), and allocate the memory we need downwards.
459 1.8.2.2 nathanw * If we get too close to the page tables that RedBoot
460 1.8.2.2 nathanw * set up, we will panic. We will update physical_freestart
461 1.8.2.2 nathanw * and physical_freeend later to reflect what pmap_bootstrap()
462 1.8.2.2 nathanw * wants to see.
463 1.8.2.2 nathanw *
464 1.8.2.2 nathanw * XXX pmap_bootstrap() needs an enema.
465 1.8.2.2 nathanw */
466 1.8.2.2 nathanw physical_start = bootconfig.dram[0].address;
467 1.8.2.2 nathanw physical_end = physical_start + (bootconfig.dram[0].pages * NBPG);
468 1.8.2.2 nathanw
469 1.8.2.2 nathanw physical_freestart = 0xa0009000UL;
470 1.8.2.2 nathanw physical_freeend = 0xa0200000UL;
471 1.8.2.2 nathanw
472 1.8.2.2 nathanw physmem = (physical_end - physical_start) / NBPG;
473 1.8.2.2 nathanw
474 1.8.2.2 nathanw /* Tell the user about the memory */
475 1.8.2.2 nathanw printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem,
476 1.8.2.2 nathanw physical_start, physical_end - 1);
477 1.8.2.2 nathanw
478 1.8.2.2 nathanw /*
479 1.8.2.2 nathanw * Okay, the kernel starts 2MB in from the bottom of physical
480 1.8.2.2 nathanw * memory. We are going to allocate our bootstrap pages downwards
481 1.8.2.2 nathanw * from there.
482 1.8.2.2 nathanw *
483 1.8.2.2 nathanw * We need to allocate some fixed page tables to get the kernel
484 1.8.2.2 nathanw * going. We allocate one page directory and a number of page
485 1.8.2.2 nathanw * tables and store the physical addresses in the kernel_pt_table
486 1.8.2.2 nathanw * array.
487 1.8.2.2 nathanw *
488 1.8.2.2 nathanw * The kernel page directory must be on a 16K boundary. The page
489 1.8.2.2 nathanw * tables must be on 4K bounaries. What we do is allocate the
490 1.8.2.2 nathanw * page directory on the first 16K boundary that we encounter, and
491 1.8.2.2 nathanw * the page tables on 4K boundaries otherwise. Since we allocate
492 1.8.2.2 nathanw * at least 3 L2 page tables, we are guaranteed to encounter at
493 1.8.2.2 nathanw * least one 16K aligned region.
494 1.8.2.2 nathanw */
495 1.8.2.2 nathanw
496 1.8.2.2 nathanw #ifdef VERBOSE_INIT_ARM
497 1.8.2.2 nathanw printf("Allocating page tables\n");
498 1.8.2.2 nathanw #endif
499 1.8.2.2 nathanw
500 1.8.2.2 nathanw free_pages = (physical_freeend - physical_freestart) / NBPG;
501 1.8.2.2 nathanw
502 1.8.2.2 nathanw #ifdef VERBOSE_INIT_ARM
503 1.8.2.2 nathanw printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n",
504 1.8.2.2 nathanw physical_freestart, free_pages, free_pages);
505 1.8.2.2 nathanw #endif
506 1.8.2.2 nathanw
507 1.8.2.2 nathanw /* Define a macro to simplify memory allocation */
508 1.8.2.2 nathanw #define valloc_pages(var, np) \
509 1.8.2.2 nathanw alloc_pages((var).pv_pa, (np)); \
510 1.8.2.2 nathanw (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start;
511 1.8.2.2 nathanw
512 1.8.2.2 nathanw #define alloc_pages(var, np) \
513 1.8.2.2 nathanw physical_freeend -= ((np) * NBPG); \
514 1.8.2.2 nathanw if (physical_freeend < physical_freestart) \
515 1.8.2.2 nathanw panic("initarm: out of memory"); \
516 1.8.2.2 nathanw (var) = physical_freeend; \
517 1.8.2.2 nathanw free_pages -= (np); \
518 1.8.2.2 nathanw memset((char *)(var), 0, ((np) * NBPG));
519 1.8.2.2 nathanw
520 1.8.2.2 nathanw loop1 = 0;
521 1.8.2.2 nathanw kernel_l1pt.pv_pa = 0;
522 1.8.2.2 nathanw for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
523 1.8.2.2 nathanw /* Are we 16KB aligned for an L1 ? */
524 1.8.2.2 nathanw if (((physical_freeend - PD_SIZE) & (PD_SIZE - 1)) == 0
525 1.8.2.2 nathanw && kernel_l1pt.pv_pa == 0) {
526 1.8.2.2 nathanw valloc_pages(kernel_l1pt, PD_SIZE / NBPG);
527 1.8.2.2 nathanw } else {
528 1.8.2.2 nathanw alloc_pages(kernel_pt_table[loop1], PT_SIZE / NBPG);
529 1.8.2.2 nathanw ++loop1;
530 1.8.2.2 nathanw }
531 1.8.2.2 nathanw }
532 1.8.2.2 nathanw
533 1.8.2.2 nathanw /* This should never be able to happen but better confirm that. */
534 1.8.2.2 nathanw if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (PD_SIZE-1)) != 0)
535 1.8.2.2 nathanw panic("initarm: Failed to align the kernel page directory\n");
536 1.8.2.2 nathanw
537 1.8.2.2 nathanw /*
538 1.8.2.2 nathanw * Allocate a page for the system page mapped to V0x00000000
539 1.8.2.2 nathanw * This page will just contain the system vectors and can be
540 1.8.2.2 nathanw * shared by all processes.
541 1.8.2.2 nathanw */
542 1.8.2.2 nathanw alloc_pages(systempage.pv_pa, 1);
543 1.8.2.2 nathanw
544 1.8.2.2 nathanw /* Allocate a page for the page table to map kernel page tables. */
545 1.8.2.2 nathanw valloc_pages(kernel_ptpt, PT_SIZE / NBPG);
546 1.8.2.2 nathanw
547 1.8.2.2 nathanw /* Allocate stacks for all modes */
548 1.8.2.2 nathanw valloc_pages(irqstack, IRQ_STACK_SIZE);
549 1.8.2.2 nathanw valloc_pages(abtstack, ABT_STACK_SIZE);
550 1.8.2.2 nathanw valloc_pages(undstack, UND_STACK_SIZE);
551 1.8.2.2 nathanw valloc_pages(kernelstack, UPAGES);
552 1.8.2.2 nathanw
553 1.8.2.2 nathanw /* Allocate enough pages for cleaning the Mini-Data cache. */
554 1.8.2.2 nathanw KASSERT(xscale_minidata_clean_size <= NBPG);
555 1.8.2.2 nathanw valloc_pages(minidataclean, 1);
556 1.8.2.2 nathanw xscale_minidata_clean_addr = minidataclean.pv_va;
557 1.8.2.2 nathanw
558 1.8.2.2 nathanw #ifdef VERBOSE_INIT_ARM
559 1.8.2.2 nathanw printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa,
560 1.8.2.2 nathanw irqstack.pv_va);
561 1.8.2.2 nathanw printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa,
562 1.8.2.2 nathanw abtstack.pv_va);
563 1.8.2.2 nathanw printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa,
564 1.8.2.2 nathanw undstack.pv_va);
565 1.8.2.2 nathanw printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa,
566 1.8.2.2 nathanw kernelstack.pv_va);
567 1.8.2.2 nathanw #endif
568 1.8.2.2 nathanw
569 1.8.2.2 nathanw /*
570 1.8.2.2 nathanw * XXX Defer this to later so that we can reclaim the memory
571 1.8.2.2 nathanw * XXX used by the RedBoot page tables.
572 1.8.2.2 nathanw */
573 1.8.2.2 nathanw alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / NBPG);
574 1.8.2.2 nathanw
575 1.8.2.2 nathanw /*
576 1.8.2.2 nathanw * Ok we have allocated physical pages for the primary kernel
577 1.8.2.2 nathanw * page tables
578 1.8.2.2 nathanw */
579 1.8.2.2 nathanw
580 1.8.2.2 nathanw #ifdef VERBOSE_INIT_ARM
581 1.8.2.2 nathanw printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa);
582 1.8.2.2 nathanw #endif
583 1.8.2.2 nathanw
584 1.8.2.2 nathanw /*
585 1.8.2.2 nathanw * Now we start consturction of the L1 page table
586 1.8.2.2 nathanw * We start by mapping the L2 page tables into the L1.
587 1.8.2.2 nathanw * This means that we can replace L1 mappings later on if necessary
588 1.8.2.2 nathanw */
589 1.8.2.2 nathanw l1pagetable = kernel_l1pt.pv_pa;
590 1.8.2.2 nathanw
591 1.8.2.2 nathanw /* Map the L2 pages tables in the L1 page table */
592 1.8.2.2 nathanw map_pagetable(l1pagetable, 0x00000000,
593 1.8.2.2 nathanw kernel_pt_table[KERNEL_PT_SYS]);
594 1.8.2.2 nathanw map_pagetable(l1pagetable, KERNEL_BASE,
595 1.8.2.2 nathanw kernel_pt_table[KERNEL_PT_KERNEL]);
596 1.8.2.2 nathanw map_pagetable(l1pagetable, IQ80310_IOPXS_VBASE,
597 1.8.2.2 nathanw kernel_pt_table[KERNEL_PT_IOPXS]);
598 1.8.2.2 nathanw for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; ++loop)
599 1.8.2.2 nathanw map_pagetable(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
600 1.8.2.2 nathanw kernel_pt_table[KERNEL_PT_VMDATA + loop]);
601 1.8.2.2 nathanw map_pagetable(l1pagetable, PROCESS_PAGE_TBLS_BASE,
602 1.8.2.2 nathanw kernel_ptpt.pv_pa);
603 1.8.2.2 nathanw
604 1.8.2.2 nathanw #ifdef VERBOSE_INIT_ARM
605 1.8.2.2 nathanw printf("Mapping kernel\n");
606 1.8.2.2 nathanw #endif
607 1.8.2.2 nathanw
608 1.8.2.2 nathanw /* Now we fill in the L2 pagetable for the kernel static code/data */
609 1.8.2.2 nathanw l2pagetable = kernel_pt_table[KERNEL_PT_KERNEL];
610 1.8.2.2 nathanw
611 1.8.2.2 nathanw {
612 1.8.2.2 nathanw extern char etext[], _end[];
613 1.8.2.2 nathanw size_t textsize = (uintptr_t) etext - KERNEL_TEXT_BASE;
614 1.8.2.2 nathanw size_t totalsize = (uintptr_t) _end - KERNEL_TEXT_BASE;
615 1.8.2.2 nathanw u_int logical;
616 1.8.2.2 nathanw
617 1.8.2.2 nathanw /* Round down text size and round up total size. */
618 1.8.2.2 nathanw textsize = textsize & ~PGOFSET;
619 1.8.2.2 nathanw totalsize = (totalsize + PGOFSET) & ~PGOFSET;
620 1.8.2.2 nathanw
621 1.8.2.2 nathanw logical = 0x00200000; /* offset of kernel in RAM */
622 1.8.2.2 nathanw
623 1.8.2.2 nathanw /*
624 1.8.2.2 nathanw * This maps the kernel text/data/bss VA==PA.
625 1.8.2.2 nathanw */
626 1.8.2.2 nathanw logical += map_chunk(0, l2pagetable, KERNEL_BASE + logical,
627 1.8.2.2 nathanw physical_start + logical, textsize,
628 1.8.2.2 nathanw AP_KRW, PT_CACHEABLE);
629 1.8.2.2 nathanw logical += map_chunk(0, l2pagetable, KERNEL_BASE + logical,
630 1.8.2.2 nathanw physical_start + logical, totalsize - textsize,
631 1.8.2.2 nathanw AP_KRW, PT_CACHEABLE);
632 1.8.2.2 nathanw
633 1.8.2.2 nathanw #if 0 /* XXX No symbols yet. */
634 1.8.2.2 nathanw logical += map_chunk(0, l2pagetable, KERNEL_BASE + logical,
635 1.8.2.2 nathanw physical_start + logical, kernexec->a_syms + sizeof(int)
636 1.8.2.2 nathanw + *(u_int *)((int)end + kernexec->a_syms + sizeof(int)),
637 1.8.2.2 nathanw AP_KRW, PT_CACHEABLE);
638 1.8.2.2 nathanw #endif
639 1.8.2.2 nathanw }
640 1.8.2.2 nathanw
641 1.8.2.2 nathanw #ifdef VERBOSE_INIT_ARM
642 1.8.2.2 nathanw printf("Constructing L2 page tables\n");
643 1.8.2.2 nathanw #endif
644 1.8.2.2 nathanw
645 1.8.2.2 nathanw /* Map the stack pages */
646 1.8.2.2 nathanw map_chunk(0, l2pagetable, irqstack.pv_va, irqstack.pv_pa,
647 1.8.2.2 nathanw IRQ_STACK_SIZE * NBPG, AP_KRW, PT_CACHEABLE);
648 1.8.2.2 nathanw map_chunk(0, l2pagetable, abtstack.pv_va, abtstack.pv_pa,
649 1.8.2.2 nathanw ABT_STACK_SIZE * NBPG, AP_KRW, PT_CACHEABLE);
650 1.8.2.2 nathanw map_chunk(0, l2pagetable, undstack.pv_va, undstack.pv_pa,
651 1.8.2.2 nathanw UND_STACK_SIZE * NBPG, AP_KRW, PT_CACHEABLE);
652 1.8.2.2 nathanw map_chunk(0, l2pagetable, kernelstack.pv_va, kernelstack.pv_pa,
653 1.8.2.2 nathanw UPAGES * NBPG, AP_KRW, PT_CACHEABLE);
654 1.8.2.2 nathanw map_chunk(0, l2pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
655 1.8.2.2 nathanw PD_SIZE, AP_KRW, 0);
656 1.8.2.2 nathanw
657 1.8.2.2 nathanw /* Map the Mini-Data cache clean area. */
658 1.8.2.2 nathanw map_chunk(0, l2pagetable, minidataclean.pv_va, minidataclean.pv_pa,
659 1.8.2.2 nathanw NBPG, AP_KRW, PT_CACHEABLE);
660 1.8.2.2 nathanw
661 1.8.2.2 nathanw /* Map the page table that maps the kernel pages */
662 1.8.2.2 nathanw map_entry_nc(l2pagetable, kernel_ptpt.pv_pa, kernel_ptpt.pv_pa);
663 1.8.2.2 nathanw
664 1.8.2.2 nathanw /*
665 1.8.2.2 nathanw * Map entries in the page table used to map PTE's
666 1.8.2.2 nathanw * Basically every kernel page table gets mapped here
667 1.8.2.2 nathanw */
668 1.8.2.2 nathanw /* The -2 is slightly bogus, it should be -log2(sizeof(pt_entry_t)) */
669 1.8.2.2 nathanw l2pagetable = kernel_ptpt.pv_pa;
670 1.8.2.2 nathanw map_entry_nc(l2pagetable, (KERNEL_BASE >> (PGSHIFT-2)),
671 1.8.2.2 nathanw kernel_pt_table[KERNEL_PT_KERNEL]);
672 1.8.2.2 nathanw map_entry_nc(l2pagetable, (PROCESS_PAGE_TBLS_BASE >> (PGSHIFT-2)),
673 1.8.2.2 nathanw kernel_ptpt.pv_pa);
674 1.8.2.2 nathanw map_entry_nc(l2pagetable, (0x00000000 >> (PGSHIFT-2)),
675 1.8.2.2 nathanw kernel_pt_table[KERNEL_PT_SYS]);
676 1.8.2.2 nathanw for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; ++loop)
677 1.8.2.2 nathanw map_entry_nc(l2pagetable, ((KERNEL_VM_BASE +
678 1.8.2.2 nathanw (loop * 0x00400000)) >> (PGSHIFT-2)),
679 1.8.2.2 nathanw kernel_pt_table[KERNEL_PT_VMDATA + loop]);
680 1.8.2.2 nathanw
681 1.8.2.2 nathanw /*
682 1.8.2.2 nathanw * Map the system page in the kernel page table for the bottom 1Meg
683 1.8.2.2 nathanw * of the virtual memory map.
684 1.8.2.2 nathanw */
685 1.8.2.2 nathanw l2pagetable = kernel_pt_table[KERNEL_PT_SYS];
686 1.8.2.2 nathanw map_entry(l2pagetable, 0x00000000, systempage.pv_pa);
687 1.8.2.2 nathanw
688 1.8.2.2 nathanw /*
689 1.8.2.2 nathanw * Map devices we can map w/ section mappings.
690 1.8.2.2 nathanw */
691 1.8.2.2 nathanw loop = 0;
692 1.8.2.2 nathanw while (l1_sec_table[loop].size) {
693 1.8.2.2 nathanw vm_size_t sz;
694 1.8.2.2 nathanw
695 1.8.2.2 nathanw #ifdef VERBOSE_INIT_ARM
696 1.8.2.2 nathanw printf("%08lx -> %08lx @ %08lx\n", l1_sec_table[loop].pa,
697 1.8.2.2 nathanw l1_sec_table[loop].pa + l1_sec_table[loop].size - 1,
698 1.8.2.2 nathanw l1_sec_table[loop].va);
699 1.8.2.2 nathanw #endif
700 1.8.2.2 nathanw for (sz = 0; sz < l1_sec_table[loop].size; sz += L1_SEC_SIZE)
701 1.8.2.2 nathanw map_section(l1pagetable, l1_sec_table[loop].va + sz,
702 1.8.2.2 nathanw l1_sec_table[loop].pa + sz,
703 1.8.2.2 nathanw l1_sec_table[loop].flags);
704 1.8.2.2 nathanw ++loop;
705 1.8.2.2 nathanw }
706 1.8.2.2 nathanw
707 1.8.2.2 nathanw /*
708 1.8.2.2 nathanw * Map the PCI I/O spaces and i80312 registers. These are too
709 1.8.2.2 nathanw * small to be mapped w/ section mappings.
710 1.8.2.2 nathanw */
711 1.8.2.2 nathanw l2pagetable = kernel_pt_table[KERNEL_PT_IOPXS];
712 1.8.2.2 nathanw #ifdef VERBOSE_INIT_ARM
713 1.8.2.2 nathanw printf("Mapping PIOW 0x%08lx -> 0x%08lx @ 0x%08lx\n",
714 1.8.2.2 nathanw I80312_PCI_XLATE_PIOW_BASE,
715 1.8.2.2 nathanw I80312_PCI_XLATE_PIOW_BASE + I80312_PCI_XLATE_IOSIZE - 1,
716 1.8.2.2 nathanw IQ80310_PIOW_VBASE);
717 1.8.2.2 nathanw #endif
718 1.8.2.2 nathanw map_chunk(0, l2pagetable, IQ80310_PIOW_VBASE,
719 1.8.2.2 nathanw I80312_PCI_XLATE_PIOW_BASE, I80312_PCI_XLATE_IOSIZE, AP_KRW, 0);
720 1.8.2.2 nathanw
721 1.8.2.2 nathanw #ifdef VERBOSE_INIT_ARM
722 1.8.2.2 nathanw printf("Mapping SIOW 0x%08lx -> 0x%08lx @ 0x%08lx\n",
723 1.8.2.2 nathanw I80312_PCI_XLATE_SIOW_BASE,
724 1.8.2.2 nathanw I80312_PCI_XLATE_SIOW_BASE + I80312_PCI_XLATE_IOSIZE - 1,
725 1.8.2.2 nathanw IQ80310_SIOW_VBASE);
726 1.8.2.2 nathanw #endif
727 1.8.2.2 nathanw map_chunk(0, l2pagetable, IQ80310_SIOW_VBASE,
728 1.8.2.2 nathanw I80312_PCI_XLATE_SIOW_BASE, I80312_PCI_XLATE_IOSIZE, AP_KRW, 0);
729 1.8.2.2 nathanw
730 1.8.2.2 nathanw #ifdef VERBOSE_INIT_ARM
731 1.8.2.2 nathanw printf("Mapping 80312 0x%08lx -> 0x%08lx @ 0x%08lx\n",
732 1.8.2.2 nathanw I80312_PMMR_BASE,
733 1.8.2.2 nathanw I80312_PMMR_BASE + I80312_PMMR_SIZE - 1,
734 1.8.2.2 nathanw IQ80310_80312_VBASE);
735 1.8.2.2 nathanw #endif
736 1.8.2.2 nathanw map_chunk(0, l2pagetable, IQ80310_80312_VBASE,
737 1.8.2.2 nathanw I80312_PMMR_BASE, I80312_PMMR_SIZE, AP_KRW, 0);
738 1.8.2.2 nathanw
739 1.8.2.2 nathanw /*
740 1.8.2.2 nathanw * Give the XScale global cache clean code an appropriately
741 1.8.2.2 nathanw * sized chunk of unmapped VA space starting at 0xff000000
742 1.8.2.2 nathanw * (our device mappings end before this address).
743 1.8.2.2 nathanw */
744 1.8.2.2 nathanw xscale_cache_clean_addr = 0xff000000U;
745 1.8.2.2 nathanw
746 1.8.2.2 nathanw /*
747 1.8.2.2 nathanw * Now we have the real page tables in place so we can switch to them.
748 1.8.2.2 nathanw * Once this is done we will be running with the REAL kernel page
749 1.8.2.2 nathanw * tables.
750 1.8.2.2 nathanw */
751 1.8.2.2 nathanw
752 1.8.2.2 nathanw /*
753 1.8.2.2 nathanw * Update the physical_freestart/physical_freeend/free_pages
754 1.8.2.2 nathanw * variables.
755 1.8.2.2 nathanw */
756 1.8.2.2 nathanw {
757 1.8.2.2 nathanw extern char _end[];
758 1.8.2.2 nathanw
759 1.8.2.2 nathanw physical_freestart = (((uintptr_t) _end) + PGOFSET) & ~PGOFSET;
760 1.8.2.2 nathanw physical_freeend = physical_end;
761 1.8.2.2 nathanw free_pages = (physical_freeend - physical_freestart) / NBPG;
762 1.8.2.2 nathanw }
763 1.8.2.2 nathanw
764 1.8.2.2 nathanw /* Switch tables */
765 1.8.2.2 nathanw #ifdef VERBOSE_INIT_ARM
766 1.8.2.2 nathanw printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
767 1.8.2.2 nathanw physical_freestart, free_pages, free_pages);
768 1.8.2.2 nathanw printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa);
769 1.8.2.2 nathanw #endif
770 1.8.2.2 nathanw setttb(kernel_l1pt.pv_pa);
771 1.8.2.2 nathanw
772 1.8.2.2 nathanw #ifdef VERBOSE_INIT_ARM
773 1.8.2.2 nathanw printf("done!\n");
774 1.8.2.2 nathanw #endif
775 1.8.2.2 nathanw
776 1.8.2.2 nathanw #ifdef VERBOSE_INIT_ARM
777 1.8.2.2 nathanw printf("bootstrap done.\n");
778 1.8.2.2 nathanw #endif
779 1.8.2.2 nathanw
780 1.8.2.2 nathanw /* Right, set up the vectors at the bottom of page 0 */
781 1.8.2.2 nathanw memcpy((char *)0x00000000, page0, page0_end - page0);
782 1.8.2.2 nathanw
783 1.8.2.2 nathanw /* We have modified a text page so sync the icache */
784 1.8.2.2 nathanw cpu_cache_syncI();
785 1.8.2.2 nathanw
786 1.8.2.2 nathanw /*
787 1.8.2.2 nathanw * Pages were allocated during the secondary bootstrap for the
788 1.8.2.2 nathanw * stacks for different CPU modes.
789 1.8.2.2 nathanw * We must now set the r13 registers in the different CPU modes to
790 1.8.2.2 nathanw * point to these stacks.
791 1.8.2.2 nathanw * Since the ARM stacks use STMFD etc. we must set r13 to the top end
792 1.8.2.2 nathanw * of the stack memory.
793 1.8.2.2 nathanw */
794 1.8.2.2 nathanw printf("init subsystems: stacks ");
795 1.8.2.2 nathanw
796 1.8.2.2 nathanw set_stackptr(PSR_IRQ32_MODE, irqstack.pv_va + IRQ_STACK_SIZE * NBPG);
797 1.8.2.2 nathanw set_stackptr(PSR_ABT32_MODE, abtstack.pv_va + ABT_STACK_SIZE * NBPG);
798 1.8.2.2 nathanw set_stackptr(PSR_UND32_MODE, undstack.pv_va + UND_STACK_SIZE * NBPG);
799 1.8.2.2 nathanw
800 1.8.2.2 nathanw /*
801 1.8.2.2 nathanw * Well we should set a data abort handler.
802 1.8.2.2 nathanw * Once things get going this will change as we will need a proper
803 1.8.2.2 nathanw * handler.
804 1.8.2.2 nathanw * Until then we will use a handler that just panics but tells us
805 1.8.2.2 nathanw * why.
806 1.8.2.2 nathanw * Initialisation of the vectors will just panic on a data abort.
807 1.8.2.2 nathanw * This just fills in a slighly better one.
808 1.8.2.2 nathanw */
809 1.8.2.2 nathanw printf("vectors ");
810 1.8.2.2 nathanw data_abort_handler_address = (u_int)data_abort_handler;
811 1.8.2.2 nathanw prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
812 1.8.2.2 nathanw undefined_handler_address = (u_int)undefinedinstruction_bounce;
813 1.8.2.2 nathanw
814 1.8.2.2 nathanw /* At last !
815 1.8.2.2 nathanw * We now have the kernel in physical memory from the bottom upwards.
816 1.8.2.2 nathanw * Kernel page tables are physically above this.
817 1.8.2.2 nathanw * The kernel is mapped to KERNEL_TEXT_BASE
818 1.8.2.2 nathanw * The kernel data PTs will handle the mapping of 0xf1000000-0xf3ffffff
819 1.8.2.2 nathanw * The page tables are mapped to 0xefc00000
820 1.8.2.2 nathanw */
821 1.8.2.2 nathanw
822 1.8.2.2 nathanw /* Initialise the undefined instruction handlers */
823 1.8.2.2 nathanw printf("undefined ");
824 1.8.2.2 nathanw undefined_init();
825 1.8.2.2 nathanw
826 1.8.2.2 nathanw /* Boot strap pmap telling it where the kernel page table is */
827 1.8.2.2 nathanw printf("pmap ");
828 1.8.2.2 nathanw pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, kernel_ptpt);
829 1.8.2.2 nathanw
830 1.8.2.2 nathanw /* Setup the IRQ system */
831 1.8.2.2 nathanw printf("irq ");
832 1.8.2.2 nathanw irq_init();
833 1.8.2.2 nathanw printf("done.\n");
834 1.8.2.2 nathanw
835 1.8.2.2 nathanw #ifdef IPKDB
836 1.8.2.2 nathanw /* Initialise ipkdb */
837 1.8.2.2 nathanw ipkdb_init();
838 1.8.2.2 nathanw if (boothowto & RB_KDB)
839 1.8.2.2 nathanw ipkdb_connect(0);
840 1.8.2.2 nathanw #endif
841 1.8.2.2 nathanw
842 1.8.2.2 nathanw #ifdef DDB
843 1.8.2.2 nathanw db_machine_init();
844 1.8.2.2 nathanw
845 1.8.2.2 nathanw /* Firmware doesn't load symbols. */
846 1.8.2.2 nathanw ddb_init(0, NULL, NULL);
847 1.8.2.2 nathanw
848 1.8.2.2 nathanw if (boothowto & RB_KDB)
849 1.8.2.2 nathanw Debugger();
850 1.8.2.2 nathanw #endif
851 1.8.2.2 nathanw
852 1.8.2.2 nathanw /* We return the new stack pointer address */
853 1.8.2.2 nathanw return(kernelstack.pv_va + USPACE_SVC_STACK_TOP);
854 1.8.2.2 nathanw }
855 1.8.2.2 nathanw
856 1.8.2.2 nathanw void
857 1.8.2.2 nathanw process_kernel_args(char *args)
858 1.8.2.2 nathanw {
859 1.8.2.2 nathanw
860 1.8.2.2 nathanw boothowto = 0;
861 1.8.2.2 nathanw
862 1.8.2.2 nathanw /* Make a local copy of the bootargs */
863 1.8.2.2 nathanw strncpy(bootargs, args, MAX_BOOT_STRING);
864 1.8.2.2 nathanw
865 1.8.2.2 nathanw args = bootargs;
866 1.8.2.2 nathanw boot_file = bootargs;
867 1.8.2.2 nathanw
868 1.8.2.2 nathanw /* Skip the kernel image filename */
869 1.8.2.2 nathanw while (*args != ' ' && *args != 0)
870 1.8.2.2 nathanw ++args;
871 1.8.2.2 nathanw
872 1.8.2.2 nathanw if (*args != 0)
873 1.8.2.2 nathanw *args++ = 0;
874 1.8.2.2 nathanw
875 1.8.2.2 nathanw while (*args == ' ')
876 1.8.2.2 nathanw ++args;
877 1.8.2.2 nathanw
878 1.8.2.2 nathanw boot_args = args;
879 1.8.2.2 nathanw
880 1.8.2.2 nathanw printf("bootfile: %s\n", boot_file);
881 1.8.2.2 nathanw printf("bootargs: %s\n", boot_args);
882 1.8.2.2 nathanw
883 1.8.2.2 nathanw parse_mi_bootargs(boot_args);
884 1.8.2.2 nathanw }
885 1.8.2.2 nathanw
886 1.8.2.2 nathanw void
887 1.8.2.2 nathanw consinit(void)
888 1.8.2.2 nathanw {
889 1.8.2.2 nathanw static int consinit_called;
890 1.8.2.2 nathanw
891 1.8.2.2 nathanw if (consinit_called != 0)
892 1.8.2.2 nathanw return;
893 1.8.2.2 nathanw
894 1.8.2.2 nathanw consinit_called = 1;
895 1.8.2.2 nathanw
896 1.8.2.2 nathanw #if NCOM > 0
897 1.8.2.2 nathanw if (comcnattach(&obio_bs_tag, IQ80310_UART2, comcnspeed,
898 1.8.2.2 nathanw COM_FREQ, comcnmode))
899 1.8.2.2 nathanw panic("can't init serial console @%lx", IQ80310_UART1);
900 1.8.2.2 nathanw #else
901 1.8.2.2 nathanw panic("serial console @%lx not configured", IQ80310_UART1);
902 1.8.2.2 nathanw #endif
903 1.8.2.2 nathanw }
904