iq80310_machdep.c revision 1.15
1 /* $NetBSD: iq80310_machdep.c,v 1.15 2002/01/18 19:47:05 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 2001, 2002 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 /* 39 * Copyright (c) 1997,1998 Mark Brinicombe. 40 * Copyright (c) 1997,1998 Causality Limited. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by Mark Brinicombe 54 * for the NetBSD Project. 55 * 4. The name of the company nor the name of the author may be used to 56 * endorse or promote products derived from this software without specific 57 * prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 60 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 61 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 62 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 63 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 64 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 65 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 66 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 68 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 69 * SUCH DAMAGE. 70 * 71 * Machine dependant functions for kernel setup for Intel IQ80310 evaluation 72 * boards using RedBoot firmware. 73 */ 74 75 #include "opt_ddb.h" 76 #include "opt_pmap_debug.h" 77 78 #include <sys/param.h> 79 #include <sys/device.h> 80 #include <sys/systm.h> 81 #include <sys/kernel.h> 82 #include <sys/exec.h> 83 #include <sys/proc.h> 84 #include <sys/msgbuf.h> 85 #include <sys/reboot.h> 86 #include <sys/termios.h> 87 88 #include <dev/cons.h> 89 90 #include <machine/db_machdep.h> 91 #include <ddb/db_sym.h> 92 #include <ddb/db_extern.h> 93 94 #include <machine/bootconfig.h> 95 #include <machine/bus.h> 96 #include <machine/cpu.h> 97 #include <machine/frame.h> 98 #include <arm/undefined.h> 99 100 #include <arm/xscale/i80312reg.h> 101 #include <arm/xscale/i80312var.h> 102 103 #include <dev/pci/ppbreg.h> 104 105 #include <evbarm/iq80310/iq80310reg.h> 106 #include <evbarm/iq80310/iq80310var.h> 107 #include <evbarm/iq80310/obiovar.h> 108 109 #include "opt_ipkdb.h" 110 111 /* 112 * Address to call from cpu_reset() to reset the machine. 113 * This is machine architecture dependant as it varies depending 114 * on where the ROM appears when you turn the MMU off. 115 */ 116 117 u_int cpu_reset_address = 0; 118 119 /* Define various stack sizes in pages */ 120 #define IRQ_STACK_SIZE 1 121 #define ABT_STACK_SIZE 1 122 #ifdef IPKDB 123 #define UND_STACK_SIZE 2 124 #else 125 #define UND_STACK_SIZE 1 126 #endif 127 128 BootConfig bootconfig; /* Boot config storage */ 129 static char bootargs[MAX_BOOT_STRING + 1]; 130 char *boot_args = NULL; 131 char *boot_file = NULL; 132 133 vm_offset_t physical_start; 134 vm_offset_t physical_freestart; 135 vm_offset_t physical_freeend; 136 vm_offset_t physical_end; 137 u_int free_pages; 138 vm_offset_t pagetables_start; 139 int physmem = 0; 140 141 /*int debug_flags;*/ 142 #ifndef PMAP_STATIC_L1S 143 int max_processes = 64; /* Default number */ 144 #endif /* !PMAP_STATIC_L1S */ 145 146 /* Physical and virtual addresses for some global pages */ 147 pv_addr_t systempage; 148 pv_addr_t irqstack; 149 pv_addr_t undstack; 150 pv_addr_t abtstack; 151 pv_addr_t kernelstack; 152 pv_addr_t minidataclean; 153 154 vm_offset_t msgbufphys; 155 156 extern u_int data_abort_handler_address; 157 extern u_int prefetch_abort_handler_address; 158 extern u_int undefined_handler_address; 159 160 #ifdef PMAP_DEBUG 161 extern int pmap_debug_level; 162 #endif 163 164 #define KERNEL_PT_SYS 0 /* Page table for mapping proc0 zero page */ 165 #define KERNEL_PT_KERNEL 1 /* Page table for mapping kernel */ 166 #define KERNEL_PT_IOPXS 2 /* Page table for mapping i80312 */ 167 #define KERNEL_PT_VMDATA 3 /* Page tables for mapping kernel VM */ 168 #define KERNEL_PT_VMDATA_NUM (KERNEL_VM_SIZE >> (PDSHIFT + 2)) 169 #define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM) 170 171 pt_entry_t kernel_pt_table[NUM_KERNEL_PTS]; 172 173 struct user *proc0paddr; 174 175 /* Prototypes */ 176 177 void consinit(void); 178 179 void map_section(vm_offset_t pt, vm_offset_t va, vm_offset_t pa, 180 int cacheable); 181 void map_pagetable(vm_offset_t pt, vm_offset_t va, vm_offset_t pa); 182 void map_entry(vm_offset_t pt, vm_offset_t va, vm_offset_t pa); 183 void map_entry_nc(vm_offset_t pt, vm_offset_t va, vm_offset_t pa); 184 void map_entry_ro(vm_offset_t pt, vm_offset_t va, vm_offset_t pa); 185 vm_size_t map_chunk(vm_offset_t pd, vm_offset_t pt, vm_offset_t va, 186 vm_offset_t pa, vm_size_t size, u_int acc, u_int flg); 187 188 void process_kernel_args(char *); 189 void data_abort_handler(trapframe_t *frame); 190 void prefetch_abort_handler(trapframe_t *frame); 191 void undefinedinstruction_bounce(trapframe_t *frame); 192 193 extern void parse_mi_bootargs(char *args); 194 extern void dumpsys(void); 195 196 #include "com.h" 197 #if NCOM > 0 198 #include <dev/ic/comreg.h> 199 #include <dev/ic/comvar.h> 200 #endif 201 202 #ifndef CONSPEED 203 #define CONSPEED B115200 /* What RedBoot uses */ 204 #endif 205 #ifndef CONMODE 206 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 207 #endif 208 #ifndef CONUNIT 209 #define CONUNIT 0 210 #endif 211 212 int comcnspeed = CONSPEED; 213 int comcnmode = CONMODE; 214 int comcnunit = CONUNIT; 215 216 /* 217 * void cpu_reboot(int howto, char *bootstr) 218 * 219 * Reboots the system 220 * 221 * Deal with any syncing, unmounting, dumping and shutdown hooks, 222 * then reset the CPU. 223 */ 224 void 225 cpu_reboot(int howto, char *bootstr) 226 { 227 #ifdef DIAGNOSTIC 228 /* info */ 229 printf("boot: howto=%08x curproc=%p\n", howto, curproc); 230 #endif 231 232 /* 233 * If we are still cold then hit the air brakes 234 * and crash to earth fast 235 */ 236 if (cold) { 237 doshutdownhooks(); 238 printf("The operating system has halted.\n"); 239 printf("Please press any key to reboot.\n\n"); 240 cngetc(); 241 printf("rebooting...\n"); 242 cpu_reset(); 243 /*NOTREACHED*/ 244 } 245 246 /* Disable console buffering */ 247 /* cnpollc(1);*/ 248 249 /* 250 * If RB_NOSYNC was not specified sync the discs. 251 * Note: Unless cold is set to 1 here, syslogd will die during the 252 * unmount. It looks like syslogd is getting woken up only to find 253 * that it cannot page part of the binary in as the filesystem has 254 * been unmounted. 255 */ 256 if (!(howto & RB_NOSYNC)) 257 bootsync(); 258 259 /* Say NO to interrupts */ 260 splhigh(); 261 262 /* Do a dump if requested. */ 263 if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP) 264 dumpsys(); 265 266 /* Run any shutdown hooks */ 267 doshutdownhooks(); 268 269 /* Make sure IRQ's are disabled */ 270 IRQdisable; 271 272 if (howto & RB_HALT) { 273 printf("The operating system has halted.\n"); 274 printf("Please press any key to reboot.\n\n"); 275 cngetc(); 276 } 277 278 printf("rebooting...\n"); 279 cpu_reset(); 280 /*NOTREACHED*/ 281 } 282 283 /* 284 * Mapping table for core kernel memory. This memory is mapped at init 285 * time with section mappings. 286 */ 287 struct l1_sec_map { 288 vaddr_t va; 289 vaddr_t pa; 290 vsize_t size; 291 int flags; 292 } l1_sec_table[] = { 293 /* 294 * Map the on-board devices VA == PA so that we can access them 295 * with the MMU on or off. 296 */ 297 { 298 IQ80310_OBIO_BASE, 299 IQ80310_OBIO_BASE, 300 IQ80310_OBIO_SIZE, 301 0, 302 }, 303 304 { 305 0, 306 0, 307 0, 308 0, 309 } 310 }; 311 312 /* 313 * u_int initarm(...) 314 * 315 * Initial entry point on startup. This gets called before main() is 316 * entered. 317 * It should be responsible for setting up everything that must be 318 * in place when main is called. 319 * This includes 320 * Taking a copy of the boot configuration structure. 321 * Initialising the physical console so characters can be printed. 322 * Setting up page tables for the kernel 323 * Relocating the kernel to the bottom of physical memory 324 */ 325 u_int 326 initarm(void) 327 { 328 extern vaddr_t xscale_cache_clean_addr, xscale_minidata_clean_addr; 329 extern vsize_t xscale_minidata_clean_size; 330 int loop; 331 int loop1; 332 u_int l1pagetable; 333 u_int l2pagetable; 334 extern char page0[], page0_end[]; 335 pv_addr_t kernel_l1pt; 336 pv_addr_t kernel_ptpt; 337 paddr_t memstart; 338 psize_t memsize; 339 340 /* 341 * Clear out the 7-segment display. Whee, the first visual 342 * indication that we're running kernel code. 343 */ 344 iq80310_7seg(' ', ' '); 345 346 /* 347 * Heads up ... Setup the CPU / MMU / TLB functions 348 */ 349 if (set_cpufuncs()) 350 panic("cpu not recognized!"); 351 352 /* Calibrate the delay loop. */ 353 iq80310_calibrate_delay(); 354 355 /* 356 * Since we map the on-board devices VA==PA, and the kernel 357 * is running VA==PA, it's possible for us to initialize 358 * the console now. 359 */ 360 consinit(); 361 362 /* Talk to the user */ 363 printf("\nNetBSD/evbarm (IQ80310) booting ...\n"); 364 365 /* 366 * Reset the secondary PCI bus. RedBoot doesn't stop devices 367 * on the PCI bus before handing us control, so we have to 368 * do this. 369 * 370 * XXX This is arguably a bug in RedBoot, and doing this reset 371 * XXX could be problematic in the future if we encounter an 372 * XXX application where the PPB in the i80312 is used as a 373 * XXX PPB. 374 */ 375 { 376 uint32_t reg; 377 378 printf("Resetting secondary PCI bus...\n"); 379 reg = bus_space_read_4(&obio_bs_tag, 380 I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL); 381 bus_space_write_4(&obio_bs_tag, 382 I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL, 383 reg | PPB_BC_SECONDARY_RESET); 384 delay(10 * 1000); /* 10ms enough? */ 385 bus_space_write_4(&obio_bs_tag, 386 I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL, 387 reg); 388 } 389 390 /* 391 * Okay, RedBoot has provided us with the following memory map: 392 * 393 * Physical Address Range Description 394 * ----------------------- ---------------------------------- 395 * 0x00000000 - 0x00000fff flash Memory 396 * 0x00001000 - 0x00001fff 80312 Internal Registers 397 * 0x00002000 - 0x007fffff flash Memory 398 * 0x00800000 - 0x7fffffff PCI ATU Outbound Direct Window 399 * 0x80000000 - 0x83ffffff Primary PCI 32-bit Memory 400 * 0x84000000 - 0x87ffffff Primary PCI 64-bit Memory 401 * 0x88000000 - 0x8bffffff Secondary PCI 32-bit Memory 402 * 0x8c000000 - 0x8fffffff Secondary PCI 64-bit Memory 403 * 0x90000000 - 0x9000ffff Primary PCI IO Space 404 * 0x90010000 - 0x9001ffff Secondary PCI IO Space 405 * 0x90020000 - 0x9fffffff Unused 406 * 0xa0000000 - 0xbfffffff SDRAM 407 * 0xc0000000 - 0xefffffff Unused 408 * 0xf0000000 - 0xffffffff 80200 Internal Registers 409 * 410 * 411 * Virtual Address Range C B Description 412 * ----------------------- - - ---------------------------------- 413 * 0x00000000 - 0x00000fff Y Y SDRAM 414 * 0x00001000 - 0x00001fff N N 80312 Internal Registers 415 * 0x00002000 - 0x007fffff Y N flash Memory 416 * 0x00800000 - 0x7fffffff N N PCI ATU Outbound Direct Window 417 * 0x80000000 - 0x83ffffff N N Primary PCI 32-bit Memory 418 * 0x84000000 - 0x87ffffff N N Primary PCI 64-bit Memory 419 * 0x88000000 - 0x8bffffff N N Secondary PCI 32-bit Memory 420 * 0x8c000000 - 0x8fffffff N N Secondary PCI 64-bit Memory 421 * 0x90000000 - 0x9000ffff N N Primary PCI IO Space 422 * 0x90010000 - 0x9001ffff N N Secondary PCI IO Space 423 * 0xa0000000 - 0xa0000fff Y N flash 424 * 0xa0001000 - 0xbfffffff Y Y SDRAM 425 * 0xc0000000 - 0xcfffffff Y Y Cache Flush Region 426 * 0xf0000000 - 0xffffffff N N 80200 Internal Registers 427 * 428 * The first level page table is at 0xa0004000. There are also 429 * 2 second-level tables at 0xa0008000 and 0xa0008400. 430 * 431 * This corresponds roughly to the physical memory map, i.e. 432 * we are quite nearly running VA==PA. 433 */ 434 435 /* 436 * Examine the boot args string for options we need to know about 437 * now. 438 */ 439 #if 0 440 process_kernel_args((char *)nwbootinfo.bt_args); 441 #endif 442 443 /* 444 * Fetch the SDRAM start/size from the i80312 SDRAM configration 445 * registers. 446 */ 447 i80312_sdram_bounds(&obio_bs_tag, I80312_PMMR_BASE + I80312_MEM_BASE, 448 &memstart, &memsize); 449 450 printf("initarm: Configuring system ...\n"); 451 452 /* Fake bootconfig structure for the benefit of pmap.c */ 453 /* XXX must make the memory description h/w independant */ 454 bootconfig.dramblocks = 1; 455 bootconfig.dram[0].address = memstart; 456 bootconfig.dram[0].pages = memsize / NBPG; 457 458 /* 459 * Set up the variables that define the availablilty of 460 * physical memory. For now, we're going to set 461 * physical_freestart to 0xa0200000 (where the kernel 462 * was loaded), and allocate the memory we need downwards. 463 * If we get too close to the page tables that RedBoot 464 * set up, we will panic. We will update physical_freestart 465 * and physical_freeend later to reflect what pmap_bootstrap() 466 * wants to see. 467 * 468 * XXX pmap_bootstrap() needs an enema. 469 */ 470 physical_start = bootconfig.dram[0].address; 471 physical_end = physical_start + (bootconfig.dram[0].pages * NBPG); 472 473 physical_freestart = 0xa0009000UL; 474 physical_freeend = 0xa0200000UL; 475 476 physmem = (physical_end - physical_start) / NBPG; 477 478 /* Tell the user about the memory */ 479 printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem, 480 physical_start, physical_end - 1); 481 482 /* 483 * Okay, the kernel starts 2MB in from the bottom of physical 484 * memory. We are going to allocate our bootstrap pages downwards 485 * from there. 486 * 487 * We need to allocate some fixed page tables to get the kernel 488 * going. We allocate one page directory and a number of page 489 * tables and store the physical addresses in the kernel_pt_table 490 * array. 491 * 492 * The kernel page directory must be on a 16K boundary. The page 493 * tables must be on 4K bounaries. What we do is allocate the 494 * page directory on the first 16K boundary that we encounter, and 495 * the page tables on 4K boundaries otherwise. Since we allocate 496 * at least 3 L2 page tables, we are guaranteed to encounter at 497 * least one 16K aligned region. 498 */ 499 500 #ifdef VERBOSE_INIT_ARM 501 printf("Allocating page tables\n"); 502 #endif 503 504 free_pages = (physical_freeend - physical_freestart) / NBPG; 505 506 #ifdef VERBOSE_INIT_ARM 507 printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n", 508 physical_freestart, free_pages, free_pages); 509 #endif 510 511 /* Define a macro to simplify memory allocation */ 512 #define valloc_pages(var, np) \ 513 alloc_pages((var).pv_pa, (np)); \ 514 (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start; 515 516 #define alloc_pages(var, np) \ 517 physical_freeend -= ((np) * NBPG); \ 518 if (physical_freeend < physical_freestart) \ 519 panic("initarm: out of memory"); \ 520 (var) = physical_freeend; \ 521 free_pages -= (np); \ 522 memset((char *)(var), 0, ((np) * NBPG)); 523 524 loop1 = 0; 525 kernel_l1pt.pv_pa = 0; 526 for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) { 527 /* Are we 16KB aligned for an L1 ? */ 528 if (((physical_freeend - PD_SIZE) & (PD_SIZE - 1)) == 0 529 && kernel_l1pt.pv_pa == 0) { 530 valloc_pages(kernel_l1pt, PD_SIZE / NBPG); 531 } else { 532 alloc_pages(kernel_pt_table[loop1], PT_SIZE / NBPG); 533 ++loop1; 534 } 535 } 536 537 /* This should never be able to happen but better confirm that. */ 538 if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (PD_SIZE-1)) != 0) 539 panic("initarm: Failed to align the kernel page directory\n"); 540 541 /* 542 * Allocate a page for the system page mapped to V0x00000000 543 * This page will just contain the system vectors and can be 544 * shared by all processes. 545 */ 546 alloc_pages(systempage.pv_pa, 1); 547 548 /* Allocate a page for the page table to map kernel page tables. */ 549 valloc_pages(kernel_ptpt, PT_SIZE / NBPG); 550 551 /* Allocate stacks for all modes */ 552 valloc_pages(irqstack, IRQ_STACK_SIZE); 553 valloc_pages(abtstack, ABT_STACK_SIZE); 554 valloc_pages(undstack, UND_STACK_SIZE); 555 valloc_pages(kernelstack, UPAGES); 556 557 /* Allocate enough pages for cleaning the Mini-Data cache. */ 558 KASSERT(xscale_minidata_clean_size <= NBPG); 559 valloc_pages(minidataclean, 1); 560 xscale_minidata_clean_addr = minidataclean.pv_va; 561 562 #ifdef VERBOSE_INIT_ARM 563 printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa, 564 irqstack.pv_va); 565 printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa, 566 abtstack.pv_va); 567 printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa, 568 undstack.pv_va); 569 printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa, 570 kernelstack.pv_va); 571 #endif 572 573 /* 574 * XXX Defer this to later so that we can reclaim the memory 575 * XXX used by the RedBoot page tables. 576 */ 577 alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / NBPG); 578 579 /* 580 * Ok we have allocated physical pages for the primary kernel 581 * page tables 582 */ 583 584 #ifdef VERBOSE_INIT_ARM 585 printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa); 586 #endif 587 588 /* 589 * Now we start consturction of the L1 page table 590 * We start by mapping the L2 page tables into the L1. 591 * This means that we can replace L1 mappings later on if necessary 592 */ 593 l1pagetable = kernel_l1pt.pv_pa; 594 595 /* Map the L2 pages tables in the L1 page table */ 596 map_pagetable(l1pagetable, 0x00000000, 597 kernel_pt_table[KERNEL_PT_SYS]); 598 map_pagetable(l1pagetable, KERNEL_BASE, 599 kernel_pt_table[KERNEL_PT_KERNEL]); 600 map_pagetable(l1pagetable, IQ80310_IOPXS_VBASE, 601 kernel_pt_table[KERNEL_PT_IOPXS]); 602 for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; ++loop) 603 map_pagetable(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000, 604 kernel_pt_table[KERNEL_PT_VMDATA + loop]); 605 map_pagetable(l1pagetable, PROCESS_PAGE_TBLS_BASE, 606 kernel_ptpt.pv_pa); 607 608 #ifdef VERBOSE_INIT_ARM 609 printf("Mapping kernel\n"); 610 #endif 611 612 /* Now we fill in the L2 pagetable for the kernel static code/data */ 613 l2pagetable = kernel_pt_table[KERNEL_PT_KERNEL]; 614 615 { 616 extern char etext[], _end[]; 617 size_t textsize = (uintptr_t) etext - KERNEL_TEXT_BASE; 618 size_t totalsize = (uintptr_t) _end - KERNEL_TEXT_BASE; 619 u_int logical; 620 621 textsize = (textsize + PGOFSET) & ~PGOFSET; 622 totalsize = (totalsize + PGOFSET) & ~PGOFSET; 623 624 logical = 0x00200000; /* offset of kernel in RAM */ 625 626 /* 627 * This maps the kernel text/data/bss VA==PA. 628 */ 629 logical += map_chunk(l1pagetable, l2pagetable, 630 KERNEL_BASE + logical, 631 physical_start + logical, textsize, 632 AP_KRW, PT_CACHEABLE); 633 logical += map_chunk(l1pagetable, l2pagetable, 634 KERNEL_BASE + logical, 635 physical_start + logical, totalsize - textsize, 636 AP_KRW, PT_CACHEABLE); 637 638 #if 0 /* XXX No symbols yet. */ 639 logical += map_chunk(l1pagetable, l2pagetable, 640 KERNEL_BASE + logical, 641 physical_start + logical, kernexec->a_syms + sizeof(int) 642 + *(u_int *)((int)end + kernexec->a_syms + sizeof(int)), 643 AP_KRW, PT_CACHEABLE); 644 #endif 645 } 646 647 #ifdef VERBOSE_INIT_ARM 648 printf("Constructing L2 page tables\n"); 649 #endif 650 651 /* Map the stack pages */ 652 map_chunk(0, l2pagetable, irqstack.pv_va, irqstack.pv_pa, 653 IRQ_STACK_SIZE * NBPG, AP_KRW, PT_CACHEABLE); 654 map_chunk(0, l2pagetable, abtstack.pv_va, abtstack.pv_pa, 655 ABT_STACK_SIZE * NBPG, AP_KRW, PT_CACHEABLE); 656 map_chunk(0, l2pagetable, undstack.pv_va, undstack.pv_pa, 657 UND_STACK_SIZE * NBPG, AP_KRW, PT_CACHEABLE); 658 map_chunk(0, l2pagetable, kernelstack.pv_va, kernelstack.pv_pa, 659 UPAGES * NBPG, AP_KRW, PT_CACHEABLE); 660 map_chunk(0, l2pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa, 661 PD_SIZE, AP_KRW, 0); 662 663 /* Map the Mini-Data cache clean area. */ 664 map_chunk(0, l2pagetable, minidataclean.pv_va, minidataclean.pv_pa, 665 NBPG, AP_KRW, PT_CACHEABLE); 666 667 /* Map the page table that maps the kernel pages */ 668 map_entry_nc(l2pagetable, kernel_ptpt.pv_pa, kernel_ptpt.pv_pa); 669 670 /* 671 * Map entries in the page table used to map PTE's 672 * Basically every kernel page table gets mapped here 673 */ 674 /* The -2 is slightly bogus, it should be -log2(sizeof(pt_entry_t)) */ 675 l2pagetable = kernel_ptpt.pv_pa; 676 map_entry_nc(l2pagetable, (KERNEL_BASE >> (PGSHIFT-2)), 677 kernel_pt_table[KERNEL_PT_KERNEL]); 678 map_entry_nc(l2pagetable, (PROCESS_PAGE_TBLS_BASE >> (PGSHIFT-2)), 679 kernel_ptpt.pv_pa); 680 map_entry_nc(l2pagetable, (0x00000000 >> (PGSHIFT-2)), 681 kernel_pt_table[KERNEL_PT_SYS]); 682 for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; ++loop) 683 map_entry_nc(l2pagetable, ((KERNEL_VM_BASE + 684 (loop * 0x00400000)) >> (PGSHIFT-2)), 685 kernel_pt_table[KERNEL_PT_VMDATA + loop]); 686 687 /* 688 * Map the system page in the kernel page table for the bottom 1Meg 689 * of the virtual memory map. 690 */ 691 l2pagetable = kernel_pt_table[KERNEL_PT_SYS]; 692 map_entry(l2pagetable, 0x00000000, systempage.pv_pa); 693 694 /* 695 * Map devices we can map w/ section mappings. 696 */ 697 loop = 0; 698 while (l1_sec_table[loop].size) { 699 vm_size_t sz; 700 701 #ifdef VERBOSE_INIT_ARM 702 printf("%08lx -> %08lx @ %08lx\n", l1_sec_table[loop].pa, 703 l1_sec_table[loop].pa + l1_sec_table[loop].size - 1, 704 l1_sec_table[loop].va); 705 #endif 706 for (sz = 0; sz < l1_sec_table[loop].size; sz += L1_SEC_SIZE) 707 map_section(l1pagetable, l1_sec_table[loop].va + sz, 708 l1_sec_table[loop].pa + sz, 709 l1_sec_table[loop].flags); 710 ++loop; 711 } 712 713 /* 714 * Map the PCI I/O spaces and i80312 registers. These are too 715 * small to be mapped w/ section mappings. 716 */ 717 l2pagetable = kernel_pt_table[KERNEL_PT_IOPXS]; 718 #ifdef VERBOSE_INIT_ARM 719 printf("Mapping PIOW 0x%08lx -> 0x%08lx @ 0x%08lx\n", 720 I80312_PCI_XLATE_PIOW_BASE, 721 I80312_PCI_XLATE_PIOW_BASE + I80312_PCI_XLATE_IOSIZE - 1, 722 IQ80310_PIOW_VBASE); 723 #endif 724 map_chunk(0, l2pagetable, IQ80310_PIOW_VBASE, 725 I80312_PCI_XLATE_PIOW_BASE, I80312_PCI_XLATE_IOSIZE, AP_KRW, 0); 726 727 #ifdef VERBOSE_INIT_ARM 728 printf("Mapping SIOW 0x%08lx -> 0x%08lx @ 0x%08lx\n", 729 I80312_PCI_XLATE_SIOW_BASE, 730 I80312_PCI_XLATE_SIOW_BASE + I80312_PCI_XLATE_IOSIZE - 1, 731 IQ80310_SIOW_VBASE); 732 #endif 733 map_chunk(0, l2pagetable, IQ80310_SIOW_VBASE, 734 I80312_PCI_XLATE_SIOW_BASE, I80312_PCI_XLATE_IOSIZE, AP_KRW, 0); 735 736 #ifdef VERBOSE_INIT_ARM 737 printf("Mapping 80312 0x%08lx -> 0x%08lx @ 0x%08lx\n", 738 I80312_PMMR_BASE, 739 I80312_PMMR_BASE + I80312_PMMR_SIZE - 1, 740 IQ80310_80312_VBASE); 741 #endif 742 map_chunk(0, l2pagetable, IQ80310_80312_VBASE, 743 I80312_PMMR_BASE, I80312_PMMR_SIZE, AP_KRW, 0); 744 745 /* 746 * Give the XScale global cache clean code an appropriately 747 * sized chunk of unmapped VA space starting at 0xff000000 748 * (our device mappings end before this address). 749 */ 750 xscale_cache_clean_addr = 0xff000000U; 751 752 /* 753 * Now we have the real page tables in place so we can switch to them. 754 * Once this is done we will be running with the REAL kernel page 755 * tables. 756 */ 757 758 /* 759 * Update the physical_freestart/physical_freeend/free_pages 760 * variables. 761 */ 762 { 763 extern char _end[]; 764 765 physical_freestart = (((uintptr_t) _end) + PGOFSET) & ~PGOFSET; 766 physical_freeend = physical_end; 767 free_pages = (physical_freeend - physical_freestart) / NBPG; 768 } 769 770 /* Switch tables */ 771 #ifdef VERBOSE_INIT_ARM 772 printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n", 773 physical_freestart, free_pages, free_pages); 774 printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa); 775 #endif 776 setttb(kernel_l1pt.pv_pa); 777 778 #ifdef VERBOSE_INIT_ARM 779 printf("done!\n"); 780 #endif 781 782 #ifdef VERBOSE_INIT_ARM 783 printf("bootstrap done.\n"); 784 #endif 785 786 /* Right, set up the vectors at the bottom of page 0 */ 787 memcpy((char *)0x00000000, page0, page0_end - page0); 788 789 /* We have modified a text page so sync the icache */ 790 cpu_cache_syncI(); 791 792 /* 793 * Pages were allocated during the secondary bootstrap for the 794 * stacks for different CPU modes. 795 * We must now set the r13 registers in the different CPU modes to 796 * point to these stacks. 797 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 798 * of the stack memory. 799 */ 800 printf("init subsystems: stacks "); 801 802 set_stackptr(PSR_IRQ32_MODE, irqstack.pv_va + IRQ_STACK_SIZE * NBPG); 803 set_stackptr(PSR_ABT32_MODE, abtstack.pv_va + ABT_STACK_SIZE * NBPG); 804 set_stackptr(PSR_UND32_MODE, undstack.pv_va + UND_STACK_SIZE * NBPG); 805 806 /* 807 * Well we should set a data abort handler. 808 * Once things get going this will change as we will need a proper 809 * handler. 810 * Until then we will use a handler that just panics but tells us 811 * why. 812 * Initialisation of the vectors will just panic on a data abort. 813 * This just fills in a slighly better one. 814 */ 815 printf("vectors "); 816 data_abort_handler_address = (u_int)data_abort_handler; 817 prefetch_abort_handler_address = (u_int)prefetch_abort_handler; 818 undefined_handler_address = (u_int)undefinedinstruction_bounce; 819 820 /* At last ! 821 * We now have the kernel in physical memory from the bottom upwards. 822 * Kernel page tables are physically above this. 823 * The kernel is mapped to KERNEL_TEXT_BASE 824 * The kernel data PTs will handle the mapping of 0xf1000000-0xf3ffffff 825 * The page tables are mapped to 0xefc00000 826 */ 827 828 /* Initialise the undefined instruction handlers */ 829 printf("undefined "); 830 undefined_init(); 831 832 /* Boot strap pmap telling it where the kernel page table is */ 833 printf("pmap "); 834 pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, kernel_ptpt); 835 836 /* Setup the IRQ system */ 837 printf("irq "); 838 irq_init(); 839 printf("done.\n"); 840 841 #ifdef IPKDB 842 /* Initialise ipkdb */ 843 ipkdb_init(); 844 if (boothowto & RB_KDB) 845 ipkdb_connect(0); 846 #endif 847 848 #ifdef DDB 849 db_machine_init(); 850 851 /* Firmware doesn't load symbols. */ 852 ddb_init(0, NULL, NULL); 853 854 if (boothowto & RB_KDB) 855 Debugger(); 856 #endif 857 858 /* We return the new stack pointer address */ 859 return(kernelstack.pv_va + USPACE_SVC_STACK_TOP); 860 } 861 862 void 863 process_kernel_args(char *args) 864 { 865 866 boothowto = 0; 867 868 /* Make a local copy of the bootargs */ 869 strncpy(bootargs, args, MAX_BOOT_STRING); 870 871 args = bootargs; 872 boot_file = bootargs; 873 874 /* Skip the kernel image filename */ 875 while (*args != ' ' && *args != 0) 876 ++args; 877 878 if (*args != 0) 879 *args++ = 0; 880 881 while (*args == ' ') 882 ++args; 883 884 boot_args = args; 885 886 printf("bootfile: %s\n", boot_file); 887 printf("bootargs: %s\n", boot_args); 888 889 parse_mi_bootargs(boot_args); 890 } 891 892 void 893 consinit(void) 894 { 895 static const bus_addr_t comcnaddrs[] = { 896 IQ80310_UART2, /* com0 (J9) */ 897 IQ80310_UART1, /* com1 (J10) */ 898 }; 899 static int consinit_called; 900 901 if (consinit_called != 0) 902 return; 903 904 consinit_called = 1; 905 906 #if NCOM > 0 907 if (comcnattach(&obio_bs_tag, comcnaddrs[comcnunit], comcnspeed, 908 COM_FREQ, comcnmode)) 909 panic("can't init serial console @%lx", IQ80310_UART2); 910 #else 911 panic("serial console @%lx not configured", IQ80310_UART2); 912 #endif 913 } 914
Indexes created Mon Oct 20 15:10:11 GMT 2025