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iq80310_machdep.c revision 1.18
      1 /*	$NetBSD: iq80310_machdep.c,v 1.18 2002/01/30 04:01:36 thorpej Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
      5  * All rights reserved.
      6  *
      7  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
      8  *
      9  * Redistribution and use in source and binary forms, with or without
     10  * modification, are permitted provided that the following conditions
     11  * are met:
     12  * 1. Redistributions of source code must retain the above copyright
     13  *    notice, this list of conditions and the following disclaimer.
     14  * 2. Redistributions in binary form must reproduce the above copyright
     15  *    notice, this list of conditions and the following disclaimer in the
     16  *    documentation and/or other materials provided with the distribution.
     17  * 3. All advertising materials mentioning features or use of this software
     18  *    must display the following acknowledgement:
     19  *	This product includes software developed for the NetBSD Project by
     20  *	Wasabi Systems, Inc.
     21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
     22  *    or promote products derived from this software without specific prior
     23  *    written permission.
     24  *
     25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
     26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
     29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     35  * POSSIBILITY OF SUCH DAMAGE.
     36  */
     37 
     38 /*
     39  * Copyright (c) 1997,1998 Mark Brinicombe.
     40  * Copyright (c) 1997,1998 Causality Limited.
     41  * All rights reserved.
     42  *
     43  * Redistribution and use in source and binary forms, with or without
     44  * modification, are permitted provided that the following conditions
     45  * are met:
     46  * 1. Redistributions of source code must retain the above copyright
     47  *    notice, this list of conditions and the following disclaimer.
     48  * 2. Redistributions in binary form must reproduce the above copyright
     49  *    notice, this list of conditions and the following disclaimer in the
     50  *    documentation and/or other materials provided with the distribution.
     51  * 3. All advertising materials mentioning features or use of this software
     52  *    must display the following acknowledgement:
     53  *	This product includes software developed by Mark Brinicombe
     54  *	for the NetBSD Project.
     55  * 4. The name of the company nor the name of the author may be used to
     56  *    endorse or promote products derived from this software without specific
     57  *    prior written permission.
     58  *
     59  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
     60  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
     61  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     62  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
     63  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     64  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
     65  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     66  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     67  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     68  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     69  * SUCH DAMAGE.
     70  *
     71  * Machine dependant functions for kernel setup for Intel IQ80310 evaluation
     72  * boards using RedBoot firmware.
     73  */
     74 
     75 #include "opt_ddb.h"
     76 #include "opt_pmap_debug.h"
     77 
     78 #include <sys/param.h>
     79 #include <sys/device.h>
     80 #include <sys/systm.h>
     81 #include <sys/kernel.h>
     82 #include <sys/exec.h>
     83 #include <sys/proc.h>
     84 #include <sys/msgbuf.h>
     85 #include <sys/reboot.h>
     86 #include <sys/termios.h>
     87 
     88 #include <dev/cons.h>
     89 
     90 #include <machine/db_machdep.h>
     91 #include <ddb/db_sym.h>
     92 #include <ddb/db_extern.h>
     93 
     94 #include <machine/bootconfig.h>
     95 #include <machine/bus.h>
     96 #include <machine/cpu.h>
     97 #include <machine/frame.h>
     98 #include <arm/undefined.h>
     99 
    100 #include <arm/arm32/machdep.h>
    101 
    102 #include <arm/xscale/i80312reg.h>
    103 #include <arm/xscale/i80312var.h>
    104 
    105 #include <dev/pci/ppbreg.h>
    106 
    107 #include <evbarm/iq80310/iq80310reg.h>
    108 #include <evbarm/iq80310/iq80310var.h>
    109 #include <evbarm/iq80310/obiovar.h>
    110 
    111 #include "opt_ipkdb.h"
    112 
    113 /*
    114  * Address to call from cpu_reset() to reset the machine.
    115  * This is machine architecture dependant as it varies depending
    116  * on where the ROM appears when you turn the MMU off.
    117  */
    118 
    119 u_int cpu_reset_address = 0;
    120 
    121 /* Define various stack sizes in pages */
    122 #define IRQ_STACK_SIZE	1
    123 #define ABT_STACK_SIZE	1
    124 #ifdef IPKDB
    125 #define UND_STACK_SIZE	2
    126 #else
    127 #define UND_STACK_SIZE	1
    128 #endif
    129 
    130 BootConfig bootconfig;		/* Boot config storage */
    131 char *boot_args = NULL;
    132 char *boot_file = NULL;
    133 
    134 vm_offset_t physical_start;
    135 vm_offset_t physical_freestart;
    136 vm_offset_t physical_freeend;
    137 vm_offset_t physical_end;
    138 u_int free_pages;
    139 vm_offset_t pagetables_start;
    140 int physmem = 0;
    141 
    142 /*int debug_flags;*/
    143 #ifndef PMAP_STATIC_L1S
    144 int max_processes = 64;			/* Default number */
    145 #endif	/* !PMAP_STATIC_L1S */
    146 
    147 /* Physical and virtual addresses for some global pages */
    148 pv_addr_t systempage;
    149 pv_addr_t irqstack;
    150 pv_addr_t undstack;
    151 pv_addr_t abtstack;
    152 pv_addr_t kernelstack;
    153 pv_addr_t minidataclean;
    154 
    155 vm_offset_t msgbufphys;
    156 
    157 extern u_int data_abort_handler_address;
    158 extern u_int prefetch_abort_handler_address;
    159 extern u_int undefined_handler_address;
    160 
    161 #ifdef PMAP_DEBUG
    162 extern int pmap_debug_level;
    163 #endif
    164 
    165 #define KERNEL_PT_SYS		0	/* Page table for mapping proc0 zero page */
    166 #define KERNEL_PT_KERNEL	1	/* Page table for mapping kernel */
    167 #define	KERNEL_PT_IOPXS		2	/* Page table for mapping i80312 */
    168 #define KERNEL_PT_VMDATA	3	/* Page tables for mapping kernel VM */
    169 #define	KERNEL_PT_VMDATA_NUM	(KERNEL_VM_SIZE >> (PDSHIFT + 2))
    170 #define NUM_KERNEL_PTS		(KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
    171 
    172 pt_entry_t kernel_pt_table[NUM_KERNEL_PTS];
    173 
    174 struct user *proc0paddr;
    175 
    176 /* Prototypes */
    177 
    178 void	consinit(void);
    179 
    180 #include "com.h"
    181 #if NCOM > 0
    182 #include <dev/ic/comreg.h>
    183 #include <dev/ic/comvar.h>
    184 #endif
    185 
    186 #ifndef CONSPEED
    187 #define CONSPEED B115200	/* What RedBoot uses */
    188 #endif
    189 #ifndef CONMODE
    190 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
    191 #endif
    192 #ifndef CONUNIT
    193 #define	CONUNIT	0
    194 #endif
    195 
    196 int comcnspeed = CONSPEED;
    197 int comcnmode = CONMODE;
    198 int comcnunit = CONUNIT;
    199 
    200 /*
    201  * void cpu_reboot(int howto, char *bootstr)
    202  *
    203  * Reboots the system
    204  *
    205  * Deal with any syncing, unmounting, dumping and shutdown hooks,
    206  * then reset the CPU.
    207  */
    208 void
    209 cpu_reboot(int howto, char *bootstr)
    210 {
    211 #ifdef DIAGNOSTIC
    212 	/* info */
    213 	printf("boot: howto=%08x curproc=%p\n", howto, curproc);
    214 #endif
    215 
    216 	/*
    217 	 * If we are still cold then hit the air brakes
    218 	 * and crash to earth fast
    219 	 */
    220 	if (cold) {
    221 		doshutdownhooks();
    222 		printf("The operating system has halted.\n");
    223 		printf("Please press any key to reboot.\n\n");
    224 		cngetc();
    225 		printf("rebooting...\n");
    226 		cpu_reset();
    227 		/*NOTREACHED*/
    228 	}
    229 
    230 	/* Disable console buffering */
    231 
    232 	/*
    233 	 * If RB_NOSYNC was not specified sync the discs.
    234 	 * Note: Unless cold is set to 1 here, syslogd will die during the
    235 	 * unmount.  It looks like syslogd is getting woken up only to find
    236 	 * that it cannot page part of the binary in as the filesystem has
    237 	 * been unmounted.
    238 	 */
    239 	if (!(howto & RB_NOSYNC))
    240 		bootsync();
    241 
    242 	/* Say NO to interrupts */
    243 	splhigh();
    244 
    245 	/* Do a dump if requested. */
    246 	if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
    247 		dumpsys();
    248 
    249 	/* Run any shutdown hooks */
    250 	doshutdownhooks();
    251 
    252 	/* Make sure IRQ's are disabled */
    253 	IRQdisable;
    254 
    255 	if (howto & RB_HALT) {
    256 		printf("The operating system has halted.\n");
    257 		printf("Please press any key to reboot.\n\n");
    258 		cngetc();
    259 	}
    260 
    261 	printf("rebooting...\n");
    262 	cpu_reset();
    263 	/*NOTREACHED*/
    264 }
    265 
    266 /*
    267  * Mapping table for core kernel memory. This memory is mapped at init
    268  * time with section mappings.
    269  */
    270 struct l1_sec_map {
    271 	vaddr_t	va;
    272 	vaddr_t	pa;
    273 	vsize_t	size;
    274 	int flags;
    275 } l1_sec_table[] = {
    276     /*
    277      * Map the on-board devices VA == PA so that we can access them
    278      * with the MMU on or off.
    279      */
    280     {
    281 	IQ80310_OBIO_BASE,
    282 	IQ80310_OBIO_BASE,
    283 	IQ80310_OBIO_SIZE,
    284 	0,
    285     },
    286 
    287     {
    288 	0,
    289 	0,
    290 	0,
    291 	0,
    292     }
    293 };
    294 
    295 /*
    296  * u_int initarm(...)
    297  *
    298  * Initial entry point on startup. This gets called before main() is
    299  * entered.
    300  * It should be responsible for setting up everything that must be
    301  * in place when main is called.
    302  * This includes
    303  *   Taking a copy of the boot configuration structure.
    304  *   Initialising the physical console so characters can be printed.
    305  *   Setting up page tables for the kernel
    306  *   Relocating the kernel to the bottom of physical memory
    307  */
    308 u_int
    309 initarm(void *arg)
    310 {
    311 	extern vaddr_t xscale_cache_clean_addr, xscale_minidata_clean_addr;
    312 	extern vsize_t xscale_minidata_clean_size;
    313 	int loop;
    314 	int loop1;
    315 	u_int l1pagetable;
    316 	u_int l2pagetable;
    317 	extern char page0[], page0_end[];
    318 	pv_addr_t kernel_l1pt;
    319 	pv_addr_t kernel_ptpt;
    320 	paddr_t memstart;
    321 	psize_t memsize;
    322 
    323 	/*
    324 	 * Clear out the 7-segment display.  Whee, the first visual
    325 	 * indication that we're running kernel code.
    326 	 */
    327 	iq80310_7seg(' ', ' ');
    328 
    329 	/*
    330 	 * Heads up ... Setup the CPU / MMU / TLB functions
    331 	 */
    332 	if (set_cpufuncs())
    333 		panic("cpu not recognized!");
    334 
    335 	/* Calibrate the delay loop. */
    336 	iq80310_calibrate_delay();
    337 
    338 	/*
    339 	 * Since we map the on-board devices VA==PA, and the kernel
    340 	 * is running VA==PA, it's possible for us to initialize
    341 	 * the console now.
    342 	 */
    343 	consinit();
    344 
    345 	/* Talk to the user */
    346 	printf("\nNetBSD/evbarm (IQ80310) booting ...\n");
    347 
    348 	/*
    349 	 * Reset the secondary PCI bus.  RedBoot doesn't stop devices
    350 	 * on the PCI bus before handing us control, so we have to
    351 	 * do this.
    352 	 *
    353 	 * XXX This is arguably a bug in RedBoot, and doing this reset
    354 	 * XXX could be problematic in the future if we encounter an
    355 	 * XXX application where the PPB in the i80312 is used as a
    356 	 * XXX PPB.
    357 	 */
    358 	{
    359 		uint32_t reg;
    360 
    361 		printf("Resetting secondary PCI bus...\n");
    362 		reg = bus_space_read_4(&obio_bs_tag,
    363 		    I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL);
    364 		bus_space_write_4(&obio_bs_tag,
    365 		    I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL,
    366 		    reg | PPB_BC_SECONDARY_RESET);
    367 		delay(10 * 1000);	/* 10ms enough? */
    368 		bus_space_write_4(&obio_bs_tag,
    369 		    I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL,
    370 		    reg);
    371 	}
    372 
    373 	/*
    374 	 * Okay, RedBoot has provided us with the following memory map:
    375 	 *
    376 	 * Physical Address Range     Description
    377 	 * -----------------------    ----------------------------------
    378 	 * 0x00000000 - 0x00000fff    flash Memory
    379 	 * 0x00001000 - 0x00001fff    80312 Internal Registers
    380 	 * 0x00002000 - 0x007fffff    flash Memory
    381 	 * 0x00800000 - 0x7fffffff    PCI ATU Outbound Direct Window
    382 	 * 0x80000000 - 0x83ffffff    Primary PCI 32-bit Memory
    383 	 * 0x84000000 - 0x87ffffff    Primary PCI 64-bit Memory
    384 	 * 0x88000000 - 0x8bffffff    Secondary PCI 32-bit Memory
    385 	 * 0x8c000000 - 0x8fffffff    Secondary PCI 64-bit Memory
    386 	 * 0x90000000 - 0x9000ffff    Primary PCI IO Space
    387 	 * 0x90010000 - 0x9001ffff    Secondary PCI IO Space
    388 	 * 0x90020000 - 0x9fffffff    Unused
    389 	 * 0xa0000000 - 0xbfffffff    SDRAM
    390 	 * 0xc0000000 - 0xefffffff    Unused
    391 	 * 0xf0000000 - 0xffffffff    80200 Internal Registers
    392 	 *
    393 	 *
    394 	 * Virtual Address Range    C B  Description
    395 	 * -----------------------  - -  ----------------------------------
    396 	 * 0x00000000 - 0x00000fff  Y Y  SDRAM
    397 	 * 0x00001000 - 0x00001fff  N N  80312 Internal Registers
    398 	 * 0x00002000 - 0x007fffff  Y N  flash Memory
    399 	 * 0x00800000 - 0x7fffffff  N N  PCI ATU Outbound Direct Window
    400 	 * 0x80000000 - 0x83ffffff  N N  Primary PCI 32-bit Memory
    401 	 * 0x84000000 - 0x87ffffff  N N  Primary PCI 64-bit Memory
    402 	 * 0x88000000 - 0x8bffffff  N N  Secondary PCI 32-bit Memory
    403 	 * 0x8c000000 - 0x8fffffff  N N  Secondary PCI 64-bit Memory
    404 	 * 0x90000000 - 0x9000ffff  N N  Primary PCI IO Space
    405 	 * 0x90010000 - 0x9001ffff  N N  Secondary PCI IO Space
    406 	 * 0xa0000000 - 0xa0000fff  Y N  flash
    407 	 * 0xa0001000 - 0xbfffffff  Y Y  SDRAM
    408 	 * 0xc0000000 - 0xcfffffff  Y Y  Cache Flush Region
    409 	 * 0xf0000000 - 0xffffffff  N N  80200 Internal Registers
    410 	 *
    411 	 * The first level page table is at 0xa0004000.  There are also
    412 	 * 2 second-level tables at 0xa0008000 and 0xa0008400.
    413 	 *
    414 	 * This corresponds roughly to the physical memory map, i.e.
    415 	 * we are quite nearly running VA==PA.
    416 	 */
    417 
    418 	/*
    419 	 * Examine the boot args string for options we need to know about
    420 	 * now.
    421 	 */
    422 #if 0
    423 	process_kernel_args((char *)nwbootinfo.bt_args);
    424 #endif
    425 
    426 	/*
    427 	 * Fetch the SDRAM start/size from the i80312 SDRAM configration
    428 	 * registers.
    429 	 */
    430 	i80312_sdram_bounds(&obio_bs_tag, I80312_PMMR_BASE + I80312_MEM_BASE,
    431 	    &memstart, &memsize);
    432 
    433 	printf("initarm: Configuring system ...\n");
    434 
    435 	/* Fake bootconfig structure for the benefit of pmap.c */
    436 	/* XXX must make the memory description h/w independant */
    437 	bootconfig.dramblocks = 1;
    438 	bootconfig.dram[0].address = memstart;
    439 	bootconfig.dram[0].pages = memsize / NBPG;
    440 
    441 	/*
    442 	 * Set up the variables that define the availablilty of
    443 	 * physical memory.  For now, we're going to set
    444 	 * physical_freestart to 0xa0200000 (where the kernel
    445 	 * was loaded), and allocate the memory we need downwards.
    446 	 * If we get too close to the page tables that RedBoot
    447 	 * set up, we will panic.  We will update physical_freestart
    448 	 * and physical_freeend later to reflect what pmap_bootstrap()
    449 	 * wants to see.
    450 	 *
    451 	 * XXX pmap_bootstrap() needs an enema.
    452 	 */
    453 	physical_start = bootconfig.dram[0].address;
    454 	physical_end = physical_start + (bootconfig.dram[0].pages * NBPG);
    455 
    456 	physical_freestart = 0xa0009000UL;
    457 	physical_freeend = 0xa0200000UL;
    458 
    459 	physmem = (physical_end - physical_start) / NBPG;
    460 
    461 	/* Tell the user about the memory */
    462 	printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem,
    463 	    physical_start, physical_end - 1);
    464 
    465 	/*
    466 	 * Okay, the kernel starts 2MB in from the bottom of physical
    467 	 * memory.  We are going to allocate our bootstrap pages downwards
    468 	 * from there.
    469 	 *
    470 	 * We need to allocate some fixed page tables to get the kernel
    471 	 * going.  We allocate one page directory and a number of page
    472 	 * tables and store the physical addresses in the kernel_pt_table
    473 	 * array.
    474 	 *
    475 	 * The kernel page directory must be on a 16K boundary.  The page
    476 	 * tables must be on 4K bounaries.  What we do is allocate the
    477 	 * page directory on the first 16K boundary that we encounter, and
    478 	 * the page tables on 4K boundaries otherwise.  Since we allocate
    479 	 * at least 3 L2 page tables, we are guaranteed to encounter at
    480 	 * least one 16K aligned region.
    481 	 */
    482 
    483 #ifdef VERBOSE_INIT_ARM
    484 	printf("Allocating page tables\n");
    485 #endif
    486 
    487 	free_pages = (physical_freeend - physical_freestart) / NBPG;
    488 
    489 #ifdef VERBOSE_INIT_ARM
    490 	printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n",
    491 	       physical_freestart, free_pages, free_pages);
    492 #endif
    493 
    494 	/* Define a macro to simplify memory allocation */
    495 #define	valloc_pages(var, np)				\
    496 	alloc_pages((var).pv_pa, (np));			\
    497 	(var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start;
    498 
    499 #define alloc_pages(var, np)				\
    500 	physical_freeend -= ((np) * NBPG);		\
    501 	if (physical_freeend < physical_freestart)	\
    502 		panic("initarm: out of memory");	\
    503 	(var) = physical_freeend;			\
    504 	free_pages -= (np);				\
    505 	memset((char *)(var), 0, ((np) * NBPG));
    506 
    507 	loop1 = 0;
    508 	kernel_l1pt.pv_pa = 0;
    509 	for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
    510 		/* Are we 16KB aligned for an L1 ? */
    511 		if (((physical_freeend - PD_SIZE) & (PD_SIZE - 1)) == 0
    512 		    && kernel_l1pt.pv_pa == 0) {
    513 			valloc_pages(kernel_l1pt, PD_SIZE / NBPG);
    514 		} else {
    515 			alloc_pages(kernel_pt_table[loop1], PT_SIZE / NBPG);
    516 			++loop1;
    517 		}
    518 	}
    519 
    520 	/* This should never be able to happen but better confirm that. */
    521 	if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (PD_SIZE-1)) != 0)
    522 		panic("initarm: Failed to align the kernel page directory\n");
    523 
    524 	/*
    525 	 * Allocate a page for the system page mapped to V0x00000000
    526 	 * This page will just contain the system vectors and can be
    527 	 * shared by all processes.
    528 	 */
    529 	alloc_pages(systempage.pv_pa, 1);
    530 
    531 	/* Allocate a page for the page table to map kernel page tables. */
    532 	valloc_pages(kernel_ptpt, PT_SIZE / NBPG);
    533 
    534 	/* Allocate stacks for all modes */
    535 	valloc_pages(irqstack, IRQ_STACK_SIZE);
    536 	valloc_pages(abtstack, ABT_STACK_SIZE);
    537 	valloc_pages(undstack, UND_STACK_SIZE);
    538 	valloc_pages(kernelstack, UPAGES);
    539 
    540 	/* Allocate enough pages for cleaning the Mini-Data cache. */
    541 	KASSERT(xscale_minidata_clean_size <= NBPG);
    542 	valloc_pages(minidataclean, 1);
    543 	xscale_minidata_clean_addr = minidataclean.pv_va;
    544 
    545 #ifdef VERBOSE_INIT_ARM
    546 	printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa,
    547 	    irqstack.pv_va);
    548 	printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa,
    549 	    abtstack.pv_va);
    550 	printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa,
    551 	    undstack.pv_va);
    552 	printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa,
    553 	    kernelstack.pv_va);
    554 #endif
    555 
    556 	/*
    557 	 * XXX Defer this to later so that we can reclaim the memory
    558 	 * XXX used by the RedBoot page tables.
    559 	 */
    560 	alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / NBPG);
    561 
    562 	/*
    563 	 * Ok we have allocated physical pages for the primary kernel
    564 	 * page tables
    565 	 */
    566 
    567 #ifdef VERBOSE_INIT_ARM
    568 	printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa);
    569 #endif
    570 
    571 	/*
    572 	 * Now we start consturction of the L1 page table
    573 	 * We start by mapping the L2 page tables into the L1.
    574 	 * This means that we can replace L1 mappings later on if necessary
    575 	 */
    576 	l1pagetable = kernel_l1pt.pv_pa;
    577 
    578 	/* Map the L2 pages tables in the L1 page table */
    579 	map_pagetable(l1pagetable, 0x00000000,
    580 	    kernel_pt_table[KERNEL_PT_SYS]);
    581 	map_pagetable(l1pagetable, KERNEL_BASE,
    582 	    kernel_pt_table[KERNEL_PT_KERNEL]);
    583 	map_pagetable(l1pagetable, IQ80310_IOPXS_VBASE,
    584 	    kernel_pt_table[KERNEL_PT_IOPXS]);
    585 	for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; ++loop)
    586 		map_pagetable(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
    587 		    kernel_pt_table[KERNEL_PT_VMDATA + loop]);
    588 	map_pagetable(l1pagetable, PROCESS_PAGE_TBLS_BASE,
    589 	    kernel_ptpt.pv_pa);
    590 
    591 #ifdef VERBOSE_INIT_ARM
    592 	printf("Mapping kernel\n");
    593 #endif
    594 
    595 	/* Now we fill in the L2 pagetable for the kernel static code/data */
    596 	l2pagetable = kernel_pt_table[KERNEL_PT_KERNEL];
    597 
    598 	{
    599 		extern char etext[], _end[];
    600 		size_t textsize = (uintptr_t) etext - KERNEL_TEXT_BASE;
    601 		size_t totalsize = (uintptr_t) _end - KERNEL_TEXT_BASE;
    602 		u_int logical;
    603 
    604 		textsize = (textsize + PGOFSET) & ~PGOFSET;
    605 		totalsize = (totalsize + PGOFSET) & ~PGOFSET;
    606 
    607 		logical = 0x00200000;	/* offset of kernel in RAM */
    608 
    609 		/*
    610 		 * This maps the kernel text/data/bss VA==PA.
    611 		 */
    612 		logical += map_chunk(l1pagetable, l2pagetable,
    613 		    KERNEL_BASE + logical,
    614 		    physical_start + logical, textsize,
    615 		    AP_KRW, PT_CACHEABLE);
    616 		logical += map_chunk(l1pagetable, l2pagetable,
    617 		    KERNEL_BASE + logical,
    618 		    physical_start + logical, totalsize - textsize,
    619 		    AP_KRW, PT_CACHEABLE);
    620 
    621 #if 0 /* XXX No symbols yet. */
    622 		logical += map_chunk(l1pagetable, l2pagetable,
    623 		    KERNEL_BASE + logical,
    624 		    physical_start + logical, kernexec->a_syms + sizeof(int)
    625 		    + *(u_int *)((int)end + kernexec->a_syms + sizeof(int)),
    626 		    AP_KRW, PT_CACHEABLE);
    627 #endif
    628 	}
    629 
    630 #ifdef VERBOSE_INIT_ARM
    631 	printf("Constructing L2 page tables\n");
    632 #endif
    633 
    634 	/* Map the stack pages */
    635 	map_chunk(0, l2pagetable, irqstack.pv_va, irqstack.pv_pa,
    636 	    IRQ_STACK_SIZE * NBPG, AP_KRW, PT_CACHEABLE);
    637 	map_chunk(0, l2pagetable, abtstack.pv_va, abtstack.pv_pa,
    638 	    ABT_STACK_SIZE * NBPG, AP_KRW, PT_CACHEABLE);
    639 	map_chunk(0, l2pagetable, undstack.pv_va, undstack.pv_pa,
    640 	    UND_STACK_SIZE * NBPG, AP_KRW, PT_CACHEABLE);
    641 	map_chunk(0, l2pagetable, kernelstack.pv_va, kernelstack.pv_pa,
    642 	    UPAGES * NBPG, AP_KRW, PT_CACHEABLE);
    643 	map_chunk(0, l2pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
    644 	    PD_SIZE, AP_KRW, 0);
    645 
    646 	/* Map the Mini-Data cache clean area. */
    647 	map_chunk(0, l2pagetable, minidataclean.pv_va, minidataclean.pv_pa,
    648 	    NBPG, AP_KRW, PT_CACHEABLE);
    649 
    650 	/* Map the page table that maps the kernel pages */
    651 	map_entry_nc(l2pagetable, kernel_ptpt.pv_pa, kernel_ptpt.pv_pa);
    652 
    653 	/*
    654 	 * Map entries in the page table used to map PTE's
    655 	 * Basically every kernel page table gets mapped here
    656 	 */
    657 	/* The -2 is slightly bogus, it should be -log2(sizeof(pt_entry_t)) */
    658 	l2pagetable = kernel_ptpt.pv_pa;
    659 	map_entry_nc(l2pagetable, (KERNEL_BASE >> (PGSHIFT-2)),
    660 	    kernel_pt_table[KERNEL_PT_KERNEL]);
    661 	map_entry_nc(l2pagetable, (PROCESS_PAGE_TBLS_BASE >> (PGSHIFT-2)),
    662 	    kernel_ptpt.pv_pa);
    663 	map_entry_nc(l2pagetable, (0x00000000 >> (PGSHIFT-2)),
    664 	    kernel_pt_table[KERNEL_PT_SYS]);
    665 	for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; ++loop)
    666 		map_entry_nc(l2pagetable, ((KERNEL_VM_BASE +
    667 		    (loop * 0x00400000)) >> (PGSHIFT-2)),
    668 		    kernel_pt_table[KERNEL_PT_VMDATA + loop]);
    669 
    670 	/*
    671 	 * Map the system page in the kernel page table for the bottom 1Meg
    672 	 * of the virtual memory map.
    673 	 */
    674 	l2pagetable = kernel_pt_table[KERNEL_PT_SYS];
    675 	map_entry(l2pagetable, 0x00000000, systempage.pv_pa);
    676 
    677 	/*
    678 	 * Map devices we can map w/ section mappings.
    679 	 */
    680 	loop = 0;
    681 	while (l1_sec_table[loop].size) {
    682 		vm_size_t sz;
    683 
    684 #ifdef VERBOSE_INIT_ARM
    685 		printf("%08lx -> %08lx @ %08lx\n", l1_sec_table[loop].pa,
    686 		    l1_sec_table[loop].pa + l1_sec_table[loop].size - 1,
    687 		    l1_sec_table[loop].va);
    688 #endif
    689 		for (sz = 0; sz < l1_sec_table[loop].size; sz += L1_SEC_SIZE)
    690 			map_section(l1pagetable, l1_sec_table[loop].va + sz,
    691 			    l1_sec_table[loop].pa + sz,
    692 			    l1_sec_table[loop].flags);
    693 		++loop;
    694 	}
    695 
    696 	/*
    697 	 * Map the PCI I/O spaces and i80312 registers.  These are too
    698 	 * small to be mapped w/ section mappings.
    699 	 */
    700 	l2pagetable = kernel_pt_table[KERNEL_PT_IOPXS];
    701 #ifdef VERBOSE_INIT_ARM
    702 	printf("Mapping PIOW 0x%08lx -> 0x%08lx @ 0x%08lx\n",
    703 	    I80312_PCI_XLATE_PIOW_BASE,
    704 	    I80312_PCI_XLATE_PIOW_BASE + I80312_PCI_XLATE_IOSIZE - 1,
    705 	    IQ80310_PIOW_VBASE);
    706 #endif
    707 	map_chunk(0, l2pagetable, IQ80310_PIOW_VBASE,
    708 	    I80312_PCI_XLATE_PIOW_BASE, I80312_PCI_XLATE_IOSIZE, AP_KRW, 0);
    709 
    710 #ifdef VERBOSE_INIT_ARM
    711 	printf("Mapping SIOW 0x%08lx -> 0x%08lx @ 0x%08lx\n",
    712 	    I80312_PCI_XLATE_SIOW_BASE,
    713 	    I80312_PCI_XLATE_SIOW_BASE + I80312_PCI_XLATE_IOSIZE - 1,
    714 	    IQ80310_SIOW_VBASE);
    715 #endif
    716 	map_chunk(0, l2pagetable, IQ80310_SIOW_VBASE,
    717 	    I80312_PCI_XLATE_SIOW_BASE, I80312_PCI_XLATE_IOSIZE, AP_KRW, 0);
    718 
    719 #ifdef VERBOSE_INIT_ARM
    720 	printf("Mapping 80312 0x%08lx -> 0x%08lx @ 0x%08lx\n",
    721 	    I80312_PMMR_BASE,
    722 	    I80312_PMMR_BASE + I80312_PMMR_SIZE - 1,
    723 	    IQ80310_80312_VBASE);
    724 #endif
    725 	map_chunk(0, l2pagetable, IQ80310_80312_VBASE,
    726 	    I80312_PMMR_BASE, I80312_PMMR_SIZE, AP_KRW, 0);
    727 
    728 	/*
    729 	 * Give the XScale global cache clean code an appropriately
    730 	 * sized chunk of unmapped VA space starting at 0xff000000
    731 	 * (our device mappings end before this address).
    732 	 */
    733 	xscale_cache_clean_addr = 0xff000000U;
    734 
    735 	/*
    736 	 * Now we have the real page tables in place so we can switch to them.
    737 	 * Once this is done we will be running with the REAL kernel page
    738 	 * tables.
    739 	 */
    740 
    741 	/*
    742 	 * Update the physical_freestart/physical_freeend/free_pages
    743 	 * variables.
    744 	 */
    745 	{
    746 		extern char _end[];
    747 
    748 		physical_freestart = (((uintptr_t) _end) + PGOFSET) & ~PGOFSET;
    749 		physical_freeend = physical_end;
    750 		free_pages = (physical_freeend - physical_freestart) / NBPG;
    751 	}
    752 
    753 	/* Switch tables */
    754 #ifdef VERBOSE_INIT_ARM
    755 	printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
    756 	       physical_freestart, free_pages, free_pages);
    757 	printf("switching to new L1 page table  @%#lx...", kernel_l1pt.pv_pa);
    758 #endif
    759 	setttb(kernel_l1pt.pv_pa);
    760 
    761 #ifdef VERBOSE_INIT_ARM
    762 	printf("done!\n");
    763 #endif
    764 
    765 #ifdef VERBOSE_INIT_ARM
    766 	printf("bootstrap done.\n");
    767 #endif
    768 
    769 	/* Right, set up the vectors at the bottom of page 0 */
    770 	memcpy((char *)0x00000000, page0, page0_end - page0);
    771 
    772 	/* We have modified a text page so sync the icache */
    773 	cpu_icache_sync_all();
    774 
    775 	/*
    776 	 * Pages were allocated during the secondary bootstrap for the
    777 	 * stacks for different CPU modes.
    778 	 * We must now set the r13 registers in the different CPU modes to
    779 	 * point to these stacks.
    780 	 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
    781 	 * of the stack memory.
    782 	 */
    783 	printf("init subsystems: stacks ");
    784 
    785 	set_stackptr(PSR_IRQ32_MODE, irqstack.pv_va + IRQ_STACK_SIZE * NBPG);
    786 	set_stackptr(PSR_ABT32_MODE, abtstack.pv_va + ABT_STACK_SIZE * NBPG);
    787 	set_stackptr(PSR_UND32_MODE, undstack.pv_va + UND_STACK_SIZE * NBPG);
    788 
    789 	/*
    790 	 * Well we should set a data abort handler.
    791 	 * Once things get going this will change as we will need a proper
    792 	 * handler.
    793 	 * Until then we will use a handler that just panics but tells us
    794 	 * why.
    795 	 * Initialisation of the vectors will just panic on a data abort.
    796 	 * This just fills in a slighly better one.
    797 	 */
    798 	printf("vectors ");
    799 	data_abort_handler_address = (u_int)data_abort_handler;
    800 	prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
    801 	undefined_handler_address = (u_int)undefinedinstruction_bounce;
    802 
    803 	/* At last !
    804 	 * We now have the kernel in physical memory from the bottom upwards.
    805 	 * Kernel page tables are physically above this.
    806 	 * The kernel is mapped to KERNEL_TEXT_BASE
    807 	 * The kernel data PTs will handle the mapping of 0xf1000000-0xf3ffffff
    808 	 * The page tables are mapped to 0xefc00000
    809 	 */
    810 
    811 	/* Initialise the undefined instruction handlers */
    812 	printf("undefined ");
    813 	undefined_init();
    814 
    815 	/* Boot strap pmap telling it where the kernel page table is */
    816 	printf("pmap ");
    817 	pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, kernel_ptpt);
    818 
    819 	/* Setup the IRQ system */
    820 	printf("irq ");
    821 	iq80310_intr_init();
    822 	printf("done.\n");
    823 
    824 #ifdef IPKDB
    825 	/* Initialise ipkdb */
    826 	ipkdb_init();
    827 	if (boothowto & RB_KDB)
    828 		ipkdb_connect(0);
    829 #endif
    830 
    831 #ifdef DDB
    832 	db_machine_init();
    833 
    834 	/* Firmware doesn't load symbols. */
    835 	ddb_init(0, NULL, NULL);
    836 
    837 	if (boothowto & RB_KDB)
    838 		Debugger();
    839 #endif
    840 
    841 	/* We return the new stack pointer address */
    842 	return(kernelstack.pv_va + USPACE_SVC_STACK_TOP);
    843 }
    844 
    845 #if 0
    846 void
    847 process_kernel_args(char *args)
    848 {
    849 	static char bootargs[MAX_BOOT_STRING + 1];
    850 
    851 	boothowto = 0;
    852 
    853 	/* Make a local copy of the bootargs */
    854 	strncpy(bootargs, args, MAX_BOOT_STRING);
    855 
    856 	args = bootargs;
    857 	boot_file = bootargs;
    858 
    859 	/* Skip the kernel image filename */
    860 	while (*args != ' ' && *args != 0)
    861 		++args;
    862 
    863 	if (*args != 0)
    864 		*args++ = 0;
    865 
    866 	while (*args == ' ')
    867 		++args;
    868 
    869 	boot_args = args;
    870 
    871 	printf("bootfile: %s\n", boot_file);
    872 	printf("bootargs: %s\n", boot_args);
    873 
    874 	parse_mi_bootargs(boot_args);
    875 }
    876 #endif
    877 
    878 void
    879 consinit(void)
    880 {
    881 	static const bus_addr_t comcnaddrs[] = {
    882 		IQ80310_UART2,		/* com0 (J9) */
    883 		IQ80310_UART1,		/* com1 (J10) */
    884 	};
    885 	static int consinit_called;
    886 
    887 	if (consinit_called != 0)
    888 		return;
    889 
    890 	consinit_called = 1;
    891 
    892 #if NCOM > 0
    893 	if (comcnattach(&obio_bs_tag, comcnaddrs[comcnunit], comcnspeed,
    894 	    COM_FREQ, comcnmode))
    895 			panic("can't init serial console @%lx", IQ80310_UART2);
    896 #else
    897 	panic("serial console @%lx not configured", IQ80310_UART2);
    898 #endif
    899 }
    900