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iq80310_machdep.c revision 1.20
      1 /*	$NetBSD: iq80310_machdep.c,v 1.20 2002/02/08 03:41:56 thorpej Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
      5  * All rights reserved.
      6  *
      7  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
      8  *
      9  * Redistribution and use in source and binary forms, with or without
     10  * modification, are permitted provided that the following conditions
     11  * are met:
     12  * 1. Redistributions of source code must retain the above copyright
     13  *    notice, this list of conditions and the following disclaimer.
     14  * 2. Redistributions in binary form must reproduce the above copyright
     15  *    notice, this list of conditions and the following disclaimer in the
     16  *    documentation and/or other materials provided with the distribution.
     17  * 3. All advertising materials mentioning features or use of this software
     18  *    must display the following acknowledgement:
     19  *	This product includes software developed for the NetBSD Project by
     20  *	Wasabi Systems, Inc.
     21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
     22  *    or promote products derived from this software without specific prior
     23  *    written permission.
     24  *
     25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
     26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
     29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     35  * POSSIBILITY OF SUCH DAMAGE.
     36  */
     37 
     38 /*
     39  * Copyright (c) 1997,1998 Mark Brinicombe.
     40  * Copyright (c) 1997,1998 Causality Limited.
     41  * All rights reserved.
     42  *
     43  * Redistribution and use in source and binary forms, with or without
     44  * modification, are permitted provided that the following conditions
     45  * are met:
     46  * 1. Redistributions of source code must retain the above copyright
     47  *    notice, this list of conditions and the following disclaimer.
     48  * 2. Redistributions in binary form must reproduce the above copyright
     49  *    notice, this list of conditions and the following disclaimer in the
     50  *    documentation and/or other materials provided with the distribution.
     51  * 3. All advertising materials mentioning features or use of this software
     52  *    must display the following acknowledgement:
     53  *	This product includes software developed by Mark Brinicombe
     54  *	for the NetBSD Project.
     55  * 4. The name of the company nor the name of the author may be used to
     56  *    endorse or promote products derived from this software without specific
     57  *    prior written permission.
     58  *
     59  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
     60  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
     61  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     62  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
     63  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     64  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
     65  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     66  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     67  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     68  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     69  * SUCH DAMAGE.
     70  *
     71  * Machine dependant functions for kernel setup for Intel IQ80310 evaluation
     72  * boards using RedBoot firmware.
     73  */
     74 
     75 #include "opt_ddb.h"
     76 #include "opt_pmap_debug.h"
     77 
     78 #include <sys/param.h>
     79 #include <sys/device.h>
     80 #include <sys/systm.h>
     81 #include <sys/kernel.h>
     82 #include <sys/exec.h>
     83 #include <sys/proc.h>
     84 #include <sys/msgbuf.h>
     85 #include <sys/reboot.h>
     86 #include <sys/termios.h>
     87 
     88 #include <dev/cons.h>
     89 
     90 #include <machine/db_machdep.h>
     91 #include <ddb/db_sym.h>
     92 #include <ddb/db_extern.h>
     93 
     94 #include <machine/bootconfig.h>
     95 #include <machine/bus.h>
     96 #include <machine/cpu.h>
     97 #include <machine/frame.h>
     98 #include <arm/undefined.h>
     99 
    100 #include <arm/arm32/machdep.h>
    101 
    102 #include <arm/xscale/i80312reg.h>
    103 #include <arm/xscale/i80312var.h>
    104 
    105 #include <dev/pci/ppbreg.h>
    106 
    107 #include <evbarm/iq80310/iq80310reg.h>
    108 #include <evbarm/iq80310/iq80310var.h>
    109 #include <evbarm/iq80310/obiovar.h>
    110 
    111 #include "opt_ipkdb.h"
    112 
    113 /*
    114  * Address to call from cpu_reset() to reset the machine.
    115  * This is machine architecture dependant as it varies depending
    116  * on where the ROM appears when you turn the MMU off.
    117  */
    118 
    119 u_int cpu_reset_address = 0;
    120 
    121 /* Define various stack sizes in pages */
    122 #define IRQ_STACK_SIZE	1
    123 #define ABT_STACK_SIZE	1
    124 #ifdef IPKDB
    125 #define UND_STACK_SIZE	2
    126 #else
    127 #define UND_STACK_SIZE	1
    128 #endif
    129 
    130 BootConfig bootconfig;		/* Boot config storage */
    131 char *boot_args = NULL;
    132 char *boot_file = NULL;
    133 
    134 vm_offset_t physical_start;
    135 vm_offset_t physical_freestart;
    136 vm_offset_t physical_freeend;
    137 vm_offset_t physical_end;
    138 u_int free_pages;
    139 vm_offset_t pagetables_start;
    140 int physmem = 0;
    141 
    142 /*int debug_flags;*/
    143 #ifndef PMAP_STATIC_L1S
    144 int max_processes = 64;			/* Default number */
    145 #endif	/* !PMAP_STATIC_L1S */
    146 
    147 /* Physical and virtual addresses for some global pages */
    148 pv_addr_t systempage;
    149 pv_addr_t irqstack;
    150 pv_addr_t undstack;
    151 pv_addr_t abtstack;
    152 pv_addr_t kernelstack;
    153 pv_addr_t minidataclean;
    154 
    155 vm_offset_t msgbufphys;
    156 
    157 extern u_int data_abort_handler_address;
    158 extern u_int prefetch_abort_handler_address;
    159 extern u_int undefined_handler_address;
    160 
    161 #ifdef PMAP_DEBUG
    162 extern int pmap_debug_level;
    163 #endif
    164 
    165 #define KERNEL_PT_SYS		0	/* Page table for mapping proc0 zero page */
    166 #define KERNEL_PT_KERNEL	1	/* Page table for mapping kernel */
    167 #define	KERNEL_PT_IOPXS		2	/* Page table for mapping i80312 */
    168 #define KERNEL_PT_VMDATA	3	/* Page tables for mapping kernel VM */
    169 #define	KERNEL_PT_VMDATA_NUM	(KERNEL_VM_SIZE >> (PDSHIFT + 2))
    170 #define NUM_KERNEL_PTS		(KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
    171 
    172 pt_entry_t kernel_pt_table[NUM_KERNEL_PTS];
    173 
    174 struct user *proc0paddr;
    175 
    176 /* Prototypes */
    177 
    178 void	consinit(void);
    179 
    180 #include "com.h"
    181 #if NCOM > 0
    182 #include <dev/ic/comreg.h>
    183 #include <dev/ic/comvar.h>
    184 #endif
    185 
    186 /*
    187  * Define the default console speed for the board.  This is generally
    188  * what the firmware provided with the board defaults to.
    189  */
    190 #ifndef CONSPEED
    191 #if defined(IOP310_TEAMASA_NPWR)
    192 #define CONSPEED B19200
    193 #else /* Default to stock IQ80310 */
    194 #define CONSPEED B115200
    195 #endif /* list of IQ80310-based designs */
    196 #endif /* ! CONSPEED */
    197 
    198 #ifndef CONUNIT
    199 #define	CONUNIT	0
    200 #endif
    201 
    202 #ifndef CONMODE
    203 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
    204 #endif
    205 
    206 int comcnspeed = CONSPEED;
    207 int comcnmode = CONMODE;
    208 int comcnunit = CONUNIT;
    209 
    210 /*
    211  * void cpu_reboot(int howto, char *bootstr)
    212  *
    213  * Reboots the system
    214  *
    215  * Deal with any syncing, unmounting, dumping and shutdown hooks,
    216  * then reset the CPU.
    217  */
    218 void
    219 cpu_reboot(int howto, char *bootstr)
    220 {
    221 #ifdef DIAGNOSTIC
    222 	/* info */
    223 	printf("boot: howto=%08x curproc=%p\n", howto, curproc);
    224 #endif
    225 
    226 	/*
    227 	 * If we are still cold then hit the air brakes
    228 	 * and crash to earth fast
    229 	 */
    230 	if (cold) {
    231 		doshutdownhooks();
    232 		printf("The operating system has halted.\n");
    233 		printf("Please press any key to reboot.\n\n");
    234 		cngetc();
    235 		printf("rebooting...\n");
    236 		cpu_reset();
    237 		/*NOTREACHED*/
    238 	}
    239 
    240 	/* Disable console buffering */
    241 
    242 	/*
    243 	 * If RB_NOSYNC was not specified sync the discs.
    244 	 * Note: Unless cold is set to 1 here, syslogd will die during the
    245 	 * unmount.  It looks like syslogd is getting woken up only to find
    246 	 * that it cannot page part of the binary in as the filesystem has
    247 	 * been unmounted.
    248 	 */
    249 	if (!(howto & RB_NOSYNC))
    250 		bootsync();
    251 
    252 	/* Say NO to interrupts */
    253 	splhigh();
    254 
    255 	/* Do a dump if requested. */
    256 	if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
    257 		dumpsys();
    258 
    259 	/* Run any shutdown hooks */
    260 	doshutdownhooks();
    261 
    262 	/* Make sure IRQ's are disabled */
    263 	IRQdisable;
    264 
    265 	if (howto & RB_HALT) {
    266 		printf("The operating system has halted.\n");
    267 		printf("Please press any key to reboot.\n\n");
    268 		cngetc();
    269 	}
    270 
    271 	printf("rebooting...\n");
    272 	cpu_reset();
    273 	/*NOTREACHED*/
    274 }
    275 
    276 /*
    277  * Mapping table for core kernel memory. This memory is mapped at init
    278  * time with section mappings.
    279  */
    280 struct l1_sec_map {
    281 	vaddr_t	va;
    282 	vaddr_t	pa;
    283 	vsize_t	size;
    284 	int flags;
    285 } l1_sec_table[] = {
    286     /*
    287      * Map the on-board devices VA == PA so that we can access them
    288      * with the MMU on or off.
    289      */
    290     {
    291 	IQ80310_OBIO_BASE,
    292 	IQ80310_OBIO_BASE,
    293 	IQ80310_OBIO_SIZE,
    294 	0,
    295     },
    296 
    297     {
    298 	0,
    299 	0,
    300 	0,
    301 	0,
    302     }
    303 };
    304 
    305 /*
    306  * u_int initarm(...)
    307  *
    308  * Initial entry point on startup. This gets called before main() is
    309  * entered.
    310  * It should be responsible for setting up everything that must be
    311  * in place when main is called.
    312  * This includes
    313  *   Taking a copy of the boot configuration structure.
    314  *   Initialising the physical console so characters can be printed.
    315  *   Setting up page tables for the kernel
    316  *   Relocating the kernel to the bottom of physical memory
    317  */
    318 u_int
    319 initarm(void *arg)
    320 {
    321 	extern vaddr_t xscale_cache_clean_addr, xscale_minidata_clean_addr;
    322 	extern vsize_t xscale_minidata_clean_size;
    323 	int loop;
    324 	int loop1;
    325 	u_int l1pagetable;
    326 	u_int l2pagetable;
    327 	extern char page0[], page0_end[];
    328 	pv_addr_t kernel_l1pt;
    329 	pv_addr_t kernel_ptpt;
    330 	paddr_t memstart;
    331 	psize_t memsize;
    332 
    333 	/*
    334 	 * Clear out the 7-segment display.  Whee, the first visual
    335 	 * indication that we're running kernel code.
    336 	 */
    337 	iq80310_7seg(' ', ' ');
    338 
    339 	/*
    340 	 * Heads up ... Setup the CPU / MMU / TLB functions
    341 	 */
    342 	if (set_cpufuncs())
    343 		panic("cpu not recognized!");
    344 
    345 	/* Calibrate the delay loop. */
    346 	iq80310_calibrate_delay();
    347 
    348 	/*
    349 	 * Since we map the on-board devices VA==PA, and the kernel
    350 	 * is running VA==PA, it's possible for us to initialize
    351 	 * the console now.
    352 	 */
    353 	consinit();
    354 
    355 	/* Talk to the user */
    356 	printf("\nNetBSD/evbarm (IQ80310) booting ...\n");
    357 
    358 	/*
    359 	 * Reset the secondary PCI bus.  RedBoot doesn't stop devices
    360 	 * on the PCI bus before handing us control, so we have to
    361 	 * do this.
    362 	 *
    363 	 * XXX This is arguably a bug in RedBoot, and doing this reset
    364 	 * XXX could be problematic in the future if we encounter an
    365 	 * XXX application where the PPB in the i80312 is used as a
    366 	 * XXX PPB.
    367 	 */
    368 	{
    369 		uint32_t reg;
    370 
    371 		printf("Resetting secondary PCI bus...\n");
    372 		reg = bus_space_read_4(&obio_bs_tag,
    373 		    I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL);
    374 		bus_space_write_4(&obio_bs_tag,
    375 		    I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL,
    376 		    reg | PPB_BC_SECONDARY_RESET);
    377 		delay(10 * 1000);	/* 10ms enough? */
    378 		bus_space_write_4(&obio_bs_tag,
    379 		    I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL,
    380 		    reg);
    381 	}
    382 
    383 	/*
    384 	 * Okay, RedBoot has provided us with the following memory map:
    385 	 *
    386 	 * Physical Address Range     Description
    387 	 * -----------------------    ----------------------------------
    388 	 * 0x00000000 - 0x00000fff    flash Memory
    389 	 * 0x00001000 - 0x00001fff    80312 Internal Registers
    390 	 * 0x00002000 - 0x007fffff    flash Memory
    391 	 * 0x00800000 - 0x7fffffff    PCI ATU Outbound Direct Window
    392 	 * 0x80000000 - 0x83ffffff    Primary PCI 32-bit Memory
    393 	 * 0x84000000 - 0x87ffffff    Primary PCI 64-bit Memory
    394 	 * 0x88000000 - 0x8bffffff    Secondary PCI 32-bit Memory
    395 	 * 0x8c000000 - 0x8fffffff    Secondary PCI 64-bit Memory
    396 	 * 0x90000000 - 0x9000ffff    Primary PCI IO Space
    397 	 * 0x90010000 - 0x9001ffff    Secondary PCI IO Space
    398 	 * 0x90020000 - 0x9fffffff    Unused
    399 	 * 0xa0000000 - 0xbfffffff    SDRAM
    400 	 * 0xc0000000 - 0xefffffff    Unused
    401 	 * 0xf0000000 - 0xffffffff    80200 Internal Registers
    402 	 *
    403 	 *
    404 	 * Virtual Address Range    C B  Description
    405 	 * -----------------------  - -  ----------------------------------
    406 	 * 0x00000000 - 0x00000fff  Y Y  SDRAM
    407 	 * 0x00001000 - 0x00001fff  N N  80312 Internal Registers
    408 	 * 0x00002000 - 0x007fffff  Y N  flash Memory
    409 	 * 0x00800000 - 0x7fffffff  N N  PCI ATU Outbound Direct Window
    410 	 * 0x80000000 - 0x83ffffff  N N  Primary PCI 32-bit Memory
    411 	 * 0x84000000 - 0x87ffffff  N N  Primary PCI 64-bit Memory
    412 	 * 0x88000000 - 0x8bffffff  N N  Secondary PCI 32-bit Memory
    413 	 * 0x8c000000 - 0x8fffffff  N N  Secondary PCI 64-bit Memory
    414 	 * 0x90000000 - 0x9000ffff  N N  Primary PCI IO Space
    415 	 * 0x90010000 - 0x9001ffff  N N  Secondary PCI IO Space
    416 	 * 0xa0000000 - 0xa0000fff  Y N  flash
    417 	 * 0xa0001000 - 0xbfffffff  Y Y  SDRAM
    418 	 * 0xc0000000 - 0xcfffffff  Y Y  Cache Flush Region
    419 	 * 0xf0000000 - 0xffffffff  N N  80200 Internal Registers
    420 	 *
    421 	 * The first level page table is at 0xa0004000.  There are also
    422 	 * 2 second-level tables at 0xa0008000 and 0xa0008400.
    423 	 *
    424 	 * This corresponds roughly to the physical memory map, i.e.
    425 	 * we are quite nearly running VA==PA.
    426 	 */
    427 
    428 	/*
    429 	 * Examine the boot args string for options we need to know about
    430 	 * now.
    431 	 */
    432 #if 0
    433 	process_kernel_args((char *)nwbootinfo.bt_args);
    434 #endif
    435 
    436 	/*
    437 	 * Fetch the SDRAM start/size from the i80312 SDRAM configration
    438 	 * registers.
    439 	 */
    440 	i80312_sdram_bounds(&obio_bs_tag, I80312_PMMR_BASE + I80312_MEM_BASE,
    441 	    &memstart, &memsize);
    442 
    443 	printf("initarm: Configuring system ...\n");
    444 
    445 	/* Fake bootconfig structure for the benefit of pmap.c */
    446 	/* XXX must make the memory description h/w independant */
    447 	bootconfig.dramblocks = 1;
    448 	bootconfig.dram[0].address = memstart;
    449 	bootconfig.dram[0].pages = memsize / NBPG;
    450 
    451 	/*
    452 	 * Set up the variables that define the availablilty of
    453 	 * physical memory.  For now, we're going to set
    454 	 * physical_freestart to 0xa0200000 (where the kernel
    455 	 * was loaded), and allocate the memory we need downwards.
    456 	 * If we get too close to the page tables that RedBoot
    457 	 * set up, we will panic.  We will update physical_freestart
    458 	 * and physical_freeend later to reflect what pmap_bootstrap()
    459 	 * wants to see.
    460 	 *
    461 	 * XXX pmap_bootstrap() needs an enema.
    462 	 */
    463 	physical_start = bootconfig.dram[0].address;
    464 	physical_end = physical_start + (bootconfig.dram[0].pages * NBPG);
    465 
    466 	physical_freestart = 0xa0009000UL;
    467 	physical_freeend = 0xa0200000UL;
    468 
    469 	physmem = (physical_end - physical_start) / NBPG;
    470 
    471 	/* Tell the user about the memory */
    472 	printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem,
    473 	    physical_start, physical_end - 1);
    474 
    475 	/*
    476 	 * Okay, the kernel starts 2MB in from the bottom of physical
    477 	 * memory.  We are going to allocate our bootstrap pages downwards
    478 	 * from there.
    479 	 *
    480 	 * We need to allocate some fixed page tables to get the kernel
    481 	 * going.  We allocate one page directory and a number of page
    482 	 * tables and store the physical addresses in the kernel_pt_table
    483 	 * array.
    484 	 *
    485 	 * The kernel page directory must be on a 16K boundary.  The page
    486 	 * tables must be on 4K bounaries.  What we do is allocate the
    487 	 * page directory on the first 16K boundary that we encounter, and
    488 	 * the page tables on 4K boundaries otherwise.  Since we allocate
    489 	 * at least 3 L2 page tables, we are guaranteed to encounter at
    490 	 * least one 16K aligned region.
    491 	 */
    492 
    493 #ifdef VERBOSE_INIT_ARM
    494 	printf("Allocating page tables\n");
    495 #endif
    496 
    497 	free_pages = (physical_freeend - physical_freestart) / NBPG;
    498 
    499 #ifdef VERBOSE_INIT_ARM
    500 	printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n",
    501 	       physical_freestart, free_pages, free_pages);
    502 #endif
    503 
    504 	/* Define a macro to simplify memory allocation */
    505 #define	valloc_pages(var, np)				\
    506 	alloc_pages((var).pv_pa, (np));			\
    507 	(var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start;
    508 
    509 #define alloc_pages(var, np)				\
    510 	physical_freeend -= ((np) * NBPG);		\
    511 	if (physical_freeend < physical_freestart)	\
    512 		panic("initarm: out of memory");	\
    513 	(var) = physical_freeend;			\
    514 	free_pages -= (np);				\
    515 	memset((char *)(var), 0, ((np) * NBPG));
    516 
    517 	loop1 = 0;
    518 	kernel_l1pt.pv_pa = 0;
    519 	for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
    520 		/* Are we 16KB aligned for an L1 ? */
    521 		if (((physical_freeend - PD_SIZE) & (PD_SIZE - 1)) == 0
    522 		    && kernel_l1pt.pv_pa == 0) {
    523 			valloc_pages(kernel_l1pt, PD_SIZE / NBPG);
    524 		} else {
    525 			alloc_pages(kernel_pt_table[loop1], PT_SIZE / NBPG);
    526 			++loop1;
    527 		}
    528 	}
    529 
    530 	/* This should never be able to happen but better confirm that. */
    531 	if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (PD_SIZE-1)) != 0)
    532 		panic("initarm: Failed to align the kernel page directory\n");
    533 
    534 	/*
    535 	 * Allocate a page for the system page mapped to V0x00000000
    536 	 * This page will just contain the system vectors and can be
    537 	 * shared by all processes.
    538 	 */
    539 	alloc_pages(systempage.pv_pa, 1);
    540 
    541 	/* Allocate a page for the page table to map kernel page tables. */
    542 	valloc_pages(kernel_ptpt, PT_SIZE / NBPG);
    543 
    544 	/* Allocate stacks for all modes */
    545 	valloc_pages(irqstack, IRQ_STACK_SIZE);
    546 	valloc_pages(abtstack, ABT_STACK_SIZE);
    547 	valloc_pages(undstack, UND_STACK_SIZE);
    548 	valloc_pages(kernelstack, UPAGES);
    549 
    550 	/* Allocate enough pages for cleaning the Mini-Data cache. */
    551 	KASSERT(xscale_minidata_clean_size <= NBPG);
    552 	valloc_pages(minidataclean, 1);
    553 	xscale_minidata_clean_addr = minidataclean.pv_va;
    554 
    555 #ifdef VERBOSE_INIT_ARM
    556 	printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa,
    557 	    irqstack.pv_va);
    558 	printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa,
    559 	    abtstack.pv_va);
    560 	printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa,
    561 	    undstack.pv_va);
    562 	printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa,
    563 	    kernelstack.pv_va);
    564 #endif
    565 
    566 	/*
    567 	 * XXX Defer this to later so that we can reclaim the memory
    568 	 * XXX used by the RedBoot page tables.
    569 	 */
    570 	alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / NBPG);
    571 
    572 	/*
    573 	 * Ok we have allocated physical pages for the primary kernel
    574 	 * page tables
    575 	 */
    576 
    577 #ifdef VERBOSE_INIT_ARM
    578 	printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa);
    579 #endif
    580 
    581 	/*
    582 	 * Now we start consturction of the L1 page table
    583 	 * We start by mapping the L2 page tables into the L1.
    584 	 * This means that we can replace L1 mappings later on if necessary
    585 	 */
    586 	l1pagetable = kernel_l1pt.pv_pa;
    587 
    588 	/* Map the L2 pages tables in the L1 page table */
    589 	map_pagetable(l1pagetable, 0x00000000,
    590 	    kernel_pt_table[KERNEL_PT_SYS]);
    591 	map_pagetable(l1pagetable, KERNEL_BASE,
    592 	    kernel_pt_table[KERNEL_PT_KERNEL]);
    593 	map_pagetable(l1pagetable, IQ80310_IOPXS_VBASE,
    594 	    kernel_pt_table[KERNEL_PT_IOPXS]);
    595 	for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; ++loop)
    596 		map_pagetable(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
    597 		    kernel_pt_table[KERNEL_PT_VMDATA + loop]);
    598 	map_pagetable(l1pagetable, PROCESS_PAGE_TBLS_BASE,
    599 	    kernel_ptpt.pv_pa);
    600 
    601 #ifdef VERBOSE_INIT_ARM
    602 	printf("Mapping kernel\n");
    603 #endif
    604 
    605 	/* Now we fill in the L2 pagetable for the kernel static code/data */
    606 	l2pagetable = kernel_pt_table[KERNEL_PT_KERNEL];
    607 
    608 	{
    609 		extern char etext[], _end[];
    610 		size_t textsize = (uintptr_t) etext - KERNEL_TEXT_BASE;
    611 		size_t totalsize = (uintptr_t) _end - KERNEL_TEXT_BASE;
    612 		u_int logical;
    613 
    614 		textsize = (textsize + PGOFSET) & ~PGOFSET;
    615 		totalsize = (totalsize + PGOFSET) & ~PGOFSET;
    616 
    617 		logical = 0x00200000;	/* offset of kernel in RAM */
    618 
    619 		/*
    620 		 * This maps the kernel text/data/bss VA==PA.
    621 		 */
    622 		logical += map_chunk(l1pagetable, l2pagetable,
    623 		    KERNEL_BASE + logical,
    624 		    physical_start + logical, textsize,
    625 		    AP_KRW, PT_CACHEABLE);
    626 		logical += map_chunk(l1pagetable, l2pagetable,
    627 		    KERNEL_BASE + logical,
    628 		    physical_start + logical, totalsize - textsize,
    629 		    AP_KRW, PT_CACHEABLE);
    630 
    631 #if 0 /* XXX No symbols yet. */
    632 		logical += map_chunk(l1pagetable, l2pagetable,
    633 		    KERNEL_BASE + logical,
    634 		    physical_start + logical, kernexec->a_syms + sizeof(int)
    635 		    + *(u_int *)((int)end + kernexec->a_syms + sizeof(int)),
    636 		    AP_KRW, PT_CACHEABLE);
    637 #endif
    638 	}
    639 
    640 #ifdef VERBOSE_INIT_ARM
    641 	printf("Constructing L2 page tables\n");
    642 #endif
    643 
    644 	/* Map the stack pages */
    645 	map_chunk(0, l2pagetable, irqstack.pv_va, irqstack.pv_pa,
    646 	    IRQ_STACK_SIZE * NBPG, AP_KRW, PT_CACHEABLE);
    647 	map_chunk(0, l2pagetable, abtstack.pv_va, abtstack.pv_pa,
    648 	    ABT_STACK_SIZE * NBPG, AP_KRW, PT_CACHEABLE);
    649 	map_chunk(0, l2pagetable, undstack.pv_va, undstack.pv_pa,
    650 	    UND_STACK_SIZE * NBPG, AP_KRW, PT_CACHEABLE);
    651 	map_chunk(0, l2pagetable, kernelstack.pv_va, kernelstack.pv_pa,
    652 	    UPAGES * NBPG, AP_KRW, PT_CACHEABLE);
    653 	map_chunk(0, l2pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
    654 	    PD_SIZE, AP_KRW, 0);
    655 
    656 	/* Map the Mini-Data cache clean area. */
    657 	map_chunk(0, l2pagetable, minidataclean.pv_va, minidataclean.pv_pa,
    658 	    NBPG, AP_KRW, PT_CACHEABLE);
    659 
    660 	/* Map the page table that maps the kernel pages */
    661 	map_entry_nc(l2pagetable, kernel_ptpt.pv_pa, kernel_ptpt.pv_pa);
    662 
    663 	/*
    664 	 * Map entries in the page table used to map PTE's
    665 	 * Basically every kernel page table gets mapped here
    666 	 */
    667 	/* The -2 is slightly bogus, it should be -log2(sizeof(pt_entry_t)) */
    668 	l2pagetable = kernel_ptpt.pv_pa;
    669 	map_entry_nc(l2pagetable, (KERNEL_BASE >> (PGSHIFT-2)),
    670 	    kernel_pt_table[KERNEL_PT_KERNEL]);
    671 	map_entry_nc(l2pagetable, (PROCESS_PAGE_TBLS_BASE >> (PGSHIFT-2)),
    672 	    kernel_ptpt.pv_pa);
    673 	map_entry_nc(l2pagetable, (0x00000000 >> (PGSHIFT-2)),
    674 	    kernel_pt_table[KERNEL_PT_SYS]);
    675 	for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; ++loop)
    676 		map_entry_nc(l2pagetable, ((KERNEL_VM_BASE +
    677 		    (loop * 0x00400000)) >> (PGSHIFT-2)),
    678 		    kernel_pt_table[KERNEL_PT_VMDATA + loop]);
    679 
    680 	/*
    681 	 * Map the system page in the kernel page table for the bottom 1Meg
    682 	 * of the virtual memory map.
    683 	 */
    684 	l2pagetable = kernel_pt_table[KERNEL_PT_SYS];
    685 	map_entry(l2pagetable, 0x00000000, systempage.pv_pa);
    686 
    687 	/*
    688 	 * Map devices we can map w/ section mappings.
    689 	 */
    690 	loop = 0;
    691 	while (l1_sec_table[loop].size) {
    692 		vm_size_t sz;
    693 
    694 #ifdef VERBOSE_INIT_ARM
    695 		printf("%08lx -> %08lx @ %08lx\n", l1_sec_table[loop].pa,
    696 		    l1_sec_table[loop].pa + l1_sec_table[loop].size - 1,
    697 		    l1_sec_table[loop].va);
    698 #endif
    699 		for (sz = 0; sz < l1_sec_table[loop].size; sz += L1_SEC_SIZE)
    700 			map_section(l1pagetable, l1_sec_table[loop].va + sz,
    701 			    l1_sec_table[loop].pa + sz,
    702 			    l1_sec_table[loop].flags);
    703 		++loop;
    704 	}
    705 
    706 	/*
    707 	 * Map the PCI I/O spaces and i80312 registers.  These are too
    708 	 * small to be mapped w/ section mappings.
    709 	 */
    710 	l2pagetable = kernel_pt_table[KERNEL_PT_IOPXS];
    711 #ifdef VERBOSE_INIT_ARM
    712 	printf("Mapping PIOW 0x%08lx -> 0x%08lx @ 0x%08lx\n",
    713 	    I80312_PCI_XLATE_PIOW_BASE,
    714 	    I80312_PCI_XLATE_PIOW_BASE + I80312_PCI_XLATE_IOSIZE - 1,
    715 	    IQ80310_PIOW_VBASE);
    716 #endif
    717 	map_chunk(0, l2pagetable, IQ80310_PIOW_VBASE,
    718 	    I80312_PCI_XLATE_PIOW_BASE, I80312_PCI_XLATE_IOSIZE, AP_KRW, 0);
    719 
    720 #ifdef VERBOSE_INIT_ARM
    721 	printf("Mapping SIOW 0x%08lx -> 0x%08lx @ 0x%08lx\n",
    722 	    I80312_PCI_XLATE_SIOW_BASE,
    723 	    I80312_PCI_XLATE_SIOW_BASE + I80312_PCI_XLATE_IOSIZE - 1,
    724 	    IQ80310_SIOW_VBASE);
    725 #endif
    726 	map_chunk(0, l2pagetable, IQ80310_SIOW_VBASE,
    727 	    I80312_PCI_XLATE_SIOW_BASE, I80312_PCI_XLATE_IOSIZE, AP_KRW, 0);
    728 
    729 #ifdef VERBOSE_INIT_ARM
    730 	printf("Mapping 80312 0x%08lx -> 0x%08lx @ 0x%08lx\n",
    731 	    I80312_PMMR_BASE,
    732 	    I80312_PMMR_BASE + I80312_PMMR_SIZE - 1,
    733 	    IQ80310_80312_VBASE);
    734 #endif
    735 	map_chunk(0, l2pagetable, IQ80310_80312_VBASE,
    736 	    I80312_PMMR_BASE, I80312_PMMR_SIZE, AP_KRW, 0);
    737 
    738 	/*
    739 	 * Give the XScale global cache clean code an appropriately
    740 	 * sized chunk of unmapped VA space starting at 0xff000000
    741 	 * (our device mappings end before this address).
    742 	 */
    743 	xscale_cache_clean_addr = 0xff000000U;
    744 
    745 	/*
    746 	 * Now we have the real page tables in place so we can switch to them.
    747 	 * Once this is done we will be running with the REAL kernel page
    748 	 * tables.
    749 	 */
    750 
    751 	/*
    752 	 * Update the physical_freestart/physical_freeend/free_pages
    753 	 * variables.
    754 	 */
    755 	{
    756 		extern char _end[];
    757 
    758 		physical_freestart = (((uintptr_t) _end) + PGOFSET) & ~PGOFSET;
    759 		physical_freeend = physical_end;
    760 		free_pages = (physical_freeend - physical_freestart) / NBPG;
    761 	}
    762 
    763 	/* Switch tables */
    764 #ifdef VERBOSE_INIT_ARM
    765 	printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
    766 	       physical_freestart, free_pages, free_pages);
    767 	printf("switching to new L1 page table  @%#lx...", kernel_l1pt.pv_pa);
    768 #endif
    769 	setttb(kernel_l1pt.pv_pa);
    770 
    771 #ifdef VERBOSE_INIT_ARM
    772 	printf("done!\n");
    773 #endif
    774 
    775 #ifdef VERBOSE_INIT_ARM
    776 	printf("bootstrap done.\n");
    777 #endif
    778 
    779 	/* Right, set up the vectors at the bottom of page 0 */
    780 	memcpy((char *)0x00000000, page0, page0_end - page0);
    781 
    782 	/* We have modified a text page so sync the icache */
    783 	cpu_icache_sync_all();
    784 
    785 	/*
    786 	 * Pages were allocated during the secondary bootstrap for the
    787 	 * stacks for different CPU modes.
    788 	 * We must now set the r13 registers in the different CPU modes to
    789 	 * point to these stacks.
    790 	 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
    791 	 * of the stack memory.
    792 	 */
    793 	printf("init subsystems: stacks ");
    794 
    795 	set_stackptr(PSR_IRQ32_MODE, irqstack.pv_va + IRQ_STACK_SIZE * NBPG);
    796 	set_stackptr(PSR_ABT32_MODE, abtstack.pv_va + ABT_STACK_SIZE * NBPG);
    797 	set_stackptr(PSR_UND32_MODE, undstack.pv_va + UND_STACK_SIZE * NBPG);
    798 
    799 	/*
    800 	 * Well we should set a data abort handler.
    801 	 * Once things get going this will change as we will need a proper
    802 	 * handler.
    803 	 * Until then we will use a handler that just panics but tells us
    804 	 * why.
    805 	 * Initialisation of the vectors will just panic on a data abort.
    806 	 * This just fills in a slighly better one.
    807 	 */
    808 	printf("vectors ");
    809 	data_abort_handler_address = (u_int)data_abort_handler;
    810 	prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
    811 	undefined_handler_address = (u_int)undefinedinstruction_bounce;
    812 
    813 	/* At last !
    814 	 * We now have the kernel in physical memory from the bottom upwards.
    815 	 * Kernel page tables are physically above this.
    816 	 * The kernel is mapped to KERNEL_TEXT_BASE
    817 	 * The kernel data PTs will handle the mapping of 0xf1000000-0xf3ffffff
    818 	 * The page tables are mapped to 0xefc00000
    819 	 */
    820 
    821 	/* Initialise the undefined instruction handlers */
    822 	printf("undefined ");
    823 	undefined_init();
    824 
    825 	/* Boot strap pmap telling it where the kernel page table is */
    826 	printf("pmap ");
    827 	pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, kernel_ptpt);
    828 
    829 	/* Setup the IRQ system */
    830 	printf("irq ");
    831 	iq80310_intr_init();
    832 	printf("done.\n");
    833 
    834 #ifdef IPKDB
    835 	/* Initialise ipkdb */
    836 	ipkdb_init();
    837 	if (boothowto & RB_KDB)
    838 		ipkdb_connect(0);
    839 #endif
    840 
    841 #ifdef DDB
    842 	db_machine_init();
    843 
    844 	/* Firmware doesn't load symbols. */
    845 	ddb_init(0, NULL, NULL);
    846 
    847 	if (boothowto & RB_KDB)
    848 		Debugger();
    849 #endif
    850 
    851 	/* We return the new stack pointer address */
    852 	return(kernelstack.pv_va + USPACE_SVC_STACK_TOP);
    853 }
    854 
    855 #if 0
    856 void
    857 process_kernel_args(char *args)
    858 {
    859 	static char bootargs[MAX_BOOT_STRING + 1];
    860 
    861 	boothowto = 0;
    862 
    863 	/* Make a local copy of the bootargs */
    864 	strncpy(bootargs, args, MAX_BOOT_STRING);
    865 
    866 	args = bootargs;
    867 	boot_file = bootargs;
    868 
    869 	/* Skip the kernel image filename */
    870 	while (*args != ' ' && *args != 0)
    871 		++args;
    872 
    873 	if (*args != 0)
    874 		*args++ = 0;
    875 
    876 	while (*args == ' ')
    877 		++args;
    878 
    879 	boot_args = args;
    880 
    881 	printf("bootfile: %s\n", boot_file);
    882 	printf("bootargs: %s\n", boot_args);
    883 
    884 	parse_mi_bootargs(boot_args);
    885 }
    886 #endif
    887 
    888 void
    889 consinit(void)
    890 {
    891 	static const bus_addr_t comcnaddrs[] = {
    892 		IQ80310_UART2,		/* com0 (J9) */
    893 		IQ80310_UART1,		/* com1 (J10) */
    894 	};
    895 	static int consinit_called;
    896 
    897 	if (consinit_called != 0)
    898 		return;
    899 
    900 	consinit_called = 1;
    901 
    902 #if NCOM > 0
    903 	if (comcnattach(&obio_bs_tag, comcnaddrs[comcnunit], comcnspeed,
    904 	    COM_FREQ, comcnmode))
    905 		panic("can't init serial console @%lx", comcnaddrs[comcnunit]);
    906 #else
    907 	panic("serial console @%lx not configured", comcnaddrs[comcnunit]);
    908 #endif
    909 }
    910