iq80310_machdep.c revision 1.27
1 /* $NetBSD: iq80310_machdep.c,v 1.27 2002/02/21 21:58:02 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 2001, 2002 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 /* 39 * Copyright (c) 1997,1998 Mark Brinicombe. 40 * Copyright (c) 1997,1998 Causality Limited. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by Mark Brinicombe 54 * for the NetBSD Project. 55 * 4. The name of the company nor the name of the author may be used to 56 * endorse or promote products derived from this software without specific 57 * prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 60 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 61 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 62 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 63 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 64 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 65 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 66 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 68 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 69 * SUCH DAMAGE. 70 * 71 * Machine dependant functions for kernel setup for Intel IQ80310 evaluation 72 * boards using RedBoot firmware. 73 */ 74 75 #include "opt_ddb.h" 76 #include "opt_pmap_debug.h" 77 78 #include <sys/param.h> 79 #include <sys/device.h> 80 #include <sys/systm.h> 81 #include <sys/kernel.h> 82 #include <sys/exec.h> 83 #include <sys/proc.h> 84 #include <sys/msgbuf.h> 85 #include <sys/reboot.h> 86 #include <sys/termios.h> 87 88 #include <dev/cons.h> 89 90 #include <machine/db_machdep.h> 91 #include <ddb/db_sym.h> 92 #include <ddb/db_extern.h> 93 94 #include <machine/bootconfig.h> 95 #include <machine/bus.h> 96 #include <machine/cpu.h> 97 #include <machine/frame.h> 98 #include <arm/undefined.h> 99 100 #include <arm/arm32/machdep.h> 101 102 #include <arm/xscale/i80312reg.h> 103 #include <arm/xscale/i80312var.h> 104 105 #include <dev/pci/ppbreg.h> 106 107 #include <evbarm/iq80310/iq80310reg.h> 108 #include <evbarm/iq80310/iq80310var.h> 109 #include <evbarm/iq80310/obiovar.h> 110 111 #include "opt_ipkdb.h" 112 113 /* 114 * Address to call from cpu_reset() to reset the machine. 115 * This is machine architecture dependant as it varies depending 116 * on where the ROM appears when you turn the MMU off. 117 */ 118 119 u_int cpu_reset_address = 0; 120 121 /* Define various stack sizes in pages */ 122 #define IRQ_STACK_SIZE 1 123 #define ABT_STACK_SIZE 1 124 #ifdef IPKDB 125 #define UND_STACK_SIZE 2 126 #else 127 #define UND_STACK_SIZE 1 128 #endif 129 130 BootConfig bootconfig; /* Boot config storage */ 131 char *boot_args = NULL; 132 char *boot_file = NULL; 133 134 vm_offset_t physical_start; 135 vm_offset_t physical_freestart; 136 vm_offset_t physical_freeend; 137 vm_offset_t physical_end; 138 u_int free_pages; 139 vm_offset_t pagetables_start; 140 int physmem = 0; 141 142 /*int debug_flags;*/ 143 #ifndef PMAP_STATIC_L1S 144 int max_processes = 64; /* Default number */ 145 #endif /* !PMAP_STATIC_L1S */ 146 147 /* Physical and virtual addresses for some global pages */ 148 pv_addr_t systempage; 149 pv_addr_t irqstack; 150 pv_addr_t undstack; 151 pv_addr_t abtstack; 152 pv_addr_t kernelstack; 153 pv_addr_t minidataclean; 154 155 vm_offset_t msgbufphys; 156 157 extern u_int data_abort_handler_address; 158 extern u_int prefetch_abort_handler_address; 159 extern u_int undefined_handler_address; 160 161 #ifdef PMAP_DEBUG 162 extern int pmap_debug_level; 163 #endif 164 165 #define KERNEL_PT_SYS 0 /* L2 table for mapping zero page */ 166 167 #define KERNEL_PT_KERNEL 1 /* L2 table for mapping kernel */ 168 #define KERNEL_PT_KERNEL_NUM 2 169 170 /* L2 table for mapping i80312 */ 171 #define KERNEL_PT_IOPXS (KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM) 172 173 /* L2 tables for mapping kernel VM */ 174 #define KERNEL_PT_VMDATA (KERNEL_PT_IOPXS + 1) 175 #define KERNEL_PT_VMDATA_NUM (KERNEL_VM_SIZE >> (PDSHIFT + 2)) 176 #define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM) 177 178 pv_addr_t kernel_pt_table[NUM_KERNEL_PTS]; 179 180 struct user *proc0paddr; 181 182 /* Prototypes */ 183 184 void consinit(void); 185 186 #include "com.h" 187 #if NCOM > 0 188 #include <dev/ic/comreg.h> 189 #include <dev/ic/comvar.h> 190 #endif 191 192 /* 193 * Define the default console speed for the board. This is generally 194 * what the firmware provided with the board defaults to. 195 */ 196 #ifndef CONSPEED 197 #if defined(IOP310_TEAMASA_NPWR) 198 #define CONSPEED B19200 199 #else /* Default to stock IQ80310 */ 200 #define CONSPEED B115200 201 #endif /* list of IQ80310-based designs */ 202 #endif /* ! CONSPEED */ 203 204 #ifndef CONUNIT 205 #define CONUNIT 0 206 #endif 207 208 #ifndef CONMODE 209 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 210 #endif 211 212 int comcnspeed = CONSPEED; 213 int comcnmode = CONMODE; 214 int comcnunit = CONUNIT; 215 216 /* 217 * void cpu_reboot(int howto, char *bootstr) 218 * 219 * Reboots the system 220 * 221 * Deal with any syncing, unmounting, dumping and shutdown hooks, 222 * then reset the CPU. 223 */ 224 void 225 cpu_reboot(int howto, char *bootstr) 226 { 227 #ifdef DIAGNOSTIC 228 /* info */ 229 printf("boot: howto=%08x curproc=%p\n", howto, curproc); 230 #endif 231 232 /* 233 * If we are still cold then hit the air brakes 234 * and crash to earth fast 235 */ 236 if (cold) { 237 doshutdownhooks(); 238 printf("The operating system has halted.\n"); 239 printf("Please press any key to reboot.\n\n"); 240 cngetc(); 241 printf("rebooting...\n"); 242 cpu_reset(); 243 /*NOTREACHED*/ 244 } 245 246 /* Disable console buffering */ 247 248 /* 249 * If RB_NOSYNC was not specified sync the discs. 250 * Note: Unless cold is set to 1 here, syslogd will die during the 251 * unmount. It looks like syslogd is getting woken up only to find 252 * that it cannot page part of the binary in as the filesystem has 253 * been unmounted. 254 */ 255 if (!(howto & RB_NOSYNC)) 256 bootsync(); 257 258 /* Say NO to interrupts */ 259 splhigh(); 260 261 /* Do a dump if requested. */ 262 if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP) 263 dumpsys(); 264 265 /* Run any shutdown hooks */ 266 doshutdownhooks(); 267 268 /* Make sure IRQ's are disabled */ 269 IRQdisable; 270 271 if (howto & RB_HALT) { 272 printf("The operating system has halted.\n"); 273 printf("Please press any key to reboot.\n\n"); 274 cngetc(); 275 } 276 277 printf("rebooting...\n"); 278 cpu_reset(); 279 /*NOTREACHED*/ 280 } 281 282 /* 283 * Mapping table for core kernel memory. This memory is mapped at init 284 * time with section mappings. 285 */ 286 struct l1_sec_map { 287 vaddr_t va; 288 vaddr_t pa; 289 vsize_t size; 290 vm_prot_t prot; 291 int cache; 292 } l1_sec_table[] = { 293 /* 294 * Map the on-board devices VA == PA so that we can access them 295 * with the MMU on or off. 296 */ 297 { 298 IQ80310_OBIO_BASE, 299 IQ80310_OBIO_BASE, 300 IQ80310_OBIO_SIZE, 301 VM_PROT_READ|VM_PROT_WRITE, 302 PTE_NOCACHE, 303 }, 304 305 { 306 0, 307 0, 308 0, 309 0, 310 0, 311 } 312 }; 313 314 /* 315 * u_int initarm(...) 316 * 317 * Initial entry point on startup. This gets called before main() is 318 * entered. 319 * It should be responsible for setting up everything that must be 320 * in place when main is called. 321 * This includes 322 * Taking a copy of the boot configuration structure. 323 * Initialising the physical console so characters can be printed. 324 * Setting up page tables for the kernel 325 * Relocating the kernel to the bottom of physical memory 326 */ 327 u_int 328 initarm(void *arg) 329 { 330 extern vaddr_t xscale_cache_clean_addr, xscale_minidata_clean_addr; 331 extern vsize_t xscale_minidata_clean_size; 332 int loop; 333 int loop1; 334 u_int l1pagetable; 335 u_int l2pagetable; 336 extern char page0[], page0_end[]; 337 pv_addr_t kernel_l1pt; 338 pv_addr_t kernel_ptpt; 339 paddr_t memstart; 340 psize_t memsize; 341 342 /* 343 * Clear out the 7-segment display. Whee, the first visual 344 * indication that we're running kernel code. 345 */ 346 iq80310_7seg(' ', ' '); 347 348 /* 349 * Heads up ... Setup the CPU / MMU / TLB functions 350 */ 351 if (set_cpufuncs()) 352 panic("cpu not recognized!"); 353 354 /* Calibrate the delay loop. */ 355 iq80310_calibrate_delay(); 356 357 /* 358 * Since we map the on-board devices VA==PA, and the kernel 359 * is running VA==PA, it's possible for us to initialize 360 * the console now. 361 */ 362 consinit(); 363 364 /* Talk to the user */ 365 printf("\nNetBSD/evbarm (IQ80310) booting ...\n"); 366 367 /* 368 * Reset the secondary PCI bus. RedBoot doesn't stop devices 369 * on the PCI bus before handing us control, so we have to 370 * do this. 371 * 372 * XXX This is arguably a bug in RedBoot, and doing this reset 373 * XXX could be problematic in the future if we encounter an 374 * XXX application where the PPB in the i80312 is used as a 375 * XXX PPB. 376 */ 377 { 378 uint32_t reg; 379 380 printf("Resetting secondary PCI bus...\n"); 381 reg = bus_space_read_4(&obio_bs_tag, 382 I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL); 383 bus_space_write_4(&obio_bs_tag, 384 I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL, 385 reg | PPB_BC_SECONDARY_RESET); 386 delay(10 * 1000); /* 10ms enough? */ 387 bus_space_write_4(&obio_bs_tag, 388 I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL, 389 reg); 390 } 391 392 /* 393 * Okay, RedBoot has provided us with the following memory map: 394 * 395 * Physical Address Range Description 396 * ----------------------- ---------------------------------- 397 * 0x00000000 - 0x00000fff flash Memory 398 * 0x00001000 - 0x00001fff 80312 Internal Registers 399 * 0x00002000 - 0x007fffff flash Memory 400 * 0x00800000 - 0x7fffffff PCI ATU Outbound Direct Window 401 * 0x80000000 - 0x83ffffff Primary PCI 32-bit Memory 402 * 0x84000000 - 0x87ffffff Primary PCI 64-bit Memory 403 * 0x88000000 - 0x8bffffff Secondary PCI 32-bit Memory 404 * 0x8c000000 - 0x8fffffff Secondary PCI 64-bit Memory 405 * 0x90000000 - 0x9000ffff Primary PCI IO Space 406 * 0x90010000 - 0x9001ffff Secondary PCI IO Space 407 * 0x90020000 - 0x9fffffff Unused 408 * 0xa0000000 - 0xbfffffff SDRAM 409 * 0xc0000000 - 0xefffffff Unused 410 * 0xf0000000 - 0xffffffff 80200 Internal Registers 411 * 412 * 413 * Virtual Address Range C B Description 414 * ----------------------- - - ---------------------------------- 415 * 0x00000000 - 0x00000fff Y Y SDRAM 416 * 0x00001000 - 0x00001fff N N 80312 Internal Registers 417 * 0x00002000 - 0x007fffff Y N flash Memory 418 * 0x00800000 - 0x7fffffff N N PCI ATU Outbound Direct Window 419 * 0x80000000 - 0x83ffffff N N Primary PCI 32-bit Memory 420 * 0x84000000 - 0x87ffffff N N Primary PCI 64-bit Memory 421 * 0x88000000 - 0x8bffffff N N Secondary PCI 32-bit Memory 422 * 0x8c000000 - 0x8fffffff N N Secondary PCI 64-bit Memory 423 * 0x90000000 - 0x9000ffff N N Primary PCI IO Space 424 * 0x90010000 - 0x9001ffff N N Secondary PCI IO Space 425 * 0xa0000000 - 0xa0000fff Y N flash 426 * 0xa0001000 - 0xbfffffff Y Y SDRAM 427 * 0xc0000000 - 0xcfffffff Y Y Cache Flush Region 428 * 0xf0000000 - 0xffffffff N N 80200 Internal Registers 429 * 430 * The first level page table is at 0xa0004000. There are also 431 * 2 second-level tables at 0xa0008000 and 0xa0008400. 432 * 433 * This corresponds roughly to the physical memory map, i.e. 434 * we are quite nearly running VA==PA. 435 */ 436 437 /* 438 * Examine the boot args string for options we need to know about 439 * now. 440 */ 441 #if 0 442 process_kernel_args((char *)nwbootinfo.bt_args); 443 #endif 444 445 /* 446 * Fetch the SDRAM start/size from the i80312 SDRAM configration 447 * registers. 448 */ 449 i80312_sdram_bounds(&obio_bs_tag, I80312_PMMR_BASE + I80312_MEM_BASE, 450 &memstart, &memsize); 451 452 printf("initarm: Configuring system ...\n"); 453 454 /* Fake bootconfig structure for the benefit of pmap.c */ 455 /* XXX must make the memory description h/w independant */ 456 bootconfig.dramblocks = 1; 457 bootconfig.dram[0].address = memstart; 458 bootconfig.dram[0].pages = memsize / NBPG; 459 460 /* 461 * Set up the variables that define the availablilty of 462 * physical memory. For now, we're going to set 463 * physical_freestart to 0xa0200000 (where the kernel 464 * was loaded), and allocate the memory we need downwards. 465 * If we get too close to the page tables that RedBoot 466 * set up, we will panic. We will update physical_freestart 467 * and physical_freeend later to reflect what pmap_bootstrap() 468 * wants to see. 469 * 470 * XXX pmap_bootstrap() needs an enema. 471 */ 472 physical_start = bootconfig.dram[0].address; 473 physical_end = physical_start + (bootconfig.dram[0].pages * NBPG); 474 475 physical_freestart = 0xa0009000UL; 476 physical_freeend = 0xa0200000UL; 477 478 physmem = (physical_end - physical_start) / NBPG; 479 480 /* Tell the user about the memory */ 481 printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem, 482 physical_start, physical_end - 1); 483 484 /* 485 * Okay, the kernel starts 2MB in from the bottom of physical 486 * memory. We are going to allocate our bootstrap pages downwards 487 * from there. 488 * 489 * We need to allocate some fixed page tables to get the kernel 490 * going. We allocate one page directory and a number of page 491 * tables and store the physical addresses in the kernel_pt_table 492 * array. 493 * 494 * The kernel page directory must be on a 16K boundary. The page 495 * tables must be on 4K bounaries. What we do is allocate the 496 * page directory on the first 16K boundary that we encounter, and 497 * the page tables on 4K boundaries otherwise. Since we allocate 498 * at least 3 L2 page tables, we are guaranteed to encounter at 499 * least one 16K aligned region. 500 */ 501 502 #ifdef VERBOSE_INIT_ARM 503 printf("Allocating page tables\n"); 504 #endif 505 506 free_pages = (physical_freeend - physical_freestart) / NBPG; 507 508 #ifdef VERBOSE_INIT_ARM 509 printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n", 510 physical_freestart, free_pages, free_pages); 511 #endif 512 513 /* Define a macro to simplify memory allocation */ 514 #define valloc_pages(var, np) \ 515 alloc_pages((var).pv_pa, (np)); \ 516 (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start; 517 518 #define alloc_pages(var, np) \ 519 physical_freeend -= ((np) * NBPG); \ 520 if (physical_freeend < physical_freestart) \ 521 panic("initarm: out of memory"); \ 522 (var) = physical_freeend; \ 523 free_pages -= (np); \ 524 memset((char *)(var), 0, ((np) * NBPG)); 525 526 loop1 = 0; 527 kernel_l1pt.pv_pa = 0; 528 for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) { 529 /* Are we 16KB aligned for an L1 ? */ 530 if (((physical_freeend - PD_SIZE) & (PD_SIZE - 1)) == 0 531 && kernel_l1pt.pv_pa == 0) { 532 valloc_pages(kernel_l1pt, PD_SIZE / NBPG); 533 } else { 534 alloc_pages(kernel_pt_table[loop1].pv_pa, 535 PT_SIZE / NBPG); 536 kernel_pt_table[loop1].pv_va = 537 kernel_pt_table[loop1].pv_pa; 538 ++loop1; 539 } 540 } 541 542 /* This should never be able to happen but better confirm that. */ 543 if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (PD_SIZE-1)) != 0) 544 panic("initarm: Failed to align the kernel page directory\n"); 545 546 /* 547 * Allocate a page for the system page mapped to V0x00000000 548 * This page will just contain the system vectors and can be 549 * shared by all processes. 550 */ 551 alloc_pages(systempage.pv_pa, 1); 552 553 /* Allocate a page for the page table to map kernel page tables. */ 554 valloc_pages(kernel_ptpt, PT_SIZE / NBPG); 555 556 /* Allocate stacks for all modes */ 557 valloc_pages(irqstack, IRQ_STACK_SIZE); 558 valloc_pages(abtstack, ABT_STACK_SIZE); 559 valloc_pages(undstack, UND_STACK_SIZE); 560 valloc_pages(kernelstack, UPAGES); 561 562 /* Allocate enough pages for cleaning the Mini-Data cache. */ 563 KASSERT(xscale_minidata_clean_size <= NBPG); 564 valloc_pages(minidataclean, 1); 565 xscale_minidata_clean_addr = minidataclean.pv_va; 566 567 #ifdef VERBOSE_INIT_ARM 568 printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa, 569 irqstack.pv_va); 570 printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa, 571 abtstack.pv_va); 572 printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa, 573 undstack.pv_va); 574 printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa, 575 kernelstack.pv_va); 576 #endif 577 578 /* 579 * XXX Defer this to later so that we can reclaim the memory 580 * XXX used by the RedBoot page tables. 581 */ 582 alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / NBPG); 583 584 /* 585 * Ok we have allocated physical pages for the primary kernel 586 * page tables 587 */ 588 589 #ifdef VERBOSE_INIT_ARM 590 printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa); 591 #endif 592 593 /* 594 * Now we start construction of the L1 page table 595 * We start by mapping the L2 page tables into the L1. 596 * This means that we can replace L1 mappings later on if necessary 597 */ 598 l1pagetable = kernel_l1pt.pv_pa; 599 600 /* Map the L2 pages tables in the L1 page table */ 601 pmap_link_l2pt(l1pagetable, 0x00000000, 602 &kernel_pt_table[KERNEL_PT_SYS]); 603 for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++) 604 pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000, 605 &kernel_pt_table[KERNEL_PT_KERNEL + loop]); 606 pmap_link_l2pt(l1pagetable, IQ80310_IOPXS_VBASE, 607 &kernel_pt_table[KERNEL_PT_IOPXS]); 608 for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++) 609 pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000, 610 &kernel_pt_table[KERNEL_PT_VMDATA + loop]); 611 pmap_link_l2pt(l1pagetable, PROCESS_PAGE_TBLS_BASE, &kernel_ptpt); 612 613 #ifdef VERBOSE_INIT_ARM 614 printf("Mapping kernel\n"); 615 #endif 616 617 /* Now we fill in the L2 pagetable for the kernel static code/data */ 618 l2pagetable = kernel_pt_table[KERNEL_PT_KERNEL].pv_va; 619 620 { 621 extern char etext[], _end[]; 622 size_t textsize = (uintptr_t) etext - KERNEL_TEXT_BASE; 623 size_t totalsize = (uintptr_t) _end - KERNEL_TEXT_BASE; 624 u_int logical; 625 626 textsize = (textsize + PGOFSET) & ~PGOFSET; 627 totalsize = (totalsize + PGOFSET) & ~PGOFSET; 628 629 logical = 0x00200000; /* offset of kernel in RAM */ 630 631 /* 632 * This maps the kernel text/data/bss VA==PA. 633 */ 634 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical, 635 physical_start + logical, textsize, 636 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 637 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical, 638 physical_start + logical, totalsize - textsize, 639 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 640 641 #if 0 /* XXX No symbols yet. */ 642 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical, 643 physical_start + logical, kernexec->a_syms + sizeof(int) 644 + *(u_int *)((int)end + kernexec->a_syms + sizeof(int)), 645 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 646 #endif 647 } 648 649 #ifdef VERBOSE_INIT_ARM 650 printf("Constructing L2 page tables\n"); 651 #endif 652 653 /* Map the stack pages */ 654 pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa, 655 IRQ_STACK_SIZE * NBPG, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 656 pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa, 657 ABT_STACK_SIZE * NBPG, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 658 pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa, 659 UND_STACK_SIZE * NBPG, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 660 pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa, 661 UPAGES * NBPG, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 662 663 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa, 664 PD_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE); 665 666 /* Map the Mini-Data cache clean area. */ 667 pmap_map_chunk(l1pagetable, minidataclean.pv_va, minidataclean.pv_pa, 668 NBPG, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 669 670 /* Map the page table that maps the kernel pages */ 671 pmap_map_entry(l2pagetable, kernel_ptpt.pv_pa, kernel_ptpt.pv_pa, 672 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE); 673 674 /* 675 * Map entries in the page table used to map PTE's 676 * Basically every kernel page table gets mapped here 677 */ 678 /* The -2 is slightly bogus, it should be -log2(sizeof(pt_entry_t)) */ 679 l2pagetable = kernel_ptpt.pv_pa; 680 for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++) 681 pmap_map_entry(l2pagetable, ((KERNEL_BASE + 682 (loop * 0x00400000)) >> (PGSHIFT-2)), 683 kernel_pt_table[KERNEL_PT_KERNEL + loop].pv_pa, 684 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE); 685 pmap_map_entry(l2pagetable, (PROCESS_PAGE_TBLS_BASE >> (PGSHIFT-2)), 686 kernel_ptpt.pv_pa, 687 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE); 688 pmap_map_entry(l2pagetable, (0x00000000 >> (PGSHIFT-2)), 689 kernel_pt_table[KERNEL_PT_SYS].pv_pa, 690 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE); 691 for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++) 692 pmap_map_entry(l2pagetable, ((KERNEL_VM_BASE + 693 (loop * 0x00400000)) >> (PGSHIFT-2)), 694 kernel_pt_table[KERNEL_PT_VMDATA + loop].pv_pa, 695 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE); 696 697 /* 698 * Map the system page in the kernel page table for the bottom 1Meg 699 * of the virtual memory map. 700 */ 701 l2pagetable = kernel_pt_table[KERNEL_PT_SYS].pv_va; 702 pmap_map_entry(l2pagetable, 0x00000000, systempage.pv_pa, 703 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 704 705 /* 706 * Map devices we can map w/ section mappings. 707 */ 708 loop = 0; 709 while (l1_sec_table[loop].size) { 710 vm_size_t sz; 711 712 #ifdef VERBOSE_INIT_ARM 713 printf("%08lx -> %08lx @ %08lx\n", l1_sec_table[loop].pa, 714 l1_sec_table[loop].pa + l1_sec_table[loop].size - 1, 715 l1_sec_table[loop].va); 716 #endif 717 for (sz = 0; sz < l1_sec_table[loop].size; sz += L1_SEC_SIZE) 718 pmap_map_section(l1pagetable, 719 l1_sec_table[loop].va + sz, 720 l1_sec_table[loop].pa + sz, 721 l1_sec_table[loop].prot, 722 l1_sec_table[loop].cache); 723 ++loop; 724 } 725 726 /* 727 * Map the PCI I/O spaces and i80312 registers. These are too 728 * small to be mapped w/ section mappings. 729 */ 730 l2pagetable = kernel_pt_table[KERNEL_PT_IOPXS].pv_va; 731 #ifdef VERBOSE_INIT_ARM 732 printf("Mapping PIOW 0x%08lx -> 0x%08lx @ 0x%08lx\n", 733 I80312_PCI_XLATE_PIOW_BASE, 734 I80312_PCI_XLATE_PIOW_BASE + I80312_PCI_XLATE_IOSIZE - 1, 735 IQ80310_PIOW_VBASE); 736 #endif 737 pmap_map_chunk(l1pagetable, IQ80310_PIOW_VBASE, 738 I80312_PCI_XLATE_PIOW_BASE, I80312_PCI_XLATE_IOSIZE, 739 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE); 740 741 #ifdef VERBOSE_INIT_ARM 742 printf("Mapping SIOW 0x%08lx -> 0x%08lx @ 0x%08lx\n", 743 I80312_PCI_XLATE_SIOW_BASE, 744 I80312_PCI_XLATE_SIOW_BASE + I80312_PCI_XLATE_IOSIZE - 1, 745 IQ80310_SIOW_VBASE); 746 #endif 747 pmap_map_chunk(l1pagetable, IQ80310_SIOW_VBASE, 748 I80312_PCI_XLATE_SIOW_BASE, I80312_PCI_XLATE_IOSIZE, 749 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE); 750 751 #ifdef VERBOSE_INIT_ARM 752 printf("Mapping 80312 0x%08lx -> 0x%08lx @ 0x%08lx\n", 753 I80312_PMMR_BASE, 754 I80312_PMMR_BASE + I80312_PMMR_SIZE - 1, 755 IQ80310_80312_VBASE); 756 #endif 757 pmap_map_chunk(l1pagetable, IQ80310_80312_VBASE, 758 I80312_PMMR_BASE, I80312_PMMR_SIZE, 759 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE); 760 761 /* 762 * Give the XScale global cache clean code an appropriately 763 * sized chunk of unmapped VA space starting at 0xff000000 764 * (our device mappings end before this address). 765 */ 766 xscale_cache_clean_addr = 0xff000000U; 767 768 /* 769 * Now we have the real page tables in place so we can switch to them. 770 * Once this is done we will be running with the REAL kernel page 771 * tables. 772 */ 773 774 /* 775 * Update the physical_freestart/physical_freeend/free_pages 776 * variables. 777 */ 778 { 779 extern char _end[]; 780 781 physical_freestart = (((uintptr_t) _end) + PGOFSET) & ~PGOFSET; 782 physical_freeend = physical_end; 783 free_pages = (physical_freeend - physical_freestart) / NBPG; 784 } 785 786 /* Switch tables */ 787 #ifdef VERBOSE_INIT_ARM 788 printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n", 789 physical_freestart, free_pages, free_pages); 790 printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa); 791 #endif 792 setttb(kernel_l1pt.pv_pa); 793 794 #ifdef VERBOSE_INIT_ARM 795 printf("done!\n"); 796 #endif 797 798 #ifdef VERBOSE_INIT_ARM 799 printf("bootstrap done.\n"); 800 #endif 801 802 /* Right, set up the vectors at the bottom of page 0 */ 803 memcpy((char *)0x00000000, page0, page0_end - page0); 804 805 /* We have modified a text page so sync the icache */ 806 cpu_icache_sync_all(); 807 808 /* 809 * Pages were allocated during the secondary bootstrap for the 810 * stacks for different CPU modes. 811 * We must now set the r13 registers in the different CPU modes to 812 * point to these stacks. 813 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 814 * of the stack memory. 815 */ 816 printf("init subsystems: stacks "); 817 818 set_stackptr(PSR_IRQ32_MODE, irqstack.pv_va + IRQ_STACK_SIZE * NBPG); 819 set_stackptr(PSR_ABT32_MODE, abtstack.pv_va + ABT_STACK_SIZE * NBPG); 820 set_stackptr(PSR_UND32_MODE, undstack.pv_va + UND_STACK_SIZE * NBPG); 821 822 /* 823 * Well we should set a data abort handler. 824 * Once things get going this will change as we will need a proper 825 * handler. 826 * Until then we will use a handler that just panics but tells us 827 * why. 828 * Initialisation of the vectors will just panic on a data abort. 829 * This just fills in a slighly better one. 830 */ 831 printf("vectors "); 832 data_abort_handler_address = (u_int)data_abort_handler; 833 prefetch_abort_handler_address = (u_int)prefetch_abort_handler; 834 undefined_handler_address = (u_int)undefinedinstruction_bounce; 835 836 /* At last ! 837 * We now have the kernel in physical memory from the bottom upwards. 838 * Kernel page tables are physically above this. 839 * The kernel is mapped to KERNEL_TEXT_BASE 840 * The kernel data PTs will handle the mapping of 0xf1000000-0xf3ffffff 841 * The page tables are mapped to 0xefc00000 842 */ 843 844 /* Initialise the undefined instruction handlers */ 845 printf("undefined "); 846 undefined_init(); 847 848 /* Boot strap pmap telling it where the kernel page table is */ 849 printf("pmap "); 850 pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, kernel_ptpt); 851 852 /* Setup the IRQ system */ 853 printf("irq "); 854 iq80310_intr_init(); 855 printf("done.\n"); 856 857 #ifdef IPKDB 858 /* Initialise ipkdb */ 859 ipkdb_init(); 860 if (boothowto & RB_KDB) 861 ipkdb_connect(0); 862 #endif 863 864 #ifdef DDB 865 db_machine_init(); 866 867 /* Firmware doesn't load symbols. */ 868 ddb_init(0, NULL, NULL); 869 870 if (boothowto & RB_KDB) 871 Debugger(); 872 #endif 873 874 /* We return the new stack pointer address */ 875 return(kernelstack.pv_va + USPACE_SVC_STACK_TOP); 876 } 877 878 #if 0 879 void 880 process_kernel_args(char *args) 881 { 882 static char bootargs[MAX_BOOT_STRING + 1]; 883 884 boothowto = 0; 885 886 /* Make a local copy of the bootargs */ 887 strncpy(bootargs, args, MAX_BOOT_STRING); 888 889 args = bootargs; 890 boot_file = bootargs; 891 892 /* Skip the kernel image filename */ 893 while (*args != ' ' && *args != 0) 894 ++args; 895 896 if (*args != 0) 897 *args++ = 0; 898 899 while (*args == ' ') 900 ++args; 901 902 boot_args = args; 903 904 printf("bootfile: %s\n", boot_file); 905 printf("bootargs: %s\n", boot_args); 906 907 parse_mi_bootargs(boot_args); 908 } 909 #endif 910 911 void 912 consinit(void) 913 { 914 static const bus_addr_t comcnaddrs[] = { 915 IQ80310_UART2, /* com0 (J9) */ 916 IQ80310_UART1, /* com1 (J10) */ 917 }; 918 static int consinit_called; 919 920 if (consinit_called != 0) 921 return; 922 923 consinit_called = 1; 924 925 #if NCOM > 0 926 if (comcnattach(&obio_bs_tag, comcnaddrs[comcnunit], comcnspeed, 927 COM_FREQ, comcnmode)) 928 panic("can't init serial console @%lx", comcnaddrs[comcnunit]); 929 #else 930 panic("serial console @%lx not configured", comcnaddrs[comcnunit]); 931 #endif 932 } 933
Indexes created Wed Oct 22 13:09:56 GMT 2025