iq80310_machdep.c revision 1.3 1 /* $NetBSD: iq80310_machdep.c,v 1.3 2001/11/08 03:28:53 thorpej Exp $ */
2
3 /*
4 * Copyright (c) 1997,1998 Mark Brinicombe.
5 * Copyright (c) 1997,1998 Causality Limited.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by Mark Brinicombe
19 * for the NetBSD Project.
20 * 4. The name of the company nor the name of the author may be used to
21 * endorse or promote products derived from this software without specific
22 * prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
25 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
26 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
27 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
28 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
29 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * SUCH DAMAGE.
35 *
36 * Machine dependant functions for kernel setup for Intel IQ80310 evaluation
37 * boards using RedBoot firmware.
38 */
39
40 #include "opt_ddb.h"
41 #include "opt_pmap_debug.h"
42
43 #include <sys/param.h>
44 #include <sys/device.h>
45 #include <sys/systm.h>
46 #include <sys/kernel.h>
47 #include <sys/exec.h>
48 #include <sys/proc.h>
49 #include <sys/msgbuf.h>
50 #include <sys/reboot.h>
51 #include <sys/termios.h>
52
53 #include <dev/cons.h>
54
55 #include <machine/db_machdep.h>
56 #include <ddb/db_sym.h>
57 #include <ddb/db_extern.h>
58
59 #include <machine/bootconfig.h>
60 #include <machine/bus.h>
61 #include <machine/cpu.h>
62 #include <machine/frame.h>
63 #include <machine/irqhandler.h>
64 #include <machine/pte.h>
65 #include <machine/undefined.h>
66
67 #include <arm/xscale/i80312reg.h>
68 #include <arm/xscale/i80312var.h>
69
70 #include <dev/pci/ppbreg.h>
71
72 #include <evbarm/iq80310/iq80310reg.h>
73 #include <evbarm/iq80310/iq80310var.h>
74 #include <evbarm/iq80310/obiovar.h>
75
76 #include "opt_ipkdb.h"
77
78 /*
79 * Address to call from cpu_reset() to reset the machine.
80 * This is machine architecture dependant as it varies depending
81 * on where the ROM appears when you turn the MMU off.
82 */
83
84 u_int cpu_reset_address = 0;
85
86 /* Define various stack sizes in pages */
87 #define IRQ_STACK_SIZE 1
88 #define ABT_STACK_SIZE 1
89 #ifdef IPKDB
90 #define UND_STACK_SIZE 2
91 #else
92 #define UND_STACK_SIZE 1
93 #endif
94
95 BootConfig bootconfig; /* Boot config storage */
96 static char bootargs[MAX_BOOT_STRING + 1];
97 char *boot_args = NULL;
98 char *boot_file = NULL;
99
100 vm_offset_t physical_start;
101 vm_offset_t physical_freestart;
102 vm_offset_t physical_freeend;
103 vm_offset_t physical_end;
104 u_int free_pages;
105 vm_offset_t pagetables_start;
106 int physmem = 0;
107
108 /*int debug_flags;*/
109 #ifndef PMAP_STATIC_L1S
110 int max_processes = 64; /* Default number */
111 #endif /* !PMAP_STATIC_L1S */
112
113 /* Physical and virtual addresses for some global pages */
114 pv_addr_t systempage;
115 pv_addr_t irqstack;
116 pv_addr_t undstack;
117 pv_addr_t abtstack;
118 pv_addr_t kernelstack;
119
120 vm_offset_t msgbufphys;
121
122 extern u_int data_abort_handler_address;
123 extern u_int prefetch_abort_handler_address;
124 extern u_int undefined_handler_address;
125
126 #ifdef PMAP_DEBUG
127 extern int pmap_debug_level;
128 #endif
129
130 #define KERNEL_PT_SYS 0 /* Page table for mapping proc0 zero page */
131 #define KERNEL_PT_KERNEL 1 /* Page table for mapping kernel */
132 #define KERNEL_PT_IOPXS 2 /* Page table for mapping i80312 */
133 #define KERNEL_PT_VMDATA 3 /* Page tables for mapping kernel VM */
134 #define KERNEL_PT_VMDATA_NUM (KERNEL_VM_SIZE >> (PDSHIFT + 2))
135 #define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
136
137 pt_entry_t kernel_pt_table[NUM_KERNEL_PTS];
138
139 struct user *proc0paddr;
140
141 /* Prototypes */
142
143 void consinit(void);
144
145 void map_section(vm_offset_t pt, vm_offset_t va, vm_offset_t pa,
146 int cacheable);
147 void map_pagetable(vm_offset_t pt, vm_offset_t va, vm_offset_t pa);
148 void map_entry(vm_offset_t pt, vm_offset_t va, vm_offset_t pa);
149 void map_entry_nc(vm_offset_t pt, vm_offset_t va, vm_offset_t pa);
150 void map_entry_ro(vm_offset_t pt, vm_offset_t va, vm_offset_t pa);
151 vm_size_t map_chunk(vm_offset_t pd, vm_offset_t pt, vm_offset_t va,
152 vm_offset_t pa, vm_size_t size, u_int acc, u_int flg);
153
154 void process_kernel_args(char *);
155 void data_abort_handler(trapframe_t *frame);
156 void prefetch_abort_handler(trapframe_t *frame);
157 void undefinedinstruction_bounce(trapframe_t *frame);
158 void zero_page_readonly(void);
159 void zero_page_readwrite(void);
160
161 extern void db_machine_init(void);
162 extern void parse_mi_bootargs(char *args);
163 extern void dumpsys(void);
164
165 #include "com.h"
166 #if NCOM > 0
167 #include <dev/ic/comreg.h>
168 #include <dev/ic/comvar.h>
169 #endif
170
171 #ifndef CONSPEED
172 #define CONSPEED B115200 /* What RedBoot uses */
173 #endif
174 #ifndef CONMODE
175 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
176 #endif
177
178 int comcnspeed = CONSPEED;
179 int comcnmode = CONMODE;
180
181 /*
182 * void cpu_reboot(int howto, char *bootstr)
183 *
184 * Reboots the system
185 *
186 * Deal with any syncing, unmounting, dumping and shutdown hooks,
187 * then reset the CPU.
188 */
189 void
190 cpu_reboot(int howto, char *bootstr)
191 {
192 #ifdef DIAGNOSTIC
193 /* info */
194 printf("boot: howto=%08x curproc=%p\n", howto, curproc);
195 #endif
196
197 /*
198 * If we are still cold then hit the air brakes
199 * and crash to earth fast
200 */
201 if (cold) {
202 doshutdownhooks();
203 printf("The operating system has halted.\n");
204 printf("Please press any key to reboot.\n\n");
205 cngetc();
206 printf("rebooting...\n");
207 cpu_reset();
208 /*NOTREACHED*/
209 }
210
211 /* Disable console buffering */
212 /* cnpollc(1);*/
213
214 /*
215 * If RB_NOSYNC was not specified sync the discs.
216 * Note: Unless cold is set to 1 here, syslogd will die during the
217 * unmount. It looks like syslogd is getting woken up only to find
218 * that it cannot page part of the binary in as the filesystem has
219 * been unmounted.
220 */
221 if (!(howto & RB_NOSYNC))
222 bootsync();
223
224 /* Say NO to interrupts */
225 splhigh();
226
227 /* Do a dump if requested. */
228 if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
229 dumpsys();
230
231 /* Run any shutdown hooks */
232 doshutdownhooks();
233
234 /* Make sure IRQ's are disabled */
235 IRQdisable;
236
237 if (howto & RB_HALT) {
238 printf("The operating system has halted.\n");
239 printf("Please press any key to reboot.\n\n");
240 cngetc();
241 }
242
243 printf("rebooting...\n");
244 cpu_reset();
245 /*NOTREACHED*/
246 }
247
248 /*
249 * Mapping table for core kernel memory. This memory is mapped at init
250 * time with section mappings.
251 */
252 struct l1_sec_map {
253 vaddr_t va;
254 vaddr_t pa;
255 vsize_t size;
256 int flags;
257 } l1_sec_table[] = {
258 /*
259 * Map the on-board devices VA == PA so that we can access them
260 * with the MMU on or off.
261 */
262 {
263 IQ80310_OBIO_BASE,
264 IQ80310_OBIO_BASE,
265 IQ80310_OBIO_SIZE,
266 0,
267 },
268
269 {
270 0,
271 0,
272 0,
273 0,
274 }
275 };
276
277 /*
278 * u_int initarm(...)
279 *
280 * Initial entry point on startup. This gets called before main() is
281 * entered.
282 * It should be responsible for setting up everything that must be
283 * in place when main is called.
284 * This includes
285 * Taking a copy of the boot configuration structure.
286 * Initialising the physical console so characters can be printed.
287 * Setting up page tables for the kernel
288 * Relocating the kernel to the bottom of physical memory
289 */
290 u_int
291 initarm(void)
292 {
293 int loop;
294 int loop1;
295 u_int l1pagetable;
296 u_int l2pagetable;
297 extern char page0[], page0_end[];
298 pv_addr_t kernel_l1pt;
299 pv_addr_t kernel_ptpt;
300 paddr_t memstart;
301 psize_t memsize;
302
303 /*
304 * Clear out the 7-segment display. Whee, the first visual
305 * indication that we're running kernel code.
306 */
307 iq80310_7seg(' ', ' ');
308
309 /*
310 * Heads up ... Setup the CPU / MMU / TLB functions
311 */
312 if (set_cpufuncs())
313 panic("cpu not recognized!");
314
315 /* Calibrate the delay loop. */
316 iq80310_calibrate_delay();
317
318 /*
319 * Since we map the on-board devices VA==PA, and the kernel
320 * is running VA==PA, it's possible for us to initialize
321 * the console now.
322 */
323 consinit();
324
325 /* Talk to the user */
326 printf("\nNetBSD/evbarm (IQ80310) booting ...\n");
327
328 /*
329 * Reset the secondary PCI bus. RedBoot doesn't stop devices
330 * on the PCI bus before handing us control, so we have to
331 * do this.
332 *
333 * XXX This is arguably a bug in RedBoot, and doing this reset
334 * XXX could be problematic in the future if we encounter an
335 * XXX application where the PPB in the i80312 is used as a
336 * XXX PPB.
337 */
338 {
339 uint32_t reg;
340
341 printf("Resetting secondary PCI bus...\n");
342 reg = bus_space_read_4(&obio_bs_tag,
343 I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL);
344 bus_space_write_4(&obio_bs_tag,
345 I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL,
346 reg | PPB_BC_SECONDARY_RESET);
347 delay(10 * 1000); /* 10ms enough? */
348 bus_space_write_4(&obio_bs_tag,
349 I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL,
350 reg);
351 }
352
353 /*
354 * Okay, RedBoot has provided us with the following memory map:
355 *
356 * Physical Address Range Description
357 * ----------------------- ----------------------------------
358 * 0x00000000 - 0x00000fff flash Memory
359 * 0x00001000 - 0x00001fff 80312 Internal Registers
360 * 0x00002000 - 0x007fffff flash Memory
361 * 0x00800000 - 0x7fffffff PCI ATU Outbound Direct Window
362 * 0x80000000 - 0x83ffffff Primary PCI 32-bit Memory
363 * 0x84000000 - 0x87ffffff Primary PCI 64-bit Memory
364 * 0x88000000 - 0x8bffffff Secondary PCI 32-bit Memory
365 * 0x8c000000 - 0x8fffffff Secondary PCI 64-bit Memory
366 * 0x90000000 - 0x9000ffff Primary PCI IO Space
367 * 0x90010000 - 0x9001ffff Secondary PCI IO Space
368 * 0x90020000 - 0x9fffffff Unused
369 * 0xa0000000 - 0xbfffffff SDRAM
370 * 0xc0000000 - 0xefffffff Unused
371 * 0xf0000000 - 0xffffffff 80200 Internal Registers
372 *
373 *
374 * Virtual Address Range C B Description
375 * ----------------------- - - ----------------------------------
376 * 0x00000000 - 0x00000fff Y Y SDRAM
377 * 0x00001000 - 0x00001fff N N 80312 Internal Registers
378 * 0x00002000 - 0x007fffff Y N flash Memory
379 * 0x00800000 - 0x7fffffff N N PCI ATU Outbound Direct Window
380 * 0x80000000 - 0x83ffffff N N Primary PCI 32-bit Memory
381 * 0x84000000 - 0x87ffffff N N Primary PCI 64-bit Memory
382 * 0x88000000 - 0x8bffffff N N Secondary PCI 32-bit Memory
383 * 0x8c000000 - 0x8fffffff N N Secondary PCI 64-bit Memory
384 * 0x90000000 - 0x9000ffff N N Primary PCI IO Space
385 * 0x90010000 - 0x9001ffff N N Secondary PCI IO Space
386 * 0xa0000000 - 0xa0000fff Y N flash
387 * 0xa0001000 - 0xbfffffff Y Y SDRAM
388 * 0xc0000000 - 0xcfffffff Y Y Cache Flush Region
389 * 0xf0000000 - 0xffffffff N N 80200 Internal Registers
390 *
391 * The first level page table is at 0xa0004000. There are also
392 * 2 second-level tables at 0xa0008000 and 0xa0008400.
393 *
394 * This corresponds roughly to the physical memory map, i.e.
395 * we are quite nearly running VA==PA.
396 */
397
398 /*
399 * Examine the boot args string for options we need to know about
400 * now.
401 */
402 #if 0
403 process_kernel_args((char *)nwbootinfo.bt_args);
404 #endif
405
406 /*
407 * Fetch the SDRAM start/size from the i80312 SDRAM configration
408 * registers.
409 */
410 i80312_sdram_bounds(&obio_bs_tag, I80312_PMMR_BASE + I80312_MEM_BASE,
411 &memstart, &memsize);
412
413 printf("initarm: Configuring system ...\n");
414
415 /* Fake bootconfig structure for the benefit of pmap.c */
416 /* XXX must make the memory description h/w independant */
417 bootconfig.dramblocks = 1;
418 bootconfig.dram[0].address = memstart;
419 bootconfig.dram[0].pages = memsize / NBPG;
420
421 /*
422 * Set up the variables that define the availablilty of
423 * physical memory. For now, we're going to set
424 * physical_freestart to 0xa0200000 (where the kernel
425 * was loaded), and allocate the memory we need downwards.
426 * If we get too close to the page tables that RedBoot
427 * set up, we will panic. We will update physical_freestart
428 * and physical_freeend later to reflect what pmap_bootstrap()
429 * wants to see.
430 *
431 * XXX pmap_bootstrap() needs an enema.
432 */
433 physical_start = bootconfig.dram[0].address;
434 physical_end = physical_start + (bootconfig.dram[0].pages * NBPG);
435
436 physical_freestart = 0xa0009000UL;
437 physical_freeend = 0xa0200000UL;
438
439 physmem = (physical_end - physical_start) / NBPG;
440
441 /* Tell the user about the memory */
442 printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem,
443 physical_start, physical_end - 1);
444
445 /*
446 * Okay, the kernel starts 2MB in from the bottom of physical
447 * memory. We are going to allocate our bootstrap pages downwards
448 * from there.
449 *
450 * We need to allocate some fixed page tables to get the kernel
451 * going. We allocate one page directory and a number of page
452 * tables and store the physical addresses in the kernel_pt_table
453 * array.
454 *
455 * The kernel page directory must be on a 16K boundary. The page
456 * tables must be on 4K bounaries. What we do is allocate the
457 * page directory on the first 16K boundary that we encounter, and
458 * the page tables on 4K boundaries otherwise. Since we allocate
459 * at least 3 L2 page tables, we are guaranteed to encounter at
460 * least one 16K aligned region.
461 */
462
463 #ifdef VERBOSE_INIT_ARM
464 printf("Allocating page tables\n");
465 #endif
466
467 free_pages = (physical_freeend - physical_freestart) / NBPG;
468
469 #ifdef VERBOSE_INIT_ARM
470 printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n",
471 physical_freestart, free_pages, free_pages);
472 #endif
473
474 /* Define a macro to simplify memory allocation */
475 #define valloc_pages(var, np) \
476 alloc_pages((var).pv_pa, (np)); \
477 (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start;
478
479 #define alloc_pages(var, np) \
480 physical_freeend -= ((np) * NBPG); \
481 if (physical_freeend < physical_freestart) \
482 panic("initarm: out of memory"); \
483 (var) = physical_freeend; \
484 free_pages -= (np); \
485 memset((char *)(var), 0, ((np) * NBPG));
486
487 loop1 = 0;
488 kernel_l1pt.pv_pa = 0;
489 for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
490 /* Are we 16KB aligned for an L1 ? */
491 if (((physical_freeend - PD_SIZE) & (PD_SIZE - 1)) == 0
492 && kernel_l1pt.pv_pa == 0) {
493 valloc_pages(kernel_l1pt, PD_SIZE / NBPG);
494 } else {
495 alloc_pages(kernel_pt_table[loop1], PT_SIZE / NBPG);
496 ++loop1;
497 }
498 }
499
500 /* This should never be able to happen but better confirm that. */
501 if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (PD_SIZE-1)) != 0)
502 panic("initarm: Failed to align the kernel page directory\n");
503
504 /*
505 * Allocate a page for the system page mapped to V0x00000000
506 * This page will just contain the system vectors and can be
507 * shared by all processes.
508 */
509 alloc_pages(systempage.pv_pa, 1);
510
511 /* Allocate a page for the page table to map kernel page tables. */
512 valloc_pages(kernel_ptpt, PT_SIZE / NBPG);
513
514 /* Allocate stacks for all modes */
515 valloc_pages(irqstack, IRQ_STACK_SIZE);
516 valloc_pages(abtstack, ABT_STACK_SIZE);
517 valloc_pages(undstack, UND_STACK_SIZE);
518 valloc_pages(kernelstack, UPAGES);
519
520 #ifdef VERBOSE_INIT_ARM
521 printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa,
522 irqstack.pv_va);
523 printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa,
524 abtstack.pv_va);
525 printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa,
526 undstack.pv_va);
527 printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa,
528 kernelstack.pv_va);
529 #endif
530
531 /*
532 * XXX Defer this to later so that we can reclaim the memory
533 * XXX used by the RedBoot page tables.
534 */
535 alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / NBPG);
536
537 /*
538 * Ok we have allocated physical pages for the primary kernel
539 * page tables
540 */
541
542 #ifdef VERBOSE_INIT_ARM
543 printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa);
544 #endif
545
546 /*
547 * Now we start consturction of the L1 page table
548 * We start by mapping the L2 page tables into the L1.
549 * This means that we can replace L1 mappings later on if necessary
550 */
551 l1pagetable = kernel_l1pt.pv_pa;
552
553 /* Map the L2 pages tables in the L1 page table */
554 map_pagetable(l1pagetable, 0x00000000,
555 kernel_pt_table[KERNEL_PT_SYS]);
556 map_pagetable(l1pagetable, KERNEL_BASE,
557 kernel_pt_table[KERNEL_PT_KERNEL]);
558 map_pagetable(l1pagetable, IQ80310_IOPXS_VBASE,
559 kernel_pt_table[KERNEL_PT_IOPXS]);
560 for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; ++loop)
561 map_pagetable(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
562 kernel_pt_table[KERNEL_PT_VMDATA + loop]);
563 map_pagetable(l1pagetable, PROCESS_PAGE_TBLS_BASE,
564 kernel_ptpt.pv_pa);
565
566 #ifdef VERBOSE_INIT_ARM
567 printf("Mapping kernel\n");
568 #endif
569
570 /* Now we fill in the L2 pagetable for the kernel static code/data */
571 l2pagetable = kernel_pt_table[KERNEL_PT_KERNEL];
572
573 {
574 extern char etext[], _end[];
575 size_t textsize = (uintptr_t) etext - KERNEL_TEXT_BASE;
576 size_t totalsize = (uintptr_t) _end - KERNEL_TEXT_BASE;
577 u_int logical;
578
579 /* Round down text size and round up total size. */
580 textsize = textsize & ~PGOFSET;
581 totalsize = (totalsize + PGOFSET) & ~PGOFSET;
582
583 logical = 0x00200000; /* offset of kernel in RAM */
584
585 /*
586 * This maps the kernel text/data/bss VA==PA.
587 */
588 logical += map_chunk(0, l2pagetable, KERNEL_BASE + logical,
589 physical_start + logical, textsize,
590 AP_KRW, PT_CACHEABLE);
591 logical += map_chunk(0, l2pagetable, KERNEL_BASE + logical,
592 physical_start + logical, totalsize - textsize,
593 AP_KRW, PT_CACHEABLE);
594
595 #if 0 /* XXX No symbols yet. */
596 logical += map_chunk(0, l2pagetable, KERNEL_BASE + logical,
597 physical_start + logical, kernexec->a_syms + sizeof(int)
598 + *(u_int *)((int)end + kernexec->a_syms + sizeof(int)),
599 AP_KRW, PT_CACHEABLE);
600 #endif
601 }
602
603 #ifdef VERBOSE_INIT_ARM
604 printf("Constructing L2 page tables\n");
605 #endif
606
607 /* Map the stack pages */
608 map_chunk(0, l2pagetable, irqstack.pv_va, irqstack.pv_pa,
609 IRQ_STACK_SIZE * NBPG, AP_KRW, PT_CACHEABLE);
610 map_chunk(0, l2pagetable, abtstack.pv_va, abtstack.pv_pa,
611 ABT_STACK_SIZE * NBPG, AP_KRW, PT_CACHEABLE);
612 map_chunk(0, l2pagetable, undstack.pv_va, undstack.pv_pa,
613 UND_STACK_SIZE * NBPG, AP_KRW, PT_CACHEABLE);
614 map_chunk(0, l2pagetable, kernelstack.pv_va, kernelstack.pv_pa,
615 UPAGES * NBPG, AP_KRW, PT_CACHEABLE);
616 map_chunk(0, l2pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
617 PD_SIZE, AP_KRW, 0);
618
619 /* Map the page table that maps the kernel pages */
620 map_entry_nc(l2pagetable, kernel_ptpt.pv_pa, kernel_ptpt.pv_pa);
621
622 /*
623 * Map entries in the page table used to map PTE's
624 * Basically every kernel page table gets mapped here
625 */
626 /* The -2 is slightly bogus, it should be -log2(sizeof(pt_entry_t)) */
627 l2pagetable = kernel_ptpt.pv_pa;
628 map_entry_nc(l2pagetable, (KERNEL_BASE >> (PGSHIFT-2)),
629 kernel_pt_table[KERNEL_PT_KERNEL]);
630 map_entry_nc(l2pagetable, (PROCESS_PAGE_TBLS_BASE >> (PGSHIFT-2)),
631 kernel_ptpt.pv_pa);
632 map_entry_nc(l2pagetable, (0x00000000 >> (PGSHIFT-2)),
633 kernel_pt_table[KERNEL_PT_SYS]);
634 for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; ++loop)
635 map_entry_nc(l2pagetable, ((KERNEL_VM_BASE +
636 (loop * 0x00400000)) >> (PGSHIFT-2)),
637 kernel_pt_table[KERNEL_PT_VMDATA + loop]);
638
639 /*
640 * Map the system page in the kernel page table for the bottom 1Meg
641 * of the virtual memory map.
642 */
643 l2pagetable = kernel_pt_table[KERNEL_PT_SYS];
644 map_entry(l2pagetable, 0x00000000, systempage.pv_pa);
645
646 /*
647 * Map devices we can map w/ section mappings.
648 */
649 loop = 0;
650 while (l1_sec_table[loop].size) {
651 vm_size_t sz;
652
653 #ifdef VERBOSE_INIT_ARM
654 printf("%08lx -> %08lx @ %08lx\n", l1_sec_table[loop].pa,
655 l1_sec_table[loop].pa + l1_sec_table[loop].size - 1,
656 l1_sec_table[loop].va);
657 #endif
658 for (sz = 0; sz < l1_sec_table[loop].size; sz += L1_SEC_SIZE)
659 map_section(l1pagetable, l1_sec_table[loop].va + sz,
660 l1_sec_table[loop].pa + sz,
661 l1_sec_table[loop].flags);
662 ++loop;
663 }
664
665 /*
666 * Map the PCI I/O spaces and i80312 registers. These are too
667 * small to be mapped w/ section mappings.
668 */
669 l2pagetable = kernel_pt_table[KERNEL_PT_IOPXS];
670 #ifdef VERBOSE_INIT_ARM
671 printf("Mapping PIOW 0x%08lx -> 0x%08lx @ 0x%08lx\n",
672 I80312_PCI_XLATE_PIOW_BASE,
673 I80312_PCI_XLATE_PIOW_BASE + I80312_PCI_XLATE_IOSIZE - 1,
674 IQ80310_PIOW_VBASE);
675 #endif
676 map_chunk(0, l2pagetable, IQ80310_PIOW_VBASE,
677 I80312_PCI_XLATE_PIOW_BASE, I80312_PCI_XLATE_IOSIZE, AP_KRW, 0);
678
679 #ifdef VERBOSE_INIT_ARM
680 printf("Mapping SIOW 0x%08lx -> 0x%08lx @ 0x%08lx\n",
681 I80312_PCI_XLATE_SIOW_BASE,
682 I80312_PCI_XLATE_SIOW_BASE + I80312_PCI_XLATE_IOSIZE - 1,
683 IQ80310_SIOW_VBASE);
684 #endif
685 map_chunk(0, l2pagetable, IQ80310_SIOW_VBASE,
686 I80312_PCI_XLATE_SIOW_BASE, I80312_PCI_XLATE_IOSIZE, AP_KRW, 0);
687
688 #ifdef VERBOSE_INIT_ARM
689 printf("Mapping SIOW 0x%08lx -> 0x%08lx @ 0x%08lx\n",
690 I80312_PMMR_BASE,
691 I80312_PMMR_BASE + I80312_PMMR_SIZE - 1,
692 IQ80310_80312_VBASE);
693 #endif
694 map_chunk(0, l2pagetable, IQ80310_80312_VBASE,
695 I80312_PMMR_BASE, I80312_PMMR_SIZE, AP_KRW, 0);
696
697 /*
698 * Now we have the real page tables in place so we can switch to them.
699 * Once this is done we will be running with the REAL kernel page
700 * tables.
701 */
702
703 /*
704 * Update the physical_freestart/physical_freeend/free_pages
705 * variables.
706 */
707 {
708 extern char _end[];
709
710 physical_freestart = (((uintptr_t) _end) + PGOFSET) & ~PGOFSET;
711 physical_freeend = physical_end;
712 free_pages = (physical_freeend - physical_freestart) / NBPG;
713 }
714
715 /* Switch tables */
716 #ifdef VERBOSE_INIT_ARM
717 printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
718 physical_freestart, free_pages, free_pages);
719 printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa);
720 #endif
721 setttb(kernel_l1pt.pv_pa);
722
723 #ifdef VERBOSE_INIT_ARM
724 printf("done!\n");
725 #endif
726
727 #ifdef VERBOSE_INIT_ARM
728 printf("bootstrap done.\n");
729 #endif
730
731 /* Right, set up the vectors at the bottom of page 0 */
732 memcpy((char *)0x00000000, page0, page0_end - page0);
733
734 /* We have modified a text page so sync the icache */
735 cpu_cache_syncI();
736
737 /*
738 * Pages were allocated during the secondary bootstrap for the
739 * stacks for different CPU modes.
740 * We must now set the r13 registers in the different CPU modes to
741 * point to these stacks.
742 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
743 * of the stack memory.
744 */
745 printf("init subsystems: stacks ");
746
747 set_stackptr(PSR_IRQ32_MODE, irqstack.pv_va + IRQ_STACK_SIZE * NBPG);
748 set_stackptr(PSR_ABT32_MODE, abtstack.pv_va + ABT_STACK_SIZE * NBPG);
749 set_stackptr(PSR_UND32_MODE, undstack.pv_va + UND_STACK_SIZE * NBPG);
750
751 /*
752 * Well we should set a data abort handler.
753 * Once things get going this will change as we will need a proper
754 * handler.
755 * Until then we will use a handler that just panics but tells us
756 * why.
757 * Initialisation of the vectors will just panic on a data abort.
758 * This just fills in a slighly better one.
759 */
760 printf("vectors ");
761 data_abort_handler_address = (u_int)data_abort_handler;
762 prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
763 undefined_handler_address = (u_int)undefinedinstruction_bounce;
764
765 /* At last !
766 * We now have the kernel in physical memory from the bottom upwards.
767 * Kernel page tables are physically above this.
768 * The kernel is mapped to KERNEL_TEXT_BASE
769 * The kernel data PTs will handle the mapping of 0xf1000000-0xf3ffffff
770 * The page tables are mapped to 0xefc00000
771 */
772
773 /* Initialise the undefined instruction handlers */
774 printf("undefined ");
775 undefined_init();
776
777 /* Boot strap pmap telling it where the kernel page table is */
778 printf("pmap ");
779 pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, kernel_ptpt);
780
781 /* Setup the IRQ system */
782 printf("irq ");
783 irq_init();
784 printf("done.\n");
785
786 #ifdef IPKDB
787 /* Initialise ipkdb */
788 ipkdb_init();
789 if (boothowto & RB_KDB)
790 ipkdb_connect(0);
791 #endif
792
793 #ifdef DDB
794 printf("ddb: ");
795 db_machine_init();
796 #if 0
797 ddb_init(end[0], end + 1, esym);
798 #endif
799
800 if (boothowto & RB_KDB)
801 Debugger();
802 #endif
803
804 /* We return the new stack pointer address */
805 return(kernelstack.pv_va + USPACE_SVC_STACK_TOP);
806 }
807
808 void
809 process_kernel_args(char *args)
810 {
811
812 boothowto = 0;
813
814 /* Make a local copy of the bootargs */
815 strncpy(bootargs, args, MAX_BOOT_STRING);
816
817 args = bootargs;
818 boot_file = bootargs;
819
820 /* Skip the kernel image filename */
821 while (*args != ' ' && *args != 0)
822 ++args;
823
824 if (*args != 0)
825 *args++ = 0;
826
827 while (*args == ' ')
828 ++args;
829
830 boot_args = args;
831
832 printf("bootfile: %s\n", boot_file);
833 printf("bootargs: %s\n", boot_args);
834
835 parse_mi_bootargs(boot_args);
836 }
837
838 void
839 consinit(void)
840 {
841 static int consinit_called;
842
843 if (consinit_called != 0)
844 return;
845
846 consinit_called = 1;
847
848 #if NCOM > 0
849 if (comcnattach(&obio_bs_tag, IQ80310_UART2, comcnspeed,
850 COM_FREQ, comcnmode))
851 panic("can't init serial console @%lx", IQ80310_UART1);
852 #else
853 panic("serial console @%lx not configured", IQ80310_UART1);
854 #endif
855 }
856