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iq80310_machdep.c revision 1.46
      1 /*	$NetBSD: iq80310_machdep.c,v 1.46 2003/01/17 22:45:40 thorpej Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
      5  * All rights reserved.
      6  *
      7  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
      8  *
      9  * Redistribution and use in source and binary forms, with or without
     10  * modification, are permitted provided that the following conditions
     11  * are met:
     12  * 1. Redistributions of source code must retain the above copyright
     13  *    notice, this list of conditions and the following disclaimer.
     14  * 2. Redistributions in binary form must reproduce the above copyright
     15  *    notice, this list of conditions and the following disclaimer in the
     16  *    documentation and/or other materials provided with the distribution.
     17  * 3. All advertising materials mentioning features or use of this software
     18  *    must display the following acknowledgement:
     19  *	This product includes software developed for the NetBSD Project by
     20  *	Wasabi Systems, Inc.
     21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
     22  *    or promote products derived from this software without specific prior
     23  *    written permission.
     24  *
     25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
     26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
     29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     35  * POSSIBILITY OF SUCH DAMAGE.
     36  */
     37 
     38 /*
     39  * Copyright (c) 1997,1998 Mark Brinicombe.
     40  * Copyright (c) 1997,1998 Causality Limited.
     41  * All rights reserved.
     42  *
     43  * Redistribution and use in source and binary forms, with or without
     44  * modification, are permitted provided that the following conditions
     45  * are met:
     46  * 1. Redistributions of source code must retain the above copyright
     47  *    notice, this list of conditions and the following disclaimer.
     48  * 2. Redistributions in binary form must reproduce the above copyright
     49  *    notice, this list of conditions and the following disclaimer in the
     50  *    documentation and/or other materials provided with the distribution.
     51  * 3. All advertising materials mentioning features or use of this software
     52  *    must display the following acknowledgement:
     53  *	This product includes software developed by Mark Brinicombe
     54  *	for the NetBSD Project.
     55  * 4. The name of the company nor the name of the author may be used to
     56  *    endorse or promote products derived from this software without specific
     57  *    prior written permission.
     58  *
     59  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
     60  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
     61  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     62  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
     63  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     64  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
     65  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     66  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     67  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     68  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     69  * SUCH DAMAGE.
     70  *
     71  * Machine dependant functions for kernel setup for Intel IQ80310 evaluation
     72  * boards using RedBoot firmware.
     73  */
     74 
     75 #include "opt_ddb.h"
     76 #include "opt_pmap_debug.h"
     77 
     78 #include <sys/param.h>
     79 #include <sys/device.h>
     80 #include <sys/systm.h>
     81 #include <sys/kernel.h>
     82 #include <sys/exec.h>
     83 #include <sys/proc.h>
     84 #include <sys/msgbuf.h>
     85 #include <sys/reboot.h>
     86 #include <sys/termios.h>
     87 
     88 #include <dev/cons.h>
     89 
     90 #include <machine/db_machdep.h>
     91 #include <ddb/db_sym.h>
     92 #include <ddb/db_extern.h>
     93 
     94 #include <machine/bootconfig.h>
     95 #include <machine/bus.h>
     96 #include <machine/cpu.h>
     97 #include <machine/frame.h>
     98 #include <arm/undefined.h>
     99 
    100 #include <arm/arm32/machdep.h>
    101 
    102 #include <arm/xscale/i80312reg.h>
    103 #include <arm/xscale/i80312var.h>
    104 
    105 #include <dev/pci/ppbreg.h>
    106 
    107 #include <evbarm/iq80310/iq80310reg.h>
    108 #include <evbarm/iq80310/iq80310var.h>
    109 #include <evbarm/iq80310/obiovar.h>
    110 
    111 #include "opt_ipkdb.h"
    112 
    113 /*
    114  * Address to call from cpu_reset() to reset the machine.
    115  * This is machine architecture dependant as it varies depending
    116  * on where the ROM appears when you turn the MMU off.
    117  */
    118 
    119 u_int cpu_reset_address = 0;
    120 
    121 /* Define various stack sizes in pages */
    122 #define IRQ_STACK_SIZE	1
    123 #define ABT_STACK_SIZE	1
    124 #ifdef IPKDB
    125 #define UND_STACK_SIZE	2
    126 #else
    127 #define UND_STACK_SIZE	1
    128 #endif
    129 
    130 BootConfig bootconfig;		/* Boot config storage */
    131 char *boot_args = NULL;
    132 char *boot_file = NULL;
    133 
    134 vm_offset_t physical_start;
    135 vm_offset_t physical_freestart;
    136 vm_offset_t physical_freeend;
    137 vm_offset_t physical_end;
    138 u_int free_pages;
    139 vm_offset_t pagetables_start;
    140 int physmem = 0;
    141 
    142 /*int debug_flags;*/
    143 #ifndef PMAP_STATIC_L1S
    144 int max_processes = 64;			/* Default number */
    145 #endif	/* !PMAP_STATIC_L1S */
    146 
    147 /* Physical and virtual addresses for some global pages */
    148 pv_addr_t systempage;
    149 pv_addr_t irqstack;
    150 pv_addr_t undstack;
    151 pv_addr_t abtstack;
    152 pv_addr_t kernelstack;
    153 pv_addr_t minidataclean;
    154 
    155 vm_offset_t msgbufphys;
    156 
    157 extern u_int data_abort_handler_address;
    158 extern u_int prefetch_abort_handler_address;
    159 extern u_int undefined_handler_address;
    160 
    161 #ifdef PMAP_DEBUG
    162 extern int pmap_debug_level;
    163 #endif
    164 
    165 #define KERNEL_PT_SYS		0	/* L2 table for mapping zero page */
    166 
    167 #define KERNEL_PT_KERNEL	1	/* L2 table for mapping kernel */
    168 #define	KERNEL_PT_KERNEL_NUM	2
    169 
    170 					/* L2 table for mapping i80312 */
    171 #define	KERNEL_PT_IOPXS		(KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM)
    172 
    173 					/* L2 tables for mapping kernel VM */
    174 #define KERNEL_PT_VMDATA	(KERNEL_PT_IOPXS + 1)
    175 #define	KERNEL_PT_VMDATA_NUM	4	/* start with 16MB of KVM */
    176 #define NUM_KERNEL_PTS		(KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
    177 
    178 pv_addr_t kernel_pt_table[NUM_KERNEL_PTS];
    179 
    180 struct user *proc0paddr;
    181 
    182 /* Prototypes */
    183 
    184 void	consinit(void);
    185 
    186 #include "com.h"
    187 #if NCOM > 0
    188 #include <dev/ic/comreg.h>
    189 #include <dev/ic/comvar.h>
    190 #endif
    191 
    192 /*
    193  * Define the default console speed for the board.  This is generally
    194  * what the firmware provided with the board defaults to.
    195  */
    196 #ifndef CONSPEED
    197 #define CONSPEED B115200
    198 #endif /* ! CONSPEED */
    199 
    200 #ifndef CONUNIT
    201 #define	CONUNIT	0
    202 #endif
    203 
    204 #ifndef CONMODE
    205 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
    206 #endif
    207 
    208 int comcnspeed = CONSPEED;
    209 int comcnmode = CONMODE;
    210 int comcnunit = CONUNIT;
    211 
    212 /*
    213  * void cpu_reboot(int howto, char *bootstr)
    214  *
    215  * Reboots the system
    216  *
    217  * Deal with any syncing, unmounting, dumping and shutdown hooks,
    218  * then reset the CPU.
    219  */
    220 void
    221 cpu_reboot(int howto, char *bootstr)
    222 {
    223 #ifdef DIAGNOSTIC
    224 	/* info */
    225 	printf("boot: howto=%08x curlwp=%p\n", howto, curlwp);
    226 #endif
    227 
    228 	/*
    229 	 * If we are still cold then hit the air brakes
    230 	 * and crash to earth fast
    231 	 */
    232 	if (cold) {
    233 		doshutdownhooks();
    234 		printf("The operating system has halted.\n");
    235 		printf("Please press any key to reboot.\n\n");
    236 		cngetc();
    237 		printf("rebooting...\n");
    238 		cpu_reset();
    239 		/*NOTREACHED*/
    240 	}
    241 
    242 	/* Disable console buffering */
    243 
    244 	/*
    245 	 * If RB_NOSYNC was not specified sync the discs.
    246 	 * Note: Unless cold is set to 1 here, syslogd will die during the
    247 	 * unmount.  It looks like syslogd is getting woken up only to find
    248 	 * that it cannot page part of the binary in as the filesystem has
    249 	 * been unmounted.
    250 	 */
    251 	if (!(howto & RB_NOSYNC))
    252 		bootsync();
    253 
    254 	/* Say NO to interrupts */
    255 	splhigh();
    256 
    257 	/* Do a dump if requested. */
    258 	if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
    259 		dumpsys();
    260 
    261 	/* Run any shutdown hooks */
    262 	doshutdownhooks();
    263 
    264 	/* Make sure IRQ's are disabled */
    265 	IRQdisable;
    266 
    267 	if (howto & RB_HALT) {
    268 		iq80310_7seg('.', '.');
    269 		printf("The operating system has halted.\n");
    270 		printf("Please press any key to reboot.\n\n");
    271 		cngetc();
    272 	}
    273 
    274 	printf("rebooting...\n");
    275 	cpu_reset();
    276 	/*NOTREACHED*/
    277 }
    278 
    279 /*
    280  * Mapping table for core kernel memory. This memory is mapped at init
    281  * time with section mappings.
    282  */
    283 struct l1_sec_map {
    284 	vaddr_t	va;
    285 	vaddr_t	pa;
    286 	vsize_t	size;
    287 	vm_prot_t prot;
    288 	int cache;
    289 } l1_sec_table[] = {
    290     /*
    291      * Map the on-board devices VA == PA so that we can access them
    292      * with the MMU on or off.
    293      */
    294     {
    295 	IQ80310_OBIO_BASE,
    296 	IQ80310_OBIO_BASE,
    297 	IQ80310_OBIO_SIZE,
    298 	VM_PROT_READ|VM_PROT_WRITE,
    299 	PTE_NOCACHE,
    300     },
    301 
    302     {
    303 	0,
    304 	0,
    305 	0,
    306 	0,
    307 	0,
    308     }
    309 };
    310 
    311 /*
    312  * u_int initarm(...)
    313  *
    314  * Initial entry point on startup. This gets called before main() is
    315  * entered.
    316  * It should be responsible for setting up everything that must be
    317  * in place when main is called.
    318  * This includes
    319  *   Taking a copy of the boot configuration structure.
    320  *   Initialising the physical console so characters can be printed.
    321  *   Setting up page tables for the kernel
    322  *   Relocating the kernel to the bottom of physical memory
    323  */
    324 u_int
    325 initarm(void *arg)
    326 {
    327 	extern vaddr_t xscale_cache_clean_addr;
    328 #ifdef DIAGNOSTIC
    329 	extern vsize_t xscale_minidata_clean_size;
    330 #endif
    331 	int loop;
    332 	int loop1;
    333 	u_int l1pagetable;
    334 	pv_addr_t kernel_l1pt;
    335 	pv_addr_t kernel_ptpt;
    336 	paddr_t memstart;
    337 	psize_t memsize;
    338 
    339 	/*
    340 	 * Clear out the 7-segment display.  Whee, the first visual
    341 	 * indication that we're running kernel code.
    342 	 */
    343 	iq80310_7seg(' ', ' ');
    344 
    345 	/*
    346 	 * Heads up ... Setup the CPU / MMU / TLB functions
    347 	 */
    348 	if (set_cpufuncs())
    349 		panic("cpu not recognized!");
    350 
    351 	/* Calibrate the delay loop. */
    352 	iq80310_calibrate_delay();
    353 
    354 	/*
    355 	 * Since we map the on-board devices VA==PA, and the kernel
    356 	 * is running VA==PA, it's possible for us to initialize
    357 	 * the console now.
    358 	 */
    359 	consinit();
    360 
    361 	/* Talk to the user */
    362 	printf("\nNetBSD/evbarm (IQ80310) booting ...\n");
    363 
    364 	/*
    365 	 * Reset the secondary PCI bus.  RedBoot doesn't stop devices
    366 	 * on the PCI bus before handing us control, so we have to
    367 	 * do this.
    368 	 *
    369 	 * XXX This is arguably a bug in RedBoot, and doing this reset
    370 	 * XXX could be problematic in the future if we encounter an
    371 	 * XXX application where the PPB in the i80312 is used as a
    372 	 * XXX PPB.
    373 	 */
    374 	{
    375 		uint32_t reg;
    376 
    377 		printf("Resetting secondary PCI bus...\n");
    378 		reg = bus_space_read_4(&obio_bs_tag,
    379 		    I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL);
    380 		bus_space_write_4(&obio_bs_tag,
    381 		    I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL,
    382 		    reg | PPB_BC_SECONDARY_RESET);
    383 		delay(10 * 1000);	/* 10ms enough? */
    384 		bus_space_write_4(&obio_bs_tag,
    385 		    I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL,
    386 		    reg);
    387 	}
    388 
    389 	/*
    390 	 * We are currently running with the MMU enabled and the
    391 	 * entire address space mapped VA==PA, except for the
    392 	 * first 64M of RAM is also double-mapped at 0xc0000000.
    393 	 * There is an L1 page table at 0xa0004000.
    394 	 */
    395 
    396 	/*
    397 	 * Fetch the SDRAM start/size from the i80312 SDRAM configration
    398 	 * registers.
    399 	 */
    400 	i80312_sdram_bounds(&obio_bs_tag, I80312_PMMR_BASE + I80312_MEM_BASE,
    401 	    &memstart, &memsize);
    402 
    403 	printf("initarm: Configuring system ...\n");
    404 
    405 	/* Fake bootconfig structure for the benefit of pmap.c */
    406 	/* XXX must make the memory description h/w independant */
    407 	bootconfig.dramblocks = 1;
    408 	bootconfig.dram[0].address = memstart;
    409 	bootconfig.dram[0].pages = memsize / NBPG;
    410 
    411 	/*
    412 	 * Set up the variables that define the availablilty of
    413 	 * physical memory.  For now, we're going to set
    414 	 * physical_freestart to 0xa0200000 (where the kernel
    415 	 * was loaded), and allocate the memory we need downwards.
    416 	 * If we get too close to the L1 table that we set up, we
    417 	 * will panic.  We will update physical_freestart and
    418 	 * physical_freeend later to reflect what pmap_bootstrap()
    419 	 * wants to see.
    420 	 *
    421 	 * XXX pmap_bootstrap() needs an enema.
    422 	 */
    423 	physical_start = bootconfig.dram[0].address;
    424 	physical_end = physical_start + (bootconfig.dram[0].pages * NBPG);
    425 
    426 	physical_freestart = 0xa0009000UL;
    427 	physical_freeend = 0xa0200000UL;
    428 
    429 	physmem = (physical_end - physical_start) / NBPG;
    430 
    431 	/* Tell the user about the memory */
    432 	printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem,
    433 	    physical_start, physical_end - 1);
    434 
    435 	/*
    436 	 * Okay, the kernel starts 2MB in from the bottom of physical
    437 	 * memory.  We are going to allocate our bootstrap pages downwards
    438 	 * from there.
    439 	 *
    440 	 * We need to allocate some fixed page tables to get the kernel
    441 	 * going.  We allocate one page directory and a number of page
    442 	 * tables and store the physical addresses in the kernel_pt_table
    443 	 * array.
    444 	 *
    445 	 * The kernel page directory must be on a 16K boundary.  The page
    446 	 * tables must be on 4K bounaries.  What we do is allocate the
    447 	 * page directory on the first 16K boundary that we encounter, and
    448 	 * the page tables on 4K boundaries otherwise.  Since we allocate
    449 	 * at least 3 L2 page tables, we are guaranteed to encounter at
    450 	 * least one 16K aligned region.
    451 	 */
    452 
    453 #ifdef VERBOSE_INIT_ARM
    454 	printf("Allocating page tables\n");
    455 #endif
    456 
    457 	free_pages = (physical_freeend - physical_freestart) / NBPG;
    458 
    459 #ifdef VERBOSE_INIT_ARM
    460 	printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n",
    461 	       physical_freestart, free_pages, free_pages);
    462 #endif
    463 
    464 	/* Define a macro to simplify memory allocation */
    465 #define	valloc_pages(var, np)				\
    466 	alloc_pages((var).pv_pa, (np));			\
    467 	(var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start;
    468 
    469 #define alloc_pages(var, np)				\
    470 	physical_freeend -= ((np) * NBPG);		\
    471 	if (physical_freeend < physical_freestart)	\
    472 		panic("initarm: out of memory");	\
    473 	(var) = physical_freeend;			\
    474 	free_pages -= (np);				\
    475 	memset((char *)(var), 0, ((np) * NBPG));
    476 
    477 	loop1 = 0;
    478 	kernel_l1pt.pv_pa = 0;
    479 	for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
    480 		/* Are we 16KB aligned for an L1 ? */
    481 		if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0
    482 		    && kernel_l1pt.pv_pa == 0) {
    483 			valloc_pages(kernel_l1pt, L1_TABLE_SIZE / NBPG);
    484 		} else {
    485 			alloc_pages(kernel_pt_table[loop1].pv_pa,
    486 			    L2_TABLE_SIZE / NBPG);
    487 			kernel_pt_table[loop1].pv_va =
    488 			    kernel_pt_table[loop1].pv_pa;
    489 			++loop1;
    490 		}
    491 	}
    492 
    493 	/* This should never be able to happen but better confirm that. */
    494 	if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE-1)) != 0)
    495 		panic("initarm: Failed to align the kernel page directory");
    496 
    497 	/*
    498 	 * Allocate a page for the system page mapped to V0x00000000
    499 	 * This page will just contain the system vectors and can be
    500 	 * shared by all processes.
    501 	 */
    502 	alloc_pages(systempage.pv_pa, 1);
    503 
    504 	/* Allocate a page for the page table to map kernel page tables. */
    505 	valloc_pages(kernel_ptpt, L2_TABLE_SIZE / NBPG);
    506 
    507 	/* Allocate stacks for all modes */
    508 	valloc_pages(irqstack, IRQ_STACK_SIZE);
    509 	valloc_pages(abtstack, ABT_STACK_SIZE);
    510 	valloc_pages(undstack, UND_STACK_SIZE);
    511 	valloc_pages(kernelstack, UPAGES);
    512 
    513 	/* Allocate enough pages for cleaning the Mini-Data cache. */
    514 	KASSERT(xscale_minidata_clean_size <= NBPG);
    515 	valloc_pages(minidataclean, 1);
    516 
    517 #ifdef VERBOSE_INIT_ARM
    518 	printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa,
    519 	    irqstack.pv_va);
    520 	printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa,
    521 	    abtstack.pv_va);
    522 	printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa,
    523 	    undstack.pv_va);
    524 	printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa,
    525 	    kernelstack.pv_va);
    526 #endif
    527 
    528 	/*
    529 	 * XXX Defer this to later so that we can reclaim the memory
    530 	 * XXX used by the RedBoot page tables.
    531 	 */
    532 	alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / NBPG);
    533 
    534 	/*
    535 	 * Ok we have allocated physical pages for the primary kernel
    536 	 * page tables
    537 	 */
    538 
    539 #ifdef VERBOSE_INIT_ARM
    540 	printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa);
    541 #endif
    542 
    543 	/*
    544 	 * Now we start construction of the L1 page table
    545 	 * We start by mapping the L2 page tables into the L1.
    546 	 * This means that we can replace L1 mappings later on if necessary
    547 	 */
    548 	l1pagetable = kernel_l1pt.pv_pa;
    549 
    550 	/* Map the L2 pages tables in the L1 page table */
    551 	pmap_link_l2pt(l1pagetable, 0x00000000,
    552 	    &kernel_pt_table[KERNEL_PT_SYS]);
    553 	for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++)
    554 		pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000,
    555 		    &kernel_pt_table[KERNEL_PT_KERNEL + loop]);
    556 	pmap_link_l2pt(l1pagetable, IQ80310_IOPXS_VBASE,
    557 	    &kernel_pt_table[KERNEL_PT_IOPXS]);
    558 	for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
    559 		pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
    560 		    &kernel_pt_table[KERNEL_PT_VMDATA + loop]);
    561 	pmap_link_l2pt(l1pagetable, PTE_BASE, &kernel_ptpt);
    562 
    563 	/* update the top of the kernel VM */
    564 	pmap_curmaxkvaddr =
    565 	    KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000);
    566 
    567 #ifdef VERBOSE_INIT_ARM
    568 	printf("Mapping kernel\n");
    569 #endif
    570 
    571 	/* Now we fill in the L2 pagetable for the kernel static code/data */
    572 	{
    573 		extern char etext[], _end[];
    574 		size_t textsize = (uintptr_t) etext - KERNEL_TEXT_BASE;
    575 		size_t totalsize = (uintptr_t) _end - KERNEL_TEXT_BASE;
    576 		u_int logical;
    577 
    578 		textsize = (textsize + PGOFSET) & ~PGOFSET;
    579 		totalsize = (totalsize + PGOFSET) & ~PGOFSET;
    580 
    581 		logical = 0x00200000;	/* offset of kernel in RAM */
    582 
    583 		logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
    584 		    physical_start + logical, textsize,
    585 		    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    586 		logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
    587 		    physical_start + logical, totalsize - textsize,
    588 		    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    589 	}
    590 
    591 #ifdef VERBOSE_INIT_ARM
    592 	printf("Constructing L2 page tables\n");
    593 #endif
    594 
    595 	/* Map the stack pages */
    596 	pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
    597 	    IRQ_STACK_SIZE * NBPG, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    598 	pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
    599 	    ABT_STACK_SIZE * NBPG, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    600 	pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
    601 	    UND_STACK_SIZE * NBPG, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    602 	pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
    603 	    UPAGES * NBPG, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    604 
    605 	pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
    606 	    L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    607 
    608 	/* Map the Mini-Data cache clean area. */
    609 	xscale_setup_minidata(l1pagetable, minidataclean.pv_va,
    610 	    minidataclean.pv_pa);
    611 
    612 	/* Map the page table that maps the kernel pages */
    613 	pmap_map_entry(l1pagetable, kernel_ptpt.pv_va, kernel_ptpt.pv_pa,
    614 	    VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
    615 
    616 	/*
    617 	 * Map entries in the page table used to map PTE's
    618 	 * Basically every kernel page table gets mapped here
    619 	 */
    620 	/* The -2 is slightly bogus, it should be -log2(sizeof(pt_entry_t)) */
    621 	for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++) {
    622 		pmap_map_entry(l1pagetable,
    623 		    PTE_BASE + ((KERNEL_BASE +
    624 		    (loop * 0x00400000)) >> (PGSHIFT-2)),
    625 		    kernel_pt_table[KERNEL_PT_KERNEL + loop].pv_pa,
    626 		    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    627 	}
    628 	pmap_map_entry(l1pagetable,
    629 	    PTE_BASE + (PTE_BASE >> (PGSHIFT-2)),
    630 	    kernel_ptpt.pv_pa, VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
    631 	pmap_map_entry(l1pagetable,
    632 	    PTE_BASE + (0x00000000 >> (PGSHIFT-2)),
    633 	    kernel_pt_table[KERNEL_PT_SYS].pv_pa,
    634 	    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    635 	for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
    636 		pmap_map_entry(l1pagetable,
    637 		    PTE_BASE + ((KERNEL_VM_BASE +
    638 		    (loop * 0x00400000)) >> (PGSHIFT-2)),
    639 		    kernel_pt_table[KERNEL_PT_VMDATA + loop].pv_pa,
    640 		    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    641 
    642 	/* Map the vector page. */
    643 	pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa,
    644 	    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    645 
    646 	/*
    647 	 * Map devices we can map w/ section mappings.
    648 	 */
    649 	loop = 0;
    650 	while (l1_sec_table[loop].size) {
    651 		vm_size_t sz;
    652 
    653 #ifdef VERBOSE_INIT_ARM
    654 		printf("%08lx -> %08lx @ %08lx\n", l1_sec_table[loop].pa,
    655 		    l1_sec_table[loop].pa + l1_sec_table[loop].size - 1,
    656 		    l1_sec_table[loop].va);
    657 #endif
    658 		for (sz = 0; sz < l1_sec_table[loop].size; sz += L1_S_SIZE)
    659 			pmap_map_section(l1pagetable,
    660 			    l1_sec_table[loop].va + sz,
    661 			    l1_sec_table[loop].pa + sz,
    662 			    l1_sec_table[loop].prot,
    663 			    l1_sec_table[loop].cache);
    664 		++loop;
    665 	}
    666 
    667 	/*
    668 	 * Map the PCI I/O spaces and i80312 registers.  These are too
    669 	 * small to be mapped w/ section mappings.
    670 	 */
    671 #ifdef VERBOSE_INIT_ARM
    672 	printf("Mapping PIOW 0x%08lx -> 0x%08lx @ 0x%08lx\n",
    673 	    I80312_PCI_XLATE_PIOW_BASE,
    674 	    I80312_PCI_XLATE_PIOW_BASE + I80312_PCI_XLATE_IOSIZE - 1,
    675 	    IQ80310_PIOW_VBASE);
    676 #endif
    677 	pmap_map_chunk(l1pagetable, IQ80310_PIOW_VBASE,
    678 	    I80312_PCI_XLATE_PIOW_BASE, I80312_PCI_XLATE_IOSIZE,
    679 	    VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
    680 
    681 #ifdef VERBOSE_INIT_ARM
    682 	printf("Mapping SIOW 0x%08lx -> 0x%08lx @ 0x%08lx\n",
    683 	    I80312_PCI_XLATE_SIOW_BASE,
    684 	    I80312_PCI_XLATE_SIOW_BASE + I80312_PCI_XLATE_IOSIZE - 1,
    685 	    IQ80310_SIOW_VBASE);
    686 #endif
    687 	pmap_map_chunk(l1pagetable, IQ80310_SIOW_VBASE,
    688 	    I80312_PCI_XLATE_SIOW_BASE, I80312_PCI_XLATE_IOSIZE,
    689 	    VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
    690 
    691 #ifdef VERBOSE_INIT_ARM
    692 	printf("Mapping 80312 0x%08lx -> 0x%08lx @ 0x%08lx\n",
    693 	    I80312_PMMR_BASE,
    694 	    I80312_PMMR_BASE + I80312_PMMR_SIZE - 1,
    695 	    IQ80310_80312_VBASE);
    696 #endif
    697 	pmap_map_chunk(l1pagetable, IQ80310_80312_VBASE,
    698 	    I80312_PMMR_BASE, I80312_PMMR_SIZE,
    699 	    VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
    700 
    701 	/*
    702 	 * Give the XScale global cache clean code an appropriately
    703 	 * sized chunk of unmapped VA space starting at 0xff000000
    704 	 * (our device mappings end before this address).
    705 	 */
    706 	xscale_cache_clean_addr = 0xff000000U;
    707 
    708 	/*
    709 	 * Now we have the real page tables in place so we can switch to them.
    710 	 * Once this is done we will be running with the REAL kernel page
    711 	 * tables.
    712 	 */
    713 
    714 	/*
    715 	 * Update the physical_freestart/physical_freeend/free_pages
    716 	 * variables.
    717 	 */
    718 	{
    719 		extern char _end[];
    720 
    721 		physical_freestart = physical_start +
    722 		    (((((uintptr_t) _end) + PGOFSET) & ~PGOFSET) -
    723 		     KERNEL_BASE);
    724 		physical_freeend = physical_end;
    725 		free_pages = (physical_freeend - physical_freestart) / NBPG;
    726 	}
    727 
    728 	/* Switch tables */
    729 #ifdef VERBOSE_INIT_ARM
    730 	printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
    731 	       physical_freestart, free_pages, free_pages);
    732 	printf("switching to new L1 page table  @%#lx...", kernel_l1pt.pv_pa);
    733 #endif
    734 	setttb(kernel_l1pt.pv_pa);
    735 	cpu_tlb_flushID();
    736 
    737 #ifdef VERBOSE_INIT_ARM
    738 	printf("done!\n");
    739 #endif
    740 
    741 #ifdef VERBOSE_INIT_ARM
    742 	printf("bootstrap done.\n");
    743 #endif
    744 
    745 	arm32_vector_init(ARM_VECTORS_LOW, ARM_VEC_ALL);
    746 
    747 	/*
    748 	 * Pages were allocated during the secondary bootstrap for the
    749 	 * stacks for different CPU modes.
    750 	 * We must now set the r13 registers in the different CPU modes to
    751 	 * point to these stacks.
    752 	 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
    753 	 * of the stack memory.
    754 	 */
    755 	printf("init subsystems: stacks ");
    756 
    757 	set_stackptr(PSR_IRQ32_MODE, irqstack.pv_va + IRQ_STACK_SIZE * NBPG);
    758 	set_stackptr(PSR_ABT32_MODE, abtstack.pv_va + ABT_STACK_SIZE * NBPG);
    759 	set_stackptr(PSR_UND32_MODE, undstack.pv_va + UND_STACK_SIZE * NBPG);
    760 
    761 	/*
    762 	 * Well we should set a data abort handler.
    763 	 * Once things get going this will change as we will need a proper
    764 	 * handler.
    765 	 * Until then we will use a handler that just panics but tells us
    766 	 * why.
    767 	 * Initialisation of the vectors will just panic on a data abort.
    768 	 * This just fills in a slighly better one.
    769 	 */
    770 	printf("vectors ");
    771 	data_abort_handler_address = (u_int)data_abort_handler;
    772 	prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
    773 	undefined_handler_address = (u_int)undefinedinstruction_bounce;
    774 
    775 	/* Initialise the undefined instruction handlers */
    776 	printf("undefined ");
    777 	undefined_init();
    778 
    779 	/* Load memory into UVM. */
    780 	printf("page ");
    781 	uvm_setpagesize();	/* initialize PAGE_SIZE-dependent variables */
    782 	uvm_page_physload(atop(physical_freestart), atop(physical_freeend),
    783 	    atop(physical_freestart), atop(physical_freeend),
    784 	    VM_FREELIST_DEFAULT);
    785 
    786 	/* Boot strap pmap telling it where the kernel page table is */
    787 	printf("pmap ");
    788 	pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, kernel_ptpt);
    789 
    790 	/* Setup the IRQ system */
    791 	printf("irq ");
    792 	iq80310_intr_init();
    793 	printf("done.\n");
    794 
    795 #ifdef IPKDB
    796 	/* Initialise ipkdb */
    797 	ipkdb_init();
    798 	if (boothowto & RB_KDB)
    799 		ipkdb_connect(0);
    800 #endif
    801 
    802 #ifdef DDB
    803 	db_machine_init();
    804 
    805 	/* Firmware doesn't load symbols. */
    806 	ddb_init(0, NULL, NULL);
    807 
    808 	if (boothowto & RB_KDB)
    809 		Debugger();
    810 #endif
    811 
    812 	/* We return the new stack pointer address */
    813 	return(kernelstack.pv_va + USPACE_SVC_STACK_TOP);
    814 }
    815 
    816 void
    817 consinit(void)
    818 {
    819 	static const bus_addr_t comcnaddrs[] = {
    820 		IQ80310_UART2,		/* com0 (J9) */
    821 		IQ80310_UART1,		/* com1 (J10) */
    822 	};
    823 	static int consinit_called;
    824 
    825 	if (consinit_called != 0)
    826 		return;
    827 
    828 	consinit_called = 1;
    829 
    830 #if NCOM > 0
    831 	if (comcnattach(&obio_bs_tag, comcnaddrs[comcnunit], comcnspeed,
    832 	    COM_FREQ, comcnmode))
    833 		panic("can't init serial console @%lx", comcnaddrs[comcnunit]);
    834 #else
    835 	panic("serial console @%lx not configured", comcnaddrs[comcnunit]);
    836 #endif
    837 }
    838