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iq80310_machdep.c revision 1.49
      1 /*	$NetBSD: iq80310_machdep.c,v 1.49 2003/04/22 14:09:47 thorpej Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
      5  * All rights reserved.
      6  *
      7  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
      8  *
      9  * Redistribution and use in source and binary forms, with or without
     10  * modification, are permitted provided that the following conditions
     11  * are met:
     12  * 1. Redistributions of source code must retain the above copyright
     13  *    notice, this list of conditions and the following disclaimer.
     14  * 2. Redistributions in binary form must reproduce the above copyright
     15  *    notice, this list of conditions and the following disclaimer in the
     16  *    documentation and/or other materials provided with the distribution.
     17  * 3. All advertising materials mentioning features or use of this software
     18  *    must display the following acknowledgement:
     19  *	This product includes software developed for the NetBSD Project by
     20  *	Wasabi Systems, Inc.
     21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
     22  *    or promote products derived from this software without specific prior
     23  *    written permission.
     24  *
     25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
     26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
     29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     35  * POSSIBILITY OF SUCH DAMAGE.
     36  */
     37 
     38 /*
     39  * Copyright (c) 1997,1998 Mark Brinicombe.
     40  * Copyright (c) 1997,1998 Causality Limited.
     41  * All rights reserved.
     42  *
     43  * Redistribution and use in source and binary forms, with or without
     44  * modification, are permitted provided that the following conditions
     45  * are met:
     46  * 1. Redistributions of source code must retain the above copyright
     47  *    notice, this list of conditions and the following disclaimer.
     48  * 2. Redistributions in binary form must reproduce the above copyright
     49  *    notice, this list of conditions and the following disclaimer in the
     50  *    documentation and/or other materials provided with the distribution.
     51  * 3. All advertising materials mentioning features or use of this software
     52  *    must display the following acknowledgement:
     53  *	This product includes software developed by Mark Brinicombe
     54  *	for the NetBSD Project.
     55  * 4. The name of the company nor the name of the author may be used to
     56  *    endorse or promote products derived from this software without specific
     57  *    prior written permission.
     58  *
     59  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
     60  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
     61  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     62  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
     63  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     64  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
     65  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     66  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     67  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     68  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     69  * SUCH DAMAGE.
     70  *
     71  * Machine dependant functions for kernel setup for Intel IQ80310 evaluation
     72  * boards using RedBoot firmware.
     73  */
     74 
     75 #include "opt_ddb.h"
     76 #include "opt_pmap_debug.h"
     77 
     78 #include <sys/param.h>
     79 #include <sys/device.h>
     80 #include <sys/systm.h>
     81 #include <sys/kernel.h>
     82 #include <sys/exec.h>
     83 #include <sys/proc.h>
     84 #include <sys/msgbuf.h>
     85 #include <sys/reboot.h>
     86 #include <sys/termios.h>
     87 
     88 #include <uvm/uvm_extern.h>
     89 
     90 #include <dev/cons.h>
     91 
     92 #include <machine/db_machdep.h>
     93 #include <ddb/db_sym.h>
     94 #include <ddb/db_extern.h>
     95 
     96 #include <machine/bootconfig.h>
     97 #include <machine/bus.h>
     98 #include <machine/cpu.h>
     99 #include <machine/frame.h>
    100 #include <arm/undefined.h>
    101 
    102 #include <arm/arm32/machdep.h>
    103 
    104 #include <arm/xscale/i80312reg.h>
    105 #include <arm/xscale/i80312var.h>
    106 
    107 #include <dev/pci/ppbreg.h>
    108 
    109 #include <evbarm/iq80310/iq80310reg.h>
    110 #include <evbarm/iq80310/iq80310var.h>
    111 #include <evbarm/iq80310/obiovar.h>
    112 
    113 #include "opt_ipkdb.h"
    114 
    115 /*
    116  * Address to call from cpu_reset() to reset the machine.
    117  * This is machine architecture dependant as it varies depending
    118  * on where the ROM appears when you turn the MMU off.
    119  */
    120 
    121 u_int cpu_reset_address = 0;
    122 
    123 /* Define various stack sizes in pages */
    124 #define IRQ_STACK_SIZE	1
    125 #define ABT_STACK_SIZE	1
    126 #ifdef IPKDB
    127 #define UND_STACK_SIZE	2
    128 #else
    129 #define UND_STACK_SIZE	1
    130 #endif
    131 
    132 BootConfig bootconfig;		/* Boot config storage */
    133 char *boot_args = NULL;
    134 char *boot_file = NULL;
    135 
    136 vm_offset_t physical_start;
    137 vm_offset_t physical_freestart;
    138 vm_offset_t physical_freeend;
    139 vm_offset_t physical_end;
    140 u_int free_pages;
    141 vm_offset_t pagetables_start;
    142 int physmem = 0;
    143 
    144 /*int debug_flags;*/
    145 #ifndef PMAP_STATIC_L1S
    146 int max_processes = 64;			/* Default number */
    147 #endif	/* !PMAP_STATIC_L1S */
    148 
    149 /* Physical and virtual addresses for some global pages */
    150 pv_addr_t systempage;
    151 pv_addr_t irqstack;
    152 pv_addr_t undstack;
    153 pv_addr_t abtstack;
    154 pv_addr_t kernelstack;
    155 pv_addr_t minidataclean;
    156 
    157 vm_offset_t msgbufphys;
    158 
    159 extern u_int data_abort_handler_address;
    160 extern u_int prefetch_abort_handler_address;
    161 extern u_int undefined_handler_address;
    162 
    163 #ifdef PMAP_DEBUG
    164 extern int pmap_debug_level;
    165 #endif
    166 
    167 #define KERNEL_PT_SYS		0	/* L2 table for mapping zero page */
    168 
    169 #define KERNEL_PT_KERNEL	1	/* L2 table for mapping kernel */
    170 #define	KERNEL_PT_KERNEL_NUM	2
    171 
    172 					/* L2 table for mapping i80312 */
    173 #define	KERNEL_PT_IOPXS		(KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM)
    174 
    175 					/* L2 tables for mapping kernel VM */
    176 #define KERNEL_PT_VMDATA	(KERNEL_PT_IOPXS + 1)
    177 #define	KERNEL_PT_VMDATA_NUM	4	/* start with 16MB of KVM */
    178 #define NUM_KERNEL_PTS		(KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
    179 
    180 pv_addr_t kernel_pt_table[NUM_KERNEL_PTS];
    181 
    182 struct user *proc0paddr;
    183 
    184 /* Prototypes */
    185 
    186 void	consinit(void);
    187 
    188 #include "com.h"
    189 #if NCOM > 0
    190 #include <dev/ic/comreg.h>
    191 #include <dev/ic/comvar.h>
    192 #endif
    193 
    194 /*
    195  * Define the default console speed for the board.  This is generally
    196  * what the firmware provided with the board defaults to.
    197  */
    198 #ifndef CONSPEED
    199 #define CONSPEED B115200
    200 #endif /* ! CONSPEED */
    201 
    202 #ifndef CONUNIT
    203 #define	CONUNIT	0
    204 #endif
    205 
    206 #ifndef CONMODE
    207 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
    208 #endif
    209 
    210 int comcnspeed = CONSPEED;
    211 int comcnmode = CONMODE;
    212 int comcnunit = CONUNIT;
    213 
    214 /*
    215  * void cpu_reboot(int howto, char *bootstr)
    216  *
    217  * Reboots the system
    218  *
    219  * Deal with any syncing, unmounting, dumping and shutdown hooks,
    220  * then reset the CPU.
    221  */
    222 void
    223 cpu_reboot(int howto, char *bootstr)
    224 {
    225 #ifdef DIAGNOSTIC
    226 	/* info */
    227 	printf("boot: howto=%08x curlwp=%p\n", howto, curlwp);
    228 #endif
    229 
    230 	/*
    231 	 * If we are still cold then hit the air brakes
    232 	 * and crash to earth fast
    233 	 */
    234 	if (cold) {
    235 		doshutdownhooks();
    236 		printf("The operating system has halted.\n");
    237 		printf("Please press any key to reboot.\n\n");
    238 		cngetc();
    239 		printf("rebooting...\n");
    240 		cpu_reset();
    241 		/*NOTREACHED*/
    242 	}
    243 
    244 	/* Disable console buffering */
    245 
    246 	/*
    247 	 * If RB_NOSYNC was not specified sync the discs.
    248 	 * Note: Unless cold is set to 1 here, syslogd will die during the
    249 	 * unmount.  It looks like syslogd is getting woken up only to find
    250 	 * that it cannot page part of the binary in as the filesystem has
    251 	 * been unmounted.
    252 	 */
    253 	if (!(howto & RB_NOSYNC))
    254 		bootsync();
    255 
    256 	/* Say NO to interrupts */
    257 	splhigh();
    258 
    259 	/* Do a dump if requested. */
    260 	if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
    261 		dumpsys();
    262 
    263 	/* Run any shutdown hooks */
    264 	doshutdownhooks();
    265 
    266 	/* Make sure IRQ's are disabled */
    267 	IRQdisable;
    268 
    269 	if (howto & RB_HALT) {
    270 		iq80310_7seg('.', '.');
    271 		printf("The operating system has halted.\n");
    272 		printf("Please press any key to reboot.\n\n");
    273 		cngetc();
    274 	}
    275 
    276 	printf("rebooting...\n");
    277 	cpu_reset();
    278 	/*NOTREACHED*/
    279 }
    280 
    281 /*
    282  * Mapping table for core kernel memory. This memory is mapped at init
    283  * time with section mappings.
    284  */
    285 struct l1_sec_map {
    286 	vaddr_t	va;
    287 	vaddr_t	pa;
    288 	vsize_t	size;
    289 	vm_prot_t prot;
    290 	int cache;
    291 } l1_sec_table[] = {
    292     /*
    293      * Map the on-board devices VA == PA so that we can access them
    294      * with the MMU on or off.
    295      */
    296     {
    297 	IQ80310_OBIO_BASE,
    298 	IQ80310_OBIO_BASE,
    299 	IQ80310_OBIO_SIZE,
    300 	VM_PROT_READ|VM_PROT_WRITE,
    301 	PTE_NOCACHE,
    302     },
    303 
    304     {
    305 	0,
    306 	0,
    307 	0,
    308 	0,
    309 	0,
    310     }
    311 };
    312 
    313 /*
    314  * u_int initarm(...)
    315  *
    316  * Initial entry point on startup. This gets called before main() is
    317  * entered.
    318  * It should be responsible for setting up everything that must be
    319  * in place when main is called.
    320  * This includes
    321  *   Taking a copy of the boot configuration structure.
    322  *   Initialising the physical console so characters can be printed.
    323  *   Setting up page tables for the kernel
    324  *   Relocating the kernel to the bottom of physical memory
    325  */
    326 u_int
    327 initarm(void *arg)
    328 {
    329 	extern vaddr_t xscale_cache_clean_addr;
    330 #ifdef DIAGNOSTIC
    331 	extern vsize_t xscale_minidata_clean_size;
    332 #endif
    333 	int loop;
    334 	int loop1;
    335 	u_int l1pagetable;
    336 	pv_addr_t kernel_l1pt;
    337 	pv_addr_t kernel_ptpt;
    338 	paddr_t memstart;
    339 	psize_t memsize;
    340 
    341 	/*
    342 	 * Clear out the 7-segment display.  Whee, the first visual
    343 	 * indication that we're running kernel code.
    344 	 */
    345 	iq80310_7seg(' ', ' ');
    346 
    347 	/*
    348 	 * Heads up ... Setup the CPU / MMU / TLB functions
    349 	 */
    350 	if (set_cpufuncs())
    351 		panic("cpu not recognized!");
    352 
    353 	/* Calibrate the delay loop. */
    354 	iq80310_calibrate_delay();
    355 
    356 	/*
    357 	 * Since we map the on-board devices VA==PA, and the kernel
    358 	 * is running VA==PA, it's possible for us to initialize
    359 	 * the console now.
    360 	 */
    361 	consinit();
    362 
    363 	/* Talk to the user */
    364 	printf("\nNetBSD/evbarm (IQ80310) booting ...\n");
    365 
    366 	/*
    367 	 * Reset the secondary PCI bus.  RedBoot doesn't stop devices
    368 	 * on the PCI bus before handing us control, so we have to
    369 	 * do this.
    370 	 *
    371 	 * XXX This is arguably a bug in RedBoot, and doing this reset
    372 	 * XXX could be problematic in the future if we encounter an
    373 	 * XXX application where the PPB in the i80312 is used as a
    374 	 * XXX PPB.
    375 	 */
    376 	{
    377 		uint32_t reg;
    378 
    379 		printf("Resetting secondary PCI bus...\n");
    380 		reg = bus_space_read_4(&obio_bs_tag,
    381 		    I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL);
    382 		bus_space_write_4(&obio_bs_tag,
    383 		    I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL,
    384 		    reg | PPB_BC_SECONDARY_RESET);
    385 		delay(10 * 1000);	/* 10ms enough? */
    386 		bus_space_write_4(&obio_bs_tag,
    387 		    I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL,
    388 		    reg);
    389 	}
    390 
    391 	/*
    392 	 * We are currently running with the MMU enabled and the
    393 	 * entire address space mapped VA==PA, except for the
    394 	 * first 64M of RAM is also double-mapped at 0xc0000000.
    395 	 * There is an L1 page table at 0xa0004000.
    396 	 */
    397 
    398 	/*
    399 	 * Fetch the SDRAM start/size from the i80312 SDRAM configration
    400 	 * registers.
    401 	 */
    402 	i80312_sdram_bounds(&obio_bs_tag, I80312_PMMR_BASE + I80312_MEM_BASE,
    403 	    &memstart, &memsize);
    404 
    405 	printf("initarm: Configuring system ...\n");
    406 
    407 	/* Fake bootconfig structure for the benefit of pmap.c */
    408 	/* XXX must make the memory description h/w independant */
    409 	bootconfig.dramblocks = 1;
    410 	bootconfig.dram[0].address = memstart;
    411 	bootconfig.dram[0].pages = memsize / PAGE_SIZE;
    412 
    413 	/*
    414 	 * Set up the variables that define the availablilty of
    415 	 * physical memory.  For now, we're going to set
    416 	 * physical_freestart to 0xa0200000 (where the kernel
    417 	 * was loaded), and allocate the memory we need downwards.
    418 	 * If we get too close to the L1 table that we set up, we
    419 	 * will panic.  We will update physical_freestart and
    420 	 * physical_freeend later to reflect what pmap_bootstrap()
    421 	 * wants to see.
    422 	 *
    423 	 * XXX pmap_bootstrap() needs an enema.
    424 	 */
    425 	physical_start = bootconfig.dram[0].address;
    426 	physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE);
    427 
    428 	physical_freestart = 0xa0009000UL;
    429 	physical_freeend = 0xa0200000UL;
    430 
    431 	physmem = (physical_end - physical_start) / PAGE_SIZE;
    432 
    433 	/* Tell the user about the memory */
    434 	printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem,
    435 	    physical_start, physical_end - 1);
    436 
    437 	/*
    438 	 * Okay, the kernel starts 2MB in from the bottom of physical
    439 	 * memory.  We are going to allocate our bootstrap pages downwards
    440 	 * from there.
    441 	 *
    442 	 * We need to allocate some fixed page tables to get the kernel
    443 	 * going.  We allocate one page directory and a number of page
    444 	 * tables and store the physical addresses in the kernel_pt_table
    445 	 * array.
    446 	 *
    447 	 * The kernel page directory must be on a 16K boundary.  The page
    448 	 * tables must be on 4K bounaries.  What we do is allocate the
    449 	 * page directory on the first 16K boundary that we encounter, and
    450 	 * the page tables on 4K boundaries otherwise.  Since we allocate
    451 	 * at least 3 L2 page tables, we are guaranteed to encounter at
    452 	 * least one 16K aligned region.
    453 	 */
    454 
    455 #ifdef VERBOSE_INIT_ARM
    456 	printf("Allocating page tables\n");
    457 #endif
    458 
    459 	free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE;
    460 
    461 #ifdef VERBOSE_INIT_ARM
    462 	printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n",
    463 	       physical_freestart, free_pages, free_pages);
    464 #endif
    465 
    466 	/* Define a macro to simplify memory allocation */
    467 #define	valloc_pages(var, np)				\
    468 	alloc_pages((var).pv_pa, (np));			\
    469 	(var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start;
    470 
    471 #define alloc_pages(var, np)				\
    472 	physical_freeend -= ((np) * PAGE_SIZE);		\
    473 	if (physical_freeend < physical_freestart)	\
    474 		panic("initarm: out of memory");	\
    475 	(var) = physical_freeend;			\
    476 	free_pages -= (np);				\
    477 	memset((char *)(var), 0, ((np) * PAGE_SIZE));
    478 
    479 	loop1 = 0;
    480 	kernel_l1pt.pv_pa = 0;
    481 	for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
    482 		/* Are we 16KB aligned for an L1 ? */
    483 		if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0
    484 		    && kernel_l1pt.pv_pa == 0) {
    485 			valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
    486 		} else {
    487 #ifdef ARM32_PMAP_NEW
    488 			valloc_pages(kernel_pt_table[loop1],
    489 			    L2_TABLE_SIZE / PAGE_SIZE);
    490 #else
    491 			alloc_pages(kernel_pt_table[loop1].pv_pa,
    492 			    L2_TABLE_SIZE / PAGE_SIZE);
    493 			kernel_pt_table[loop1].pv_va =
    494 			    kernel_pt_table[loop1].pv_pa;
    495 #endif
    496 			++loop1;
    497 		}
    498 	}
    499 
    500 	/* This should never be able to happen but better confirm that. */
    501 	if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE-1)) != 0)
    502 		panic("initarm: Failed to align the kernel page directory");
    503 
    504 	/*
    505 	 * Allocate a page for the system page mapped to V0x00000000
    506 	 * This page will just contain the system vectors and can be
    507 	 * shared by all processes.
    508 	 */
    509 	alloc_pages(systempage.pv_pa, 1);
    510 
    511 	/* Allocate a page for the page table to map kernel page tables. */
    512 	valloc_pages(kernel_ptpt, L2_TABLE_SIZE / PAGE_SIZE);
    513 
    514 	/* Allocate stacks for all modes */
    515 	valloc_pages(irqstack, IRQ_STACK_SIZE);
    516 	valloc_pages(abtstack, ABT_STACK_SIZE);
    517 	valloc_pages(undstack, UND_STACK_SIZE);
    518 	valloc_pages(kernelstack, UPAGES);
    519 
    520 	/* Allocate enough pages for cleaning the Mini-Data cache. */
    521 	KASSERT(xscale_minidata_clean_size <= PAGE_SIZE);
    522 	valloc_pages(minidataclean, 1);
    523 
    524 #ifdef VERBOSE_INIT_ARM
    525 	printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa,
    526 	    irqstack.pv_va);
    527 	printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa,
    528 	    abtstack.pv_va);
    529 	printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa,
    530 	    undstack.pv_va);
    531 	printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa,
    532 	    kernelstack.pv_va);
    533 #endif
    534 
    535 	/*
    536 	 * XXX Defer this to later so that we can reclaim the memory
    537 	 * XXX used by the RedBoot page tables.
    538 	 */
    539 	alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE);
    540 
    541 	/*
    542 	 * Ok we have allocated physical pages for the primary kernel
    543 	 * page tables
    544 	 */
    545 
    546 #ifdef VERBOSE_INIT_ARM
    547 	printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa);
    548 #endif
    549 
    550 	/*
    551 	 * Now we start construction of the L1 page table
    552 	 * We start by mapping the L2 page tables into the L1.
    553 	 * This means that we can replace L1 mappings later on if necessary
    554 	 */
    555 	l1pagetable = kernel_l1pt.pv_pa;
    556 
    557 	/* Map the L2 pages tables in the L1 page table */
    558 	pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH & ~(0x00400000 - 1),
    559 	    &kernel_pt_table[KERNEL_PT_SYS]);
    560 	for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++)
    561 		pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000,
    562 		    &kernel_pt_table[KERNEL_PT_KERNEL + loop]);
    563 	pmap_link_l2pt(l1pagetable, IQ80310_IOPXS_VBASE,
    564 	    &kernel_pt_table[KERNEL_PT_IOPXS]);
    565 	for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
    566 		pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
    567 		    &kernel_pt_table[KERNEL_PT_VMDATA + loop]);
    568 	pmap_link_l2pt(l1pagetable, PTE_BASE, &kernel_ptpt);
    569 
    570 	/* update the top of the kernel VM */
    571 	pmap_curmaxkvaddr =
    572 	    KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000);
    573 
    574 #ifdef VERBOSE_INIT_ARM
    575 	printf("Mapping kernel\n");
    576 #endif
    577 
    578 	/* Now we fill in the L2 pagetable for the kernel static code/data */
    579 	{
    580 		extern char etext[], _end[];
    581 		size_t textsize = (uintptr_t) etext - KERNEL_TEXT_BASE;
    582 		size_t totalsize = (uintptr_t) _end - KERNEL_TEXT_BASE;
    583 		u_int logical;
    584 
    585 		textsize = (textsize + PGOFSET) & ~PGOFSET;
    586 		totalsize = (totalsize + PGOFSET) & ~PGOFSET;
    587 
    588 		logical = 0x00200000;	/* offset of kernel in RAM */
    589 
    590 		logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
    591 		    physical_start + logical, textsize,
    592 		    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    593 		logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
    594 		    physical_start + logical, totalsize - textsize,
    595 		    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    596 	}
    597 
    598 #ifdef VERBOSE_INIT_ARM
    599 	printf("Constructing L2 page tables\n");
    600 #endif
    601 
    602 	/* Map the stack pages */
    603 	pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
    604 	    IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    605 	pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
    606 	    ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    607 	pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
    608 	    UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    609 	pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
    610 	    UPAGES * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    611 
    612 #ifndef ARM32_PMAP_NEW
    613 	pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
    614 	    L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    615 #else
    616 	pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
    617 	    L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
    618 
    619 	for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
    620 		pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va,
    621 		    kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
    622 		    VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
    623 	}
    624 #endif
    625 
    626 	/* Map the Mini-Data cache clean area. */
    627 	xscale_setup_minidata(l1pagetable, minidataclean.pv_va,
    628 	    minidataclean.pv_pa);
    629 
    630 	/* Map the page table that maps the kernel pages */
    631 	pmap_map_entry(l1pagetable, kernel_ptpt.pv_va, kernel_ptpt.pv_pa,
    632 #ifndef ARM32_PMAP_NEW
    633 	    VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
    634 #else
    635 	    VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
    636 #endif
    637 
    638 	/*
    639 	 * Map entries in the page table used to map PTE's
    640 	 * Basically every kernel page table gets mapped here
    641 	 */
    642 	/* The -2 is slightly bogus, it should be -log2(sizeof(pt_entry_t)) */
    643 	for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++) {
    644 		pmap_map_entry(l1pagetable,
    645 		    PTE_BASE + ((KERNEL_BASE +
    646 		    (loop * 0x00400000)) >> (PGSHIFT-2)),
    647 		    kernel_pt_table[KERNEL_PT_KERNEL + loop].pv_pa,
    648 #ifndef ARM32_PMAP_NEW
    649 		    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    650 #else
    651 		    VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
    652 #endif
    653 	}
    654 	pmap_map_entry(l1pagetable,
    655 	    PTE_BASE + (PTE_BASE >> (PGSHIFT-2)),
    656 #ifndef ARM32_PMAP_NEW
    657 	    kernel_ptpt.pv_pa, VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
    658 #else
    659 	    kernel_ptpt.pv_pa, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
    660 #endif
    661 	pmap_map_entry(l1pagetable,
    662 	    trunc_page(PTE_BASE + (ARM_VECTORS_HIGH >> (PGSHIFT-2))),
    663 	    kernel_pt_table[KERNEL_PT_SYS].pv_pa,
    664 	    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    665 	for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
    666 		pmap_map_entry(l1pagetable,
    667 		    PTE_BASE + ((KERNEL_VM_BASE +
    668 		    (loop * 0x00400000)) >> (PGSHIFT-2)),
    669 		    kernel_pt_table[KERNEL_PT_VMDATA + loop].pv_pa,
    670 		    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    671 
    672 	/* Map the vector page. */
    673 	pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
    674 	    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    675 
    676 	/*
    677 	 * Map devices we can map w/ section mappings.
    678 	 */
    679 	loop = 0;
    680 	while (l1_sec_table[loop].size) {
    681 		vm_size_t sz;
    682 
    683 #ifdef VERBOSE_INIT_ARM
    684 		printf("%08lx -> %08lx @ %08lx\n", l1_sec_table[loop].pa,
    685 		    l1_sec_table[loop].pa + l1_sec_table[loop].size - 1,
    686 		    l1_sec_table[loop].va);
    687 #endif
    688 		for (sz = 0; sz < l1_sec_table[loop].size; sz += L1_S_SIZE)
    689 			pmap_map_section(l1pagetable,
    690 			    l1_sec_table[loop].va + sz,
    691 			    l1_sec_table[loop].pa + sz,
    692 			    l1_sec_table[loop].prot,
    693 			    l1_sec_table[loop].cache);
    694 		++loop;
    695 	}
    696 
    697 	/*
    698 	 * Map the PCI I/O spaces and i80312 registers.  These are too
    699 	 * small to be mapped w/ section mappings.
    700 	 */
    701 #ifdef VERBOSE_INIT_ARM
    702 	printf("Mapping PIOW 0x%08lx -> 0x%08lx @ 0x%08lx\n",
    703 	    I80312_PCI_XLATE_PIOW_BASE,
    704 	    I80312_PCI_XLATE_PIOW_BASE + I80312_PCI_XLATE_IOSIZE - 1,
    705 	    IQ80310_PIOW_VBASE);
    706 #endif
    707 	pmap_map_chunk(l1pagetable, IQ80310_PIOW_VBASE,
    708 	    I80312_PCI_XLATE_PIOW_BASE, I80312_PCI_XLATE_IOSIZE,
    709 	    VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
    710 
    711 #ifdef VERBOSE_INIT_ARM
    712 	printf("Mapping SIOW 0x%08lx -> 0x%08lx @ 0x%08lx\n",
    713 	    I80312_PCI_XLATE_SIOW_BASE,
    714 	    I80312_PCI_XLATE_SIOW_BASE + I80312_PCI_XLATE_IOSIZE - 1,
    715 	    IQ80310_SIOW_VBASE);
    716 #endif
    717 	pmap_map_chunk(l1pagetable, IQ80310_SIOW_VBASE,
    718 	    I80312_PCI_XLATE_SIOW_BASE, I80312_PCI_XLATE_IOSIZE,
    719 	    VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
    720 
    721 #ifdef VERBOSE_INIT_ARM
    722 	printf("Mapping 80312 0x%08lx -> 0x%08lx @ 0x%08lx\n",
    723 	    I80312_PMMR_BASE,
    724 	    I80312_PMMR_BASE + I80312_PMMR_SIZE - 1,
    725 	    IQ80310_80312_VBASE);
    726 #endif
    727 	pmap_map_chunk(l1pagetable, IQ80310_80312_VBASE,
    728 	    I80312_PMMR_BASE, I80312_PMMR_SIZE,
    729 	    VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
    730 
    731 	/*
    732 	 * Give the XScale global cache clean code an appropriately
    733 	 * sized chunk of unmapped VA space starting at 0xff000000
    734 	 * (our device mappings end before this address).
    735 	 */
    736 	xscale_cache_clean_addr = 0xff000000U;
    737 
    738 	/*
    739 	 * Now we have the real page tables in place so we can switch to them.
    740 	 * Once this is done we will be running with the REAL kernel page
    741 	 * tables.
    742 	 */
    743 
    744 	/*
    745 	 * Update the physical_freestart/physical_freeend/free_pages
    746 	 * variables.
    747 	 */
    748 	{
    749 		extern char _end[];
    750 
    751 		physical_freestart = physical_start +
    752 		    (((((uintptr_t) _end) + PGOFSET) & ~PGOFSET) -
    753 		     KERNEL_BASE);
    754 		physical_freeend = physical_end;
    755 		free_pages =
    756 		    (physical_freeend - physical_freestart) / PAGE_SIZE;
    757 	}
    758 
    759 	/* Switch tables */
    760 #ifdef VERBOSE_INIT_ARM
    761 	printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
    762 	       physical_freestart, free_pages, free_pages);
    763 	printf("switching to new L1 page table  @%#lx...", kernel_l1pt.pv_pa);
    764 #endif
    765 #ifdef ARM32_PMAP_NEW
    766 	cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
    767 #endif
    768 	setttb(kernel_l1pt.pv_pa);
    769 	cpu_tlb_flushID();
    770 #ifdef ARM32_PMAP_NEW
    771 	cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
    772 
    773 	/*
    774 	 * Moved from cpu_startup() as data_abort_handler() references
    775 	 * this during uvm init
    776 	 */
    777 	proc0paddr = (struct user *)kernelstack.pv_va;
    778 	lwp0.l_addr = proc0paddr;
    779 #endif
    780 
    781 #ifdef VERBOSE_INIT_ARM
    782 	printf("done!\n");
    783 #endif
    784 
    785 #ifdef VERBOSE_INIT_ARM
    786 	printf("bootstrap done.\n");
    787 #endif
    788 
    789 	arm32_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
    790 
    791 	/*
    792 	 * Pages were allocated during the secondary bootstrap for the
    793 	 * stacks for different CPU modes.
    794 	 * We must now set the r13 registers in the different CPU modes to
    795 	 * point to these stacks.
    796 	 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
    797 	 * of the stack memory.
    798 	 */
    799 	printf("init subsystems: stacks ");
    800 
    801 	set_stackptr(PSR_IRQ32_MODE,
    802 	    irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
    803 	set_stackptr(PSR_ABT32_MODE,
    804 	    abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
    805 	set_stackptr(PSR_UND32_MODE,
    806 	    undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
    807 
    808 	/*
    809 	 * Well we should set a data abort handler.
    810 	 * Once things get going this will change as we will need a proper
    811 	 * handler.
    812 	 * Until then we will use a handler that just panics but tells us
    813 	 * why.
    814 	 * Initialisation of the vectors will just panic on a data abort.
    815 	 * This just fills in a slighly better one.
    816 	 */
    817 	printf("vectors ");
    818 	data_abort_handler_address = (u_int)data_abort_handler;
    819 	prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
    820 	undefined_handler_address = (u_int)undefinedinstruction_bounce;
    821 
    822 	/* Initialise the undefined instruction handlers */
    823 	printf("undefined ");
    824 	undefined_init();
    825 
    826 	/* Load memory into UVM. */
    827 	printf("page ");
    828 	uvm_setpagesize();	/* initialize PAGE_SIZE-dependent variables */
    829 	uvm_page_physload(atop(physical_freestart), atop(physical_freeend),
    830 	    atop(physical_freestart), atop(physical_freeend),
    831 	    VM_FREELIST_DEFAULT);
    832 
    833 	/* Boot strap pmap telling it where the kernel page table is */
    834 	printf("pmap ");
    835 #ifdef ARM32_PMAP_NEW
    836 	pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va);
    837 #else
    838 	pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, kernel_ptpt);
    839 #endif
    840 
    841 	/* Setup the IRQ system */
    842 	printf("irq ");
    843 	iq80310_intr_init();
    844 	printf("done.\n");
    845 
    846 #ifdef IPKDB
    847 	/* Initialise ipkdb */
    848 	ipkdb_init();
    849 	if (boothowto & RB_KDB)
    850 		ipkdb_connect(0);
    851 #endif
    852 
    853 #ifdef DDB
    854 	db_machine_init();
    855 
    856 	/* Firmware doesn't load symbols. */
    857 	ddb_init(0, NULL, NULL);
    858 
    859 	if (boothowto & RB_KDB)
    860 		Debugger();
    861 #endif
    862 
    863 	/* We return the new stack pointer address */
    864 	return(kernelstack.pv_va + USPACE_SVC_STACK_TOP);
    865 }
    866 
    867 void
    868 consinit(void)
    869 {
    870 	static const bus_addr_t comcnaddrs[] = {
    871 		IQ80310_UART2,		/* com0 (J9) */
    872 		IQ80310_UART1,		/* com1 (J10) */
    873 	};
    874 	static int consinit_called;
    875 
    876 	if (consinit_called != 0)
    877 		return;
    878 
    879 	consinit_called = 1;
    880 
    881 #if NCOM > 0
    882 	if (comcnattach(&obio_bs_tag, comcnaddrs[comcnunit], comcnspeed,
    883 	    COM_FREQ, comcnmode))
    884 		panic("can't init serial console @%lx", comcnaddrs[comcnunit]);
    885 #else
    886 	panic("serial console @%lx not configured", comcnaddrs[comcnunit]);
    887 #endif
    888 }
    889