iq80310_machdep.c revision 1.5 1 /* $NetBSD: iq80310_machdep.c,v 1.5 2001/11/09 00:34:37 thorpej Exp $ */
2
3 /*
4 * Copyright (c) 1997,1998 Mark Brinicombe.
5 * Copyright (c) 1997,1998 Causality Limited.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by Mark Brinicombe
19 * for the NetBSD Project.
20 * 4. The name of the company nor the name of the author may be used to
21 * endorse or promote products derived from this software without specific
22 * prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
25 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
26 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
27 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
28 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
29 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * SUCH DAMAGE.
35 *
36 * Machine dependant functions for kernel setup for Intel IQ80310 evaluation
37 * boards using RedBoot firmware.
38 */
39
40 #include "opt_ddb.h"
41 #include "opt_pmap_debug.h"
42
43 #include <sys/param.h>
44 #include <sys/device.h>
45 #include <sys/systm.h>
46 #include <sys/kernel.h>
47 #include <sys/exec.h>
48 #include <sys/proc.h>
49 #include <sys/msgbuf.h>
50 #include <sys/reboot.h>
51 #include <sys/termios.h>
52
53 #include <dev/cons.h>
54
55 #include <machine/db_machdep.h>
56 #include <ddb/db_sym.h>
57 #include <ddb/db_extern.h>
58
59 #include <machine/bootconfig.h>
60 #include <machine/bus.h>
61 #include <machine/cpu.h>
62 #include <machine/frame.h>
63 #include <machine/irqhandler.h>
64 #include <machine/pte.h>
65 #include <machine/undefined.h>
66
67 #include <arm/xscale/i80312reg.h>
68 #include <arm/xscale/i80312var.h>
69
70 #include <dev/pci/ppbreg.h>
71
72 #include <evbarm/iq80310/iq80310reg.h>
73 #include <evbarm/iq80310/iq80310var.h>
74 #include <evbarm/iq80310/obiovar.h>
75
76 #include "opt_ipkdb.h"
77
78 /*
79 * Address to call from cpu_reset() to reset the machine.
80 * This is machine architecture dependant as it varies depending
81 * on where the ROM appears when you turn the MMU off.
82 */
83
84 u_int cpu_reset_address = 0;
85
86 /* Define various stack sizes in pages */
87 #define IRQ_STACK_SIZE 1
88 #define ABT_STACK_SIZE 1
89 #ifdef IPKDB
90 #define UND_STACK_SIZE 2
91 #else
92 #define UND_STACK_SIZE 1
93 #endif
94
95 BootConfig bootconfig; /* Boot config storage */
96 static char bootargs[MAX_BOOT_STRING + 1];
97 char *boot_args = NULL;
98 char *boot_file = NULL;
99
100 vm_offset_t physical_start;
101 vm_offset_t physical_freestart;
102 vm_offset_t physical_freeend;
103 vm_offset_t physical_end;
104 u_int free_pages;
105 vm_offset_t pagetables_start;
106 int physmem = 0;
107
108 /*int debug_flags;*/
109 #ifndef PMAP_STATIC_L1S
110 int max_processes = 64; /* Default number */
111 #endif /* !PMAP_STATIC_L1S */
112
113 /* Physical and virtual addresses for some global pages */
114 pv_addr_t systempage;
115 pv_addr_t irqstack;
116 pv_addr_t undstack;
117 pv_addr_t abtstack;
118 pv_addr_t kernelstack;
119
120 vm_offset_t msgbufphys;
121
122 extern u_int data_abort_handler_address;
123 extern u_int prefetch_abort_handler_address;
124 extern u_int undefined_handler_address;
125
126 #ifdef PMAP_DEBUG
127 extern int pmap_debug_level;
128 #endif
129
130 #define KERNEL_PT_SYS 0 /* Page table for mapping proc0 zero page */
131 #define KERNEL_PT_KERNEL 1 /* Page table for mapping kernel */
132 #define KERNEL_PT_IOPXS 2 /* Page table for mapping i80312 */
133 #define KERNEL_PT_VMDATA 3 /* Page tables for mapping kernel VM */
134 #define KERNEL_PT_VMDATA_NUM (KERNEL_VM_SIZE >> (PDSHIFT + 2))
135 #define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
136
137 pt_entry_t kernel_pt_table[NUM_KERNEL_PTS];
138
139 struct user *proc0paddr;
140
141 /* Prototypes */
142
143 void consinit(void);
144
145 void map_section(vm_offset_t pt, vm_offset_t va, vm_offset_t pa,
146 int cacheable);
147 void map_pagetable(vm_offset_t pt, vm_offset_t va, vm_offset_t pa);
148 void map_entry(vm_offset_t pt, vm_offset_t va, vm_offset_t pa);
149 void map_entry_nc(vm_offset_t pt, vm_offset_t va, vm_offset_t pa);
150 void map_entry_ro(vm_offset_t pt, vm_offset_t va, vm_offset_t pa);
151 vm_size_t map_chunk(vm_offset_t pd, vm_offset_t pt, vm_offset_t va,
152 vm_offset_t pa, vm_size_t size, u_int acc, u_int flg);
153
154 void process_kernel_args(char *);
155 void data_abort_handler(trapframe_t *frame);
156 void prefetch_abort_handler(trapframe_t *frame);
157 void undefinedinstruction_bounce(trapframe_t *frame);
158
159 extern void db_machine_init(void);
160 extern void parse_mi_bootargs(char *args);
161 extern void dumpsys(void);
162
163 #include "com.h"
164 #if NCOM > 0
165 #include <dev/ic/comreg.h>
166 #include <dev/ic/comvar.h>
167 #endif
168
169 #ifndef CONSPEED
170 #define CONSPEED B115200 /* What RedBoot uses */
171 #endif
172 #ifndef CONMODE
173 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
174 #endif
175
176 int comcnspeed = CONSPEED;
177 int comcnmode = CONMODE;
178
179 /*
180 * void cpu_reboot(int howto, char *bootstr)
181 *
182 * Reboots the system
183 *
184 * Deal with any syncing, unmounting, dumping and shutdown hooks,
185 * then reset the CPU.
186 */
187 void
188 cpu_reboot(int howto, char *bootstr)
189 {
190 #ifdef DIAGNOSTIC
191 /* info */
192 printf("boot: howto=%08x curproc=%p\n", howto, curproc);
193 #endif
194
195 /*
196 * If we are still cold then hit the air brakes
197 * and crash to earth fast
198 */
199 if (cold) {
200 doshutdownhooks();
201 printf("The operating system has halted.\n");
202 printf("Please press any key to reboot.\n\n");
203 cngetc();
204 printf("rebooting...\n");
205 cpu_reset();
206 /*NOTREACHED*/
207 }
208
209 /* Disable console buffering */
210 /* cnpollc(1);*/
211
212 /*
213 * If RB_NOSYNC was not specified sync the discs.
214 * Note: Unless cold is set to 1 here, syslogd will die during the
215 * unmount. It looks like syslogd is getting woken up only to find
216 * that it cannot page part of the binary in as the filesystem has
217 * been unmounted.
218 */
219 if (!(howto & RB_NOSYNC))
220 bootsync();
221
222 /* Say NO to interrupts */
223 splhigh();
224
225 /* Do a dump if requested. */
226 if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
227 dumpsys();
228
229 /* Run any shutdown hooks */
230 doshutdownhooks();
231
232 /* Make sure IRQ's are disabled */
233 IRQdisable;
234
235 if (howto & RB_HALT) {
236 printf("The operating system has halted.\n");
237 printf("Please press any key to reboot.\n\n");
238 cngetc();
239 }
240
241 printf("rebooting...\n");
242 cpu_reset();
243 /*NOTREACHED*/
244 }
245
246 /*
247 * Mapping table for core kernel memory. This memory is mapped at init
248 * time with section mappings.
249 */
250 struct l1_sec_map {
251 vaddr_t va;
252 vaddr_t pa;
253 vsize_t size;
254 int flags;
255 } l1_sec_table[] = {
256 /*
257 * Map the on-board devices VA == PA so that we can access them
258 * with the MMU on or off.
259 */
260 {
261 IQ80310_OBIO_BASE,
262 IQ80310_OBIO_BASE,
263 IQ80310_OBIO_SIZE,
264 0,
265 },
266
267 {
268 0,
269 0,
270 0,
271 0,
272 }
273 };
274
275 /*
276 * u_int initarm(...)
277 *
278 * Initial entry point on startup. This gets called before main() is
279 * entered.
280 * It should be responsible for setting up everything that must be
281 * in place when main is called.
282 * This includes
283 * Taking a copy of the boot configuration structure.
284 * Initialising the physical console so characters can be printed.
285 * Setting up page tables for the kernel
286 * Relocating the kernel to the bottom of physical memory
287 */
288 u_int
289 initarm(void)
290 {
291 int loop;
292 int loop1;
293 u_int l1pagetable;
294 u_int l2pagetable;
295 extern char page0[], page0_end[];
296 pv_addr_t kernel_l1pt;
297 pv_addr_t kernel_ptpt;
298 paddr_t memstart;
299 psize_t memsize;
300
301 /*
302 * Clear out the 7-segment display. Whee, the first visual
303 * indication that we're running kernel code.
304 */
305 iq80310_7seg(' ', ' ');
306
307 /*
308 * Heads up ... Setup the CPU / MMU / TLB functions
309 */
310 if (set_cpufuncs())
311 panic("cpu not recognized!");
312
313 /* Calibrate the delay loop. */
314 iq80310_calibrate_delay();
315
316 /*
317 * Since we map the on-board devices VA==PA, and the kernel
318 * is running VA==PA, it's possible for us to initialize
319 * the console now.
320 */
321 consinit();
322
323 /* Talk to the user */
324 printf("\nNetBSD/evbarm (IQ80310) booting ...\n");
325
326 /*
327 * Reset the secondary PCI bus. RedBoot doesn't stop devices
328 * on the PCI bus before handing us control, so we have to
329 * do this.
330 *
331 * XXX This is arguably a bug in RedBoot, and doing this reset
332 * XXX could be problematic in the future if we encounter an
333 * XXX application where the PPB in the i80312 is used as a
334 * XXX PPB.
335 */
336 {
337 uint32_t reg;
338
339 printf("Resetting secondary PCI bus...\n");
340 reg = bus_space_read_4(&obio_bs_tag,
341 I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL);
342 bus_space_write_4(&obio_bs_tag,
343 I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL,
344 reg | PPB_BC_SECONDARY_RESET);
345 delay(10 * 1000); /* 10ms enough? */
346 bus_space_write_4(&obio_bs_tag,
347 I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL,
348 reg);
349 }
350
351 /*
352 * Okay, RedBoot has provided us with the following memory map:
353 *
354 * Physical Address Range Description
355 * ----------------------- ----------------------------------
356 * 0x00000000 - 0x00000fff flash Memory
357 * 0x00001000 - 0x00001fff 80312 Internal Registers
358 * 0x00002000 - 0x007fffff flash Memory
359 * 0x00800000 - 0x7fffffff PCI ATU Outbound Direct Window
360 * 0x80000000 - 0x83ffffff Primary PCI 32-bit Memory
361 * 0x84000000 - 0x87ffffff Primary PCI 64-bit Memory
362 * 0x88000000 - 0x8bffffff Secondary PCI 32-bit Memory
363 * 0x8c000000 - 0x8fffffff Secondary PCI 64-bit Memory
364 * 0x90000000 - 0x9000ffff Primary PCI IO Space
365 * 0x90010000 - 0x9001ffff Secondary PCI IO Space
366 * 0x90020000 - 0x9fffffff Unused
367 * 0xa0000000 - 0xbfffffff SDRAM
368 * 0xc0000000 - 0xefffffff Unused
369 * 0xf0000000 - 0xffffffff 80200 Internal Registers
370 *
371 *
372 * Virtual Address Range C B Description
373 * ----------------------- - - ----------------------------------
374 * 0x00000000 - 0x00000fff Y Y SDRAM
375 * 0x00001000 - 0x00001fff N N 80312 Internal Registers
376 * 0x00002000 - 0x007fffff Y N flash Memory
377 * 0x00800000 - 0x7fffffff N N PCI ATU Outbound Direct Window
378 * 0x80000000 - 0x83ffffff N N Primary PCI 32-bit Memory
379 * 0x84000000 - 0x87ffffff N N Primary PCI 64-bit Memory
380 * 0x88000000 - 0x8bffffff N N Secondary PCI 32-bit Memory
381 * 0x8c000000 - 0x8fffffff N N Secondary PCI 64-bit Memory
382 * 0x90000000 - 0x9000ffff N N Primary PCI IO Space
383 * 0x90010000 - 0x9001ffff N N Secondary PCI IO Space
384 * 0xa0000000 - 0xa0000fff Y N flash
385 * 0xa0001000 - 0xbfffffff Y Y SDRAM
386 * 0xc0000000 - 0xcfffffff Y Y Cache Flush Region
387 * 0xf0000000 - 0xffffffff N N 80200 Internal Registers
388 *
389 * The first level page table is at 0xa0004000. There are also
390 * 2 second-level tables at 0xa0008000 and 0xa0008400.
391 *
392 * This corresponds roughly to the physical memory map, i.e.
393 * we are quite nearly running VA==PA.
394 */
395
396 /*
397 * Examine the boot args string for options we need to know about
398 * now.
399 */
400 #if 0
401 process_kernel_args((char *)nwbootinfo.bt_args);
402 #endif
403
404 /*
405 * Fetch the SDRAM start/size from the i80312 SDRAM configration
406 * registers.
407 */
408 i80312_sdram_bounds(&obio_bs_tag, I80312_PMMR_BASE + I80312_MEM_BASE,
409 &memstart, &memsize);
410
411 printf("initarm: Configuring system ...\n");
412
413 /* Fake bootconfig structure for the benefit of pmap.c */
414 /* XXX must make the memory description h/w independant */
415 bootconfig.dramblocks = 1;
416 bootconfig.dram[0].address = memstart;
417 bootconfig.dram[0].pages = memsize / NBPG;
418
419 /*
420 * Set up the variables that define the availablilty of
421 * physical memory. For now, we're going to set
422 * physical_freestart to 0xa0200000 (where the kernel
423 * was loaded), and allocate the memory we need downwards.
424 * If we get too close to the page tables that RedBoot
425 * set up, we will panic. We will update physical_freestart
426 * and physical_freeend later to reflect what pmap_bootstrap()
427 * wants to see.
428 *
429 * XXX pmap_bootstrap() needs an enema.
430 */
431 physical_start = bootconfig.dram[0].address;
432 physical_end = physical_start + (bootconfig.dram[0].pages * NBPG);
433
434 physical_freestart = 0xa0009000UL;
435 physical_freeend = 0xa0200000UL;
436
437 physmem = (physical_end - physical_start) / NBPG;
438
439 /* Tell the user about the memory */
440 printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem,
441 physical_start, physical_end - 1);
442
443 /*
444 * Okay, the kernel starts 2MB in from the bottom of physical
445 * memory. We are going to allocate our bootstrap pages downwards
446 * from there.
447 *
448 * We need to allocate some fixed page tables to get the kernel
449 * going. We allocate one page directory and a number of page
450 * tables and store the physical addresses in the kernel_pt_table
451 * array.
452 *
453 * The kernel page directory must be on a 16K boundary. The page
454 * tables must be on 4K bounaries. What we do is allocate the
455 * page directory on the first 16K boundary that we encounter, and
456 * the page tables on 4K boundaries otherwise. Since we allocate
457 * at least 3 L2 page tables, we are guaranteed to encounter at
458 * least one 16K aligned region.
459 */
460
461 #ifdef VERBOSE_INIT_ARM
462 printf("Allocating page tables\n");
463 #endif
464
465 free_pages = (physical_freeend - physical_freestart) / NBPG;
466
467 #ifdef VERBOSE_INIT_ARM
468 printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n",
469 physical_freestart, free_pages, free_pages);
470 #endif
471
472 /* Define a macro to simplify memory allocation */
473 #define valloc_pages(var, np) \
474 alloc_pages((var).pv_pa, (np)); \
475 (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start;
476
477 #define alloc_pages(var, np) \
478 physical_freeend -= ((np) * NBPG); \
479 if (physical_freeend < physical_freestart) \
480 panic("initarm: out of memory"); \
481 (var) = physical_freeend; \
482 free_pages -= (np); \
483 memset((char *)(var), 0, ((np) * NBPG));
484
485 loop1 = 0;
486 kernel_l1pt.pv_pa = 0;
487 for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
488 /* Are we 16KB aligned for an L1 ? */
489 if (((physical_freeend - PD_SIZE) & (PD_SIZE - 1)) == 0
490 && kernel_l1pt.pv_pa == 0) {
491 valloc_pages(kernel_l1pt, PD_SIZE / NBPG);
492 } else {
493 alloc_pages(kernel_pt_table[loop1], PT_SIZE / NBPG);
494 ++loop1;
495 }
496 }
497
498 /* This should never be able to happen but better confirm that. */
499 if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (PD_SIZE-1)) != 0)
500 panic("initarm: Failed to align the kernel page directory\n");
501
502 /*
503 * Allocate a page for the system page mapped to V0x00000000
504 * This page will just contain the system vectors and can be
505 * shared by all processes.
506 */
507 alloc_pages(systempage.pv_pa, 1);
508
509 /* Allocate a page for the page table to map kernel page tables. */
510 valloc_pages(kernel_ptpt, PT_SIZE / NBPG);
511
512 /* Allocate stacks for all modes */
513 valloc_pages(irqstack, IRQ_STACK_SIZE);
514 valloc_pages(abtstack, ABT_STACK_SIZE);
515 valloc_pages(undstack, UND_STACK_SIZE);
516 valloc_pages(kernelstack, UPAGES);
517
518 #ifdef VERBOSE_INIT_ARM
519 printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa,
520 irqstack.pv_va);
521 printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa,
522 abtstack.pv_va);
523 printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa,
524 undstack.pv_va);
525 printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa,
526 kernelstack.pv_va);
527 #endif
528
529 /*
530 * XXX Defer this to later so that we can reclaim the memory
531 * XXX used by the RedBoot page tables.
532 */
533 alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / NBPG);
534
535 /*
536 * Ok we have allocated physical pages for the primary kernel
537 * page tables
538 */
539
540 #ifdef VERBOSE_INIT_ARM
541 printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa);
542 #endif
543
544 /*
545 * Now we start consturction of the L1 page table
546 * We start by mapping the L2 page tables into the L1.
547 * This means that we can replace L1 mappings later on if necessary
548 */
549 l1pagetable = kernel_l1pt.pv_pa;
550
551 /* Map the L2 pages tables in the L1 page table */
552 map_pagetable(l1pagetable, 0x00000000,
553 kernel_pt_table[KERNEL_PT_SYS]);
554 map_pagetable(l1pagetable, KERNEL_BASE,
555 kernel_pt_table[KERNEL_PT_KERNEL]);
556 map_pagetable(l1pagetable, IQ80310_IOPXS_VBASE,
557 kernel_pt_table[KERNEL_PT_IOPXS]);
558 for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; ++loop)
559 map_pagetable(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
560 kernel_pt_table[KERNEL_PT_VMDATA + loop]);
561 map_pagetable(l1pagetable, PROCESS_PAGE_TBLS_BASE,
562 kernel_ptpt.pv_pa);
563
564 #ifdef VERBOSE_INIT_ARM
565 printf("Mapping kernel\n");
566 #endif
567
568 /* Now we fill in the L2 pagetable for the kernel static code/data */
569 l2pagetable = kernel_pt_table[KERNEL_PT_KERNEL];
570
571 {
572 extern char etext[], _end[];
573 size_t textsize = (uintptr_t) etext - KERNEL_TEXT_BASE;
574 size_t totalsize = (uintptr_t) _end - KERNEL_TEXT_BASE;
575 u_int logical;
576
577 /* Round down text size and round up total size. */
578 textsize = textsize & ~PGOFSET;
579 totalsize = (totalsize + PGOFSET) & ~PGOFSET;
580
581 logical = 0x00200000; /* offset of kernel in RAM */
582
583 /*
584 * This maps the kernel text/data/bss VA==PA.
585 */
586 logical += map_chunk(0, l2pagetable, KERNEL_BASE + logical,
587 physical_start + logical, textsize,
588 AP_KRW, PT_CACHEABLE);
589 logical += map_chunk(0, l2pagetable, KERNEL_BASE + logical,
590 physical_start + logical, totalsize - textsize,
591 AP_KRW, PT_CACHEABLE);
592
593 #if 0 /* XXX No symbols yet. */
594 logical += map_chunk(0, l2pagetable, KERNEL_BASE + logical,
595 physical_start + logical, kernexec->a_syms + sizeof(int)
596 + *(u_int *)((int)end + kernexec->a_syms + sizeof(int)),
597 AP_KRW, PT_CACHEABLE);
598 #endif
599 }
600
601 #ifdef VERBOSE_INIT_ARM
602 printf("Constructing L2 page tables\n");
603 #endif
604
605 /* Map the stack pages */
606 map_chunk(0, l2pagetable, irqstack.pv_va, irqstack.pv_pa,
607 IRQ_STACK_SIZE * NBPG, AP_KRW, PT_CACHEABLE);
608 map_chunk(0, l2pagetable, abtstack.pv_va, abtstack.pv_pa,
609 ABT_STACK_SIZE * NBPG, AP_KRW, PT_CACHEABLE);
610 map_chunk(0, l2pagetable, undstack.pv_va, undstack.pv_pa,
611 UND_STACK_SIZE * NBPG, AP_KRW, PT_CACHEABLE);
612 map_chunk(0, l2pagetable, kernelstack.pv_va, kernelstack.pv_pa,
613 UPAGES * NBPG, AP_KRW, PT_CACHEABLE);
614 map_chunk(0, l2pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
615 PD_SIZE, AP_KRW, 0);
616
617 /* Map the page table that maps the kernel pages */
618 map_entry_nc(l2pagetable, kernel_ptpt.pv_pa, kernel_ptpt.pv_pa);
619
620 /*
621 * Map entries in the page table used to map PTE's
622 * Basically every kernel page table gets mapped here
623 */
624 /* The -2 is slightly bogus, it should be -log2(sizeof(pt_entry_t)) */
625 l2pagetable = kernel_ptpt.pv_pa;
626 map_entry_nc(l2pagetable, (KERNEL_BASE >> (PGSHIFT-2)),
627 kernel_pt_table[KERNEL_PT_KERNEL]);
628 map_entry_nc(l2pagetable, (PROCESS_PAGE_TBLS_BASE >> (PGSHIFT-2)),
629 kernel_ptpt.pv_pa);
630 map_entry_nc(l2pagetable, (0x00000000 >> (PGSHIFT-2)),
631 kernel_pt_table[KERNEL_PT_SYS]);
632 for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; ++loop)
633 map_entry_nc(l2pagetable, ((KERNEL_VM_BASE +
634 (loop * 0x00400000)) >> (PGSHIFT-2)),
635 kernel_pt_table[KERNEL_PT_VMDATA + loop]);
636
637 /*
638 * Map the system page in the kernel page table for the bottom 1Meg
639 * of the virtual memory map.
640 */
641 l2pagetable = kernel_pt_table[KERNEL_PT_SYS];
642 map_entry(l2pagetable, 0x00000000, systempage.pv_pa);
643
644 /*
645 * Map devices we can map w/ section mappings.
646 */
647 loop = 0;
648 while (l1_sec_table[loop].size) {
649 vm_size_t sz;
650
651 #ifdef VERBOSE_INIT_ARM
652 printf("%08lx -> %08lx @ %08lx\n", l1_sec_table[loop].pa,
653 l1_sec_table[loop].pa + l1_sec_table[loop].size - 1,
654 l1_sec_table[loop].va);
655 #endif
656 for (sz = 0; sz < l1_sec_table[loop].size; sz += L1_SEC_SIZE)
657 map_section(l1pagetable, l1_sec_table[loop].va + sz,
658 l1_sec_table[loop].pa + sz,
659 l1_sec_table[loop].flags);
660 ++loop;
661 }
662
663 /*
664 * Map the PCI I/O spaces and i80312 registers. These are too
665 * small to be mapped w/ section mappings.
666 */
667 l2pagetable = kernel_pt_table[KERNEL_PT_IOPXS];
668 #ifdef VERBOSE_INIT_ARM
669 printf("Mapping PIOW 0x%08lx -> 0x%08lx @ 0x%08lx\n",
670 I80312_PCI_XLATE_PIOW_BASE,
671 I80312_PCI_XLATE_PIOW_BASE + I80312_PCI_XLATE_IOSIZE - 1,
672 IQ80310_PIOW_VBASE);
673 #endif
674 map_chunk(0, l2pagetable, IQ80310_PIOW_VBASE,
675 I80312_PCI_XLATE_PIOW_BASE, I80312_PCI_XLATE_IOSIZE, AP_KRW, 0);
676
677 #ifdef VERBOSE_INIT_ARM
678 printf("Mapping SIOW 0x%08lx -> 0x%08lx @ 0x%08lx\n",
679 I80312_PCI_XLATE_SIOW_BASE,
680 I80312_PCI_XLATE_SIOW_BASE + I80312_PCI_XLATE_IOSIZE - 1,
681 IQ80310_SIOW_VBASE);
682 #endif
683 map_chunk(0, l2pagetable, IQ80310_SIOW_VBASE,
684 I80312_PCI_XLATE_SIOW_BASE, I80312_PCI_XLATE_IOSIZE, AP_KRW, 0);
685
686 #ifdef VERBOSE_INIT_ARM
687 printf("Mapping 80312 0x%08lx -> 0x%08lx @ 0x%08lx\n",
688 I80312_PMMR_BASE,
689 I80312_PMMR_BASE + I80312_PMMR_SIZE - 1,
690 IQ80310_80312_VBASE);
691 #endif
692 map_chunk(0, l2pagetable, IQ80310_80312_VBASE,
693 I80312_PMMR_BASE, I80312_PMMR_SIZE, AP_KRW, 0);
694
695 /*
696 * Now we have the real page tables in place so we can switch to them.
697 * Once this is done we will be running with the REAL kernel page
698 * tables.
699 */
700
701 /*
702 * Update the physical_freestart/physical_freeend/free_pages
703 * variables.
704 */
705 {
706 extern char _end[];
707
708 physical_freestart = (((uintptr_t) _end) + PGOFSET) & ~PGOFSET;
709 physical_freeend = physical_end;
710 free_pages = (physical_freeend - physical_freestart) / NBPG;
711 }
712
713 /* Switch tables */
714 #ifdef VERBOSE_INIT_ARM
715 printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
716 physical_freestart, free_pages, free_pages);
717 printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa);
718 #endif
719 setttb(kernel_l1pt.pv_pa);
720
721 #ifdef VERBOSE_INIT_ARM
722 printf("done!\n");
723 #endif
724
725 #ifdef VERBOSE_INIT_ARM
726 printf("bootstrap done.\n");
727 #endif
728
729 /* Right, set up the vectors at the bottom of page 0 */
730 memcpy((char *)0x00000000, page0, page0_end - page0);
731
732 /* We have modified a text page so sync the icache */
733 cpu_cache_syncI();
734
735 /*
736 * Pages were allocated during the secondary bootstrap for the
737 * stacks for different CPU modes.
738 * We must now set the r13 registers in the different CPU modes to
739 * point to these stacks.
740 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
741 * of the stack memory.
742 */
743 printf("init subsystems: stacks ");
744
745 set_stackptr(PSR_IRQ32_MODE, irqstack.pv_va + IRQ_STACK_SIZE * NBPG);
746 set_stackptr(PSR_ABT32_MODE, abtstack.pv_va + ABT_STACK_SIZE * NBPG);
747 set_stackptr(PSR_UND32_MODE, undstack.pv_va + UND_STACK_SIZE * NBPG);
748
749 /*
750 * Well we should set a data abort handler.
751 * Once things get going this will change as we will need a proper
752 * handler.
753 * Until then we will use a handler that just panics but tells us
754 * why.
755 * Initialisation of the vectors will just panic on a data abort.
756 * This just fills in a slighly better one.
757 */
758 printf("vectors ");
759 data_abort_handler_address = (u_int)data_abort_handler;
760 prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
761 undefined_handler_address = (u_int)undefinedinstruction_bounce;
762
763 /* At last !
764 * We now have the kernel in physical memory from the bottom upwards.
765 * Kernel page tables are physically above this.
766 * The kernel is mapped to KERNEL_TEXT_BASE
767 * The kernel data PTs will handle the mapping of 0xf1000000-0xf3ffffff
768 * The page tables are mapped to 0xefc00000
769 */
770
771 /* Initialise the undefined instruction handlers */
772 printf("undefined ");
773 undefined_init();
774
775 /* Boot strap pmap telling it where the kernel page table is */
776 printf("pmap ");
777 pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, kernel_ptpt);
778
779 /* Setup the IRQ system */
780 printf("irq ");
781 irq_init();
782 printf("done.\n");
783
784 #ifdef IPKDB
785 /* Initialise ipkdb */
786 ipkdb_init();
787 if (boothowto & RB_KDB)
788 ipkdb_connect(0);
789 #endif
790
791 #ifdef DDB
792 printf("ddb: ");
793 db_machine_init();
794 #if 0
795 ddb_init(end[0], end + 1, esym);
796 #endif
797
798 if (boothowto & RB_KDB)
799 Debugger();
800 #endif
801
802 /* We return the new stack pointer address */
803 return(kernelstack.pv_va + USPACE_SVC_STACK_TOP);
804 }
805
806 void
807 process_kernel_args(char *args)
808 {
809
810 boothowto = 0;
811
812 /* Make a local copy of the bootargs */
813 strncpy(bootargs, args, MAX_BOOT_STRING);
814
815 args = bootargs;
816 boot_file = bootargs;
817
818 /* Skip the kernel image filename */
819 while (*args != ' ' && *args != 0)
820 ++args;
821
822 if (*args != 0)
823 *args++ = 0;
824
825 while (*args == ' ')
826 ++args;
827
828 boot_args = args;
829
830 printf("bootfile: %s\n", boot_file);
831 printf("bootargs: %s\n", boot_args);
832
833 parse_mi_bootargs(boot_args);
834 }
835
836 void
837 consinit(void)
838 {
839 static int consinit_called;
840
841 if (consinit_called != 0)
842 return;
843
844 consinit_called = 1;
845
846 #if NCOM > 0
847 if (comcnattach(&obio_bs_tag, IQ80310_UART2, comcnspeed,
848 COM_FREQ, comcnmode))
849 panic("can't init serial console @%lx", IQ80310_UART1);
850 #else
851 panic("serial console @%lx not configured", IQ80310_UART1);
852 #endif
853 }
854