iq80310_machdep.c revision 1.50 1 /* $NetBSD: iq80310_machdep.c,v 1.50 2003/04/26 11:05:10 ragge Exp $ */
2
3 /*
4 * Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
5 * All rights reserved.
6 *
7 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed for the NetBSD Project by
20 * Wasabi Systems, Inc.
21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 * or promote products derived from this software without specific prior
23 * written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 */
37
38 /*
39 * Copyright (c) 1997,1998 Mark Brinicombe.
40 * Copyright (c) 1997,1998 Causality Limited.
41 * All rights reserved.
42 *
43 * Redistribution and use in source and binary forms, with or without
44 * modification, are permitted provided that the following conditions
45 * are met:
46 * 1. Redistributions of source code must retain the above copyright
47 * notice, this list of conditions and the following disclaimer.
48 * 2. Redistributions in binary form must reproduce the above copyright
49 * notice, this list of conditions and the following disclaimer in the
50 * documentation and/or other materials provided with the distribution.
51 * 3. All advertising materials mentioning features or use of this software
52 * must display the following acknowledgement:
53 * This product includes software developed by Mark Brinicombe
54 * for the NetBSD Project.
55 * 4. The name of the company nor the name of the author may be used to
56 * endorse or promote products derived from this software without specific
57 * prior written permission.
58 *
59 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
60 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
61 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
62 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
63 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
64 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
65 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
66 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
68 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
69 * SUCH DAMAGE.
70 *
71 * Machine dependant functions for kernel setup for Intel IQ80310 evaluation
72 * boards using RedBoot firmware.
73 */
74
75 #include "opt_ddb.h"
76 #include "opt_pmap_debug.h"
77
78 #include <sys/param.h>
79 #include <sys/device.h>
80 #include <sys/systm.h>
81 #include <sys/kernel.h>
82 #include <sys/exec.h>
83 #include <sys/proc.h>
84 #include <sys/msgbuf.h>
85 #include <sys/reboot.h>
86 #include <sys/termios.h>
87 #include <sys/ksyms.h>
88
89 #include <uvm/uvm_extern.h>
90
91 #include <dev/cons.h>
92
93 #include <machine/db_machdep.h>
94 #include <ddb/db_sym.h>
95 #include <ddb/db_extern.h>
96
97 #include <machine/bootconfig.h>
98 #include <machine/bus.h>
99 #include <machine/cpu.h>
100 #include <machine/frame.h>
101 #include <arm/undefined.h>
102
103 #include <arm/arm32/machdep.h>
104
105 #include <arm/xscale/i80312reg.h>
106 #include <arm/xscale/i80312var.h>
107
108 #include <dev/pci/ppbreg.h>
109
110 #include <evbarm/iq80310/iq80310reg.h>
111 #include <evbarm/iq80310/iq80310var.h>
112 #include <evbarm/iq80310/obiovar.h>
113
114 #include "opt_ipkdb.h"
115 #include "ksyms.h"
116
117 /*
118 * Address to call from cpu_reset() to reset the machine.
119 * This is machine architecture dependant as it varies depending
120 * on where the ROM appears when you turn the MMU off.
121 */
122
123 u_int cpu_reset_address = 0;
124
125 /* Define various stack sizes in pages */
126 #define IRQ_STACK_SIZE 1
127 #define ABT_STACK_SIZE 1
128 #ifdef IPKDB
129 #define UND_STACK_SIZE 2
130 #else
131 #define UND_STACK_SIZE 1
132 #endif
133
134 BootConfig bootconfig; /* Boot config storage */
135 char *boot_args = NULL;
136 char *boot_file = NULL;
137
138 vm_offset_t physical_start;
139 vm_offset_t physical_freestart;
140 vm_offset_t physical_freeend;
141 vm_offset_t physical_end;
142 u_int free_pages;
143 vm_offset_t pagetables_start;
144 int physmem = 0;
145
146 /*int debug_flags;*/
147 #ifndef PMAP_STATIC_L1S
148 int max_processes = 64; /* Default number */
149 #endif /* !PMAP_STATIC_L1S */
150
151 /* Physical and virtual addresses for some global pages */
152 pv_addr_t systempage;
153 pv_addr_t irqstack;
154 pv_addr_t undstack;
155 pv_addr_t abtstack;
156 pv_addr_t kernelstack;
157 pv_addr_t minidataclean;
158
159 vm_offset_t msgbufphys;
160
161 extern u_int data_abort_handler_address;
162 extern u_int prefetch_abort_handler_address;
163 extern u_int undefined_handler_address;
164
165 #ifdef PMAP_DEBUG
166 extern int pmap_debug_level;
167 #endif
168
169 #define KERNEL_PT_SYS 0 /* L2 table for mapping zero page */
170
171 #define KERNEL_PT_KERNEL 1 /* L2 table for mapping kernel */
172 #define KERNEL_PT_KERNEL_NUM 2
173
174 /* L2 table for mapping i80312 */
175 #define KERNEL_PT_IOPXS (KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM)
176
177 /* L2 tables for mapping kernel VM */
178 #define KERNEL_PT_VMDATA (KERNEL_PT_IOPXS + 1)
179 #define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */
180 #define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
181
182 pv_addr_t kernel_pt_table[NUM_KERNEL_PTS];
183
184 struct user *proc0paddr;
185
186 /* Prototypes */
187
188 void consinit(void);
189
190 #include "com.h"
191 #if NCOM > 0
192 #include <dev/ic/comreg.h>
193 #include <dev/ic/comvar.h>
194 #endif
195
196 /*
197 * Define the default console speed for the board. This is generally
198 * what the firmware provided with the board defaults to.
199 */
200 #ifndef CONSPEED
201 #define CONSPEED B115200
202 #endif /* ! CONSPEED */
203
204 #ifndef CONUNIT
205 #define CONUNIT 0
206 #endif
207
208 #ifndef CONMODE
209 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
210 #endif
211
212 int comcnspeed = CONSPEED;
213 int comcnmode = CONMODE;
214 int comcnunit = CONUNIT;
215
216 /*
217 * void cpu_reboot(int howto, char *bootstr)
218 *
219 * Reboots the system
220 *
221 * Deal with any syncing, unmounting, dumping and shutdown hooks,
222 * then reset the CPU.
223 */
224 void
225 cpu_reboot(int howto, char *bootstr)
226 {
227 #ifdef DIAGNOSTIC
228 /* info */
229 printf("boot: howto=%08x curlwp=%p\n", howto, curlwp);
230 #endif
231
232 /*
233 * If we are still cold then hit the air brakes
234 * and crash to earth fast
235 */
236 if (cold) {
237 doshutdownhooks();
238 printf("The operating system has halted.\n");
239 printf("Please press any key to reboot.\n\n");
240 cngetc();
241 printf("rebooting...\n");
242 cpu_reset();
243 /*NOTREACHED*/
244 }
245
246 /* Disable console buffering */
247
248 /*
249 * If RB_NOSYNC was not specified sync the discs.
250 * Note: Unless cold is set to 1 here, syslogd will die during the
251 * unmount. It looks like syslogd is getting woken up only to find
252 * that it cannot page part of the binary in as the filesystem has
253 * been unmounted.
254 */
255 if (!(howto & RB_NOSYNC))
256 bootsync();
257
258 /* Say NO to interrupts */
259 splhigh();
260
261 /* Do a dump if requested. */
262 if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
263 dumpsys();
264
265 /* Run any shutdown hooks */
266 doshutdownhooks();
267
268 /* Make sure IRQ's are disabled */
269 IRQdisable;
270
271 if (howto & RB_HALT) {
272 iq80310_7seg('.', '.');
273 printf("The operating system has halted.\n");
274 printf("Please press any key to reboot.\n\n");
275 cngetc();
276 }
277
278 printf("rebooting...\n");
279 cpu_reset();
280 /*NOTREACHED*/
281 }
282
283 /*
284 * Mapping table for core kernel memory. This memory is mapped at init
285 * time with section mappings.
286 */
287 struct l1_sec_map {
288 vaddr_t va;
289 vaddr_t pa;
290 vsize_t size;
291 vm_prot_t prot;
292 int cache;
293 } l1_sec_table[] = {
294 /*
295 * Map the on-board devices VA == PA so that we can access them
296 * with the MMU on or off.
297 */
298 {
299 IQ80310_OBIO_BASE,
300 IQ80310_OBIO_BASE,
301 IQ80310_OBIO_SIZE,
302 VM_PROT_READ|VM_PROT_WRITE,
303 PTE_NOCACHE,
304 },
305
306 {
307 0,
308 0,
309 0,
310 0,
311 0,
312 }
313 };
314
315 /*
316 * u_int initarm(...)
317 *
318 * Initial entry point on startup. This gets called before main() is
319 * entered.
320 * It should be responsible for setting up everything that must be
321 * in place when main is called.
322 * This includes
323 * Taking a copy of the boot configuration structure.
324 * Initialising the physical console so characters can be printed.
325 * Setting up page tables for the kernel
326 * Relocating the kernel to the bottom of physical memory
327 */
328 u_int
329 initarm(void *arg)
330 {
331 extern vaddr_t xscale_cache_clean_addr;
332 #ifdef DIAGNOSTIC
333 extern vsize_t xscale_minidata_clean_size;
334 #endif
335 int loop;
336 int loop1;
337 u_int l1pagetable;
338 pv_addr_t kernel_l1pt;
339 pv_addr_t kernel_ptpt;
340 paddr_t memstart;
341 psize_t memsize;
342
343 /*
344 * Clear out the 7-segment display. Whee, the first visual
345 * indication that we're running kernel code.
346 */
347 iq80310_7seg(' ', ' ');
348
349 /*
350 * Heads up ... Setup the CPU / MMU / TLB functions
351 */
352 if (set_cpufuncs())
353 panic("cpu not recognized!");
354
355 /* Calibrate the delay loop. */
356 iq80310_calibrate_delay();
357
358 /*
359 * Since we map the on-board devices VA==PA, and the kernel
360 * is running VA==PA, it's possible for us to initialize
361 * the console now.
362 */
363 consinit();
364
365 /* Talk to the user */
366 printf("\nNetBSD/evbarm (IQ80310) booting ...\n");
367
368 /*
369 * Reset the secondary PCI bus. RedBoot doesn't stop devices
370 * on the PCI bus before handing us control, so we have to
371 * do this.
372 *
373 * XXX This is arguably a bug in RedBoot, and doing this reset
374 * XXX could be problematic in the future if we encounter an
375 * XXX application where the PPB in the i80312 is used as a
376 * XXX PPB.
377 */
378 {
379 uint32_t reg;
380
381 printf("Resetting secondary PCI bus...\n");
382 reg = bus_space_read_4(&obio_bs_tag,
383 I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL);
384 bus_space_write_4(&obio_bs_tag,
385 I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL,
386 reg | PPB_BC_SECONDARY_RESET);
387 delay(10 * 1000); /* 10ms enough? */
388 bus_space_write_4(&obio_bs_tag,
389 I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL,
390 reg);
391 }
392
393 /*
394 * We are currently running with the MMU enabled and the
395 * entire address space mapped VA==PA, except for the
396 * first 64M of RAM is also double-mapped at 0xc0000000.
397 * There is an L1 page table at 0xa0004000.
398 */
399
400 /*
401 * Fetch the SDRAM start/size from the i80312 SDRAM configration
402 * registers.
403 */
404 i80312_sdram_bounds(&obio_bs_tag, I80312_PMMR_BASE + I80312_MEM_BASE,
405 &memstart, &memsize);
406
407 printf("initarm: Configuring system ...\n");
408
409 /* Fake bootconfig structure for the benefit of pmap.c */
410 /* XXX must make the memory description h/w independant */
411 bootconfig.dramblocks = 1;
412 bootconfig.dram[0].address = memstart;
413 bootconfig.dram[0].pages = memsize / PAGE_SIZE;
414
415 /*
416 * Set up the variables that define the availablilty of
417 * physical memory. For now, we're going to set
418 * physical_freestart to 0xa0200000 (where the kernel
419 * was loaded), and allocate the memory we need downwards.
420 * If we get too close to the L1 table that we set up, we
421 * will panic. We will update physical_freestart and
422 * physical_freeend later to reflect what pmap_bootstrap()
423 * wants to see.
424 *
425 * XXX pmap_bootstrap() needs an enema.
426 */
427 physical_start = bootconfig.dram[0].address;
428 physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE);
429
430 physical_freestart = 0xa0009000UL;
431 physical_freeend = 0xa0200000UL;
432
433 physmem = (physical_end - physical_start) / PAGE_SIZE;
434
435 /* Tell the user about the memory */
436 printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem,
437 physical_start, physical_end - 1);
438
439 /*
440 * Okay, the kernel starts 2MB in from the bottom of physical
441 * memory. We are going to allocate our bootstrap pages downwards
442 * from there.
443 *
444 * We need to allocate some fixed page tables to get the kernel
445 * going. We allocate one page directory and a number of page
446 * tables and store the physical addresses in the kernel_pt_table
447 * array.
448 *
449 * The kernel page directory must be on a 16K boundary. The page
450 * tables must be on 4K bounaries. What we do is allocate the
451 * page directory on the first 16K boundary that we encounter, and
452 * the page tables on 4K boundaries otherwise. Since we allocate
453 * at least 3 L2 page tables, we are guaranteed to encounter at
454 * least one 16K aligned region.
455 */
456
457 #ifdef VERBOSE_INIT_ARM
458 printf("Allocating page tables\n");
459 #endif
460
461 free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE;
462
463 #ifdef VERBOSE_INIT_ARM
464 printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n",
465 physical_freestart, free_pages, free_pages);
466 #endif
467
468 /* Define a macro to simplify memory allocation */
469 #define valloc_pages(var, np) \
470 alloc_pages((var).pv_pa, (np)); \
471 (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start;
472
473 #define alloc_pages(var, np) \
474 physical_freeend -= ((np) * PAGE_SIZE); \
475 if (physical_freeend < physical_freestart) \
476 panic("initarm: out of memory"); \
477 (var) = physical_freeend; \
478 free_pages -= (np); \
479 memset((char *)(var), 0, ((np) * PAGE_SIZE));
480
481 loop1 = 0;
482 kernel_l1pt.pv_pa = 0;
483 for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
484 /* Are we 16KB aligned for an L1 ? */
485 if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0
486 && kernel_l1pt.pv_pa == 0) {
487 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
488 } else {
489 #ifdef ARM32_PMAP_NEW
490 valloc_pages(kernel_pt_table[loop1],
491 L2_TABLE_SIZE / PAGE_SIZE);
492 #else
493 alloc_pages(kernel_pt_table[loop1].pv_pa,
494 L2_TABLE_SIZE / PAGE_SIZE);
495 kernel_pt_table[loop1].pv_va =
496 kernel_pt_table[loop1].pv_pa;
497 #endif
498 ++loop1;
499 }
500 }
501
502 /* This should never be able to happen but better confirm that. */
503 if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE-1)) != 0)
504 panic("initarm: Failed to align the kernel page directory");
505
506 /*
507 * Allocate a page for the system page mapped to V0x00000000
508 * This page will just contain the system vectors and can be
509 * shared by all processes.
510 */
511 alloc_pages(systempage.pv_pa, 1);
512
513 /* Allocate a page for the page table to map kernel page tables. */
514 valloc_pages(kernel_ptpt, L2_TABLE_SIZE / PAGE_SIZE);
515
516 /* Allocate stacks for all modes */
517 valloc_pages(irqstack, IRQ_STACK_SIZE);
518 valloc_pages(abtstack, ABT_STACK_SIZE);
519 valloc_pages(undstack, UND_STACK_SIZE);
520 valloc_pages(kernelstack, UPAGES);
521
522 /* Allocate enough pages for cleaning the Mini-Data cache. */
523 KASSERT(xscale_minidata_clean_size <= PAGE_SIZE);
524 valloc_pages(minidataclean, 1);
525
526 #ifdef VERBOSE_INIT_ARM
527 printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa,
528 irqstack.pv_va);
529 printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa,
530 abtstack.pv_va);
531 printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa,
532 undstack.pv_va);
533 printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa,
534 kernelstack.pv_va);
535 #endif
536
537 /*
538 * XXX Defer this to later so that we can reclaim the memory
539 * XXX used by the RedBoot page tables.
540 */
541 alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE);
542
543 /*
544 * Ok we have allocated physical pages for the primary kernel
545 * page tables
546 */
547
548 #ifdef VERBOSE_INIT_ARM
549 printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa);
550 #endif
551
552 /*
553 * Now we start construction of the L1 page table
554 * We start by mapping the L2 page tables into the L1.
555 * This means that we can replace L1 mappings later on if necessary
556 */
557 l1pagetable = kernel_l1pt.pv_pa;
558
559 /* Map the L2 pages tables in the L1 page table */
560 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH & ~(0x00400000 - 1),
561 &kernel_pt_table[KERNEL_PT_SYS]);
562 for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++)
563 pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000,
564 &kernel_pt_table[KERNEL_PT_KERNEL + loop]);
565 pmap_link_l2pt(l1pagetable, IQ80310_IOPXS_VBASE,
566 &kernel_pt_table[KERNEL_PT_IOPXS]);
567 for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
568 pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
569 &kernel_pt_table[KERNEL_PT_VMDATA + loop]);
570 pmap_link_l2pt(l1pagetable, PTE_BASE, &kernel_ptpt);
571
572 /* update the top of the kernel VM */
573 pmap_curmaxkvaddr =
574 KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000);
575
576 #ifdef VERBOSE_INIT_ARM
577 printf("Mapping kernel\n");
578 #endif
579
580 /* Now we fill in the L2 pagetable for the kernel static code/data */
581 {
582 extern char etext[], _end[];
583 size_t textsize = (uintptr_t) etext - KERNEL_TEXT_BASE;
584 size_t totalsize = (uintptr_t) _end - KERNEL_TEXT_BASE;
585 u_int logical;
586
587 textsize = (textsize + PGOFSET) & ~PGOFSET;
588 totalsize = (totalsize + PGOFSET) & ~PGOFSET;
589
590 logical = 0x00200000; /* offset of kernel in RAM */
591
592 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
593 physical_start + logical, textsize,
594 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
595 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
596 physical_start + logical, totalsize - textsize,
597 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
598 }
599
600 #ifdef VERBOSE_INIT_ARM
601 printf("Constructing L2 page tables\n");
602 #endif
603
604 /* Map the stack pages */
605 pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
606 IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
607 pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
608 ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
609 pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
610 UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
611 pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
612 UPAGES * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
613
614 #ifndef ARM32_PMAP_NEW
615 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
616 L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
617 #else
618 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
619 L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
620
621 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
622 pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va,
623 kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
624 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
625 }
626 #endif
627
628 /* Map the Mini-Data cache clean area. */
629 xscale_setup_minidata(l1pagetable, minidataclean.pv_va,
630 minidataclean.pv_pa);
631
632 /* Map the page table that maps the kernel pages */
633 pmap_map_entry(l1pagetable, kernel_ptpt.pv_va, kernel_ptpt.pv_pa,
634 #ifndef ARM32_PMAP_NEW
635 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
636 #else
637 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
638 #endif
639
640 /*
641 * Map entries in the page table used to map PTE's
642 * Basically every kernel page table gets mapped here
643 */
644 /* The -2 is slightly bogus, it should be -log2(sizeof(pt_entry_t)) */
645 for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++) {
646 pmap_map_entry(l1pagetable,
647 PTE_BASE + ((KERNEL_BASE +
648 (loop * 0x00400000)) >> (PGSHIFT-2)),
649 kernel_pt_table[KERNEL_PT_KERNEL + loop].pv_pa,
650 #ifndef ARM32_PMAP_NEW
651 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
652 #else
653 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
654 #endif
655 }
656 pmap_map_entry(l1pagetable,
657 PTE_BASE + (PTE_BASE >> (PGSHIFT-2)),
658 #ifndef ARM32_PMAP_NEW
659 kernel_ptpt.pv_pa, VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
660 #else
661 kernel_ptpt.pv_pa, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
662 #endif
663 pmap_map_entry(l1pagetable,
664 trunc_page(PTE_BASE + (ARM_VECTORS_HIGH >> (PGSHIFT-2))),
665 kernel_pt_table[KERNEL_PT_SYS].pv_pa,
666 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
667 for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
668 pmap_map_entry(l1pagetable,
669 PTE_BASE + ((KERNEL_VM_BASE +
670 (loop * 0x00400000)) >> (PGSHIFT-2)),
671 kernel_pt_table[KERNEL_PT_VMDATA + loop].pv_pa,
672 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
673
674 /* Map the vector page. */
675 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
676 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
677
678 /*
679 * Map devices we can map w/ section mappings.
680 */
681 loop = 0;
682 while (l1_sec_table[loop].size) {
683 vm_size_t sz;
684
685 #ifdef VERBOSE_INIT_ARM
686 printf("%08lx -> %08lx @ %08lx\n", l1_sec_table[loop].pa,
687 l1_sec_table[loop].pa + l1_sec_table[loop].size - 1,
688 l1_sec_table[loop].va);
689 #endif
690 for (sz = 0; sz < l1_sec_table[loop].size; sz += L1_S_SIZE)
691 pmap_map_section(l1pagetable,
692 l1_sec_table[loop].va + sz,
693 l1_sec_table[loop].pa + sz,
694 l1_sec_table[loop].prot,
695 l1_sec_table[loop].cache);
696 ++loop;
697 }
698
699 /*
700 * Map the PCI I/O spaces and i80312 registers. These are too
701 * small to be mapped w/ section mappings.
702 */
703 #ifdef VERBOSE_INIT_ARM
704 printf("Mapping PIOW 0x%08lx -> 0x%08lx @ 0x%08lx\n",
705 I80312_PCI_XLATE_PIOW_BASE,
706 I80312_PCI_XLATE_PIOW_BASE + I80312_PCI_XLATE_IOSIZE - 1,
707 IQ80310_PIOW_VBASE);
708 #endif
709 pmap_map_chunk(l1pagetable, IQ80310_PIOW_VBASE,
710 I80312_PCI_XLATE_PIOW_BASE, I80312_PCI_XLATE_IOSIZE,
711 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
712
713 #ifdef VERBOSE_INIT_ARM
714 printf("Mapping SIOW 0x%08lx -> 0x%08lx @ 0x%08lx\n",
715 I80312_PCI_XLATE_SIOW_BASE,
716 I80312_PCI_XLATE_SIOW_BASE + I80312_PCI_XLATE_IOSIZE - 1,
717 IQ80310_SIOW_VBASE);
718 #endif
719 pmap_map_chunk(l1pagetable, IQ80310_SIOW_VBASE,
720 I80312_PCI_XLATE_SIOW_BASE, I80312_PCI_XLATE_IOSIZE,
721 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
722
723 #ifdef VERBOSE_INIT_ARM
724 printf("Mapping 80312 0x%08lx -> 0x%08lx @ 0x%08lx\n",
725 I80312_PMMR_BASE,
726 I80312_PMMR_BASE + I80312_PMMR_SIZE - 1,
727 IQ80310_80312_VBASE);
728 #endif
729 pmap_map_chunk(l1pagetable, IQ80310_80312_VBASE,
730 I80312_PMMR_BASE, I80312_PMMR_SIZE,
731 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
732
733 /*
734 * Give the XScale global cache clean code an appropriately
735 * sized chunk of unmapped VA space starting at 0xff000000
736 * (our device mappings end before this address).
737 */
738 xscale_cache_clean_addr = 0xff000000U;
739
740 /*
741 * Now we have the real page tables in place so we can switch to them.
742 * Once this is done we will be running with the REAL kernel page
743 * tables.
744 */
745
746 /*
747 * Update the physical_freestart/physical_freeend/free_pages
748 * variables.
749 */
750 {
751 extern char _end[];
752
753 physical_freestart = physical_start +
754 (((((uintptr_t) _end) + PGOFSET) & ~PGOFSET) -
755 KERNEL_BASE);
756 physical_freeend = physical_end;
757 free_pages =
758 (physical_freeend - physical_freestart) / PAGE_SIZE;
759 }
760
761 /* Switch tables */
762 #ifdef VERBOSE_INIT_ARM
763 printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
764 physical_freestart, free_pages, free_pages);
765 printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa);
766 #endif
767 #ifdef ARM32_PMAP_NEW
768 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
769 #endif
770 setttb(kernel_l1pt.pv_pa);
771 cpu_tlb_flushID();
772 #ifdef ARM32_PMAP_NEW
773 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
774
775 /*
776 * Moved from cpu_startup() as data_abort_handler() references
777 * this during uvm init
778 */
779 proc0paddr = (struct user *)kernelstack.pv_va;
780 lwp0.l_addr = proc0paddr;
781 #endif
782
783 #ifdef VERBOSE_INIT_ARM
784 printf("done!\n");
785 #endif
786
787 #ifdef VERBOSE_INIT_ARM
788 printf("bootstrap done.\n");
789 #endif
790
791 arm32_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
792
793 /*
794 * Pages were allocated during the secondary bootstrap for the
795 * stacks for different CPU modes.
796 * We must now set the r13 registers in the different CPU modes to
797 * point to these stacks.
798 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
799 * of the stack memory.
800 */
801 printf("init subsystems: stacks ");
802
803 set_stackptr(PSR_IRQ32_MODE,
804 irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
805 set_stackptr(PSR_ABT32_MODE,
806 abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
807 set_stackptr(PSR_UND32_MODE,
808 undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
809
810 /*
811 * Well we should set a data abort handler.
812 * Once things get going this will change as we will need a proper
813 * handler.
814 * Until then we will use a handler that just panics but tells us
815 * why.
816 * Initialisation of the vectors will just panic on a data abort.
817 * This just fills in a slighly better one.
818 */
819 printf("vectors ");
820 data_abort_handler_address = (u_int)data_abort_handler;
821 prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
822 undefined_handler_address = (u_int)undefinedinstruction_bounce;
823
824 /* Initialise the undefined instruction handlers */
825 printf("undefined ");
826 undefined_init();
827
828 /* Load memory into UVM. */
829 printf("page ");
830 uvm_setpagesize(); /* initialize PAGE_SIZE-dependent variables */
831 uvm_page_physload(atop(physical_freestart), atop(physical_freeend),
832 atop(physical_freestart), atop(physical_freeend),
833 VM_FREELIST_DEFAULT);
834
835 /* Boot strap pmap telling it where the kernel page table is */
836 printf("pmap ");
837 #ifdef ARM32_PMAP_NEW
838 pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va);
839 #else
840 pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, kernel_ptpt);
841 #endif
842
843 /* Setup the IRQ system */
844 printf("irq ");
845 iq80310_intr_init();
846 printf("done.\n");
847
848 #ifdef IPKDB
849 /* Initialise ipkdb */
850 ipkdb_init();
851 if (boothowto & RB_KDB)
852 ipkdb_connect(0);
853 #endif
854
855 #if NKSYMS || defined(DDB) || defined(LKM)
856 /* Firmware doesn't load symbols. */
857 ksyms_init(0, NULL, NULL);
858 #endif
859
860 #ifdef DDB
861 db_machine_init();
862 if (boothowto & RB_KDB)
863 Debugger();
864 #endif
865
866 /* We return the new stack pointer address */
867 return(kernelstack.pv_va + USPACE_SVC_STACK_TOP);
868 }
869
870 void
871 consinit(void)
872 {
873 static const bus_addr_t comcnaddrs[] = {
874 IQ80310_UART2, /* com0 (J9) */
875 IQ80310_UART1, /* com1 (J10) */
876 };
877 static int consinit_called;
878
879 if (consinit_called != 0)
880 return;
881
882 consinit_called = 1;
883
884 #if NCOM > 0
885 if (comcnattach(&obio_bs_tag, comcnaddrs[comcnunit], comcnspeed,
886 COM_FREQ, comcnmode))
887 panic("can't init serial console @%lx", comcnaddrs[comcnunit]);
888 #else
889 panic("serial console @%lx not configured", comcnaddrs[comcnunit]);
890 #endif
891 }
892