iq80310_machdep.c revision 1.54 1 /* $NetBSD: iq80310_machdep.c,v 1.54 2003/05/03 18:25:32 thorpej Exp $ */
2
3 /*
4 * Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
5 * All rights reserved.
6 *
7 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed for the NetBSD Project by
20 * Wasabi Systems, Inc.
21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 * or promote products derived from this software without specific prior
23 * written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 */
37
38 /*
39 * Copyright (c) 1997,1998 Mark Brinicombe.
40 * Copyright (c) 1997,1998 Causality Limited.
41 * All rights reserved.
42 *
43 * Redistribution and use in source and binary forms, with or without
44 * modification, are permitted provided that the following conditions
45 * are met:
46 * 1. Redistributions of source code must retain the above copyright
47 * notice, this list of conditions and the following disclaimer.
48 * 2. Redistributions in binary form must reproduce the above copyright
49 * notice, this list of conditions and the following disclaimer in the
50 * documentation and/or other materials provided with the distribution.
51 * 3. All advertising materials mentioning features or use of this software
52 * must display the following acknowledgement:
53 * This product includes software developed by Mark Brinicombe
54 * for the NetBSD Project.
55 * 4. The name of the company nor the name of the author may be used to
56 * endorse or promote products derived from this software without specific
57 * prior written permission.
58 *
59 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
60 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
61 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
62 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
63 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
64 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
65 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
66 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
68 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
69 * SUCH DAMAGE.
70 *
71 * Machine dependant functions for kernel setup for Intel IQ80310 evaluation
72 * boards using RedBoot firmware.
73 */
74
75 #include "opt_ddb.h"
76 #include "opt_pmap_debug.h"
77
78 #include <sys/param.h>
79 #include <sys/device.h>
80 #include <sys/systm.h>
81 #include <sys/kernel.h>
82 #include <sys/exec.h>
83 #include <sys/proc.h>
84 #include <sys/msgbuf.h>
85 #include <sys/reboot.h>
86 #include <sys/termios.h>
87 #include <sys/ksyms.h>
88
89 #include <uvm/uvm_extern.h>
90
91 #include <dev/cons.h>
92
93 #include <machine/db_machdep.h>
94 #include <ddb/db_sym.h>
95 #include <ddb/db_extern.h>
96
97 #include <machine/bootconfig.h>
98 #include <machine/bus.h>
99 #include <machine/cpu.h>
100 #include <machine/frame.h>
101 #include <arm/undefined.h>
102
103 #include <arm/arm32/machdep.h>
104
105 #include <arm/xscale/i80312reg.h>
106 #include <arm/xscale/i80312var.h>
107
108 #include <dev/pci/ppbreg.h>
109
110 #include <evbarm/iq80310/iq80310reg.h>
111 #include <evbarm/iq80310/iq80310var.h>
112 #include <evbarm/iq80310/obiovar.h>
113
114 #include "opt_ipkdb.h"
115 #include "ksyms.h"
116
117 /* Kernel text starts 2MB in from the bottom of the kernel address space. */
118 #define KERNEL_TEXT_BASE (KERNEL_BASE + 0x00200000)
119
120 /*
121 * Address to call from cpu_reset() to reset the machine.
122 * This is machine architecture dependant as it varies depending
123 * on where the ROM appears when you turn the MMU off.
124 */
125
126 u_int cpu_reset_address = 0;
127
128 /* Define various stack sizes in pages */
129 #define IRQ_STACK_SIZE 1
130 #define ABT_STACK_SIZE 1
131 #ifdef IPKDB
132 #define UND_STACK_SIZE 2
133 #else
134 #define UND_STACK_SIZE 1
135 #endif
136
137 BootConfig bootconfig; /* Boot config storage */
138 char *boot_args = NULL;
139 char *boot_file = NULL;
140
141 vm_offset_t physical_start;
142 vm_offset_t physical_freestart;
143 vm_offset_t physical_freeend;
144 vm_offset_t physical_end;
145 u_int free_pages;
146 vm_offset_t pagetables_start;
147 int physmem = 0;
148
149 /*int debug_flags;*/
150 #ifndef PMAP_STATIC_L1S
151 int max_processes = 64; /* Default number */
152 #endif /* !PMAP_STATIC_L1S */
153
154 /* Physical and virtual addresses for some global pages */
155 pv_addr_t systempage;
156 pv_addr_t irqstack;
157 pv_addr_t undstack;
158 pv_addr_t abtstack;
159 pv_addr_t kernelstack;
160 pv_addr_t minidataclean;
161
162 vm_offset_t msgbufphys;
163
164 extern u_int data_abort_handler_address;
165 extern u_int prefetch_abort_handler_address;
166 extern u_int undefined_handler_address;
167
168 #ifdef PMAP_DEBUG
169 extern int pmap_debug_level;
170 #endif
171
172 #define KERNEL_PT_SYS 0 /* L2 table for mapping zero page */
173
174 #define KERNEL_PT_KERNEL 1 /* L2 table for mapping kernel */
175 #define KERNEL_PT_KERNEL_NUM 2
176
177 /* L2 table for mapping i80312 */
178 #define KERNEL_PT_IOPXS (KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM)
179
180 /* L2 tables for mapping kernel VM */
181 #define KERNEL_PT_VMDATA (KERNEL_PT_IOPXS + 1)
182 #define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */
183 #define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
184
185 pv_addr_t kernel_pt_table[NUM_KERNEL_PTS];
186
187 struct user *proc0paddr;
188
189 /* Prototypes */
190
191 void consinit(void);
192
193 #include "com.h"
194 #if NCOM > 0
195 #include <dev/ic/comreg.h>
196 #include <dev/ic/comvar.h>
197 #endif
198
199 /*
200 * Define the default console speed for the board. This is generally
201 * what the firmware provided with the board defaults to.
202 */
203 #ifndef CONSPEED
204 #define CONSPEED B115200
205 #endif /* ! CONSPEED */
206
207 #ifndef CONUNIT
208 #define CONUNIT 0
209 #endif
210
211 #ifndef CONMODE
212 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
213 #endif
214
215 int comcnspeed = CONSPEED;
216 int comcnmode = CONMODE;
217 int comcnunit = CONUNIT;
218
219 /*
220 * void cpu_reboot(int howto, char *bootstr)
221 *
222 * Reboots the system
223 *
224 * Deal with any syncing, unmounting, dumping and shutdown hooks,
225 * then reset the CPU.
226 */
227 void
228 cpu_reboot(int howto, char *bootstr)
229 {
230 #ifdef DIAGNOSTIC
231 /* info */
232 printf("boot: howto=%08x curlwp=%p\n", howto, curlwp);
233 #endif
234
235 /*
236 * If we are still cold then hit the air brakes
237 * and crash to earth fast
238 */
239 if (cold) {
240 doshutdownhooks();
241 printf("The operating system has halted.\n");
242 printf("Please press any key to reboot.\n\n");
243 cngetc();
244 printf("rebooting...\n");
245 cpu_reset();
246 /*NOTREACHED*/
247 }
248
249 /* Disable console buffering */
250
251 /*
252 * If RB_NOSYNC was not specified sync the discs.
253 * Note: Unless cold is set to 1 here, syslogd will die during the
254 * unmount. It looks like syslogd is getting woken up only to find
255 * that it cannot page part of the binary in as the filesystem has
256 * been unmounted.
257 */
258 if (!(howto & RB_NOSYNC))
259 bootsync();
260
261 /* Say NO to interrupts */
262 splhigh();
263
264 /* Do a dump if requested. */
265 if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
266 dumpsys();
267
268 /* Run any shutdown hooks */
269 doshutdownhooks();
270
271 /* Make sure IRQ's are disabled */
272 IRQdisable;
273
274 if (howto & RB_HALT) {
275 iq80310_7seg('.', '.');
276 printf("The operating system has halted.\n");
277 printf("Please press any key to reboot.\n\n");
278 cngetc();
279 }
280
281 printf("rebooting...\n");
282 cpu_reset();
283 /*NOTREACHED*/
284 }
285
286 /*
287 * Mapping table for core kernel memory. This memory is mapped at init
288 * time with section mappings.
289 */
290 struct l1_sec_map {
291 vaddr_t va;
292 vaddr_t pa;
293 vsize_t size;
294 vm_prot_t prot;
295 int cache;
296 } l1_sec_table[] = {
297 /*
298 * Map the on-board devices VA == PA so that we can access them
299 * with the MMU on or off.
300 */
301 {
302 IQ80310_OBIO_BASE,
303 IQ80310_OBIO_BASE,
304 IQ80310_OBIO_SIZE,
305 VM_PROT_READ|VM_PROT_WRITE,
306 PTE_NOCACHE,
307 },
308
309 {
310 0,
311 0,
312 0,
313 0,
314 0,
315 }
316 };
317
318 /*
319 * u_int initarm(...)
320 *
321 * Initial entry point on startup. This gets called before main() is
322 * entered.
323 * It should be responsible for setting up everything that must be
324 * in place when main is called.
325 * This includes
326 * Taking a copy of the boot configuration structure.
327 * Initialising the physical console so characters can be printed.
328 * Setting up page tables for the kernel
329 * Relocating the kernel to the bottom of physical memory
330 */
331 u_int
332 initarm(void *arg)
333 {
334 extern vaddr_t xscale_cache_clean_addr;
335 #ifdef DIAGNOSTIC
336 extern vsize_t xscale_minidata_clean_size;
337 #endif
338 int loop;
339 int loop1;
340 u_int l1pagetable;
341 pv_addr_t kernel_l1pt;
342 paddr_t memstart;
343 psize_t memsize;
344
345 /*
346 * Clear out the 7-segment display. Whee, the first visual
347 * indication that we're running kernel code.
348 */
349 iq80310_7seg(' ', ' ');
350
351 /*
352 * Heads up ... Setup the CPU / MMU / TLB functions
353 */
354 if (set_cpufuncs())
355 panic("cpu not recognized!");
356
357 /* Calibrate the delay loop. */
358 iq80310_calibrate_delay();
359
360 /*
361 * Since we map the on-board devices VA==PA, and the kernel
362 * is running VA==PA, it's possible for us to initialize
363 * the console now.
364 */
365 consinit();
366
367 /* Talk to the user */
368 printf("\nNetBSD/evbarm (IQ80310) booting ...\n");
369
370 /*
371 * Reset the secondary PCI bus. RedBoot doesn't stop devices
372 * on the PCI bus before handing us control, so we have to
373 * do this.
374 *
375 * XXX This is arguably a bug in RedBoot, and doing this reset
376 * XXX could be problematic in the future if we encounter an
377 * XXX application where the PPB in the i80312 is used as a
378 * XXX PPB.
379 */
380 {
381 uint32_t reg;
382
383 printf("Resetting secondary PCI bus...\n");
384 reg = bus_space_read_4(&obio_bs_tag,
385 I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL);
386 bus_space_write_4(&obio_bs_tag,
387 I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL,
388 reg | PPB_BC_SECONDARY_RESET);
389 delay(10 * 1000); /* 10ms enough? */
390 bus_space_write_4(&obio_bs_tag,
391 I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL,
392 reg);
393 }
394
395 /*
396 * We are currently running with the MMU enabled and the
397 * entire address space mapped VA==PA, except for the
398 * first 64M of RAM is also double-mapped at 0xc0000000.
399 * There is an L1 page table at 0xa0004000.
400 */
401
402 /*
403 * Fetch the SDRAM start/size from the i80312 SDRAM configration
404 * registers.
405 */
406 i80312_sdram_bounds(&obio_bs_tag, I80312_PMMR_BASE + I80312_MEM_BASE,
407 &memstart, &memsize);
408
409 printf("initarm: Configuring system ...\n");
410
411 /* Fake bootconfig structure for the benefit of pmap.c */
412 /* XXX must make the memory description h/w independant */
413 bootconfig.dramblocks = 1;
414 bootconfig.dram[0].address = memstart;
415 bootconfig.dram[0].pages = memsize / PAGE_SIZE;
416
417 /*
418 * Set up the variables that define the availablilty of
419 * physical memory. For now, we're going to set
420 * physical_freestart to 0xa0200000 (where the kernel
421 * was loaded), and allocate the memory we need downwards.
422 * If we get too close to the L1 table that we set up, we
423 * will panic. We will update physical_freestart and
424 * physical_freeend later to reflect what pmap_bootstrap()
425 * wants to see.
426 *
427 * XXX pmap_bootstrap() needs an enema.
428 */
429 physical_start = bootconfig.dram[0].address;
430 physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE);
431
432 physical_freestart = 0xa0009000UL;
433 physical_freeend = 0xa0200000UL;
434
435 physmem = (physical_end - physical_start) / PAGE_SIZE;
436
437 /* Tell the user about the memory */
438 printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem,
439 physical_start, physical_end - 1);
440
441 /*
442 * Okay, the kernel starts 2MB in from the bottom of physical
443 * memory. We are going to allocate our bootstrap pages downwards
444 * from there.
445 *
446 * We need to allocate some fixed page tables to get the kernel
447 * going. We allocate one page directory and a number of page
448 * tables and store the physical addresses in the kernel_pt_table
449 * array.
450 *
451 * The kernel page directory must be on a 16K boundary. The page
452 * tables must be on 4K bounaries. What we do is allocate the
453 * page directory on the first 16K boundary that we encounter, and
454 * the page tables on 4K boundaries otherwise. Since we allocate
455 * at least 3 L2 page tables, we are guaranteed to encounter at
456 * least one 16K aligned region.
457 */
458
459 #ifdef VERBOSE_INIT_ARM
460 printf("Allocating page tables\n");
461 #endif
462
463 free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE;
464
465 #ifdef VERBOSE_INIT_ARM
466 printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n",
467 physical_freestart, free_pages, free_pages);
468 #endif
469
470 /* Define a macro to simplify memory allocation */
471 #define valloc_pages(var, np) \
472 alloc_pages((var).pv_pa, (np)); \
473 (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start;
474
475 #define alloc_pages(var, np) \
476 physical_freeend -= ((np) * PAGE_SIZE); \
477 if (physical_freeend < physical_freestart) \
478 panic("initarm: out of memory"); \
479 (var) = physical_freeend; \
480 free_pages -= (np); \
481 memset((char *)(var), 0, ((np) * PAGE_SIZE));
482
483 loop1 = 0;
484 kernel_l1pt.pv_pa = 0;
485 for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
486 /* Are we 16KB aligned for an L1 ? */
487 if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0
488 && kernel_l1pt.pv_pa == 0) {
489 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
490 } else {
491 valloc_pages(kernel_pt_table[loop1],
492 L2_TABLE_SIZE / PAGE_SIZE);
493 ++loop1;
494 }
495 }
496
497 /* This should never be able to happen but better confirm that. */
498 if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE-1)) != 0)
499 panic("initarm: Failed to align the kernel page directory");
500
501 /*
502 * Allocate a page for the system page mapped to V0x00000000
503 * This page will just contain the system vectors and can be
504 * shared by all processes.
505 */
506 alloc_pages(systempage.pv_pa, 1);
507
508 /* Allocate stacks for all modes */
509 valloc_pages(irqstack, IRQ_STACK_SIZE);
510 valloc_pages(abtstack, ABT_STACK_SIZE);
511 valloc_pages(undstack, UND_STACK_SIZE);
512 valloc_pages(kernelstack, UPAGES);
513
514 /* Allocate enough pages for cleaning the Mini-Data cache. */
515 KASSERT(xscale_minidata_clean_size <= PAGE_SIZE);
516 valloc_pages(minidataclean, 1);
517
518 #ifdef VERBOSE_INIT_ARM
519 printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa,
520 irqstack.pv_va);
521 printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa,
522 abtstack.pv_va);
523 printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa,
524 undstack.pv_va);
525 printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa,
526 kernelstack.pv_va);
527 #endif
528
529 /*
530 * XXX Defer this to later so that we can reclaim the memory
531 * XXX used by the RedBoot page tables.
532 */
533 alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE);
534
535 /*
536 * Ok we have allocated physical pages for the primary kernel
537 * page tables
538 */
539
540 #ifdef VERBOSE_INIT_ARM
541 printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa);
542 #endif
543
544 /*
545 * Now we start construction of the L1 page table
546 * We start by mapping the L2 page tables into the L1.
547 * This means that we can replace L1 mappings later on if necessary
548 */
549 l1pagetable = kernel_l1pt.pv_pa;
550
551 /* Map the L2 pages tables in the L1 page table */
552 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH & ~(0x00400000 - 1),
553 &kernel_pt_table[KERNEL_PT_SYS]);
554 for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++)
555 pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000,
556 &kernel_pt_table[KERNEL_PT_KERNEL + loop]);
557 pmap_link_l2pt(l1pagetable, IQ80310_IOPXS_VBASE,
558 &kernel_pt_table[KERNEL_PT_IOPXS]);
559 for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
560 pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
561 &kernel_pt_table[KERNEL_PT_VMDATA + loop]);
562
563 /* update the top of the kernel VM */
564 pmap_curmaxkvaddr =
565 KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000);
566
567 #ifdef VERBOSE_INIT_ARM
568 printf("Mapping kernel\n");
569 #endif
570
571 /* Now we fill in the L2 pagetable for the kernel static code/data */
572 {
573 extern char etext[], _end[];
574 size_t textsize = (uintptr_t) etext - KERNEL_TEXT_BASE;
575 size_t totalsize = (uintptr_t) _end - KERNEL_TEXT_BASE;
576 u_int logical;
577
578 textsize = (textsize + PGOFSET) & ~PGOFSET;
579 totalsize = (totalsize + PGOFSET) & ~PGOFSET;
580
581 logical = 0x00200000; /* offset of kernel in RAM */
582
583 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
584 physical_start + logical, textsize,
585 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
586 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
587 physical_start + logical, totalsize - textsize,
588 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
589 }
590
591 #ifdef VERBOSE_INIT_ARM
592 printf("Constructing L2 page tables\n");
593 #endif
594
595 /* Map the stack pages */
596 pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
597 IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
598 pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
599 ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
600 pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
601 UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
602 pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
603 UPAGES * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
604
605 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
606 L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
607
608 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
609 pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va,
610 kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
611 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
612 }
613
614 /* Map the Mini-Data cache clean area. */
615 xscale_setup_minidata(l1pagetable, minidataclean.pv_va,
616 minidataclean.pv_pa);
617
618 /* Map the vector page. */
619 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
620 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
621
622 /*
623 * Map devices we can map w/ section mappings.
624 */
625 loop = 0;
626 while (l1_sec_table[loop].size) {
627 vm_size_t sz;
628
629 #ifdef VERBOSE_INIT_ARM
630 printf("%08lx -> %08lx @ %08lx\n", l1_sec_table[loop].pa,
631 l1_sec_table[loop].pa + l1_sec_table[loop].size - 1,
632 l1_sec_table[loop].va);
633 #endif
634 for (sz = 0; sz < l1_sec_table[loop].size; sz += L1_S_SIZE)
635 pmap_map_section(l1pagetable,
636 l1_sec_table[loop].va + sz,
637 l1_sec_table[loop].pa + sz,
638 l1_sec_table[loop].prot,
639 l1_sec_table[loop].cache);
640 ++loop;
641 }
642
643 /*
644 * Map the PCI I/O spaces and i80312 registers. These are too
645 * small to be mapped w/ section mappings.
646 */
647 #ifdef VERBOSE_INIT_ARM
648 printf("Mapping PIOW 0x%08lx -> 0x%08lx @ 0x%08lx\n",
649 I80312_PCI_XLATE_PIOW_BASE,
650 I80312_PCI_XLATE_PIOW_BASE + I80312_PCI_XLATE_IOSIZE - 1,
651 IQ80310_PIOW_VBASE);
652 #endif
653 pmap_map_chunk(l1pagetable, IQ80310_PIOW_VBASE,
654 I80312_PCI_XLATE_PIOW_BASE, I80312_PCI_XLATE_IOSIZE,
655 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
656
657 #ifdef VERBOSE_INIT_ARM
658 printf("Mapping SIOW 0x%08lx -> 0x%08lx @ 0x%08lx\n",
659 I80312_PCI_XLATE_SIOW_BASE,
660 I80312_PCI_XLATE_SIOW_BASE + I80312_PCI_XLATE_IOSIZE - 1,
661 IQ80310_SIOW_VBASE);
662 #endif
663 pmap_map_chunk(l1pagetable, IQ80310_SIOW_VBASE,
664 I80312_PCI_XLATE_SIOW_BASE, I80312_PCI_XLATE_IOSIZE,
665 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
666
667 #ifdef VERBOSE_INIT_ARM
668 printf("Mapping 80312 0x%08lx -> 0x%08lx @ 0x%08lx\n",
669 I80312_PMMR_BASE,
670 I80312_PMMR_BASE + I80312_PMMR_SIZE - 1,
671 IQ80310_80312_VBASE);
672 #endif
673 pmap_map_chunk(l1pagetable, IQ80310_80312_VBASE,
674 I80312_PMMR_BASE, I80312_PMMR_SIZE,
675 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
676
677 /*
678 * Give the XScale global cache clean code an appropriately
679 * sized chunk of unmapped VA space starting at 0xff000000
680 * (our device mappings end before this address).
681 */
682 xscale_cache_clean_addr = 0xff000000U;
683
684 /*
685 * Now we have the real page tables in place so we can switch to them.
686 * Once this is done we will be running with the REAL kernel page
687 * tables.
688 */
689
690 /*
691 * Update the physical_freestart/physical_freeend/free_pages
692 * variables.
693 */
694 {
695 extern char _end[];
696
697 physical_freestart = physical_start +
698 (((((uintptr_t) _end) + PGOFSET) & ~PGOFSET) -
699 KERNEL_BASE);
700 physical_freeend = physical_end;
701 free_pages =
702 (physical_freeend - physical_freestart) / PAGE_SIZE;
703 }
704
705 /* Switch tables */
706 #ifdef VERBOSE_INIT_ARM
707 printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
708 physical_freestart, free_pages, free_pages);
709 printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa);
710 #endif
711 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
712 setttb(kernel_l1pt.pv_pa);
713 cpu_tlb_flushID();
714 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
715
716 /*
717 * Moved from cpu_startup() as data_abort_handler() references
718 * this during uvm init
719 */
720 proc0paddr = (struct user *)kernelstack.pv_va;
721 lwp0.l_addr = proc0paddr;
722
723 #ifdef VERBOSE_INIT_ARM
724 printf("done!\n");
725 #endif
726
727 #ifdef VERBOSE_INIT_ARM
728 printf("bootstrap done.\n");
729 #endif
730
731 arm32_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
732
733 /*
734 * Pages were allocated during the secondary bootstrap for the
735 * stacks for different CPU modes.
736 * We must now set the r13 registers in the different CPU modes to
737 * point to these stacks.
738 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
739 * of the stack memory.
740 */
741 printf("init subsystems: stacks ");
742
743 set_stackptr(PSR_IRQ32_MODE,
744 irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
745 set_stackptr(PSR_ABT32_MODE,
746 abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
747 set_stackptr(PSR_UND32_MODE,
748 undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
749
750 /*
751 * Well we should set a data abort handler.
752 * Once things get going this will change as we will need a proper
753 * handler.
754 * Until then we will use a handler that just panics but tells us
755 * why.
756 * Initialisation of the vectors will just panic on a data abort.
757 * This just fills in a slighly better one.
758 */
759 printf("vectors ");
760 data_abort_handler_address = (u_int)data_abort_handler;
761 prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
762 undefined_handler_address = (u_int)undefinedinstruction_bounce;
763
764 /* Initialise the undefined instruction handlers */
765 printf("undefined ");
766 undefined_init();
767
768 /* Load memory into UVM. */
769 printf("page ");
770 uvm_setpagesize(); /* initialize PAGE_SIZE-dependent variables */
771 uvm_page_physload(atop(physical_freestart), atop(physical_freeend),
772 atop(physical_freestart), atop(physical_freeend),
773 VM_FREELIST_DEFAULT);
774
775 /* Boot strap pmap telling it where the kernel page table is */
776 printf("pmap ");
777 pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, KERNEL_VM_BASE,
778 KERNEL_VM_BASE + KERNEL_VM_SIZE);
779
780 /* Setup the IRQ system */
781 printf("irq ");
782 iq80310_intr_init();
783 printf("done.\n");
784
785 #ifdef IPKDB
786 /* Initialise ipkdb */
787 ipkdb_init();
788 if (boothowto & RB_KDB)
789 ipkdb_connect(0);
790 #endif
791
792 #if NKSYMS || defined(DDB) || defined(LKM)
793 /* Firmware doesn't load symbols. */
794 ksyms_init(0, NULL, NULL);
795 #endif
796
797 #ifdef DDB
798 db_machine_init();
799 if (boothowto & RB_KDB)
800 Debugger();
801 #endif
802
803 /* We return the new stack pointer address */
804 return(kernelstack.pv_va + USPACE_SVC_STACK_TOP);
805 }
806
807 void
808 consinit(void)
809 {
810 static const bus_addr_t comcnaddrs[] = {
811 IQ80310_UART2, /* com0 (J9) */
812 IQ80310_UART1, /* com1 (J10) */
813 };
814 static int consinit_called;
815
816 if (consinit_called != 0)
817 return;
818
819 consinit_called = 1;
820
821 #if NCOM > 0
822 if (comcnattach(&obio_bs_tag, comcnaddrs[comcnunit], comcnspeed,
823 COM_FREQ, comcnmode))
824 panic("can't init serial console @%lx", comcnaddrs[comcnunit]);
825 #else
826 panic("serial console @%lx not configured", comcnaddrs[comcnunit]);
827 #endif
828 }
829