iq80310_machdep.c revision 1.56 1 /* $NetBSD: iq80310_machdep.c,v 1.56 2003/05/21 22:48:22 thorpej Exp $ */
2
3 /*
4 * Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
5 * All rights reserved.
6 *
7 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed for the NetBSD Project by
20 * Wasabi Systems, Inc.
21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 * or promote products derived from this software without specific prior
23 * written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 */
37
38 /*
39 * Copyright (c) 1997,1998 Mark Brinicombe.
40 * Copyright (c) 1997,1998 Causality Limited.
41 * All rights reserved.
42 *
43 * Redistribution and use in source and binary forms, with or without
44 * modification, are permitted provided that the following conditions
45 * are met:
46 * 1. Redistributions of source code must retain the above copyright
47 * notice, this list of conditions and the following disclaimer.
48 * 2. Redistributions in binary form must reproduce the above copyright
49 * notice, this list of conditions and the following disclaimer in the
50 * documentation and/or other materials provided with the distribution.
51 * 3. All advertising materials mentioning features or use of this software
52 * must display the following acknowledgement:
53 * This product includes software developed by Mark Brinicombe
54 * for the NetBSD Project.
55 * 4. The name of the company nor the name of the author may be used to
56 * endorse or promote products derived from this software without specific
57 * prior written permission.
58 *
59 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
60 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
61 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
62 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
63 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
64 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
65 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
66 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
68 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
69 * SUCH DAMAGE.
70 *
71 * Machine dependant functions for kernel setup for Intel IQ80310 evaluation
72 * boards using RedBoot firmware.
73 */
74
75 #include "opt_ddb.h"
76 #include "opt_pmap_debug.h"
77
78 #include <sys/param.h>
79 #include <sys/device.h>
80 #include <sys/systm.h>
81 #include <sys/kernel.h>
82 #include <sys/exec.h>
83 #include <sys/proc.h>
84 #include <sys/msgbuf.h>
85 #include <sys/reboot.h>
86 #include <sys/termios.h>
87 #include <sys/ksyms.h>
88
89 #include <uvm/uvm_extern.h>
90
91 #include <dev/cons.h>
92
93 #include <machine/db_machdep.h>
94 #include <ddb/db_sym.h>
95 #include <ddb/db_extern.h>
96
97 #include <machine/bootconfig.h>
98 #include <machine/bus.h>
99 #include <machine/cpu.h>
100 #include <machine/frame.h>
101 #include <arm/undefined.h>
102
103 #include <arm/arm32/machdep.h>
104
105 #include <arm/xscale/i80312reg.h>
106 #include <arm/xscale/i80312var.h>
107
108 #include <dev/pci/ppbreg.h>
109
110 #include <evbarm/iq80310/iq80310reg.h>
111 #include <evbarm/iq80310/iq80310var.h>
112 #include <evbarm/iq80310/obiovar.h>
113
114 #include "opt_ipkdb.h"
115 #include "ksyms.h"
116
117 /* Kernel text starts 2MB in from the bottom of the kernel address space. */
118 #define KERNEL_TEXT_BASE (KERNEL_BASE + 0x00200000)
119 #define KERNEL_VM_BASE (KERNEL_BASE + 0x01000000)
120
121 /*
122 * Address to call from cpu_reset() to reset the machine.
123 * This is machine architecture dependant as it varies depending
124 * on where the ROM appears when you turn the MMU off.
125 */
126
127 u_int cpu_reset_address = 0;
128
129 /* Define various stack sizes in pages */
130 #define IRQ_STACK_SIZE 1
131 #define ABT_STACK_SIZE 1
132 #ifdef IPKDB
133 #define UND_STACK_SIZE 2
134 #else
135 #define UND_STACK_SIZE 1
136 #endif
137
138 BootConfig bootconfig; /* Boot config storage */
139 char *boot_args = NULL;
140 char *boot_file = NULL;
141
142 vm_offset_t physical_start;
143 vm_offset_t physical_freestart;
144 vm_offset_t physical_freeend;
145 vm_offset_t physical_end;
146 u_int free_pages;
147 vm_offset_t pagetables_start;
148 int physmem = 0;
149
150 /*int debug_flags;*/
151 #ifndef PMAP_STATIC_L1S
152 int max_processes = 64; /* Default number */
153 #endif /* !PMAP_STATIC_L1S */
154
155 /* Physical and virtual addresses for some global pages */
156 pv_addr_t systempage;
157 pv_addr_t irqstack;
158 pv_addr_t undstack;
159 pv_addr_t abtstack;
160 pv_addr_t kernelstack;
161 pv_addr_t minidataclean;
162
163 vm_offset_t msgbufphys;
164
165 extern u_int data_abort_handler_address;
166 extern u_int prefetch_abort_handler_address;
167 extern u_int undefined_handler_address;
168
169 #ifdef PMAP_DEBUG
170 extern int pmap_debug_level;
171 #endif
172
173 #define KERNEL_PT_SYS 0 /* L2 table for mapping zero page */
174
175 #define KERNEL_PT_KERNEL 1 /* L2 table for mapping kernel */
176 #define KERNEL_PT_KERNEL_NUM 2
177
178 /* L2 table for mapping i80312 */
179 #define KERNEL_PT_IOPXS (KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM)
180
181 /* L2 tables for mapping kernel VM */
182 #define KERNEL_PT_VMDATA (KERNEL_PT_IOPXS + 1)
183 #define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */
184 #define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
185
186 pv_addr_t kernel_pt_table[NUM_KERNEL_PTS];
187
188 struct user *proc0paddr;
189
190 /* Prototypes */
191
192 void consinit(void);
193
194 #include "com.h"
195 #if NCOM > 0
196 #include <dev/ic/comreg.h>
197 #include <dev/ic/comvar.h>
198 #endif
199
200 /*
201 * Define the default console speed for the board. This is generally
202 * what the firmware provided with the board defaults to.
203 */
204 #ifndef CONSPEED
205 #define CONSPEED B115200
206 #endif /* ! CONSPEED */
207
208 #ifndef CONUNIT
209 #define CONUNIT 0
210 #endif
211
212 #ifndef CONMODE
213 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
214 #endif
215
216 int comcnspeed = CONSPEED;
217 int comcnmode = CONMODE;
218 int comcnunit = CONUNIT;
219
220 /*
221 * void cpu_reboot(int howto, char *bootstr)
222 *
223 * Reboots the system
224 *
225 * Deal with any syncing, unmounting, dumping and shutdown hooks,
226 * then reset the CPU.
227 */
228 void
229 cpu_reboot(int howto, char *bootstr)
230 {
231
232 /*
233 * If we are still cold then hit the air brakes
234 * and crash to earth fast
235 */
236 if (cold) {
237 doshutdownhooks();
238 printf("The operating system has halted.\n");
239 printf("Please press any key to reboot.\n\n");
240 cngetc();
241 printf("rebooting...\n");
242 cpu_reset();
243 /*NOTREACHED*/
244 }
245
246 /* Disable console buffering */
247
248 /*
249 * If RB_NOSYNC was not specified sync the discs.
250 * Note: Unless cold is set to 1 here, syslogd will die during the
251 * unmount. It looks like syslogd is getting woken up only to find
252 * that it cannot page part of the binary in as the filesystem has
253 * been unmounted.
254 */
255 if (!(howto & RB_NOSYNC))
256 bootsync();
257
258 /* Say NO to interrupts */
259 splhigh();
260
261 /* Do a dump if requested. */
262 if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
263 dumpsys();
264
265 /* Run any shutdown hooks */
266 doshutdownhooks();
267
268 /* Make sure IRQ's are disabled */
269 IRQdisable;
270
271 if (howto & RB_HALT) {
272 iq80310_7seg('.', '.');
273 printf("The operating system has halted.\n");
274 printf("Please press any key to reboot.\n\n");
275 cngetc();
276 }
277
278 printf("rebooting...\n");
279 cpu_reset();
280 /*NOTREACHED*/
281 }
282
283 /*
284 * Mapping table for core kernel memory. This memory is mapped at init
285 * time with section mappings.
286 */
287 struct l1_sec_map {
288 vaddr_t va;
289 vaddr_t pa;
290 vsize_t size;
291 vm_prot_t prot;
292 int cache;
293 } l1_sec_table[] = {
294 /*
295 * Map the on-board devices VA == PA so that we can access them
296 * with the MMU on or off.
297 */
298 {
299 IQ80310_OBIO_BASE,
300 IQ80310_OBIO_BASE,
301 IQ80310_OBIO_SIZE,
302 VM_PROT_READ|VM_PROT_WRITE,
303 PTE_NOCACHE,
304 },
305
306 {
307 0,
308 0,
309 0,
310 0,
311 0,
312 }
313 };
314
315 /*
316 * u_int initarm(...)
317 *
318 * Initial entry point on startup. This gets called before main() is
319 * entered.
320 * It should be responsible for setting up everything that must be
321 * in place when main is called.
322 * This includes
323 * Taking a copy of the boot configuration structure.
324 * Initialising the physical console so characters can be printed.
325 * Setting up page tables for the kernel
326 * Relocating the kernel to the bottom of physical memory
327 */
328 u_int
329 initarm(void *arg)
330 {
331 extern vaddr_t xscale_cache_clean_addr;
332 #ifdef DIAGNOSTIC
333 extern vsize_t xscale_minidata_clean_size;
334 #endif
335 int loop;
336 int loop1;
337 u_int l1pagetable;
338 pv_addr_t kernel_l1pt;
339 paddr_t memstart;
340 psize_t memsize;
341
342 /*
343 * Clear out the 7-segment display. Whee, the first visual
344 * indication that we're running kernel code.
345 */
346 iq80310_7seg(' ', ' ');
347
348 /*
349 * Heads up ... Setup the CPU / MMU / TLB functions
350 */
351 if (set_cpufuncs())
352 panic("cpu not recognized!");
353
354 /* Calibrate the delay loop. */
355 iq80310_calibrate_delay();
356
357 /*
358 * Since we map the on-board devices VA==PA, and the kernel
359 * is running VA==PA, it's possible for us to initialize
360 * the console now.
361 */
362 consinit();
363
364 #ifdef VERBOSE_INIT_ARM
365 /* Talk to the user */
366 printf("\nNetBSD/evbarm (IQ80310) booting ...\n");
367 #endif
368
369 /*
370 * Reset the secondary PCI bus. RedBoot doesn't stop devices
371 * on the PCI bus before handing us control, so we have to
372 * do this.
373 *
374 * XXX This is arguably a bug in RedBoot, and doing this reset
375 * XXX could be problematic in the future if we encounter an
376 * XXX application where the PPB in the i80312 is used as a
377 * XXX PPB.
378 */
379 {
380 uint32_t reg;
381
382 #ifdef VERBOSE_INIT_ARM
383 printf("Resetting secondary PCI bus...\n");
384 #endif
385 reg = bus_space_read_4(&obio_bs_tag,
386 I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL);
387 bus_space_write_4(&obio_bs_tag,
388 I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL,
389 reg | PPB_BC_SECONDARY_RESET);
390 delay(10 * 1000); /* 10ms enough? */
391 bus_space_write_4(&obio_bs_tag,
392 I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL,
393 reg);
394 }
395
396 /*
397 * We are currently running with the MMU enabled and the
398 * entire address space mapped VA==PA, except for the
399 * first 64M of RAM is also double-mapped at 0xc0000000.
400 * There is an L1 page table at 0xa0004000.
401 */
402
403 /*
404 * Fetch the SDRAM start/size from the i80312 SDRAM configration
405 * registers.
406 */
407 i80312_sdram_bounds(&obio_bs_tag, I80312_PMMR_BASE + I80312_MEM_BASE,
408 &memstart, &memsize);
409
410 #ifdef VERBOSE_INIT_ARM
411 printf("initarm: Configuring system ...\n");
412 #endif
413
414 /* Fake bootconfig structure for the benefit of pmap.c */
415 /* XXX must make the memory description h/w independant */
416 bootconfig.dramblocks = 1;
417 bootconfig.dram[0].address = memstart;
418 bootconfig.dram[0].pages = memsize / PAGE_SIZE;
419
420 /*
421 * Set up the variables that define the availablilty of
422 * physical memory. For now, we're going to set
423 * physical_freestart to 0xa0200000 (where the kernel
424 * was loaded), and allocate the memory we need downwards.
425 * If we get too close to the L1 table that we set up, we
426 * will panic. We will update physical_freestart and
427 * physical_freeend later to reflect what pmap_bootstrap()
428 * wants to see.
429 *
430 * XXX pmap_bootstrap() needs an enema.
431 */
432 physical_start = bootconfig.dram[0].address;
433 physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE);
434
435 physical_freestart = 0xa0009000UL;
436 physical_freeend = 0xa0200000UL;
437
438 physmem = (physical_end - physical_start) / PAGE_SIZE;
439
440 #ifdef VERBOSE_INIT_ARM
441 /* Tell the user about the memory */
442 printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem,
443 physical_start, physical_end - 1);
444 #endif
445
446 /*
447 * Okay, the kernel starts 2MB in from the bottom of physical
448 * memory. We are going to allocate our bootstrap pages downwards
449 * from there.
450 *
451 * We need to allocate some fixed page tables to get the kernel
452 * going. We allocate one page directory and a number of page
453 * tables and store the physical addresses in the kernel_pt_table
454 * array.
455 *
456 * The kernel page directory must be on a 16K boundary. The page
457 * tables must be on 4K bounaries. What we do is allocate the
458 * page directory on the first 16K boundary that we encounter, and
459 * the page tables on 4K boundaries otherwise. Since we allocate
460 * at least 3 L2 page tables, we are guaranteed to encounter at
461 * least one 16K aligned region.
462 */
463
464 #ifdef VERBOSE_INIT_ARM
465 printf("Allocating page tables\n");
466 #endif
467
468 free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE;
469
470 #ifdef VERBOSE_INIT_ARM
471 printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n",
472 physical_freestart, free_pages, free_pages);
473 #endif
474
475 /* Define a macro to simplify memory allocation */
476 #define valloc_pages(var, np) \
477 alloc_pages((var).pv_pa, (np)); \
478 (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start;
479
480 #define alloc_pages(var, np) \
481 physical_freeend -= ((np) * PAGE_SIZE); \
482 if (physical_freeend < physical_freestart) \
483 panic("initarm: out of memory"); \
484 (var) = physical_freeend; \
485 free_pages -= (np); \
486 memset((char *)(var), 0, ((np) * PAGE_SIZE));
487
488 loop1 = 0;
489 kernel_l1pt.pv_pa = 0;
490 for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
491 /* Are we 16KB aligned for an L1 ? */
492 if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0
493 && kernel_l1pt.pv_pa == 0) {
494 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
495 } else {
496 valloc_pages(kernel_pt_table[loop1],
497 L2_TABLE_SIZE / PAGE_SIZE);
498 ++loop1;
499 }
500 }
501
502 /* This should never be able to happen but better confirm that. */
503 if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE-1)) != 0)
504 panic("initarm: Failed to align the kernel page directory");
505
506 /*
507 * Allocate a page for the system page mapped to V0x00000000
508 * This page will just contain the system vectors and can be
509 * shared by all processes.
510 */
511 alloc_pages(systempage.pv_pa, 1);
512
513 /* Allocate stacks for all modes */
514 valloc_pages(irqstack, IRQ_STACK_SIZE);
515 valloc_pages(abtstack, ABT_STACK_SIZE);
516 valloc_pages(undstack, UND_STACK_SIZE);
517 valloc_pages(kernelstack, UPAGES);
518
519 /* Allocate enough pages for cleaning the Mini-Data cache. */
520 KASSERT(xscale_minidata_clean_size <= PAGE_SIZE);
521 valloc_pages(minidataclean, 1);
522
523 #ifdef VERBOSE_INIT_ARM
524 printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa,
525 irqstack.pv_va);
526 printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa,
527 abtstack.pv_va);
528 printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa,
529 undstack.pv_va);
530 printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa,
531 kernelstack.pv_va);
532 #endif
533
534 /*
535 * XXX Defer this to later so that we can reclaim the memory
536 * XXX used by the RedBoot page tables.
537 */
538 alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE);
539
540 /*
541 * Ok we have allocated physical pages for the primary kernel
542 * page tables
543 */
544
545 #ifdef VERBOSE_INIT_ARM
546 printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa);
547 #endif
548
549 /*
550 * Now we start construction of the L1 page table
551 * We start by mapping the L2 page tables into the L1.
552 * This means that we can replace L1 mappings later on if necessary
553 */
554 l1pagetable = kernel_l1pt.pv_pa;
555
556 /* Map the L2 pages tables in the L1 page table */
557 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH & ~(0x00400000 - 1),
558 &kernel_pt_table[KERNEL_PT_SYS]);
559 for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++)
560 pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000,
561 &kernel_pt_table[KERNEL_PT_KERNEL + loop]);
562 pmap_link_l2pt(l1pagetable, IQ80310_IOPXS_VBASE,
563 &kernel_pt_table[KERNEL_PT_IOPXS]);
564 for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
565 pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
566 &kernel_pt_table[KERNEL_PT_VMDATA + loop]);
567
568 /* update the top of the kernel VM */
569 pmap_curmaxkvaddr =
570 KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000);
571
572 #ifdef VERBOSE_INIT_ARM
573 printf("Mapping kernel\n");
574 #endif
575
576 /* Now we fill in the L2 pagetable for the kernel static code/data */
577 {
578 extern char etext[], _end[];
579 size_t textsize = (uintptr_t) etext - KERNEL_TEXT_BASE;
580 size_t totalsize = (uintptr_t) _end - KERNEL_TEXT_BASE;
581 u_int logical;
582
583 textsize = (textsize + PGOFSET) & ~PGOFSET;
584 totalsize = (totalsize + PGOFSET) & ~PGOFSET;
585
586 logical = 0x00200000; /* offset of kernel in RAM */
587
588 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
589 physical_start + logical, textsize,
590 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
591 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
592 physical_start + logical, totalsize - textsize,
593 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
594 }
595
596 #ifdef VERBOSE_INIT_ARM
597 printf("Constructing L2 page tables\n");
598 #endif
599
600 /* Map the stack pages */
601 pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
602 IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
603 pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
604 ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
605 pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
606 UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
607 pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
608 UPAGES * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
609
610 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
611 L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
612
613 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
614 pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va,
615 kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
616 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
617 }
618
619 /* Map the Mini-Data cache clean area. */
620 xscale_setup_minidata(l1pagetable, minidataclean.pv_va,
621 minidataclean.pv_pa);
622
623 /* Map the vector page. */
624 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
625 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
626
627 /*
628 * Map devices we can map w/ section mappings.
629 */
630 loop = 0;
631 while (l1_sec_table[loop].size) {
632 vm_size_t sz;
633
634 #ifdef VERBOSE_INIT_ARM
635 printf("%08lx -> %08lx @ %08lx\n", l1_sec_table[loop].pa,
636 l1_sec_table[loop].pa + l1_sec_table[loop].size - 1,
637 l1_sec_table[loop].va);
638 #endif
639 for (sz = 0; sz < l1_sec_table[loop].size; sz += L1_S_SIZE)
640 pmap_map_section(l1pagetable,
641 l1_sec_table[loop].va + sz,
642 l1_sec_table[loop].pa + sz,
643 l1_sec_table[loop].prot,
644 l1_sec_table[loop].cache);
645 ++loop;
646 }
647
648 /*
649 * Map the PCI I/O spaces and i80312 registers. These are too
650 * small to be mapped w/ section mappings.
651 */
652 #ifdef VERBOSE_INIT_ARM
653 printf("Mapping PIOW 0x%08lx -> 0x%08lx @ 0x%08lx\n",
654 I80312_PCI_XLATE_PIOW_BASE,
655 I80312_PCI_XLATE_PIOW_BASE + I80312_PCI_XLATE_IOSIZE - 1,
656 IQ80310_PIOW_VBASE);
657 #endif
658 pmap_map_chunk(l1pagetable, IQ80310_PIOW_VBASE,
659 I80312_PCI_XLATE_PIOW_BASE, I80312_PCI_XLATE_IOSIZE,
660 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
661
662 #ifdef VERBOSE_INIT_ARM
663 printf("Mapping SIOW 0x%08lx -> 0x%08lx @ 0x%08lx\n",
664 I80312_PCI_XLATE_SIOW_BASE,
665 I80312_PCI_XLATE_SIOW_BASE + I80312_PCI_XLATE_IOSIZE - 1,
666 IQ80310_SIOW_VBASE);
667 #endif
668 pmap_map_chunk(l1pagetable, IQ80310_SIOW_VBASE,
669 I80312_PCI_XLATE_SIOW_BASE, I80312_PCI_XLATE_IOSIZE,
670 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
671
672 #ifdef VERBOSE_INIT_ARM
673 printf("Mapping 80312 0x%08lx -> 0x%08lx @ 0x%08lx\n",
674 I80312_PMMR_BASE,
675 I80312_PMMR_BASE + I80312_PMMR_SIZE - 1,
676 IQ80310_80312_VBASE);
677 #endif
678 pmap_map_chunk(l1pagetable, IQ80310_80312_VBASE,
679 I80312_PMMR_BASE, I80312_PMMR_SIZE,
680 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
681
682 /*
683 * Give the XScale global cache clean code an appropriately
684 * sized chunk of unmapped VA space starting at 0xff000000
685 * (our device mappings end before this address).
686 */
687 xscale_cache_clean_addr = 0xff000000U;
688
689 /*
690 * Now we have the real page tables in place so we can switch to them.
691 * Once this is done we will be running with the REAL kernel page
692 * tables.
693 */
694
695 /*
696 * Update the physical_freestart/physical_freeend/free_pages
697 * variables.
698 */
699 {
700 extern char _end[];
701
702 physical_freestart = physical_start +
703 (((((uintptr_t) _end) + PGOFSET) & ~PGOFSET) -
704 KERNEL_BASE);
705 physical_freeend = physical_end;
706 free_pages =
707 (physical_freeend - physical_freestart) / PAGE_SIZE;
708 }
709
710 /* Switch tables */
711 #ifdef VERBOSE_INIT_ARM
712 printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
713 physical_freestart, free_pages, free_pages);
714 printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa);
715 #endif
716 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
717 setttb(kernel_l1pt.pv_pa);
718 cpu_tlb_flushID();
719 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
720
721 /*
722 * Moved from cpu_startup() as data_abort_handler() references
723 * this during uvm init
724 */
725 proc0paddr = (struct user *)kernelstack.pv_va;
726 lwp0.l_addr = proc0paddr;
727
728 #ifdef VERBOSE_INIT_ARM
729 printf("done!\n");
730 #endif
731
732 #ifdef VERBOSE_INIT_ARM
733 printf("bootstrap done.\n");
734 #endif
735
736 arm32_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
737
738 /*
739 * Pages were allocated during the secondary bootstrap for the
740 * stacks for different CPU modes.
741 * We must now set the r13 registers in the different CPU modes to
742 * point to these stacks.
743 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
744 * of the stack memory.
745 */
746 #ifdef VERBOSE_INIT_ARM
747 printf("init subsystems: stacks ");
748 #endif
749
750 set_stackptr(PSR_IRQ32_MODE,
751 irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
752 set_stackptr(PSR_ABT32_MODE,
753 abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
754 set_stackptr(PSR_UND32_MODE,
755 undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
756
757 /*
758 * Well we should set a data abort handler.
759 * Once things get going this will change as we will need a proper
760 * handler.
761 * Until then we will use a handler that just panics but tells us
762 * why.
763 * Initialisation of the vectors will just panic on a data abort.
764 * This just fills in a slighly better one.
765 */
766 #ifdef VERBOSE_INIT_ARM
767 printf("vectors ");
768 #endif
769 data_abort_handler_address = (u_int)data_abort_handler;
770 prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
771 undefined_handler_address = (u_int)undefinedinstruction_bounce;
772
773 /* Initialise the undefined instruction handlers */
774 #ifdef VERBOSE_INIT_ARM
775 printf("undefined ");
776 #endif
777 undefined_init();
778
779 /* Load memory into UVM. */
780 #ifdef VERBOSE_INIT_ARM
781 printf("page ");
782 #endif
783 uvm_setpagesize(); /* initialize PAGE_SIZE-dependent variables */
784 uvm_page_physload(atop(physical_freestart), atop(physical_freeend),
785 atop(physical_freestart), atop(physical_freeend),
786 VM_FREELIST_DEFAULT);
787
788 /* Boot strap pmap telling it where the kernel page table is */
789 #ifdef VERBOSE_INIT_ARM
790 printf("pmap ");
791 #endif
792 pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, KERNEL_VM_BASE,
793 KERNEL_VM_BASE + KERNEL_VM_SIZE);
794
795 /* Setup the IRQ system */
796 #ifdef VERBOSE_INIT_ARM
797 printf("irq ");
798 #endif
799 iq80310_intr_init();
800
801 #ifdef VERBOSE_INIT_ARM
802 printf("done.\n");
803 #endif
804
805 #ifdef IPKDB
806 /* Initialise ipkdb */
807 ipkdb_init();
808 if (boothowto & RB_KDB)
809 ipkdb_connect(0);
810 #endif
811
812 #if NKSYMS || defined(DDB) || defined(LKM)
813 /* Firmware doesn't load symbols. */
814 ksyms_init(0, NULL, NULL);
815 #endif
816
817 #ifdef DDB
818 db_machine_init();
819 if (boothowto & RB_KDB)
820 Debugger();
821 #endif
822
823 /* We return the new stack pointer address */
824 return(kernelstack.pv_va + USPACE_SVC_STACK_TOP);
825 }
826
827 void
828 consinit(void)
829 {
830 static const bus_addr_t comcnaddrs[] = {
831 IQ80310_UART2, /* com0 (J9) */
832 IQ80310_UART1, /* com1 (J10) */
833 };
834 static int consinit_called;
835
836 if (consinit_called != 0)
837 return;
838
839 consinit_called = 1;
840
841 #if NCOM > 0
842 if (comcnattach(&obio_bs_tag, comcnaddrs[comcnunit], comcnspeed,
843 COM_FREQ, comcnmode))
844 panic("can't init serial console @%lx", comcnaddrs[comcnunit]);
845 #else
846 panic("serial console @%lx not configured", comcnaddrs[comcnunit]);
847 #endif
848 }
849