iq80310_machdep.c revision 1.7 1 /* $NetBSD: iq80310_machdep.c,v 1.7 2001/11/09 07:21:39 thorpej Exp $ */
2
3 /*
4 * Copyright (c) 1997,1998 Mark Brinicombe.
5 * Copyright (c) 1997,1998 Causality Limited.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by Mark Brinicombe
19 * for the NetBSD Project.
20 * 4. The name of the company nor the name of the author may be used to
21 * endorse or promote products derived from this software without specific
22 * prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
25 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
26 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
27 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
28 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
29 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * SUCH DAMAGE.
35 *
36 * Machine dependant functions for kernel setup for Intel IQ80310 evaluation
37 * boards using RedBoot firmware.
38 */
39
40 #include "opt_ddb.h"
41 #include "opt_pmap_debug.h"
42
43 #include <sys/param.h>
44 #include <sys/device.h>
45 #include <sys/systm.h>
46 #include <sys/kernel.h>
47 #include <sys/exec.h>
48 #include <sys/proc.h>
49 #include <sys/msgbuf.h>
50 #include <sys/reboot.h>
51 #include <sys/termios.h>
52
53 #include <dev/cons.h>
54
55 #include <machine/db_machdep.h>
56 #include <ddb/db_sym.h>
57 #include <ddb/db_extern.h>
58
59 #include <machine/bootconfig.h>
60 #include <machine/bus.h>
61 #include <machine/cpu.h>
62 #include <machine/frame.h>
63 #include <machine/irqhandler.h>
64 #include <machine/pte.h>
65 #include <machine/undefined.h>
66
67 #include <arm/xscale/i80312reg.h>
68 #include <arm/xscale/i80312var.h>
69
70 #include <dev/pci/ppbreg.h>
71
72 #include <evbarm/iq80310/iq80310reg.h>
73 #include <evbarm/iq80310/iq80310var.h>
74 #include <evbarm/iq80310/obiovar.h>
75
76 #include "opt_ipkdb.h"
77
78 /*
79 * Address to call from cpu_reset() to reset the machine.
80 * This is machine architecture dependant as it varies depending
81 * on where the ROM appears when you turn the MMU off.
82 */
83
84 u_int cpu_reset_address = 0;
85
86 /* Define various stack sizes in pages */
87 #define IRQ_STACK_SIZE 1
88 #define ABT_STACK_SIZE 1
89 #ifdef IPKDB
90 #define UND_STACK_SIZE 2
91 #else
92 #define UND_STACK_SIZE 1
93 #endif
94
95 BootConfig bootconfig; /* Boot config storage */
96 static char bootargs[MAX_BOOT_STRING + 1];
97 char *boot_args = NULL;
98 char *boot_file = NULL;
99
100 vm_offset_t physical_start;
101 vm_offset_t physical_freestart;
102 vm_offset_t physical_freeend;
103 vm_offset_t physical_end;
104 u_int free_pages;
105 vm_offset_t pagetables_start;
106 int physmem = 0;
107
108 /*int debug_flags;*/
109 #ifndef PMAP_STATIC_L1S
110 int max_processes = 64; /* Default number */
111 #endif /* !PMAP_STATIC_L1S */
112
113 /* Physical and virtual addresses for some global pages */
114 pv_addr_t systempage;
115 pv_addr_t irqstack;
116 pv_addr_t undstack;
117 pv_addr_t abtstack;
118 pv_addr_t kernelstack;
119
120 vm_offset_t msgbufphys;
121
122 extern u_int data_abort_handler_address;
123 extern u_int prefetch_abort_handler_address;
124 extern u_int undefined_handler_address;
125
126 #ifdef PMAP_DEBUG
127 extern int pmap_debug_level;
128 #endif
129
130 #define KERNEL_PT_SYS 0 /* Page table for mapping proc0 zero page */
131 #define KERNEL_PT_KERNEL 1 /* Page table for mapping kernel */
132 #define KERNEL_PT_IOPXS 2 /* Page table for mapping i80312 */
133 #define KERNEL_PT_VMDATA 3 /* Page tables for mapping kernel VM */
134 #define KERNEL_PT_VMDATA_NUM (KERNEL_VM_SIZE >> (PDSHIFT + 2))
135 #define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
136
137 pt_entry_t kernel_pt_table[NUM_KERNEL_PTS];
138
139 struct user *proc0paddr;
140
141 /* Prototypes */
142
143 void consinit(void);
144
145 void map_section(vm_offset_t pt, vm_offset_t va, vm_offset_t pa,
146 int cacheable);
147 void map_pagetable(vm_offset_t pt, vm_offset_t va, vm_offset_t pa);
148 void map_entry(vm_offset_t pt, vm_offset_t va, vm_offset_t pa);
149 void map_entry_nc(vm_offset_t pt, vm_offset_t va, vm_offset_t pa);
150 void map_entry_ro(vm_offset_t pt, vm_offset_t va, vm_offset_t pa);
151 vm_size_t map_chunk(vm_offset_t pd, vm_offset_t pt, vm_offset_t va,
152 vm_offset_t pa, vm_size_t size, u_int acc, u_int flg);
153
154 void process_kernel_args(char *);
155 void data_abort_handler(trapframe_t *frame);
156 void prefetch_abort_handler(trapframe_t *frame);
157 void undefinedinstruction_bounce(trapframe_t *frame);
158
159 extern void parse_mi_bootargs(char *args);
160 extern void dumpsys(void);
161
162 #include "com.h"
163 #if NCOM > 0
164 #include <dev/ic/comreg.h>
165 #include <dev/ic/comvar.h>
166 #endif
167
168 #ifndef CONSPEED
169 #define CONSPEED B115200 /* What RedBoot uses */
170 #endif
171 #ifndef CONMODE
172 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
173 #endif
174
175 int comcnspeed = CONSPEED;
176 int comcnmode = CONMODE;
177
178 /*
179 * void cpu_reboot(int howto, char *bootstr)
180 *
181 * Reboots the system
182 *
183 * Deal with any syncing, unmounting, dumping and shutdown hooks,
184 * then reset the CPU.
185 */
186 void
187 cpu_reboot(int howto, char *bootstr)
188 {
189 #ifdef DIAGNOSTIC
190 /* info */
191 printf("boot: howto=%08x curproc=%p\n", howto, curproc);
192 #endif
193
194 /*
195 * If we are still cold then hit the air brakes
196 * and crash to earth fast
197 */
198 if (cold) {
199 doshutdownhooks();
200 printf("The operating system has halted.\n");
201 printf("Please press any key to reboot.\n\n");
202 cngetc();
203 printf("rebooting...\n");
204 cpu_reset();
205 /*NOTREACHED*/
206 }
207
208 /* Disable console buffering */
209 /* cnpollc(1);*/
210
211 /*
212 * If RB_NOSYNC was not specified sync the discs.
213 * Note: Unless cold is set to 1 here, syslogd will die during the
214 * unmount. It looks like syslogd is getting woken up only to find
215 * that it cannot page part of the binary in as the filesystem has
216 * been unmounted.
217 */
218 if (!(howto & RB_NOSYNC))
219 bootsync();
220
221 /* Say NO to interrupts */
222 splhigh();
223
224 /* Do a dump if requested. */
225 if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
226 dumpsys();
227
228 /* Run any shutdown hooks */
229 doshutdownhooks();
230
231 /* Make sure IRQ's are disabled */
232 IRQdisable;
233
234 if (howto & RB_HALT) {
235 printf("The operating system has halted.\n");
236 printf("Please press any key to reboot.\n\n");
237 cngetc();
238 }
239
240 printf("rebooting...\n");
241 cpu_reset();
242 /*NOTREACHED*/
243 }
244
245 /*
246 * Mapping table for core kernel memory. This memory is mapped at init
247 * time with section mappings.
248 */
249 struct l1_sec_map {
250 vaddr_t va;
251 vaddr_t pa;
252 vsize_t size;
253 int flags;
254 } l1_sec_table[] = {
255 /*
256 * Map the on-board devices VA == PA so that we can access them
257 * with the MMU on or off.
258 */
259 {
260 IQ80310_OBIO_BASE,
261 IQ80310_OBIO_BASE,
262 IQ80310_OBIO_SIZE,
263 0,
264 },
265
266 {
267 0,
268 0,
269 0,
270 0,
271 }
272 };
273
274 /*
275 * u_int initarm(...)
276 *
277 * Initial entry point on startup. This gets called before main() is
278 * entered.
279 * It should be responsible for setting up everything that must be
280 * in place when main is called.
281 * This includes
282 * Taking a copy of the boot configuration structure.
283 * Initialising the physical console so characters can be printed.
284 * Setting up page tables for the kernel
285 * Relocating the kernel to the bottom of physical memory
286 */
287 u_int
288 initarm(void)
289 {
290 int loop;
291 int loop1;
292 u_int l1pagetable;
293 u_int l2pagetable;
294 extern char page0[], page0_end[];
295 pv_addr_t kernel_l1pt;
296 pv_addr_t kernel_ptpt;
297 paddr_t memstart;
298 psize_t memsize;
299
300 /*
301 * Clear out the 7-segment display. Whee, the first visual
302 * indication that we're running kernel code.
303 */
304 iq80310_7seg(' ', ' ');
305
306 /*
307 * Heads up ... Setup the CPU / MMU / TLB functions
308 */
309 if (set_cpufuncs())
310 panic("cpu not recognized!");
311
312 /* Calibrate the delay loop. */
313 iq80310_calibrate_delay();
314
315 /*
316 * Since we map the on-board devices VA==PA, and the kernel
317 * is running VA==PA, it's possible for us to initialize
318 * the console now.
319 */
320 consinit();
321
322 /* Talk to the user */
323 printf("\nNetBSD/evbarm (IQ80310) booting ...\n");
324
325 /*
326 * Reset the secondary PCI bus. RedBoot doesn't stop devices
327 * on the PCI bus before handing us control, so we have to
328 * do this.
329 *
330 * XXX This is arguably a bug in RedBoot, and doing this reset
331 * XXX could be problematic in the future if we encounter an
332 * XXX application where the PPB in the i80312 is used as a
333 * XXX PPB.
334 */
335 {
336 uint32_t reg;
337
338 printf("Resetting secondary PCI bus...\n");
339 reg = bus_space_read_4(&obio_bs_tag,
340 I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL);
341 bus_space_write_4(&obio_bs_tag,
342 I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL,
343 reg | PPB_BC_SECONDARY_RESET);
344 delay(10 * 1000); /* 10ms enough? */
345 bus_space_write_4(&obio_bs_tag,
346 I80312_PMMR_BASE + I80312_PPB_BASE, PPB_REG_BRIDGECONTROL,
347 reg);
348 }
349
350 /*
351 * Okay, RedBoot has provided us with the following memory map:
352 *
353 * Physical Address Range Description
354 * ----------------------- ----------------------------------
355 * 0x00000000 - 0x00000fff flash Memory
356 * 0x00001000 - 0x00001fff 80312 Internal Registers
357 * 0x00002000 - 0x007fffff flash Memory
358 * 0x00800000 - 0x7fffffff PCI ATU Outbound Direct Window
359 * 0x80000000 - 0x83ffffff Primary PCI 32-bit Memory
360 * 0x84000000 - 0x87ffffff Primary PCI 64-bit Memory
361 * 0x88000000 - 0x8bffffff Secondary PCI 32-bit Memory
362 * 0x8c000000 - 0x8fffffff Secondary PCI 64-bit Memory
363 * 0x90000000 - 0x9000ffff Primary PCI IO Space
364 * 0x90010000 - 0x9001ffff Secondary PCI IO Space
365 * 0x90020000 - 0x9fffffff Unused
366 * 0xa0000000 - 0xbfffffff SDRAM
367 * 0xc0000000 - 0xefffffff Unused
368 * 0xf0000000 - 0xffffffff 80200 Internal Registers
369 *
370 *
371 * Virtual Address Range C B Description
372 * ----------------------- - - ----------------------------------
373 * 0x00000000 - 0x00000fff Y Y SDRAM
374 * 0x00001000 - 0x00001fff N N 80312 Internal Registers
375 * 0x00002000 - 0x007fffff Y N flash Memory
376 * 0x00800000 - 0x7fffffff N N PCI ATU Outbound Direct Window
377 * 0x80000000 - 0x83ffffff N N Primary PCI 32-bit Memory
378 * 0x84000000 - 0x87ffffff N N Primary PCI 64-bit Memory
379 * 0x88000000 - 0x8bffffff N N Secondary PCI 32-bit Memory
380 * 0x8c000000 - 0x8fffffff N N Secondary PCI 64-bit Memory
381 * 0x90000000 - 0x9000ffff N N Primary PCI IO Space
382 * 0x90010000 - 0x9001ffff N N Secondary PCI IO Space
383 * 0xa0000000 - 0xa0000fff Y N flash
384 * 0xa0001000 - 0xbfffffff Y Y SDRAM
385 * 0xc0000000 - 0xcfffffff Y Y Cache Flush Region
386 * 0xf0000000 - 0xffffffff N N 80200 Internal Registers
387 *
388 * The first level page table is at 0xa0004000. There are also
389 * 2 second-level tables at 0xa0008000 and 0xa0008400.
390 *
391 * This corresponds roughly to the physical memory map, i.e.
392 * we are quite nearly running VA==PA.
393 */
394
395 /*
396 * Examine the boot args string for options we need to know about
397 * now.
398 */
399 #if 0
400 process_kernel_args((char *)nwbootinfo.bt_args);
401 #endif
402
403 /*
404 * Fetch the SDRAM start/size from the i80312 SDRAM configration
405 * registers.
406 */
407 i80312_sdram_bounds(&obio_bs_tag, I80312_PMMR_BASE + I80312_MEM_BASE,
408 &memstart, &memsize);
409
410 printf("initarm: Configuring system ...\n");
411
412 /* Fake bootconfig structure for the benefit of pmap.c */
413 /* XXX must make the memory description h/w independant */
414 bootconfig.dramblocks = 1;
415 bootconfig.dram[0].address = memstart;
416 bootconfig.dram[0].pages = memsize / NBPG;
417
418 /*
419 * Set up the variables that define the availablilty of
420 * physical memory. For now, we're going to set
421 * physical_freestart to 0xa0200000 (where the kernel
422 * was loaded), and allocate the memory we need downwards.
423 * If we get too close to the page tables that RedBoot
424 * set up, we will panic. We will update physical_freestart
425 * and physical_freeend later to reflect what pmap_bootstrap()
426 * wants to see.
427 *
428 * XXX pmap_bootstrap() needs an enema.
429 */
430 physical_start = bootconfig.dram[0].address;
431 physical_end = physical_start + (bootconfig.dram[0].pages * NBPG);
432
433 physical_freestart = 0xa0009000UL;
434 physical_freeend = 0xa0200000UL;
435
436 physmem = (physical_end - physical_start) / NBPG;
437
438 /* Tell the user about the memory */
439 printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem,
440 physical_start, physical_end - 1);
441
442 /*
443 * Okay, the kernel starts 2MB in from the bottom of physical
444 * memory. We are going to allocate our bootstrap pages downwards
445 * from there.
446 *
447 * We need to allocate some fixed page tables to get the kernel
448 * going. We allocate one page directory and a number of page
449 * tables and store the physical addresses in the kernel_pt_table
450 * array.
451 *
452 * The kernel page directory must be on a 16K boundary. The page
453 * tables must be on 4K bounaries. What we do is allocate the
454 * page directory on the first 16K boundary that we encounter, and
455 * the page tables on 4K boundaries otherwise. Since we allocate
456 * at least 3 L2 page tables, we are guaranteed to encounter at
457 * least one 16K aligned region.
458 */
459
460 #ifdef VERBOSE_INIT_ARM
461 printf("Allocating page tables\n");
462 #endif
463
464 free_pages = (physical_freeend - physical_freestart) / NBPG;
465
466 #ifdef VERBOSE_INIT_ARM
467 printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n",
468 physical_freestart, free_pages, free_pages);
469 #endif
470
471 /* Define a macro to simplify memory allocation */
472 #define valloc_pages(var, np) \
473 alloc_pages((var).pv_pa, (np)); \
474 (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start;
475
476 #define alloc_pages(var, np) \
477 physical_freeend -= ((np) * NBPG); \
478 if (physical_freeend < physical_freestart) \
479 panic("initarm: out of memory"); \
480 (var) = physical_freeend; \
481 free_pages -= (np); \
482 memset((char *)(var), 0, ((np) * NBPG));
483
484 loop1 = 0;
485 kernel_l1pt.pv_pa = 0;
486 for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
487 /* Are we 16KB aligned for an L1 ? */
488 if (((physical_freeend - PD_SIZE) & (PD_SIZE - 1)) == 0
489 && kernel_l1pt.pv_pa == 0) {
490 valloc_pages(kernel_l1pt, PD_SIZE / NBPG);
491 } else {
492 alloc_pages(kernel_pt_table[loop1], PT_SIZE / NBPG);
493 ++loop1;
494 }
495 }
496
497 /* This should never be able to happen but better confirm that. */
498 if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (PD_SIZE-1)) != 0)
499 panic("initarm: Failed to align the kernel page directory\n");
500
501 /*
502 * Allocate a page for the system page mapped to V0x00000000
503 * This page will just contain the system vectors and can be
504 * shared by all processes.
505 */
506 alloc_pages(systempage.pv_pa, 1);
507
508 /* Allocate a page for the page table to map kernel page tables. */
509 valloc_pages(kernel_ptpt, PT_SIZE / NBPG);
510
511 /* Allocate stacks for all modes */
512 valloc_pages(irqstack, IRQ_STACK_SIZE);
513 valloc_pages(abtstack, ABT_STACK_SIZE);
514 valloc_pages(undstack, UND_STACK_SIZE);
515 valloc_pages(kernelstack, UPAGES);
516
517 #ifdef VERBOSE_INIT_ARM
518 printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa,
519 irqstack.pv_va);
520 printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa,
521 abtstack.pv_va);
522 printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa,
523 undstack.pv_va);
524 printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa,
525 kernelstack.pv_va);
526 #endif
527
528 /*
529 * XXX Defer this to later so that we can reclaim the memory
530 * XXX used by the RedBoot page tables.
531 */
532 alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / NBPG);
533
534 /*
535 * Ok we have allocated physical pages for the primary kernel
536 * page tables
537 */
538
539 #ifdef VERBOSE_INIT_ARM
540 printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa);
541 #endif
542
543 /*
544 * Now we start consturction of the L1 page table
545 * We start by mapping the L2 page tables into the L1.
546 * This means that we can replace L1 mappings later on if necessary
547 */
548 l1pagetable = kernel_l1pt.pv_pa;
549
550 /* Map the L2 pages tables in the L1 page table */
551 map_pagetable(l1pagetable, 0x00000000,
552 kernel_pt_table[KERNEL_PT_SYS]);
553 map_pagetable(l1pagetable, KERNEL_BASE,
554 kernel_pt_table[KERNEL_PT_KERNEL]);
555 map_pagetable(l1pagetable, IQ80310_IOPXS_VBASE,
556 kernel_pt_table[KERNEL_PT_IOPXS]);
557 for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; ++loop)
558 map_pagetable(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
559 kernel_pt_table[KERNEL_PT_VMDATA + loop]);
560 map_pagetable(l1pagetable, PROCESS_PAGE_TBLS_BASE,
561 kernel_ptpt.pv_pa);
562
563 #ifdef VERBOSE_INIT_ARM
564 printf("Mapping kernel\n");
565 #endif
566
567 /* Now we fill in the L2 pagetable for the kernel static code/data */
568 l2pagetable = kernel_pt_table[KERNEL_PT_KERNEL];
569
570 {
571 extern char etext[], _end[];
572 size_t textsize = (uintptr_t) etext - KERNEL_TEXT_BASE;
573 size_t totalsize = (uintptr_t) _end - KERNEL_TEXT_BASE;
574 u_int logical;
575
576 /* Round down text size and round up total size. */
577 textsize = textsize & ~PGOFSET;
578 totalsize = (totalsize + PGOFSET) & ~PGOFSET;
579
580 logical = 0x00200000; /* offset of kernel in RAM */
581
582 /*
583 * This maps the kernel text/data/bss VA==PA.
584 */
585 logical += map_chunk(0, l2pagetable, KERNEL_BASE + logical,
586 physical_start + logical, textsize,
587 AP_KRW, PT_CACHEABLE);
588 logical += map_chunk(0, l2pagetable, KERNEL_BASE + logical,
589 physical_start + logical, totalsize - textsize,
590 AP_KRW, PT_CACHEABLE);
591
592 #if 0 /* XXX No symbols yet. */
593 logical += map_chunk(0, l2pagetable, KERNEL_BASE + logical,
594 physical_start + logical, kernexec->a_syms + sizeof(int)
595 + *(u_int *)((int)end + kernexec->a_syms + sizeof(int)),
596 AP_KRW, PT_CACHEABLE);
597 #endif
598 }
599
600 #ifdef VERBOSE_INIT_ARM
601 printf("Constructing L2 page tables\n");
602 #endif
603
604 /* Map the stack pages */
605 map_chunk(0, l2pagetable, irqstack.pv_va, irqstack.pv_pa,
606 IRQ_STACK_SIZE * NBPG, AP_KRW, PT_CACHEABLE);
607 map_chunk(0, l2pagetable, abtstack.pv_va, abtstack.pv_pa,
608 ABT_STACK_SIZE * NBPG, AP_KRW, PT_CACHEABLE);
609 map_chunk(0, l2pagetable, undstack.pv_va, undstack.pv_pa,
610 UND_STACK_SIZE * NBPG, AP_KRW, PT_CACHEABLE);
611 map_chunk(0, l2pagetable, kernelstack.pv_va, kernelstack.pv_pa,
612 UPAGES * NBPG, AP_KRW, PT_CACHEABLE);
613 map_chunk(0, l2pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
614 PD_SIZE, AP_KRW, 0);
615
616 /* Map the page table that maps the kernel pages */
617 map_entry_nc(l2pagetable, kernel_ptpt.pv_pa, kernel_ptpt.pv_pa);
618
619 /*
620 * Map entries in the page table used to map PTE's
621 * Basically every kernel page table gets mapped here
622 */
623 /* The -2 is slightly bogus, it should be -log2(sizeof(pt_entry_t)) */
624 l2pagetable = kernel_ptpt.pv_pa;
625 map_entry_nc(l2pagetable, (KERNEL_BASE >> (PGSHIFT-2)),
626 kernel_pt_table[KERNEL_PT_KERNEL]);
627 map_entry_nc(l2pagetable, (PROCESS_PAGE_TBLS_BASE >> (PGSHIFT-2)),
628 kernel_ptpt.pv_pa);
629 map_entry_nc(l2pagetable, (0x00000000 >> (PGSHIFT-2)),
630 kernel_pt_table[KERNEL_PT_SYS]);
631 for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; ++loop)
632 map_entry_nc(l2pagetable, ((KERNEL_VM_BASE +
633 (loop * 0x00400000)) >> (PGSHIFT-2)),
634 kernel_pt_table[KERNEL_PT_VMDATA + loop]);
635
636 /*
637 * Map the system page in the kernel page table for the bottom 1Meg
638 * of the virtual memory map.
639 */
640 l2pagetable = kernel_pt_table[KERNEL_PT_SYS];
641 map_entry(l2pagetable, 0x00000000, systempage.pv_pa);
642
643 /*
644 * Map devices we can map w/ section mappings.
645 */
646 loop = 0;
647 while (l1_sec_table[loop].size) {
648 vm_size_t sz;
649
650 #ifdef VERBOSE_INIT_ARM
651 printf("%08lx -> %08lx @ %08lx\n", l1_sec_table[loop].pa,
652 l1_sec_table[loop].pa + l1_sec_table[loop].size - 1,
653 l1_sec_table[loop].va);
654 #endif
655 for (sz = 0; sz < l1_sec_table[loop].size; sz += L1_SEC_SIZE)
656 map_section(l1pagetable, l1_sec_table[loop].va + sz,
657 l1_sec_table[loop].pa + sz,
658 l1_sec_table[loop].flags);
659 ++loop;
660 }
661
662 /*
663 * Map the PCI I/O spaces and i80312 registers. These are too
664 * small to be mapped w/ section mappings.
665 */
666 l2pagetable = kernel_pt_table[KERNEL_PT_IOPXS];
667 #ifdef VERBOSE_INIT_ARM
668 printf("Mapping PIOW 0x%08lx -> 0x%08lx @ 0x%08lx\n",
669 I80312_PCI_XLATE_PIOW_BASE,
670 I80312_PCI_XLATE_PIOW_BASE + I80312_PCI_XLATE_IOSIZE - 1,
671 IQ80310_PIOW_VBASE);
672 #endif
673 map_chunk(0, l2pagetable, IQ80310_PIOW_VBASE,
674 I80312_PCI_XLATE_PIOW_BASE, I80312_PCI_XLATE_IOSIZE, AP_KRW, 0);
675
676 #ifdef VERBOSE_INIT_ARM
677 printf("Mapping SIOW 0x%08lx -> 0x%08lx @ 0x%08lx\n",
678 I80312_PCI_XLATE_SIOW_BASE,
679 I80312_PCI_XLATE_SIOW_BASE + I80312_PCI_XLATE_IOSIZE - 1,
680 IQ80310_SIOW_VBASE);
681 #endif
682 map_chunk(0, l2pagetable, IQ80310_SIOW_VBASE,
683 I80312_PCI_XLATE_SIOW_BASE, I80312_PCI_XLATE_IOSIZE, AP_KRW, 0);
684
685 #ifdef VERBOSE_INIT_ARM
686 printf("Mapping 80312 0x%08lx -> 0x%08lx @ 0x%08lx\n",
687 I80312_PMMR_BASE,
688 I80312_PMMR_BASE + I80312_PMMR_SIZE - 1,
689 IQ80310_80312_VBASE);
690 #endif
691 map_chunk(0, l2pagetable, IQ80310_80312_VBASE,
692 I80312_PMMR_BASE, I80312_PMMR_SIZE, AP_KRW, 0);
693
694 /*
695 * Now we have the real page tables in place so we can switch to them.
696 * Once this is done we will be running with the REAL kernel page
697 * tables.
698 */
699
700 /*
701 * Update the physical_freestart/physical_freeend/free_pages
702 * variables.
703 */
704 {
705 extern char _end[];
706
707 physical_freestart = (((uintptr_t) _end) + PGOFSET) & ~PGOFSET;
708 physical_freeend = physical_end;
709 free_pages = (physical_freeend - physical_freestart) / NBPG;
710 }
711
712 /* Switch tables */
713 #ifdef VERBOSE_INIT_ARM
714 printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
715 physical_freestart, free_pages, free_pages);
716 printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa);
717 #endif
718 setttb(kernel_l1pt.pv_pa);
719
720 #ifdef VERBOSE_INIT_ARM
721 printf("done!\n");
722 #endif
723
724 #ifdef VERBOSE_INIT_ARM
725 printf("bootstrap done.\n");
726 #endif
727
728 /* Right, set up the vectors at the bottom of page 0 */
729 memcpy((char *)0x00000000, page0, page0_end - page0);
730
731 /* We have modified a text page so sync the icache */
732 cpu_cache_syncI();
733
734 /*
735 * Pages were allocated during the secondary bootstrap for the
736 * stacks for different CPU modes.
737 * We must now set the r13 registers in the different CPU modes to
738 * point to these stacks.
739 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
740 * of the stack memory.
741 */
742 printf("init subsystems: stacks ");
743
744 set_stackptr(PSR_IRQ32_MODE, irqstack.pv_va + IRQ_STACK_SIZE * NBPG);
745 set_stackptr(PSR_ABT32_MODE, abtstack.pv_va + ABT_STACK_SIZE * NBPG);
746 set_stackptr(PSR_UND32_MODE, undstack.pv_va + UND_STACK_SIZE * NBPG);
747
748 /*
749 * Well we should set a data abort handler.
750 * Once things get going this will change as we will need a proper
751 * handler.
752 * Until then we will use a handler that just panics but tells us
753 * why.
754 * Initialisation of the vectors will just panic on a data abort.
755 * This just fills in a slighly better one.
756 */
757 printf("vectors ");
758 data_abort_handler_address = (u_int)data_abort_handler;
759 prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
760 undefined_handler_address = (u_int)undefinedinstruction_bounce;
761
762 /* At last !
763 * We now have the kernel in physical memory from the bottom upwards.
764 * Kernel page tables are physically above this.
765 * The kernel is mapped to KERNEL_TEXT_BASE
766 * The kernel data PTs will handle the mapping of 0xf1000000-0xf3ffffff
767 * The page tables are mapped to 0xefc00000
768 */
769
770 /* Initialise the undefined instruction handlers */
771 printf("undefined ");
772 undefined_init();
773
774 /* Boot strap pmap telling it where the kernel page table is */
775 printf("pmap ");
776 pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, kernel_ptpt);
777
778 /* Setup the IRQ system */
779 printf("irq ");
780 irq_init();
781 printf("done.\n");
782
783 #ifdef IPKDB
784 /* Initialise ipkdb */
785 ipkdb_init();
786 if (boothowto & RB_KDB)
787 ipkdb_connect(0);
788 #endif
789
790 #ifdef DDB
791 db_machine_init();
792
793 /* Firmware doesn't load symbols. */
794 ddb_init(0, NULL, NULL);
795
796 if (boothowto & RB_KDB)
797 Debugger();
798 #endif
799
800 /* We return the new stack pointer address */
801 return(kernelstack.pv_va + USPACE_SVC_STACK_TOP);
802 }
803
804 void
805 process_kernel_args(char *args)
806 {
807
808 boothowto = 0;
809
810 /* Make a local copy of the bootargs */
811 strncpy(bootargs, args, MAX_BOOT_STRING);
812
813 args = bootargs;
814 boot_file = bootargs;
815
816 /* Skip the kernel image filename */
817 while (*args != ' ' && *args != 0)
818 ++args;
819
820 if (*args != 0)
821 *args++ = 0;
822
823 while (*args == ' ')
824 ++args;
825
826 boot_args = args;
827
828 printf("bootfile: %s\n", boot_file);
829 printf("bootargs: %s\n", boot_args);
830
831 parse_mi_bootargs(boot_args);
832 }
833
834 void
835 consinit(void)
836 {
837 static int consinit_called;
838
839 if (consinit_called != 0)
840 return;
841
842 consinit_called = 1;
843
844 #if NCOM > 0
845 if (comcnattach(&obio_bs_tag, IQ80310_UART2, comcnspeed,
846 COM_FREQ, comcnmode))
847 panic("can't init serial console @%lx", IQ80310_UART1);
848 #else
849 panic("serial console @%lx not configured", IQ80310_UART1);
850 #endif
851 }
852