iq80310_start.S revision 1.2 1 1.2 thorpej /* $NetBSD: iq80310_start.S,v 1.2 2002/04/05 16:58:09 thorpej Exp $ */
2 1.1 thorpej
3 1.1 thorpej /*
4 1.1 thorpej * Copyright (c) 2002 Wasabi Systems, Inc.
5 1.1 thorpej * All rights reserved.
6 1.1 thorpej *
7 1.1 thorpej * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8 1.1 thorpej *
9 1.1 thorpej * Redistribution and use in source and binary forms, with or without
10 1.1 thorpej * modification, are permitted provided that the following conditions
11 1.1 thorpej * are met:
12 1.1 thorpej * 1. Redistributions of source code must retain the above copyright
13 1.1 thorpej * notice, this list of conditions and the following disclaimer.
14 1.1 thorpej * 2. Redistributions in binary form must reproduce the above copyright
15 1.1 thorpej * notice, this list of conditions and the following disclaimer in the
16 1.1 thorpej * documentation and/or other materials provided with the distribution.
17 1.1 thorpej * 3. All advertising materials mentioning features or use of this software
18 1.1 thorpej * must display the following acknowledgement:
19 1.1 thorpej * This product includes software developed for the NetBSD Project by
20 1.1 thorpej * Wasabi Systems, Inc.
21 1.1 thorpej * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 1.1 thorpej * or promote products derived from this software without specific prior
23 1.1 thorpej * written permission.
24 1.1 thorpej *
25 1.1 thorpej * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 1.1 thorpej * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 1.1 thorpej * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 1.1 thorpej * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 1.1 thorpej * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 1.1 thorpej * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 1.1 thorpej * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 1.1 thorpej * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 1.1 thorpej * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 1.1 thorpej * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 1.1 thorpej * POSSIBILITY OF SUCH DAMAGE.
36 1.1 thorpej */
37 1.1 thorpej
38 1.1 thorpej #include <machine/asm.h>
39 1.1 thorpej #include <arm/armreg.h>
40 1.1 thorpej #include <arm/arm32/pte.h>
41 1.1 thorpej
42 1.1 thorpej .section .start,"ax",%progbits
43 1.1 thorpej
44 1.1 thorpej .global _C_LABEL(iq80310_start)
45 1.1 thorpej _C_LABEL(iq80310_start):
46 1.1 thorpej /*
47 1.1 thorpej * We assume we've been loaded VA==PA, or that the MMU is
48 1.1 thorpej * disabled. We will go ahead and disable the MMU here
49 1.1 thorpej * so that we don't have to worry about flushing caches, etc.
50 1.1 thorpej */
51 1.1 thorpej mrc p15, 0, r2, c1, c0, 0
52 1.1 thorpej bic r2, r2, #CPU_CONTROL_MMU_ENABLE
53 1.1 thorpej mcr p15, 0, r2, c1, c0, 0
54 1.1 thorpej
55 1.1 thorpej nop
56 1.1 thorpej nop
57 1.1 thorpej nop
58 1.1 thorpej
59 1.1 thorpej /*
60 1.1 thorpej * We want to construct a memory map that maps us
61 1.1 thorpej * VA==PA (SDRAM at 0xa0000000) and also double-maps
62 1.1 thorpej * that space at 0xc0000000 (where the kernel address
63 1.1 thorpej * space starts). We create these mappings uncached
64 1.1 thorpej * and unbuffered to be safe.
65 1.1 thorpej *
66 1.1 thorpej * We also want to map the various devices we want to
67 1.1 thorpej * talk to VA==PA during bootstrap.
68 1.1 thorpej *
69 1.1 thorpej * We just use section mappings for all of this to make it easy.
70 1.1 thorpej *
71 1.1 thorpej * We will put the L1 table to do all this at 0xa0004000, which
72 1.1 thorpej * is also where RedBoot puts it.
73 1.1 thorpej */
74 1.1 thorpej
75 1.1 thorpej /*
76 1.1 thorpej * Step 1: Map the entire address space VA==PA.
77 1.1 thorpej */
78 1.1 thorpej add r0, pc, #(Ltable - . - 8)
79 1.1 thorpej ldr r0, [r0] /* r0 = &l1table */
80 1.1 thorpej
81 1.2 thorpej mov r3, #(L1_S_AP(AP_KRW))
82 1.2 thorpej orr r3, r3, #(L1_TYPE_S)
83 1.1 thorpej mov r2, #0x100000 /* advance by 1MB */
84 1.1 thorpej mov r1, #0x1000 /* 4096MB */
85 1.1 thorpej 1:
86 1.1 thorpej str r3, [r0], #0x04
87 1.1 thorpej add r3, r3, r2
88 1.1 thorpej subs r1, r1, #1
89 1.1 thorpej bgt 1b
90 1.1 thorpej
91 1.1 thorpej /*
92 1.1 thorpej * Step 2: Map VA 0xc0000000->0xc3ffffff to PA 0xa0000000->0xa3ffffff.
93 1.1 thorpej */
94 1.1 thorpej add r0, pc, #(Ltable - . - 8) /* r0 = &l1table */
95 1.1 thorpej ldr r0, [r0]
96 1.1 thorpej
97 1.2 thorpej mov r3, #(L1_S_AP(AP_KRW))
98 1.2 thorpej orr r3, r3, #(L1_TYPE_S)
99 1.1 thorpej orr r3, r3, #0xa0000000
100 1.1 thorpej add r0, r0, #(0xc00 * 4) /* offset to 0xc00xxxxx */
101 1.1 thorpej mov r1, #0x40 /* 64MB */
102 1.1 thorpej 1:
103 1.1 thorpej str r3, [r0], #0x04
104 1.1 thorpej add r3, r3, r2
105 1.1 thorpej subs r1, r1, #1
106 1.1 thorpej bgt 1b
107 1.1 thorpej
108 1.1 thorpej /* OK! Page table is set up. Give it to the CPU. */
109 1.1 thorpej add r0, pc, #(Ltable - . - 8)
110 1.1 thorpej ldr r0, [r0]
111 1.1 thorpej mcr p15, 0, r0, c2, c0, 0
112 1.1 thorpej
113 1.1 thorpej /* Flush the old TLBs, just in case. */
114 1.1 thorpej mcr p15, 0, r0, c8, c7, 0
115 1.1 thorpej
116 1.1 thorpej /* Set the Domain Access register. Very important! */
117 1.1 thorpej mov r0, #1
118 1.1 thorpej mcr p15, 0, r0, c3, c0, 0
119 1.1 thorpej
120 1.1 thorpej /* OK, let's enable the MMU. */
121 1.1 thorpej mrc p15, 0, r2, c1, c0, 0
122 1.1 thorpej orr r2, r2, #CPU_CONTROL_MMU_ENABLE
123 1.1 thorpej mcr p15, 0, r2, c1, c0, 0
124 1.1 thorpej
125 1.1 thorpej nop
126 1.1 thorpej nop
127 1.1 thorpej nop
128 1.1 thorpej
129 1.1 thorpej /* ...and now we jump to the "real" kernel entry point! */
130 1.1 thorpej add r0, pc, #(Lstart - . - 8)
131 1.1 thorpej ldr pc, [r0]
132 1.1 thorpej
133 1.1 thorpej Ltable:
134 1.1 thorpej .word 0xa0004000
135 1.1 thorpej
136 1.1 thorpej Lstart:
137 1.1 thorpej .word start
138