ixdp425_machdep.c revision 1.1 1 1.1 ichiro /* $NetBSD: ixdp425_machdep.c,v 1.1 2003/05/23 00:57:27 ichiro Exp $ */
2 1.1 ichiro #define VERBOSE_INIT_ARM
3 1.1 ichiro /*
4 1.1 ichiro * Copyright (c) 2003
5 1.1 ichiro * Ichiro FUKUHARA <ichiro (at) ichiro.org>.
6 1.1 ichiro * All rights reserved.
7 1.1 ichiro *
8 1.1 ichiro * Redistribution and use in source and binary forms, with or without
9 1.1 ichiro * modification, are permitted provided that the following conditions
10 1.1 ichiro * are met:
11 1.1 ichiro * 1. Redistributions of source code must retain the above copyright
12 1.1 ichiro * notice, this list of conditions and the following disclaimer.
13 1.1 ichiro * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 ichiro * notice, this list of conditions and the following disclaimer in the
15 1.1 ichiro * documentation and/or other materials provided with the distribution.
16 1.1 ichiro * 3. All advertising materials mentioning features or use of this software
17 1.1 ichiro * must display the following acknowledgement:
18 1.1 ichiro * This product includes software developed by Ichiro FUKUHARA.
19 1.1 ichiro * 4. The name of the company nor the name of the author may be used to
20 1.1 ichiro * endorse or promote products derived from this software without specific
21 1.1 ichiro * prior written permission.
22 1.1 ichiro *
23 1.1 ichiro * THIS SOFTWARE IS PROVIDED BY ICHIRO FUKUHARA ``AS IS'' AND ANY EXPRESS OR
24 1.1 ichiro * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25 1.1 ichiro * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26 1.1 ichiro * IN NO EVENT SHALL ICHIRO FUKUHARA OR THE VOICES IN HIS HEAD BE LIABLE FOR
27 1.1 ichiro * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28 1.1 ichiro * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29 1.1 ichiro * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30 1.1 ichiro * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31 1.1 ichiro * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32 1.1 ichiro * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 1.1 ichiro * SUCH DAMAGE.
34 1.1 ichiro */
35 1.1 ichiro /*
36 1.1 ichiro * Copyright (c) 1997,1998 Mark Brinicombe.
37 1.1 ichiro * Copyright (c) 1997,1998 Causality Limited.
38 1.1 ichiro * All rights reserved.
39 1.1 ichiro *
40 1.1 ichiro * Redistribution and use in source and binary forms, with or without
41 1.1 ichiro * modification, are permitted provided that the following conditions
42 1.1 ichiro * are met:
43 1.1 ichiro * 1. Redistributions of source code must retain the above copyright
44 1.1 ichiro * notice, this list of conditions and the following disclaimer.
45 1.1 ichiro * 2. Redistributions in binary form must reproduce the above copyright
46 1.1 ichiro * notice, this list of conditions and the following disclaimer in the
47 1.1 ichiro * documentation and/or other materials provided with the distribution.
48 1.1 ichiro * 3. All advertising materials mentioning features or use of this software
49 1.1 ichiro * must display the following acknowledgement:
50 1.1 ichiro * This product includes software developed by Mark Brinicombe
51 1.1 ichiro * for the NetBSD Project.
52 1.1 ichiro * 4. The name of the company nor the name of the author may be used to
53 1.1 ichiro * endorse or promote products derived from this software without specific
54 1.1 ichiro * prior written permission.
55 1.1 ichiro *
56 1.1 ichiro * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
57 1.1 ichiro * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
58 1.1 ichiro * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
59 1.1 ichiro * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
60 1.1 ichiro * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
61 1.1 ichiro * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
62 1.1 ichiro * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
63 1.1 ichiro * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
64 1.1 ichiro * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
65 1.1 ichiro * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
66 1.1 ichiro * SUCH DAMAGE.
67 1.1 ichiro */
68 1.1 ichiro
69 1.1 ichiro /* Machine dependant functions for kernel setup for Intel IXP425 evaluation
70 1.1 ichiro * boards using RedBoot firmware.
71 1.1 ichiro */
72 1.1 ichiro
73 1.1 ichiro #include "opt_ddb.h"
74 1.1 ichiro #include "opt_kgdb.h"
75 1.1 ichiro #include "opt_pmap_debug.h"
76 1.1 ichiro
77 1.1 ichiro #include <sys/param.h>
78 1.1 ichiro #include <sys/device.h>
79 1.1 ichiro #include <sys/systm.h>
80 1.1 ichiro #include <sys/kernel.h>
81 1.1 ichiro #include <sys/exec.h>
82 1.1 ichiro #include <sys/proc.h>
83 1.1 ichiro #include <sys/msgbuf.h>
84 1.1 ichiro #include <sys/reboot.h>
85 1.1 ichiro #include <sys/termios.h>
86 1.1 ichiro #include <sys/ksyms.h>
87 1.1 ichiro
88 1.1 ichiro #include <uvm/uvm_extern.h>
89 1.1 ichiro
90 1.1 ichiro #include <dev/cons.h>
91 1.1 ichiro
92 1.1 ichiro #include <machine/db_machdep.h>
93 1.1 ichiro #include <ddb/db_sym.h>
94 1.1 ichiro #include <ddb/db_extern.h>
95 1.1 ichiro
96 1.1 ichiro #include <machine/bootconfig.h>
97 1.1 ichiro #include <machine/bus.h>
98 1.1 ichiro #include <machine/cpu.h>
99 1.1 ichiro #include <machine/frame.h>
100 1.1 ichiro #include <arm/undefined.h>
101 1.1 ichiro
102 1.1 ichiro #include <arm/arm32/machdep.h>
103 1.1 ichiro
104 1.1 ichiro #include <arm/xscale/ixp425reg.h>
105 1.1 ichiro #include <arm/xscale/ixp425var.h>
106 1.1 ichiro
107 1.1 ichiro #include <arm/xscale/ixp425_sipvar.h>
108 1.1 ichiro #include <arm/xscale/ixp425_comvar.h>
109 1.1 ichiro
110 1.1 ichiro #include "opt_ipkdb.h"
111 1.1 ichiro #include "ksyms.h"
112 1.1 ichiro
113 1.1 ichiro /* Kernel text starts 2MB in from the bottom of the kernel address space. */
114 1.1 ichiro #define KERNEL_TEXT_BASE (KERNEL_BASE + 0x00200000)
115 1.1 ichiro #define KERNEL_VM_BASE (KERNEL_BASE + 0x01000000)
116 1.1 ichiro
117 1.1 ichiro /*
118 1.1 ichiro * The range 0xc1000000 - 0xccffffff is available for kernel VM space
119 1.1 ichiro * Core-logic registers and I/O mappings occupy 0xfd000000 - 0xffffffff
120 1.1 ichiro */
121 1.1 ichiro #define KERNEL_VM_SIZE 0x0C000000
122 1.1 ichiro
123 1.1 ichiro
124 1.1 ichiro /*
125 1.1 ichiro * Address to call from cpu_reset() to reset the machine.
126 1.1 ichiro * This is machine architecture dependant as it varies depending
127 1.1 ichiro * on where the ROM appears when you turn the MMU off.
128 1.1 ichiro */
129 1.1 ichiro
130 1.1 ichiro u_int cpu_reset_address = 0x00000000;
131 1.1 ichiro
132 1.1 ichiro /* Define various stack sizes in pages */
133 1.1 ichiro #define IRQ_STACK_SIZE 1
134 1.1 ichiro #define ABT_STACK_SIZE 1
135 1.1 ichiro #ifdef IPKDB
136 1.1 ichiro #define UND_STACK_SIZE 2
137 1.1 ichiro #else
138 1.1 ichiro #define UND_STACK_SIZE 1
139 1.1 ichiro #endif
140 1.1 ichiro
141 1.1 ichiro BootConfig bootconfig; /* Boot config storage */
142 1.1 ichiro char *boot_args = NULL;
143 1.1 ichiro char *boot_file = NULL;
144 1.1 ichiro
145 1.1 ichiro vm_offset_t physical_start;
146 1.1 ichiro vm_offset_t physical_freestart;
147 1.1 ichiro vm_offset_t physical_freeend;
148 1.1 ichiro vm_offset_t physical_end;
149 1.1 ichiro u_int free_pages;
150 1.1 ichiro vm_offset_t pagetables_start;
151 1.1 ichiro int physmem = 0;
152 1.1 ichiro
153 1.1 ichiro /*int debug_flags;*/
154 1.1 ichiro #ifndef PMAP_STATIC_L1S
155 1.1 ichiro int max_processes = 64; /* Default number */
156 1.1 ichiro #endif /* !PMAP_STATIC_L1S */
157 1.1 ichiro
158 1.1 ichiro /* Physical and virtual addresses for some global pages */
159 1.1 ichiro pv_addr_t systempage;
160 1.1 ichiro pv_addr_t irqstack;
161 1.1 ichiro pv_addr_t undstack;
162 1.1 ichiro pv_addr_t abtstack;
163 1.1 ichiro pv_addr_t kernelstack;
164 1.1 ichiro pv_addr_t minidataclean;
165 1.1 ichiro
166 1.1 ichiro vm_offset_t msgbufphys;
167 1.1 ichiro
168 1.1 ichiro extern u_int data_abort_handler_address;
169 1.1 ichiro extern u_int prefetch_abort_handler_address;
170 1.1 ichiro extern u_int undefined_handler_address;
171 1.1 ichiro extern int end;
172 1.1 ichiro
173 1.1 ichiro #ifdef PMAP_DEBUG
174 1.1 ichiro extern int pmap_debug_level;
175 1.1 ichiro #endif
176 1.1 ichiro
177 1.1 ichiro #define KERNEL_PT_SYS 0 /* L2 table for mapping zero page */
178 1.1 ichiro
179 1.1 ichiro #define KERNEL_PT_KERNEL 1 /* L2 table for mapping kernel */
180 1.1 ichiro #define KERNEL_PT_KERNEL_NUM 4
181 1.1 ichiro #define KERNEL_PT_IO (KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM)
182 1.1 ichiro /* L2 tables for mapping kernel VM */
183 1.1 ichiro #define KERNEL_PT_VMDATA (KERNEL_PT_IO + 1)
184 1.1 ichiro #define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */
185 1.1 ichiro #define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
186 1.1 ichiro
187 1.1 ichiro pv_addr_t kernel_pt_table[NUM_KERNEL_PTS];
188 1.1 ichiro
189 1.1 ichiro struct user *proc0paddr;
190 1.1 ichiro
191 1.1 ichiro /* Prototypes */
192 1.1 ichiro
193 1.1 ichiro void consinit(void);
194 1.1 ichiro u_int cpu_get_control __P((void));
195 1.1 ichiro
196 1.1 ichiro /*
197 1.1 ichiro * Define the default console speed for the board. This is generally
198 1.1 ichiro * what the firmware provided with the board defaults to.
199 1.1 ichiro */
200 1.1 ichiro #ifndef CONSPEED
201 1.1 ichiro #define CONSPEED B115200
202 1.1 ichiro #endif /* ! CONSPEED */
203 1.1 ichiro
204 1.1 ichiro #ifndef CONUNIT
205 1.1 ichiro #define CONUNIT 0
206 1.1 ichiro #endif
207 1.1 ichiro
208 1.1 ichiro #ifndef CONMODE
209 1.1 ichiro #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB)) | CS8) /* 8N1 */
210 1.1 ichiro #endif
211 1.1 ichiro
212 1.1 ichiro int comcnspeed = CONSPEED;
213 1.1 ichiro int comcnmode = CONMODE;
214 1.1 ichiro int comcnunit = CONUNIT;
215 1.1 ichiro
216 1.1 ichiro #if KGDB
217 1.1 ichiro #ifndef KGDB_DEVNAME
218 1.1 ichiro #error Must define KGDB_DEVNAME
219 1.1 ichiro #endif
220 1.1 ichiro const char kgdb_devname[] = KGDB_DEVNAME;
221 1.1 ichiro
222 1.1 ichiro #ifndef KGDB_DEVADDR
223 1.1 ichiro #error Must define KGDB_DEVADDR
224 1.1 ichiro #endif
225 1.1 ichiro unsigned long kgdb_devaddr = KGDB_DEVADDR;
226 1.1 ichiro
227 1.1 ichiro #ifndef KGDB_DEVRATE
228 1.1 ichiro #define KGDB_DEVRATE CONSPEED
229 1.1 ichiro #endif
230 1.1 ichiro int kgdb_devrate = KGDB_DEVRATE;
231 1.1 ichiro
232 1.1 ichiro #ifndef KGDB_DEVMODE
233 1.1 ichiro #define KGDB_DEVMODE CONMODE
234 1.1 ichiro #endif
235 1.1 ichiro int kgdb_devmode = KGDB_DEVMODE;
236 1.1 ichiro #endif /* KGDB */
237 1.1 ichiro
238 1.1 ichiro /*
239 1.1 ichiro * void cpu_reboot(int howto, char *bootstr)
240 1.1 ichiro *
241 1.1 ichiro * Reboots the system
242 1.1 ichiro *
243 1.1 ichiro * Deal with any syncing, unmounting, dumping and shutdown hooks,
244 1.1 ichiro * then reset the CPU.
245 1.1 ichiro */
246 1.1 ichiro void
247 1.1 ichiro cpu_reboot(int howto, char *bootstr)
248 1.1 ichiro {
249 1.1 ichiro #ifdef DIAGNOSTIC
250 1.1 ichiro /* info */
251 1.1 ichiro printf("boot: howto=%08x curproc=%p\n", howto, curproc);
252 1.1 ichiro #endif
253 1.1 ichiro
254 1.1 ichiro /*
255 1.1 ichiro * If we are still cold then hit the air brakes
256 1.1 ichiro * and crash to earth fast
257 1.1 ichiro */
258 1.1 ichiro if (cold) {
259 1.1 ichiro doshutdownhooks();
260 1.1 ichiro printf("The operating system has halted.\n");
261 1.1 ichiro printf("Please press any key to reboot.\n\n");
262 1.1 ichiro cngetc();
263 1.1 ichiro printf("rebooting...\n");
264 1.1 ichiro goto reset;
265 1.1 ichiro }
266 1.1 ichiro
267 1.1 ichiro /* Disable console buffering */
268 1.1 ichiro
269 1.1 ichiro /*
270 1.1 ichiro * If RB_NOSYNC was not specified sync the discs.
271 1.1 ichiro * Note: Unless cold is set to 1 here, syslogd will die during the
272 1.1 ichiro * unmount. It looks like syslogd is getting woken up only to find
273 1.1 ichiro * that it cannot page part of the binary in as the filesystem has
274 1.1 ichiro * been unmounted.
275 1.1 ichiro */
276 1.1 ichiro if (!(howto & RB_NOSYNC))
277 1.1 ichiro bootsync();
278 1.1 ichiro
279 1.1 ichiro /* Say NO to interrupts */
280 1.1 ichiro splhigh();
281 1.1 ichiro
282 1.1 ichiro /* Do a dump if requested. */
283 1.1 ichiro if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
284 1.1 ichiro dumpsys();
285 1.1 ichiro
286 1.1 ichiro /* Run any shutdown hooks */
287 1.1 ichiro doshutdownhooks();
288 1.1 ichiro
289 1.1 ichiro /* Make sure IRQ's are disabled */
290 1.1 ichiro IRQdisable;
291 1.1 ichiro
292 1.1 ichiro if (howto & RB_HALT) {
293 1.1 ichiro printf("The operating system has halted.\n");
294 1.1 ichiro printf("Please press any key to reboot.\n\n");
295 1.1 ichiro cngetc();
296 1.1 ichiro }
297 1.1 ichiro
298 1.1 ichiro printf("rebooting...\n\r");
299 1.1 ichiro reset:
300 1.1 ichiro /*
301 1.1 ichiro * Make really really sure that all interrupts are disabled,
302 1.1 ichiro */
303 1.1 ichiro (void) disable_interrupts(I32_bit|F32_bit);
304 1.1 ichiro /*
305 1.1 ichiro * XXX system reset routine
306 1.1 ichiro */
307 1.1 ichiro (void) disable_interrupts(I32_bit|F32_bit);
308 1.1 ichiro /* ...and if that didn't work, just croak. */
309 1.1 ichiro printf("RESET FAILED!\n");
310 1.1 ichiro for (;;);
311 1.1 ichiro }
312 1.1 ichiro
313 1.1 ichiro /*
314 1.1 ichiro * Mapping table for core kernel memory. This memory is mapped at init
315 1.1 ichiro * time with section mappings.
316 1.1 ichiro */
317 1.1 ichiro struct l1_sec_map {
318 1.1 ichiro vaddr_t va;
319 1.1 ichiro vaddr_t pa;
320 1.1 ichiro vsize_t size;
321 1.1 ichiro vm_prot_t prot;
322 1.1 ichiro int cache;
323 1.1 ichiro } l1_sec_table[] = {
324 1.1 ichiro /*
325 1.1 ichiro * Map the on-board devices VA == PA so that we can access them
326 1.1 ichiro * with the MMU on or off.
327 1.1 ichiro */
328 1.1 ichiro {
329 1.1 ichiro IXP425_UART0_HWBASE,
330 1.1 ichiro IXP425_UART0_HWBASE,
331 1.1 ichiro IXP425_REG_SIZE * 2,
332 1.1 ichiro VM_PROT_READ|VM_PROT_WRITE,
333 1.1 ichiro PTE_NOCACHE,
334 1.1 ichiro },
335 1.1 ichiro {
336 1.1 ichiro 0,
337 1.1 ichiro 0,
338 1.1 ichiro 0,
339 1.1 ichiro 0,
340 1.1 ichiro 0,
341 1.1 ichiro }
342 1.1 ichiro };
343 1.1 ichiro
344 1.1 ichiro /*
345 1.1 ichiro * u_int initarm(...)
346 1.1 ichiro *
347 1.1 ichiro * Initial entry point on startup. This gets called before main() is
348 1.1 ichiro * entered.
349 1.1 ichiro * It should be responsible for setting up everything that must be
350 1.1 ichiro * in place when main is called.
351 1.1 ichiro * This includes
352 1.1 ichiro * Taking a copy of the boot configuration structure.
353 1.1 ichiro * Initialising the physical console so characters can be printed.
354 1.1 ichiro * Setting up page tables for the kernel
355 1.1 ichiro * Relocating the kernel to the bottom of physical memory
356 1.1 ichiro */
357 1.1 ichiro u_int
358 1.1 ichiro initarm(void *arg)
359 1.1 ichiro {
360 1.1 ichiro extern vaddr_t xscale_cache_clean_addr;
361 1.1 ichiro #ifdef DIAGNOSTIC
362 1.1 ichiro extern vsize_t xscale_minidata_clean_size;
363 1.1 ichiro #endif
364 1.1 ichiro int loop;
365 1.1 ichiro int loop1;
366 1.1 ichiro u_int kerneldatasize, symbolsize;
367 1.1 ichiro u_int l1pagetable;
368 1.1 ichiro u_int freemempos;
369 1.1 ichiro pv_addr_t kernel_l1pt;
370 1.1 ichiro #if 0
371 1.1 ichiro paddr_t memstart;
372 1.1 ichiro psize_t memsize;
373 1.1 ichiro #endif
374 1.1 ichiro
375 1.1 ichiro /*
376 1.1 ichiro * Since we map v0xf0000000 == p0xc8000000, it's possible for
377 1.1 ichiro * us to initialize the console now.
378 1.1 ichiro */
379 1.1 ichiro consinit();
380 1.1 ichiro
381 1.1 ichiro #ifdef VERBOSE_INIT_ARM
382 1.1 ichiro /* Talk to the user */
383 1.1 ichiro printf("\nNetBSD/evbarm (IXP425) booting ...\n");
384 1.1 ichiro #endif
385 1.1 ichiro
386 1.1 ichiro /*
387 1.1 ichiro * Heads up ... Setup the CPU / MMU / TLB functions
388 1.1 ichiro */
389 1.1 ichiro if (set_cpufuncs())
390 1.1 ichiro panic("cpu not recognized!");
391 1.1 ichiro
392 1.1 ichiro /* XXX overwrite bootconfig to hardcoded values */
393 1.1 ichiro bootconfig.dramblocks = 1;
394 1.1 ichiro bootconfig.dram[0].address = 0x10000000;
395 1.1 ichiro bootconfig.dram[0].pages = 0x04000000 / PAGE_SIZE; /* SDRAM 64MB */
396 1.1 ichiro
397 1.1 ichiro kerneldatasize = (u_int32_t)&end - (u_int32_t)KERNEL_TEXT_BASE;
398 1.1 ichiro
399 1.1 ichiro #ifdef VERBOSE_INIT_ARM
400 1.1 ichiro printf("kernsize=0x%x\n", kerneldatasize);
401 1.1 ichiro #endif
402 1.1 ichiro kerneldatasize += symbolsize;
403 1.1 ichiro kerneldatasize = ((kerneldatasize - 1) & ~(PAGE_SIZE * 4 - 1)) + PAGE_SIZE * 8;
404 1.1 ichiro
405 1.1 ichiro /*
406 1.1 ichiro * Set up the variables that define the availablilty of
407 1.1 ichiro * physical memory. For now, we're going to set
408 1.1 ichiro * physical_freestart to 0x10200000 (where the kernel
409 1.1 ichiro * was loaded), and allocate the memory we need downwards.
410 1.1 ichiro * If we get too close to the L1 table that we set up, we
411 1.1 ichiro * will panic. We will update physical_freestart and
412 1.1 ichiro * physical_freeend later to reflect what pmap_bootstrap()
413 1.1 ichiro * wants to see.
414 1.1 ichiro *
415 1.1 ichiro * XXX pmap_bootstrap() needs an enema.
416 1.1 ichiro */
417 1.1 ichiro physical_start = bootconfig.dram[0].address;
418 1.1 ichiro physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE);
419 1.1 ichiro
420 1.1 ichiro physical_freestart = physical_start
421 1.1 ichiro + (KERNEL_TEXT_BASE - KERNEL_BASE) + kerneldatasize;
422 1.1 ichiro physical_freeend = physical_end;
423 1.1 ichiro
424 1.1 ichiro physmem = (physical_end - physical_start) / PAGE_SIZE;
425 1.1 ichiro
426 1.1 ichiro /* Tell the user about the memory */
427 1.1 ichiro #ifdef VERBOSE_INIT_ARM
428 1.1 ichiro printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem,
429 1.1 ichiro physical_start, physical_end - 1);
430 1.1 ichiro
431 1.1 ichiro printf("Allocating page tables\n");
432 1.1 ichiro #endif
433 1.1 ichiro free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE;
434 1.1 ichiro
435 1.1 ichiro freemempos = 0x10000000;
436 1.1 ichiro
437 1.1 ichiro #ifdef VERBOSE_INIT_ARM
438 1.1 ichiro printf("CP15 Register1 = 0x%08x\n", cpu_get_control());
439 1.1 ichiro printf("physical_start = 0x%08lx, physical_end = 0x%08lx\n",
440 1.1 ichiro physical_start, physical_end);
441 1.1 ichiro #endif
442 1.1 ichiro
443 1.1 ichiro /* Define a macro to simplify memory allocation */
444 1.1 ichiro #define valloc_pages(var, np) \
445 1.1 ichiro alloc_pages((var).pv_pa, (np)); \
446 1.1 ichiro (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start;
447 1.1 ichiro
448 1.1 ichiro #if 0
449 1.1 ichiro #define alloc_pages(var, np) \
450 1.1 ichiro physical_freeend -= ((np) * PAGE_SIZE); \
451 1.1 ichiro if (physical_freeend < physical_freestart) \
452 1.1 ichiro panic("initarm: out of memory"); \
453 1.1 ichiro (var) = physical_freeend; \
454 1.1 ichiro free_pages -= (np); \
455 1.1 ichiro memset((char *)(var), 0, ((np) * PAGE_SIZE));
456 1.1 ichiro #else
457 1.1 ichiro #define alloc_pages(var, np) \
458 1.1 ichiro (var) = freemempos; \
459 1.1 ichiro memset((char *)(var), 0, ((np) * PAGE_SIZE)); \
460 1.1 ichiro freemempos += (np) * PAGE_SIZE;
461 1.1 ichiro #endif
462 1.1 ichiro
463 1.1 ichiro loop1 = 0;
464 1.1 ichiro kernel_l1pt.pv_pa = 0;
465 1.1 ichiro for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
466 1.1 ichiro /* Are we 16KB aligned for an L1 ? */
467 1.1 ichiro if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0
468 1.1 ichiro && kernel_l1pt.pv_pa == 0) {
469 1.1 ichiro valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
470 1.1 ichiro } else {
471 1.1 ichiro valloc_pages(kernel_pt_table[loop1],
472 1.1 ichiro L2_TABLE_SIZE / PAGE_SIZE);
473 1.1 ichiro ++loop1;
474 1.1 ichiro }
475 1.1 ichiro }
476 1.1 ichiro
477 1.1 ichiro /* This should never be able to happen but better confirm that. */
478 1.1 ichiro if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE-1)) != 0)
479 1.1 ichiro panic("initarm: Failed to align the kernel page directory");
480 1.1 ichiro
481 1.1 ichiro /*
482 1.1 ichiro * Allocate a page for the system page mapped to V0x00000000
483 1.1 ichiro * This page will just contain the system vectors and can be
484 1.1 ichiro * shared by all processes.
485 1.1 ichiro */
486 1.1 ichiro alloc_pages(systempage.pv_pa, 1);
487 1.1 ichiro
488 1.1 ichiro /* Allocate stacks for all modes */
489 1.1 ichiro valloc_pages(irqstack, IRQ_STACK_SIZE);
490 1.1 ichiro valloc_pages(abtstack, ABT_STACK_SIZE);
491 1.1 ichiro valloc_pages(undstack, UND_STACK_SIZE);
492 1.1 ichiro valloc_pages(kernelstack, UPAGES);
493 1.1 ichiro
494 1.1 ichiro /* Allocate enough pages for cleaning the Mini-Data cache. */
495 1.1 ichiro KASSERT(xscale_minidata_clean_size <= PAGE_SIZE);
496 1.1 ichiro valloc_pages(minidataclean, 1);
497 1.1 ichiro
498 1.1 ichiro #ifdef VERBOSE_INIT_ARM
499 1.1 ichiro printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa,
500 1.1 ichiro irqstack.pv_va);
501 1.1 ichiro printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa,
502 1.1 ichiro abtstack.pv_va);
503 1.1 ichiro printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa,
504 1.1 ichiro undstack.pv_va);
505 1.1 ichiro printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa,
506 1.1 ichiro kernelstack.pv_va);
507 1.1 ichiro #endif
508 1.1 ichiro
509 1.1 ichiro /*
510 1.1 ichiro * XXX Defer this to later so that we can reclaim the memory
511 1.1 ichiro * XXX used by the RedBoot page tables.
512 1.1 ichiro */
513 1.1 ichiro alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE);
514 1.1 ichiro
515 1.1 ichiro /*
516 1.1 ichiro * Ok we have allocated physical pages for the primary kernel
517 1.1 ichiro * page tables
518 1.1 ichiro */
519 1.1 ichiro
520 1.1 ichiro #ifdef VERBOSE_INIT_ARM
521 1.1 ichiro printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa);
522 1.1 ichiro #endif
523 1.1 ichiro
524 1.1 ichiro /*
525 1.1 ichiro * Now we start construction of the L1 page table
526 1.1 ichiro * We start by mapping the L2 page tables into the L1.
527 1.1 ichiro * This means that we can replace L1 mappings later on if necessary
528 1.1 ichiro */
529 1.1 ichiro l1pagetable = kernel_l1pt.pv_pa;
530 1.1 ichiro
531 1.1 ichiro /* Map the L2 pages tables in the L1 page table */
532 1.1 ichiro pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH & ~(0x00400000 - 1),
533 1.1 ichiro &kernel_pt_table[KERNEL_PT_SYS]);
534 1.1 ichiro for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++)
535 1.1 ichiro pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000,
536 1.1 ichiro &kernel_pt_table[KERNEL_PT_KERNEL + loop]);
537 1.1 ichiro for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
538 1.1 ichiro pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
539 1.1 ichiro &kernel_pt_table[KERNEL_PT_VMDATA + loop]);
540 1.1 ichiro
541 1.1 ichiro /* update the top of the kernel VM */
542 1.1 ichiro pmap_curmaxkvaddr =
543 1.1 ichiro KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000);
544 1.1 ichiro
545 1.1 ichiro pmap_link_l2pt(l1pagetable, IXP425_IO_VBASE,
546 1.1 ichiro &kernel_pt_table[KERNEL_PT_IO]);
547 1.1 ichiro
548 1.1 ichiro #ifdef VERBOSE_INIT_ARM
549 1.1 ichiro printf("Mapping kernel\n");
550 1.1 ichiro #endif
551 1.1 ichiro
552 1.1 ichiro /* Now we fill in the L2 pagetable for the kernel static code/data */
553 1.1 ichiro {
554 1.1 ichiro extern char etext[], _end[];
555 1.1 ichiro size_t textsize = (uintptr_t) etext - KERNEL_TEXT_BASE;
556 1.1 ichiro size_t totalsize = (uintptr_t) _end - KERNEL_TEXT_BASE;
557 1.1 ichiro u_int logical;
558 1.1 ichiro
559 1.1 ichiro textsize = (textsize + PGOFSET) & ~PGOFSET;
560 1.1 ichiro totalsize = (totalsize + PGOFSET) & ~PGOFSET;
561 1.1 ichiro
562 1.1 ichiro logical = 0x00200000; /* offset of kernel in RAM */
563 1.1 ichiro
564 1.1 ichiro logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
565 1.1 ichiro physical_start + logical, textsize,
566 1.1 ichiro VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
567 1.1 ichiro logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
568 1.1 ichiro physical_start + logical, totalsize - textsize,
569 1.1 ichiro VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
570 1.1 ichiro }
571 1.1 ichiro
572 1.1 ichiro #ifdef VERBOSE_INIT_ARM
573 1.1 ichiro printf("Constructing L2 page tables\n");
574 1.1 ichiro #endif
575 1.1 ichiro
576 1.1 ichiro /* Map the stack pages */
577 1.1 ichiro pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
578 1.1 ichiro IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
579 1.1 ichiro pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
580 1.1 ichiro ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
581 1.1 ichiro pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
582 1.1 ichiro UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
583 1.1 ichiro pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
584 1.1 ichiro UPAGES * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
585 1.1 ichiro
586 1.1 ichiro pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
587 1.1 ichiro L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
588 1.1 ichiro
589 1.1 ichiro for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
590 1.1 ichiro pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va,
591 1.1 ichiro kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
592 1.1 ichiro VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
593 1.1 ichiro }
594 1.1 ichiro
595 1.1 ichiro /* Map the Mini-Data cache clean area. */
596 1.1 ichiro xscale_setup_minidata(l1pagetable, minidataclean.pv_va,
597 1.1 ichiro minidataclean.pv_pa);
598 1.1 ichiro
599 1.1 ichiro /* Map the vector page. */
600 1.1 ichiro pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
601 1.1 ichiro VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
602 1.1 ichiro
603 1.1 ichiro /*
604 1.1 ichiro * Map the IXP425 registers
605 1.1 ichiro */
606 1.1 ichiro
607 1.1 ichiro ixp425_pmap_io_reg(l1pagetable);
608 1.1 ichiro
609 1.1 ichiro /*
610 1.1 ichiro * Map devices we can map w/ section mappings.
611 1.1 ichiro */
612 1.1 ichiro loop = 0;
613 1.1 ichiro while (l1_sec_table[loop].size) {
614 1.1 ichiro vm_size_t sz;
615 1.1 ichiro
616 1.1 ichiro #ifdef VERBOSE_INIT_ARM
617 1.1 ichiro printf("%08lx -> %08lx @ %08lx\n", l1_sec_table[loop].pa,
618 1.1 ichiro l1_sec_table[loop].pa + l1_sec_table[loop].size - 1,
619 1.1 ichiro l1_sec_table[loop].va);
620 1.1 ichiro #endif
621 1.1 ichiro for (sz = 0; sz < l1_sec_table[loop].size; sz += L1_S_SIZE)
622 1.1 ichiro pmap_map_section(l1pagetable,
623 1.1 ichiro l1_sec_table[loop].va + sz,
624 1.1 ichiro l1_sec_table[loop].pa + sz,
625 1.1 ichiro l1_sec_table[loop].prot,
626 1.1 ichiro l1_sec_table[loop].cache);
627 1.1 ichiro ++loop;
628 1.1 ichiro }
629 1.1 ichiro
630 1.1 ichiro
631 1.1 ichiro /*
632 1.1 ichiro * Give the XScale global cache clean code an appropriately
633 1.1 ichiro * sized chunk of unmapped VA space starting at 0xff000000
634 1.1 ichiro * (our device mappings end before this address).
635 1.1 ichiro */
636 1.1 ichiro xscale_cache_clean_addr = 0xff000000U;
637 1.1 ichiro
638 1.1 ichiro /*
639 1.1 ichiro * Now we have the real page tables in place so we can switch to them.
640 1.1 ichiro * Once this is done we will be running with the REAL kernel page
641 1.1 ichiro * tables.
642 1.1 ichiro */
643 1.1 ichiro
644 1.1 ichiro /*
645 1.1 ichiro * Update the physical_freestart/physical_freeend/free_pages
646 1.1 ichiro * variables.
647 1.1 ichiro */
648 1.1 ichiro {
649 1.1 ichiro extern char _end[];
650 1.1 ichiro
651 1.1 ichiro physical_freestart = physical_start +
652 1.1 ichiro (((((uintptr_t) _end) + PGOFSET) & ~PGOFSET) -
653 1.1 ichiro KERNEL_BASE);
654 1.1 ichiro physical_freeend = physical_end;
655 1.1 ichiro free_pages =
656 1.1 ichiro (physical_freeend - physical_freestart) / PAGE_SIZE;
657 1.1 ichiro }
658 1.1 ichiro
659 1.1 ichiro /* Switch tables */
660 1.1 ichiro #ifdef VERBOSE_INIT_ARM
661 1.1 ichiro printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
662 1.1 ichiro physical_freestart, free_pages, free_pages);
663 1.1 ichiro printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa);
664 1.1 ichiro #endif
665 1.1 ichiro cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
666 1.1 ichiro setttb(kernel_l1pt.pv_pa);
667 1.1 ichiro cpu_tlb_flushID();
668 1.1 ichiro cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
669 1.1 ichiro
670 1.1 ichiro /*
671 1.1 ichiro * Moved from cpu_startup() as data_abort_handler() references
672 1.1 ichiro * this during uvm init
673 1.1 ichiro */
674 1.1 ichiro proc0paddr = (struct user *)kernelstack.pv_va;
675 1.1 ichiro lwp0.l_addr = proc0paddr;
676 1.1 ichiro
677 1.1 ichiro #ifdef VERBOSE_INIT_ARM
678 1.1 ichiro printf("bootstrap done.\n");
679 1.1 ichiro #endif
680 1.1 ichiro
681 1.1 ichiro arm32_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
682 1.1 ichiro
683 1.1 ichiro /*
684 1.1 ichiro * Pages were allocated during the secondary bootstrap for the
685 1.1 ichiro * stacks for different CPU modes.
686 1.1 ichiro * We must now set the r13 registers in the different CPU modes to
687 1.1 ichiro * point to these stacks.
688 1.1 ichiro * Since the ARM stacks use STMFD etc. we must set r13 to the top end
689 1.1 ichiro * of the stack memory.
690 1.1 ichiro */
691 1.1 ichiro #ifdef VERBOSE_INIT_ARM
692 1.1 ichiro printf("init subsystems: stacks ");
693 1.1 ichiro #endif
694 1.1 ichiro
695 1.1 ichiro set_stackptr(PSR_IRQ32_MODE,
696 1.1 ichiro irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
697 1.1 ichiro set_stackptr(PSR_ABT32_MODE,
698 1.1 ichiro abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
699 1.1 ichiro set_stackptr(PSR_UND32_MODE,
700 1.1 ichiro undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
701 1.1 ichiro
702 1.1 ichiro /*
703 1.1 ichiro * Well we should set a data abort handler.
704 1.1 ichiro * Once things get going this will change as we will need a proper
705 1.1 ichiro * handler.
706 1.1 ichiro * Until then we will use a handler that just panics but tells us
707 1.1 ichiro * why.
708 1.1 ichiro * Initialisation of the vectors will just panic on a data abort.
709 1.1 ichiro * This just fills in a slighly better one.
710 1.1 ichiro */
711 1.1 ichiro #ifdef VERBOSE_INIT_ARM
712 1.1 ichiro printf("vectors ");
713 1.1 ichiro #endif
714 1.1 ichiro data_abort_handler_address = (u_int)data_abort_handler;
715 1.1 ichiro prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
716 1.1 ichiro undefined_handler_address = (u_int)undefinedinstruction_bounce;
717 1.1 ichiro
718 1.1 ichiro /* Initialise the undefined instruction handlers */
719 1.1 ichiro #ifdef VERBOSE_INIT_ARM
720 1.1 ichiro printf("undefined ");
721 1.1 ichiro #endif
722 1.1 ichiro undefined_init();
723 1.1 ichiro
724 1.1 ichiro /* Load memory into UVM. */
725 1.1 ichiro #ifdef VERBOSE_INIT_ARM
726 1.1 ichiro printf("page ");
727 1.1 ichiro #endif
728 1.1 ichiro uvm_setpagesize(); /* initialize PAGE_SIZE-dependent variables */
729 1.1 ichiro uvm_page_physload(atop(physical_freestart), atop(physical_freeend),
730 1.1 ichiro atop(physical_freestart), atop(physical_freeend),
731 1.1 ichiro VM_FREELIST_DEFAULT);
732 1.1 ichiro
733 1.1 ichiro /* Boot strap pmap telling it where the kernel page table is */
734 1.1 ichiro #ifdef VERBOSE_INIT_ARM
735 1.1 ichiro printf("pmap ");
736 1.1 ichiro #endif
737 1.1 ichiro pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, KERNEL_VM_BASE,
738 1.1 ichiro KERNEL_VM_BASE + KERNEL_VM_SIZE);
739 1.1 ichiro
740 1.1 ichiro /* Setup the IRQ system */
741 1.1 ichiro #ifdef VERBOSE_INIT_ARM
742 1.1 ichiro printf("irq ");
743 1.1 ichiro #endif
744 1.1 ichiro ixp425_intr_init();
745 1.1 ichiro #ifdef VERBOSE_INIT_ARM
746 1.1 ichiro printf("\nAll initialize done!\nNow Starting NetBSD, Hear we go!\n");
747 1.1 ichiro #endif
748 1.1 ichiro
749 1.1 ichiro #ifdef BOOTHOWTO
750 1.1 ichiro boothowto = BOOTHOWTO;
751 1.1 ichiro #endif
752 1.1 ichiro
753 1.1 ichiro #ifdef IPKDB
754 1.1 ichiro /* Initialise ipkdb */
755 1.1 ichiro ipkdb_init();
756 1.1 ichiro if (boothowto & RB_KDB)
757 1.1 ichiro ipkdb_connect(0);
758 1.1 ichiro #endif
759 1.1 ichiro
760 1.1 ichiro #if NKSYMS || defined(DDB) || defined(LKM)
761 1.1 ichiro /* Firmware doesn't load symbols. */
762 1.1 ichiro ksyms_init(0, NULL, NULL);
763 1.1 ichiro #endif
764 1.1 ichiro
765 1.1 ichiro #ifdef DDB
766 1.1 ichiro db_machine_init();
767 1.1 ichiro if (boothowto & RB_KDB)
768 1.1 ichiro Debugger();
769 1.1 ichiro #endif
770 1.1 ichiro
771 1.1 ichiro /* We return the new stack pointer address */
772 1.1 ichiro return(kernelstack.pv_va + USPACE_SVC_STACK_TOP);
773 1.1 ichiro }
774 1.1 ichiro
775 1.1 ichiro /*
776 1.1 ichiro * consinit
777 1.1 ichiro */
778 1.1 ichiro static const struct uart_info {
779 1.1 ichiro const char *name;
780 1.1 ichiro u_int32_t hw_addr;
781 1.1 ichiro u_int32_t v_addr;
782 1.1 ichiro } comcn_config[] = {
783 1.1 ichiro { "HighSpeed Serial (UART0)",
784 1.1 ichiro IXP425_UART0_HWBASE,
785 1.1 ichiro IXP425_UART0_VBASE,
786 1.1 ichiro },
787 1.1 ichiro { "Console (UART1)",
788 1.1 ichiro IXP425_UART1_HWBASE,
789 1.1 ichiro IXP425_UART1_VBASE,
790 1.1 ichiro },
791 1.1 ichiro };
792 1.1 ichiro
793 1.1 ichiro void
794 1.1 ichiro consinit(void)
795 1.1 ichiro {
796 1.1 ichiro extern struct bus_space ixpsip_bs_tag;
797 1.1 ichiro static int consinit_called;
798 1.1 ichiro
799 1.1 ichiro if (consinit_called != 0)
800 1.1 ichiro return;
801 1.1 ichiro
802 1.1 ichiro consinit_called = 1;
803 1.1 ichiro
804 1.1 ichiro if (ixp4xx_comcnattach(&ixpsip_bs_tag, comcn_config[comcnunit].hw_addr,
805 1.1 ichiro comcn_config[comcnunit].v_addr, comcnspeed, FREQ, comcnmode))
806 1.1 ichiro panic("can't init serial console (%s)", comcn_config[comcnunit].name);
807 1.1 ichiro }
808