Home | History | Annotate | Line # | Download | only in ixdp425
ixdp425_machdep.c revision 1.2
      1  1.2  ichiro /*	$NetBSD: ixdp425_machdep.c,v 1.2 2003/05/23 09:34:42 ichiro Exp $ */
      2  1.1  ichiro /*
      3  1.1  ichiro  * Copyright (c) 2003
      4  1.1  ichiro  *	Ichiro FUKUHARA <ichiro (at) ichiro.org>.
      5  1.1  ichiro  * All rights reserved.
      6  1.1  ichiro  *
      7  1.1  ichiro  * Redistribution and use in source and binary forms, with or without
      8  1.1  ichiro  * modification, are permitted provided that the following conditions
      9  1.1  ichiro  * are met:
     10  1.1  ichiro  * 1. Redistributions of source code must retain the above copyright
     11  1.1  ichiro  *    notice, this list of conditions and the following disclaimer.
     12  1.1  ichiro  * 2. Redistributions in binary form must reproduce the above copyright
     13  1.1  ichiro  *    notice, this list of conditions and the following disclaimer in the
     14  1.1  ichiro  *    documentation and/or other materials provided with the distribution.
     15  1.1  ichiro  * 3. All advertising materials mentioning features or use of this software
     16  1.1  ichiro  *    must display the following acknowledgement:
     17  1.1  ichiro  *	This product includes software developed by Ichiro FUKUHARA.
     18  1.1  ichiro  * 4. The name of the company nor the name of the author may be used to
     19  1.1  ichiro  *    endorse or promote products derived from this software without specific
     20  1.1  ichiro  *    prior written permission.
     21  1.1  ichiro  *
     22  1.1  ichiro  * THIS SOFTWARE IS PROVIDED BY ICHIRO FUKUHARA ``AS IS'' AND ANY EXPRESS OR
     23  1.1  ichiro  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     24  1.1  ichiro  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     25  1.1  ichiro  * IN NO EVENT SHALL ICHIRO FUKUHARA OR THE VOICES IN HIS HEAD BE LIABLE FOR
     26  1.1  ichiro  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     27  1.1  ichiro  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     28  1.1  ichiro  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     29  1.1  ichiro  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     30  1.1  ichiro  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     31  1.1  ichiro  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     32  1.1  ichiro  * SUCH DAMAGE.
     33  1.1  ichiro  */
     34  1.1  ichiro /*
     35  1.1  ichiro  * Copyright (c) 1997,1998 Mark Brinicombe.
     36  1.1  ichiro  * Copyright (c) 1997,1998 Causality Limited.
     37  1.1  ichiro  * All rights reserved.
     38  1.1  ichiro  *
     39  1.1  ichiro  * Redistribution and use in source and binary forms, with or without
     40  1.1  ichiro  * modification, are permitted provided that the following conditions
     41  1.1  ichiro  * are met:
     42  1.1  ichiro  * 1. Redistributions of source code must retain the above copyright
     43  1.1  ichiro  *    notice, this list of conditions and the following disclaimer.
     44  1.1  ichiro  * 2. Redistributions in binary form must reproduce the above copyright
     45  1.1  ichiro  *    notice, this list of conditions and the following disclaimer in the
     46  1.1  ichiro  *    documentation and/or other materials provided with the distribution.
     47  1.1  ichiro  * 3. All advertising materials mentioning features or use of this software
     48  1.1  ichiro  *    must display the following acknowledgement:
     49  1.1  ichiro  *	This product includes software developed by Mark Brinicombe
     50  1.1  ichiro  *	for the NetBSD Project.
     51  1.1  ichiro  * 4. The name of the company nor the name of the author may be used to
     52  1.1  ichiro  *    endorse or promote products derived from this software without specific
     53  1.1  ichiro  *    prior written permission.
     54  1.1  ichiro  *
     55  1.1  ichiro  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
     56  1.1  ichiro  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
     57  1.1  ichiro  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     58  1.1  ichiro  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
     59  1.1  ichiro  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     60  1.1  ichiro  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
     61  1.1  ichiro  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     62  1.1  ichiro  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     63  1.1  ichiro  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     64  1.1  ichiro  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     65  1.1  ichiro  * SUCH DAMAGE.
     66  1.1  ichiro  */
     67  1.1  ichiro 
     68  1.1  ichiro /* Machine dependant functions for kernel setup for Intel IXP425 evaluation
     69  1.1  ichiro  * boards using RedBoot firmware.
     70  1.1  ichiro  */
     71  1.1  ichiro 
     72  1.1  ichiro #include "opt_ddb.h"
     73  1.1  ichiro #include "opt_kgdb.h"
     74  1.1  ichiro #include "opt_pmap_debug.h"
     75  1.1  ichiro 
     76  1.1  ichiro #include <sys/param.h>
     77  1.1  ichiro #include <sys/device.h>
     78  1.1  ichiro #include <sys/systm.h>
     79  1.1  ichiro #include <sys/kernel.h>
     80  1.1  ichiro #include <sys/exec.h>
     81  1.1  ichiro #include <sys/proc.h>
     82  1.1  ichiro #include <sys/msgbuf.h>
     83  1.1  ichiro #include <sys/reboot.h>
     84  1.1  ichiro #include <sys/termios.h>
     85  1.1  ichiro #include <sys/ksyms.h>
     86  1.1  ichiro 
     87  1.1  ichiro #include <uvm/uvm_extern.h>
     88  1.1  ichiro 
     89  1.1  ichiro #include <dev/cons.h>
     90  1.1  ichiro 
     91  1.1  ichiro #include <machine/db_machdep.h>
     92  1.1  ichiro #include <ddb/db_sym.h>
     93  1.1  ichiro #include <ddb/db_extern.h>
     94  1.1  ichiro 
     95  1.1  ichiro #include <machine/bootconfig.h>
     96  1.1  ichiro #include <machine/bus.h>
     97  1.1  ichiro #include <machine/cpu.h>
     98  1.1  ichiro #include <machine/frame.h>
     99  1.1  ichiro #include <arm/undefined.h>
    100  1.1  ichiro 
    101  1.1  ichiro #include <arm/arm32/machdep.h>
    102  1.1  ichiro 
    103  1.1  ichiro #include <arm/xscale/ixp425reg.h>
    104  1.1  ichiro #include <arm/xscale/ixp425var.h>
    105  1.1  ichiro 
    106  1.1  ichiro #include <arm/xscale/ixp425_sipvar.h>
    107  1.1  ichiro #include <arm/xscale/ixp425_comvar.h>
    108  1.1  ichiro 
    109  1.1  ichiro #include "opt_ipkdb.h"
    110  1.1  ichiro #include "ksyms.h"
    111  1.1  ichiro 
    112  1.1  ichiro /* Kernel text starts 2MB in from the bottom of the kernel address space. */
    113  1.1  ichiro #define	KERNEL_TEXT_BASE	(KERNEL_BASE + 0x00200000)
    114  1.1  ichiro #define	KERNEL_VM_BASE		(KERNEL_BASE + 0x01000000)
    115  1.1  ichiro 
    116  1.1  ichiro /*
    117  1.1  ichiro  * The range 0xc1000000 - 0xccffffff is available for kernel VM space
    118  1.1  ichiro  * Core-logic registers and I/O mappings occupy 0xfd000000 - 0xffffffff
    119  1.1  ichiro  */
    120  1.1  ichiro #define	KERNEL_VM_SIZE		0x0C000000
    121  1.1  ichiro 
    122  1.1  ichiro 
    123  1.1  ichiro /*
    124  1.1  ichiro  * Address to call from cpu_reset() to reset the machine.
    125  1.1  ichiro  * This is machine architecture dependant as it varies depending
    126  1.1  ichiro  * on where the ROM appears when you turn the MMU off.
    127  1.1  ichiro  */
    128  1.1  ichiro 
    129  1.1  ichiro u_int cpu_reset_address = 0x00000000;
    130  1.1  ichiro 
    131  1.1  ichiro /* Define various stack sizes in pages */
    132  1.1  ichiro #define IRQ_STACK_SIZE	1
    133  1.1  ichiro #define ABT_STACK_SIZE	1
    134  1.1  ichiro #ifdef IPKDB
    135  1.1  ichiro #define UND_STACK_SIZE	2
    136  1.1  ichiro #else
    137  1.1  ichiro #define UND_STACK_SIZE	1
    138  1.1  ichiro #endif
    139  1.1  ichiro 
    140  1.1  ichiro BootConfig bootconfig;		/* Boot config storage */
    141  1.1  ichiro char *boot_args = NULL;
    142  1.1  ichiro char *boot_file = NULL;
    143  1.1  ichiro 
    144  1.1  ichiro vm_offset_t physical_start;
    145  1.1  ichiro vm_offset_t physical_freestart;
    146  1.1  ichiro vm_offset_t physical_freeend;
    147  1.1  ichiro vm_offset_t physical_end;
    148  1.1  ichiro u_int free_pages;
    149  1.1  ichiro vm_offset_t pagetables_start;
    150  1.1  ichiro int physmem = 0;
    151  1.1  ichiro 
    152  1.1  ichiro /*int debug_flags;*/
    153  1.1  ichiro #ifndef PMAP_STATIC_L1S
    154  1.1  ichiro int max_processes = 64;			/* Default number */
    155  1.1  ichiro #endif	/* !PMAP_STATIC_L1S */
    156  1.1  ichiro 
    157  1.1  ichiro /* Physical and virtual addresses for some global pages */
    158  1.1  ichiro pv_addr_t systempage;
    159  1.1  ichiro pv_addr_t irqstack;
    160  1.1  ichiro pv_addr_t undstack;
    161  1.1  ichiro pv_addr_t abtstack;
    162  1.1  ichiro pv_addr_t kernelstack;
    163  1.1  ichiro pv_addr_t minidataclean;
    164  1.1  ichiro 
    165  1.1  ichiro vm_offset_t msgbufphys;
    166  1.1  ichiro 
    167  1.1  ichiro extern u_int data_abort_handler_address;
    168  1.1  ichiro extern u_int prefetch_abort_handler_address;
    169  1.1  ichiro extern u_int undefined_handler_address;
    170  1.1  ichiro extern int end;
    171  1.1  ichiro 
    172  1.1  ichiro #ifdef PMAP_DEBUG
    173  1.1  ichiro extern int pmap_debug_level;
    174  1.1  ichiro #endif
    175  1.1  ichiro 
    176  1.1  ichiro #define KERNEL_PT_SYS		0	/* L2 table for mapping zero page */
    177  1.1  ichiro 
    178  1.1  ichiro #define KERNEL_PT_KERNEL	1	/* L2 table for mapping kernel */
    179  1.1  ichiro #define	KERNEL_PT_KERNEL_NUM	4
    180  1.1  ichiro #define	KERNEL_PT_IO		(KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM)
    181  1.1  ichiro 					/* L2 tables for mapping kernel VM */
    182  1.1  ichiro #define KERNEL_PT_VMDATA	(KERNEL_PT_IO + 1)
    183  1.1  ichiro #define	KERNEL_PT_VMDATA_NUM	4	/* start with 16MB of KVM */
    184  1.1  ichiro #define NUM_KERNEL_PTS		(KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
    185  1.1  ichiro 
    186  1.1  ichiro pv_addr_t kernel_pt_table[NUM_KERNEL_PTS];
    187  1.1  ichiro 
    188  1.1  ichiro struct user *proc0paddr;
    189  1.1  ichiro 
    190  1.1  ichiro /* Prototypes */
    191  1.1  ichiro 
    192  1.1  ichiro void	consinit(void);
    193  1.1  ichiro u_int	cpu_get_control   __P((void));
    194  1.1  ichiro 
    195  1.1  ichiro /*
    196  1.1  ichiro  * Define the default console speed for the board.  This is generally
    197  1.1  ichiro  * what the firmware provided with the board defaults to.
    198  1.1  ichiro  */
    199  1.1  ichiro #ifndef CONSPEED
    200  1.1  ichiro #define CONSPEED B115200
    201  1.1  ichiro #endif /* ! CONSPEED */
    202  1.1  ichiro 
    203  1.1  ichiro #ifndef CONUNIT
    204  1.1  ichiro #define	CONUNIT	0
    205  1.1  ichiro #endif
    206  1.1  ichiro 
    207  1.1  ichiro #ifndef CONMODE
    208  1.1  ichiro #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB)) | CS8) /* 8N1 */
    209  1.1  ichiro #endif
    210  1.1  ichiro 
    211  1.1  ichiro int comcnspeed = CONSPEED;
    212  1.1  ichiro int comcnmode = CONMODE;
    213  1.1  ichiro int comcnunit = CONUNIT;
    214  1.1  ichiro 
    215  1.1  ichiro #if KGDB
    216  1.1  ichiro #ifndef KGDB_DEVNAME
    217  1.1  ichiro #error Must define KGDB_DEVNAME
    218  1.1  ichiro #endif
    219  1.1  ichiro const char kgdb_devname[] = KGDB_DEVNAME;
    220  1.1  ichiro 
    221  1.1  ichiro #ifndef KGDB_DEVADDR
    222  1.1  ichiro #error Must define KGDB_DEVADDR
    223  1.1  ichiro #endif
    224  1.1  ichiro unsigned long kgdb_devaddr = KGDB_DEVADDR;
    225  1.1  ichiro 
    226  1.1  ichiro #ifndef KGDB_DEVRATE
    227  1.1  ichiro #define KGDB_DEVRATE	CONSPEED
    228  1.1  ichiro #endif
    229  1.1  ichiro int kgdb_devrate = KGDB_DEVRATE;
    230  1.1  ichiro 
    231  1.1  ichiro #ifndef KGDB_DEVMODE
    232  1.1  ichiro #define KGDB_DEVMODE	CONMODE
    233  1.1  ichiro #endif
    234  1.1  ichiro int kgdb_devmode = KGDB_DEVMODE;
    235  1.1  ichiro #endif /* KGDB */
    236  1.1  ichiro 
    237  1.1  ichiro /*
    238  1.1  ichiro  * void cpu_reboot(int howto, char *bootstr)
    239  1.1  ichiro  *
    240  1.1  ichiro  * Reboots the system
    241  1.1  ichiro  *
    242  1.1  ichiro  * Deal with any syncing, unmounting, dumping and shutdown hooks,
    243  1.1  ichiro  * then reset the CPU.
    244  1.1  ichiro  */
    245  1.1  ichiro void
    246  1.1  ichiro cpu_reboot(int howto, char *bootstr)
    247  1.1  ichiro {
    248  1.1  ichiro #ifdef DIAGNOSTIC
    249  1.1  ichiro 	/* info */
    250  1.1  ichiro 	printf("boot: howto=%08x curproc=%p\n", howto, curproc);
    251  1.1  ichiro #endif
    252  1.1  ichiro 
    253  1.1  ichiro 	/*
    254  1.1  ichiro 	 * If we are still cold then hit the air brakes
    255  1.1  ichiro 	 * and crash to earth fast
    256  1.1  ichiro 	 */
    257  1.1  ichiro 	if (cold) {
    258  1.1  ichiro 		doshutdownhooks();
    259  1.1  ichiro 		printf("The operating system has halted.\n");
    260  1.1  ichiro 		printf("Please press any key to reboot.\n\n");
    261  1.1  ichiro 		cngetc();
    262  1.1  ichiro 		printf("rebooting...\n");
    263  1.1  ichiro 		goto reset;
    264  1.1  ichiro 	}
    265  1.1  ichiro 
    266  1.1  ichiro 	/* Disable console buffering */
    267  1.1  ichiro 
    268  1.1  ichiro 	/*
    269  1.1  ichiro 	 * If RB_NOSYNC was not specified sync the discs.
    270  1.1  ichiro 	 * Note: Unless cold is set to 1 here, syslogd will die during the
    271  1.1  ichiro 	 * unmount.  It looks like syslogd is getting woken up only to find
    272  1.1  ichiro 	 * that it cannot page part of the binary in as the filesystem has
    273  1.1  ichiro 	 * been unmounted.
    274  1.1  ichiro 	 */
    275  1.1  ichiro 	if (!(howto & RB_NOSYNC))
    276  1.1  ichiro 		bootsync();
    277  1.1  ichiro 
    278  1.1  ichiro 	/* Say NO to interrupts */
    279  1.1  ichiro 	splhigh();
    280  1.1  ichiro 
    281  1.1  ichiro 	/* Do a dump if requested. */
    282  1.1  ichiro 	if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
    283  1.1  ichiro 		dumpsys();
    284  1.1  ichiro 
    285  1.1  ichiro 	/* Run any shutdown hooks */
    286  1.1  ichiro 	doshutdownhooks();
    287  1.1  ichiro 
    288  1.1  ichiro 	/* Make sure IRQ's are disabled */
    289  1.1  ichiro 	IRQdisable;
    290  1.1  ichiro 
    291  1.1  ichiro 	if (howto & RB_HALT) {
    292  1.1  ichiro 		printf("The operating system has halted.\n");
    293  1.1  ichiro 		printf("Please press any key to reboot.\n\n");
    294  1.1  ichiro 		cngetc();
    295  1.1  ichiro 	}
    296  1.1  ichiro 
    297  1.1  ichiro 	printf("rebooting...\n\r");
    298  1.1  ichiro  reset:
    299  1.1  ichiro 	/*
    300  1.1  ichiro 	 * Make really really sure that all interrupts are disabled,
    301  1.1  ichiro 	 */
    302  1.1  ichiro 	(void) disable_interrupts(I32_bit|F32_bit);
    303  1.1  ichiro /*
    304  1.1  ichiro  * XXX system reset routine
    305  1.1  ichiro  */
    306  1.1  ichiro 	(void) disable_interrupts(I32_bit|F32_bit);
    307  1.1  ichiro 	/* ...and if that didn't work, just croak. */
    308  1.1  ichiro 	printf("RESET FAILED!\n");
    309  1.1  ichiro 	for (;;);
    310  1.1  ichiro }
    311  1.1  ichiro 
    312  1.1  ichiro /*
    313  1.1  ichiro  * Mapping table for core kernel memory. This memory is mapped at init
    314  1.1  ichiro  * time with section mappings.
    315  1.1  ichiro  */
    316  1.1  ichiro struct l1_sec_map {
    317  1.1  ichiro 	vaddr_t	va;
    318  1.1  ichiro 	vaddr_t	pa;
    319  1.1  ichiro 	vsize_t	size;
    320  1.1  ichiro 	vm_prot_t prot;
    321  1.1  ichiro 	int cache;
    322  1.1  ichiro } l1_sec_table[] = {
    323  1.1  ichiro     /*
    324  1.1  ichiro      * Map the on-board devices VA == PA so that we can access them
    325  1.1  ichiro      * with the MMU on or off.
    326  1.1  ichiro      */
    327  1.1  ichiro     {
    328  1.1  ichiro 	IXP425_UART0_HWBASE,
    329  1.1  ichiro 	IXP425_UART0_HWBASE,
    330  1.1  ichiro 	IXP425_REG_SIZE * 2,
    331  1.1  ichiro 	VM_PROT_READ|VM_PROT_WRITE,
    332  1.1  ichiro 	PTE_NOCACHE,
    333  1.1  ichiro     },
    334  1.1  ichiro     {
    335  1.1  ichiro 	0,
    336  1.1  ichiro 	0,
    337  1.1  ichiro 	0,
    338  1.1  ichiro 	0,
    339  1.1  ichiro 	0,
    340  1.1  ichiro     }
    341  1.1  ichiro };
    342  1.1  ichiro 
    343  1.1  ichiro /*
    344  1.1  ichiro  * u_int initarm(...)
    345  1.1  ichiro  *
    346  1.1  ichiro  * Initial entry point on startup. This gets called before main() is
    347  1.1  ichiro  * entered.
    348  1.1  ichiro  * It should be responsible for setting up everything that must be
    349  1.1  ichiro  * in place when main is called.
    350  1.1  ichiro  * This includes
    351  1.1  ichiro  *   Taking a copy of the boot configuration structure.
    352  1.1  ichiro  *   Initialising the physical console so characters can be printed.
    353  1.1  ichiro  *   Setting up page tables for the kernel
    354  1.1  ichiro  *   Relocating the kernel to the bottom of physical memory
    355  1.1  ichiro  */
    356  1.1  ichiro u_int
    357  1.1  ichiro initarm(void *arg)
    358  1.1  ichiro {
    359  1.1  ichiro 	extern vaddr_t xscale_cache_clean_addr;
    360  1.1  ichiro #ifdef DIAGNOSTIC
    361  1.1  ichiro 	extern vsize_t xscale_minidata_clean_size;
    362  1.1  ichiro #endif
    363  1.1  ichiro 	int loop;
    364  1.1  ichiro 	int loop1;
    365  1.1  ichiro 	u_int kerneldatasize, symbolsize;
    366  1.1  ichiro 	u_int l1pagetable;
    367  1.1  ichiro 	u_int freemempos;
    368  1.1  ichiro 	pv_addr_t kernel_l1pt;
    369  1.1  ichiro #if 0
    370  1.1  ichiro 	paddr_t memstart;
    371  1.1  ichiro 	psize_t memsize;
    372  1.1  ichiro #endif
    373  1.1  ichiro 
    374  1.1  ichiro 	/*
    375  1.1  ichiro 	 * Since we map v0xf0000000 == p0xc8000000, it's possible for
    376  1.1  ichiro 	 * us to initialize the console now.
    377  1.1  ichiro 	 */
    378  1.1  ichiro 	consinit();
    379  1.1  ichiro 
    380  1.1  ichiro #ifdef VERBOSE_INIT_ARM
    381  1.1  ichiro 	/* Talk to the user */
    382  1.1  ichiro 	printf("\nNetBSD/evbarm (IXP425) booting ...\n");
    383  1.1  ichiro #endif
    384  1.1  ichiro 
    385  1.1  ichiro 	/*
    386  1.1  ichiro 	 * Heads up ... Setup the CPU / MMU / TLB functions
    387  1.1  ichiro 	 */
    388  1.1  ichiro 	if (set_cpufuncs())
    389  1.1  ichiro 		panic("cpu not recognized!");
    390  1.1  ichiro 
    391  1.1  ichiro 	/* XXX overwrite bootconfig to hardcoded values */
    392  1.1  ichiro 	bootconfig.dramblocks = 1;
    393  1.1  ichiro 	bootconfig.dram[0].address = 0x10000000;
    394  1.1  ichiro 	bootconfig.dram[0].pages = 0x04000000 / PAGE_SIZE; /* SDRAM 64MB */
    395  1.1  ichiro 
    396  1.1  ichiro 	kerneldatasize = (u_int32_t)&end - (u_int32_t)KERNEL_TEXT_BASE;
    397  1.1  ichiro 
    398  1.1  ichiro #ifdef VERBOSE_INIT_ARM
    399  1.1  ichiro         printf("kernsize=0x%x\n", kerneldatasize);
    400  1.1  ichiro #endif
    401  1.1  ichiro         kerneldatasize += symbolsize;
    402  1.1  ichiro         kerneldatasize = ((kerneldatasize - 1) & ~(PAGE_SIZE * 4 - 1)) + PAGE_SIZE * 8;
    403  1.1  ichiro 
    404  1.1  ichiro 	/*
    405  1.1  ichiro 	 * Set up the variables that define the availablilty of
    406  1.1  ichiro 	 * physical memory.  For now, we're going to set
    407  1.1  ichiro 	 * physical_freestart to 0x10200000 (where the kernel
    408  1.1  ichiro 	 * was loaded), and allocate the memory we need downwards.
    409  1.1  ichiro 	 * If we get too close to the L1 table that we set up, we
    410  1.1  ichiro 	 * will panic.  We will update physical_freestart and
    411  1.1  ichiro 	 * physical_freeend later to reflect what pmap_bootstrap()
    412  1.1  ichiro 	 * wants to see.
    413  1.1  ichiro 	 *
    414  1.1  ichiro 	 * XXX pmap_bootstrap() needs an enema.
    415  1.1  ichiro 	 */
    416  1.1  ichiro 	physical_start = bootconfig.dram[0].address;
    417  1.1  ichiro 	physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE);
    418  1.1  ichiro 
    419  1.1  ichiro 	physical_freestart = physical_start
    420  1.1  ichiro                 + (KERNEL_TEXT_BASE - KERNEL_BASE) + kerneldatasize;
    421  1.1  ichiro         physical_freeend = physical_end;
    422  1.1  ichiro 
    423  1.1  ichiro 	physmem = (physical_end - physical_start) / PAGE_SIZE;
    424  1.1  ichiro 
    425  1.1  ichiro 	/* Tell the user about the memory */
    426  1.1  ichiro #ifdef VERBOSE_INIT_ARM
    427  1.1  ichiro 	printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem,
    428  1.1  ichiro 	    physical_start, physical_end - 1);
    429  1.1  ichiro 
    430  1.1  ichiro 	printf("Allocating page tables\n");
    431  1.1  ichiro #endif
    432  1.1  ichiro 	free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE;
    433  1.1  ichiro 
    434  1.1  ichiro 	freemempos = 0x10000000;
    435  1.1  ichiro 
    436  1.1  ichiro #ifdef VERBOSE_INIT_ARM
    437  1.1  ichiro         printf("CP15 Register1 = 0x%08x\n", cpu_get_control());
    438  1.1  ichiro         printf("physical_start = 0x%08lx, physical_end = 0x%08lx\n",
    439  1.1  ichiro                 physical_start, physical_end);
    440  1.1  ichiro #endif
    441  1.1  ichiro 
    442  1.1  ichiro 	/* Define a macro to simplify memory allocation */
    443  1.1  ichiro #define	valloc_pages(var, np)				\
    444  1.1  ichiro 	alloc_pages((var).pv_pa, (np));			\
    445  1.1  ichiro 	(var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start;
    446  1.1  ichiro 
    447  1.1  ichiro #if 0
    448  1.1  ichiro #define alloc_pages(var, np)				\
    449  1.1  ichiro 	physical_freeend -= ((np) * PAGE_SIZE);		\
    450  1.1  ichiro 	if (physical_freeend < physical_freestart)	\
    451  1.1  ichiro 		panic("initarm: out of memory");	\
    452  1.1  ichiro 	(var) = physical_freeend;			\
    453  1.1  ichiro 	free_pages -= (np);				\
    454  1.1  ichiro 	memset((char *)(var), 0, ((np) * PAGE_SIZE));
    455  1.1  ichiro #else
    456  1.1  ichiro #define alloc_pages(var, np)				\
    457  1.1  ichiro         (var) = freemempos;                             \
    458  1.1  ichiro         memset((char *)(var), 0, ((np) * PAGE_SIZE));   \
    459  1.1  ichiro         freemempos += (np) * PAGE_SIZE;
    460  1.1  ichiro #endif
    461  1.1  ichiro 
    462  1.1  ichiro 	loop1 = 0;
    463  1.1  ichiro 	kernel_l1pt.pv_pa = 0;
    464  1.1  ichiro 	for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
    465  1.1  ichiro 		/* Are we 16KB aligned for an L1 ? */
    466  1.1  ichiro 		if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0
    467  1.1  ichiro 		    && kernel_l1pt.pv_pa == 0) {
    468  1.1  ichiro 			valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
    469  1.1  ichiro 		} else {
    470  1.1  ichiro 			valloc_pages(kernel_pt_table[loop1],
    471  1.1  ichiro 			    L2_TABLE_SIZE / PAGE_SIZE);
    472  1.1  ichiro 			++loop1;
    473  1.1  ichiro 		}
    474  1.1  ichiro 	}
    475  1.1  ichiro 
    476  1.1  ichiro 	/* This should never be able to happen but better confirm that. */
    477  1.1  ichiro 	if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE-1)) != 0)
    478  1.1  ichiro 		panic("initarm: Failed to align the kernel page directory");
    479  1.1  ichiro 
    480  1.1  ichiro 	/*
    481  1.1  ichiro 	 * Allocate a page for the system page mapped to V0x00000000
    482  1.1  ichiro 	 * This page will just contain the system vectors and can be
    483  1.1  ichiro 	 * shared by all processes.
    484  1.1  ichiro 	 */
    485  1.1  ichiro 	alloc_pages(systempage.pv_pa, 1);
    486  1.1  ichiro 
    487  1.1  ichiro 	/* Allocate stacks for all modes */
    488  1.1  ichiro 	valloc_pages(irqstack, IRQ_STACK_SIZE);
    489  1.1  ichiro 	valloc_pages(abtstack, ABT_STACK_SIZE);
    490  1.1  ichiro 	valloc_pages(undstack, UND_STACK_SIZE);
    491  1.1  ichiro 	valloc_pages(kernelstack, UPAGES);
    492  1.1  ichiro 
    493  1.1  ichiro 	/* Allocate enough pages for cleaning the Mini-Data cache. */
    494  1.1  ichiro 	KASSERT(xscale_minidata_clean_size <= PAGE_SIZE);
    495  1.1  ichiro 	valloc_pages(minidataclean, 1);
    496  1.1  ichiro 
    497  1.1  ichiro #ifdef VERBOSE_INIT_ARM
    498  1.1  ichiro 	printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa,
    499  1.1  ichiro 	    irqstack.pv_va);
    500  1.1  ichiro 	printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa,
    501  1.1  ichiro 	    abtstack.pv_va);
    502  1.1  ichiro 	printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa,
    503  1.1  ichiro 	    undstack.pv_va);
    504  1.1  ichiro 	printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa,
    505  1.1  ichiro 	    kernelstack.pv_va);
    506  1.1  ichiro #endif
    507  1.1  ichiro 
    508  1.1  ichiro 	/*
    509  1.1  ichiro 	 * XXX Defer this to later so that we can reclaim the memory
    510  1.1  ichiro 	 * XXX used by the RedBoot page tables.
    511  1.1  ichiro 	 */
    512  1.1  ichiro 	alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE);
    513  1.1  ichiro 
    514  1.1  ichiro 	/*
    515  1.1  ichiro 	 * Ok we have allocated physical pages for the primary kernel
    516  1.1  ichiro 	 * page tables
    517  1.1  ichiro 	 */
    518  1.1  ichiro 
    519  1.1  ichiro #ifdef VERBOSE_INIT_ARM
    520  1.1  ichiro 	printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa);
    521  1.1  ichiro #endif
    522  1.1  ichiro 
    523  1.1  ichiro 	/*
    524  1.1  ichiro 	 * Now we start construction of the L1 page table
    525  1.1  ichiro 	 * We start by mapping the L2 page tables into the L1.
    526  1.1  ichiro 	 * This means that we can replace L1 mappings later on if necessary
    527  1.1  ichiro 	 */
    528  1.1  ichiro 	l1pagetable = kernel_l1pt.pv_pa;
    529  1.1  ichiro 
    530  1.1  ichiro 	/* Map the L2 pages tables in the L1 page table */
    531  1.1  ichiro 	pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH & ~(0x00400000 - 1),
    532  1.1  ichiro 	    &kernel_pt_table[KERNEL_PT_SYS]);
    533  1.1  ichiro 	for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++)
    534  1.1  ichiro 		pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000,
    535  1.1  ichiro 		    &kernel_pt_table[KERNEL_PT_KERNEL + loop]);
    536  1.1  ichiro 	for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
    537  1.1  ichiro 		pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
    538  1.1  ichiro 		    &kernel_pt_table[KERNEL_PT_VMDATA + loop]);
    539  1.1  ichiro 
    540  1.1  ichiro 	/* update the top of the kernel VM */
    541  1.1  ichiro 	pmap_curmaxkvaddr =
    542  1.1  ichiro 	    KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000);
    543  1.1  ichiro 
    544  1.1  ichiro 	pmap_link_l2pt(l1pagetable, IXP425_IO_VBASE,
    545  1.1  ichiro 	    &kernel_pt_table[KERNEL_PT_IO]);
    546  1.1  ichiro 
    547  1.1  ichiro #ifdef VERBOSE_INIT_ARM
    548  1.1  ichiro 	printf("Mapping kernel\n");
    549  1.1  ichiro #endif
    550  1.1  ichiro 
    551  1.1  ichiro 	/* Now we fill in the L2 pagetable for the kernel static code/data */
    552  1.1  ichiro 	{
    553  1.1  ichiro 		extern char etext[], _end[];
    554  1.1  ichiro 		size_t textsize = (uintptr_t) etext - KERNEL_TEXT_BASE;
    555  1.1  ichiro 		size_t totalsize = (uintptr_t) _end - KERNEL_TEXT_BASE;
    556  1.1  ichiro 		u_int logical;
    557  1.1  ichiro 
    558  1.1  ichiro 		textsize = (textsize + PGOFSET) & ~PGOFSET;
    559  1.1  ichiro 		totalsize = (totalsize + PGOFSET) & ~PGOFSET;
    560  1.1  ichiro 
    561  1.1  ichiro 		logical = 0x00200000;	/* offset of kernel in RAM */
    562  1.1  ichiro 
    563  1.1  ichiro 		logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
    564  1.1  ichiro 		    physical_start + logical, textsize,
    565  1.1  ichiro 		    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    566  1.1  ichiro 		logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
    567  1.1  ichiro 		    physical_start + logical, totalsize - textsize,
    568  1.1  ichiro 		    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    569  1.1  ichiro 	}
    570  1.1  ichiro 
    571  1.1  ichiro #ifdef VERBOSE_INIT_ARM
    572  1.1  ichiro 	printf("Constructing L2 page tables\n");
    573  1.1  ichiro #endif
    574  1.1  ichiro 
    575  1.1  ichiro 	/* Map the stack pages */
    576  1.1  ichiro 	pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
    577  1.1  ichiro 	    IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    578  1.1  ichiro 	pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
    579  1.1  ichiro 	    ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    580  1.1  ichiro 	pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
    581  1.1  ichiro 	    UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    582  1.1  ichiro 	pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
    583  1.1  ichiro 	    UPAGES * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    584  1.1  ichiro 
    585  1.1  ichiro 	pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
    586  1.1  ichiro 	    L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
    587  1.1  ichiro 
    588  1.1  ichiro 	for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
    589  1.1  ichiro 		pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va,
    590  1.1  ichiro 		    kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
    591  1.1  ichiro 		    VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
    592  1.1  ichiro 	}
    593  1.1  ichiro 
    594  1.1  ichiro 	/* Map the Mini-Data cache clean area. */
    595  1.1  ichiro 	xscale_setup_minidata(l1pagetable, minidataclean.pv_va,
    596  1.1  ichiro 	    minidataclean.pv_pa);
    597  1.1  ichiro 
    598  1.1  ichiro 	/* Map the vector page. */
    599  1.1  ichiro 	pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
    600  1.1  ichiro 	    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    601  1.1  ichiro 
    602  1.1  ichiro         /*
    603  1.1  ichiro          * Map the IXP425 registers
    604  1.1  ichiro          */
    605  1.1  ichiro 
    606  1.1  ichiro 	ixp425_pmap_io_reg(l1pagetable);
    607  1.1  ichiro 
    608  1.1  ichiro 	/*
    609  1.1  ichiro 	 * Map devices we can map w/ section mappings.
    610  1.1  ichiro 	 */
    611  1.1  ichiro 	loop = 0;
    612  1.1  ichiro 	while (l1_sec_table[loop].size) {
    613  1.1  ichiro 		vm_size_t sz;
    614  1.1  ichiro 
    615  1.1  ichiro #ifdef VERBOSE_INIT_ARM
    616  1.1  ichiro 		printf("%08lx -> %08lx @ %08lx\n", l1_sec_table[loop].pa,
    617  1.1  ichiro 		    l1_sec_table[loop].pa + l1_sec_table[loop].size - 1,
    618  1.1  ichiro 		    l1_sec_table[loop].va);
    619  1.1  ichiro #endif
    620  1.1  ichiro 		for (sz = 0; sz < l1_sec_table[loop].size; sz += L1_S_SIZE)
    621  1.1  ichiro 			pmap_map_section(l1pagetable,
    622  1.1  ichiro 			    l1_sec_table[loop].va + sz,
    623  1.1  ichiro 			    l1_sec_table[loop].pa + sz,
    624  1.1  ichiro 			    l1_sec_table[loop].prot,
    625  1.1  ichiro 			    l1_sec_table[loop].cache);
    626  1.1  ichiro 		++loop;
    627  1.1  ichiro 	}
    628  1.1  ichiro 
    629  1.1  ichiro 
    630  1.1  ichiro 	/*
    631  1.1  ichiro 	 * Give the XScale global cache clean code an appropriately
    632  1.1  ichiro 	 * sized chunk of unmapped VA space starting at 0xff000000
    633  1.1  ichiro 	 * (our device mappings end before this address).
    634  1.1  ichiro 	 */
    635  1.1  ichiro 	xscale_cache_clean_addr = 0xff000000U;
    636  1.1  ichiro 
    637  1.1  ichiro 	/*
    638  1.1  ichiro 	 * Now we have the real page tables in place so we can switch to them.
    639  1.1  ichiro 	 * Once this is done we will be running with the REAL kernel page
    640  1.1  ichiro 	 * tables.
    641  1.1  ichiro 	 */
    642  1.1  ichiro 
    643  1.1  ichiro 	/*
    644  1.1  ichiro 	 * Update the physical_freestart/physical_freeend/free_pages
    645  1.1  ichiro 	 * variables.
    646  1.1  ichiro 	 */
    647  1.1  ichiro 	{
    648  1.1  ichiro 		extern char _end[];
    649  1.1  ichiro 
    650  1.1  ichiro 		physical_freestart = physical_start +
    651  1.1  ichiro 		    (((((uintptr_t) _end) + PGOFSET) & ~PGOFSET) -
    652  1.1  ichiro 		     KERNEL_BASE);
    653  1.1  ichiro 		physical_freeend = physical_end;
    654  1.1  ichiro 		free_pages =
    655  1.1  ichiro 		    (physical_freeend - physical_freestart) / PAGE_SIZE;
    656  1.1  ichiro 	}
    657  1.1  ichiro 
    658  1.1  ichiro 	/* Switch tables */
    659  1.1  ichiro #ifdef VERBOSE_INIT_ARM
    660  1.1  ichiro 	printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
    661  1.1  ichiro 	       physical_freestart, free_pages, free_pages);
    662  1.1  ichiro 	printf("switching to new L1 page table  @%#lx...", kernel_l1pt.pv_pa);
    663  1.1  ichiro #endif
    664  1.1  ichiro 	cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
    665  1.1  ichiro 	setttb(kernel_l1pt.pv_pa);
    666  1.1  ichiro 	cpu_tlb_flushID();
    667  1.1  ichiro 	cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
    668  1.1  ichiro 
    669  1.1  ichiro 	/*
    670  1.1  ichiro 	 * Moved from cpu_startup() as data_abort_handler() references
    671  1.1  ichiro 	 * this during uvm init
    672  1.1  ichiro 	 */
    673  1.1  ichiro 	proc0paddr = (struct user *)kernelstack.pv_va;
    674  1.1  ichiro 	lwp0.l_addr = proc0paddr;
    675  1.1  ichiro 
    676  1.1  ichiro #ifdef VERBOSE_INIT_ARM
    677  1.1  ichiro 	printf("bootstrap done.\n");
    678  1.1  ichiro #endif
    679  1.1  ichiro 
    680  1.1  ichiro 	arm32_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
    681  1.1  ichiro 
    682  1.1  ichiro 	/*
    683  1.1  ichiro 	 * Pages were allocated during the secondary bootstrap for the
    684  1.1  ichiro 	 * stacks for different CPU modes.
    685  1.1  ichiro 	 * We must now set the r13 registers in the different CPU modes to
    686  1.1  ichiro 	 * point to these stacks.
    687  1.1  ichiro 	 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
    688  1.1  ichiro 	 * of the stack memory.
    689  1.1  ichiro 	 */
    690  1.1  ichiro #ifdef VERBOSE_INIT_ARM
    691  1.1  ichiro 	printf("init subsystems: stacks ");
    692  1.1  ichiro #endif
    693  1.1  ichiro 
    694  1.1  ichiro 	set_stackptr(PSR_IRQ32_MODE,
    695  1.1  ichiro 	    irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
    696  1.1  ichiro 	set_stackptr(PSR_ABT32_MODE,
    697  1.1  ichiro 	    abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
    698  1.1  ichiro 	set_stackptr(PSR_UND32_MODE,
    699  1.1  ichiro 	    undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
    700  1.1  ichiro 
    701  1.1  ichiro 	/*
    702  1.1  ichiro 	 * Well we should set a data abort handler.
    703  1.1  ichiro 	 * Once things get going this will change as we will need a proper
    704  1.1  ichiro 	 * handler.
    705  1.1  ichiro 	 * Until then we will use a handler that just panics but tells us
    706  1.1  ichiro 	 * why.
    707  1.1  ichiro 	 * Initialisation of the vectors will just panic on a data abort.
    708  1.1  ichiro 	 * This just fills in a slighly better one.
    709  1.1  ichiro 	 */
    710  1.1  ichiro #ifdef VERBOSE_INIT_ARM
    711  1.1  ichiro 	printf("vectors ");
    712  1.1  ichiro #endif
    713  1.1  ichiro 	data_abort_handler_address = (u_int)data_abort_handler;
    714  1.1  ichiro 	prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
    715  1.1  ichiro 	undefined_handler_address = (u_int)undefinedinstruction_bounce;
    716  1.1  ichiro 
    717  1.1  ichiro 	/* Initialise the undefined instruction handlers */
    718  1.1  ichiro #ifdef VERBOSE_INIT_ARM
    719  1.1  ichiro 	printf("undefined ");
    720  1.1  ichiro #endif
    721  1.1  ichiro 	undefined_init();
    722  1.1  ichiro 
    723  1.1  ichiro 	/* Load memory into UVM. */
    724  1.1  ichiro #ifdef VERBOSE_INIT_ARM
    725  1.1  ichiro 	printf("page ");
    726  1.1  ichiro #endif
    727  1.1  ichiro 	uvm_setpagesize();	/* initialize PAGE_SIZE-dependent variables */
    728  1.1  ichiro 	uvm_page_physload(atop(physical_freestart), atop(physical_freeend),
    729  1.1  ichiro 	    atop(physical_freestart), atop(physical_freeend),
    730  1.1  ichiro 	    VM_FREELIST_DEFAULT);
    731  1.1  ichiro 
    732  1.1  ichiro 	/* Boot strap pmap telling it where the kernel page table is */
    733  1.1  ichiro #ifdef VERBOSE_INIT_ARM
    734  1.1  ichiro 	printf("pmap ");
    735  1.1  ichiro #endif
    736  1.1  ichiro 	pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, KERNEL_VM_BASE,
    737  1.1  ichiro 	    KERNEL_VM_BASE + KERNEL_VM_SIZE);
    738  1.1  ichiro 
    739  1.1  ichiro 	/* Setup the IRQ system */
    740  1.1  ichiro #ifdef VERBOSE_INIT_ARM
    741  1.1  ichiro 	printf("irq ");
    742  1.1  ichiro #endif
    743  1.1  ichiro 	ixp425_intr_init();
    744  1.1  ichiro #ifdef VERBOSE_INIT_ARM
    745  1.1  ichiro 	printf("\nAll initialize done!\nNow Starting NetBSD, Hear we go!\n");
    746  1.1  ichiro #endif
    747  1.1  ichiro 
    748  1.1  ichiro #ifdef BOOTHOWTO
    749  1.1  ichiro 	boothowto = BOOTHOWTO;
    750  1.1  ichiro #endif
    751  1.1  ichiro 
    752  1.1  ichiro #ifdef IPKDB
    753  1.1  ichiro 	/* Initialise ipkdb */
    754  1.1  ichiro 	ipkdb_init();
    755  1.1  ichiro 	if (boothowto & RB_KDB)
    756  1.1  ichiro 		ipkdb_connect(0);
    757  1.1  ichiro #endif
    758  1.1  ichiro 
    759  1.1  ichiro #if NKSYMS || defined(DDB) || defined(LKM)
    760  1.1  ichiro 	/* Firmware doesn't load symbols. */
    761  1.1  ichiro 	ksyms_init(0, NULL, NULL);
    762  1.1  ichiro #endif
    763  1.1  ichiro 
    764  1.1  ichiro #ifdef DDB
    765  1.1  ichiro 	db_machine_init();
    766  1.1  ichiro 	if (boothowto & RB_KDB)
    767  1.1  ichiro 		Debugger();
    768  1.1  ichiro #endif
    769  1.1  ichiro 
    770  1.1  ichiro 	/* We return the new stack pointer address */
    771  1.1  ichiro 	return(kernelstack.pv_va + USPACE_SVC_STACK_TOP);
    772  1.1  ichiro }
    773  1.1  ichiro 
    774  1.1  ichiro /*
    775  1.1  ichiro  * consinit
    776  1.1  ichiro  */
    777  1.1  ichiro static const struct uart_info {
    778  1.1  ichiro         const char      *name;
    779  1.1  ichiro         u_int32_t       hw_addr;
    780  1.1  ichiro         u_int32_t       v_addr;
    781  1.1  ichiro } comcn_config[] = {
    782  1.1  ichiro 	{ "HighSpeed Serial (UART0)",
    783  1.1  ichiro 	  IXP425_UART0_HWBASE,
    784  1.1  ichiro 	  IXP425_UART0_VBASE,
    785  1.1  ichiro 	},
    786  1.1  ichiro 	{ "Console (UART1)",
    787  1.1  ichiro 	  IXP425_UART1_HWBASE,
    788  1.1  ichiro 	  IXP425_UART1_VBASE,
    789  1.1  ichiro 	},
    790  1.1  ichiro };
    791  1.1  ichiro 
    792  1.1  ichiro void
    793  1.1  ichiro consinit(void)
    794  1.1  ichiro {
    795  1.1  ichiro 	extern struct bus_space ixpsip_bs_tag;
    796  1.1  ichiro 	static int consinit_called;
    797  1.1  ichiro 
    798  1.1  ichiro 	if (consinit_called != 0)
    799  1.1  ichiro 		return;
    800  1.1  ichiro 
    801  1.1  ichiro 	consinit_called = 1;
    802  1.1  ichiro 
    803  1.1  ichiro 	if (ixp4xx_comcnattach(&ixpsip_bs_tag, comcn_config[comcnunit].hw_addr,
    804  1.1  ichiro 		comcn_config[comcnunit].v_addr, comcnspeed, FREQ, comcnmode))
    805  1.1  ichiro 		panic("can't init serial console (%s)", comcn_config[comcnunit].name);
    806  1.1  ichiro }
    807