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ixdp425_machdep.c revision 1.37.14.3
      1  1.37.14.3  pgoyette /*	$NetBSD: ixdp425_machdep.c,v 1.37.14.3 2018/09/30 01:45:42 pgoyette Exp $ */
      2        1.1    ichiro /*
      3        1.1    ichiro  * Copyright (c) 2003
      4        1.1    ichiro  *	Ichiro FUKUHARA <ichiro (at) ichiro.org>.
      5        1.1    ichiro  * All rights reserved.
      6        1.1    ichiro  *
      7        1.1    ichiro  * Redistribution and use in source and binary forms, with or without
      8        1.1    ichiro  * modification, are permitted provided that the following conditions
      9        1.1    ichiro  * are met:
     10        1.1    ichiro  * 1. Redistributions of source code must retain the above copyright
     11        1.1    ichiro  *    notice, this list of conditions and the following disclaimer.
     12        1.1    ichiro  * 2. Redistributions in binary form must reproduce the above copyright
     13        1.1    ichiro  *    notice, this list of conditions and the following disclaimer in the
     14        1.1    ichiro  *    documentation and/or other materials provided with the distribution.
     15        1.1    ichiro  *
     16        1.1    ichiro  * THIS SOFTWARE IS PROVIDED BY ICHIRO FUKUHARA ``AS IS'' AND ANY EXPRESS OR
     17        1.1    ichiro  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     18        1.1    ichiro  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     19        1.1    ichiro  * IN NO EVENT SHALL ICHIRO FUKUHARA OR THE VOICES IN HIS HEAD BE LIABLE FOR
     20        1.1    ichiro  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     21        1.1    ichiro  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     22        1.1    ichiro  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     23        1.1    ichiro  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     24        1.1    ichiro  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     25        1.1    ichiro  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     26        1.1    ichiro  * SUCH DAMAGE.
     27        1.1    ichiro  */
     28        1.1    ichiro /*
     29        1.1    ichiro  * Copyright (c) 1997,1998 Mark Brinicombe.
     30        1.1    ichiro  * Copyright (c) 1997,1998 Causality Limited.
     31        1.1    ichiro  * All rights reserved.
     32        1.1    ichiro  *
     33        1.1    ichiro  * Redistribution and use in source and binary forms, with or without
     34        1.1    ichiro  * modification, are permitted provided that the following conditions
     35        1.1    ichiro  * are met:
     36        1.1    ichiro  * 1. Redistributions of source code must retain the above copyright
     37        1.1    ichiro  *    notice, this list of conditions and the following disclaimer.
     38        1.1    ichiro  * 2. Redistributions in binary form must reproduce the above copyright
     39        1.1    ichiro  *    notice, this list of conditions and the following disclaimer in the
     40        1.1    ichiro  *    documentation and/or other materials provided with the distribution.
     41        1.1    ichiro  * 3. All advertising materials mentioning features or use of this software
     42        1.1    ichiro  *    must display the following acknowledgement:
     43        1.1    ichiro  *	This product includes software developed by Mark Brinicombe
     44        1.1    ichiro  *	for the NetBSD Project.
     45        1.1    ichiro  * 4. The name of the company nor the name of the author may be used to
     46        1.1    ichiro  *    endorse or promote products derived from this software without specific
     47        1.1    ichiro  *    prior written permission.
     48        1.1    ichiro  *
     49        1.1    ichiro  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
     50        1.1    ichiro  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
     51        1.1    ichiro  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     52        1.1    ichiro  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
     53        1.1    ichiro  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     54        1.1    ichiro  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
     55        1.1    ichiro  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     56        1.1    ichiro  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     57        1.1    ichiro  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     58        1.1    ichiro  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     59        1.1    ichiro  * SUCH DAMAGE.
     60        1.1    ichiro  */
     61        1.1    ichiro 
     62       1.28       wiz /* Machine dependent functions for kernel setup for Intel IXP425 evaluation
     63        1.1    ichiro  * boards using RedBoot firmware.
     64        1.1    ichiro  */
     65        1.6     lukem 
     66        1.6     lukem #include <sys/cdefs.h>
     67  1.37.14.3  pgoyette __KERNEL_RCSID(0, "$NetBSD: ixdp425_machdep.c,v 1.37.14.3 2018/09/30 01:45:42 pgoyette Exp $");
     68        1.1    ichiro 
     69  1.37.14.2  pgoyette #include "opt_arm_debug.h"
     70  1.37.14.3  pgoyette #include "opt_console.h"
     71        1.1    ichiro #include "opt_ddb.h"
     72        1.1    ichiro #include "opt_kgdb.h"
     73        1.1    ichiro #include "opt_pmap_debug.h"
     74        1.1    ichiro 
     75        1.1    ichiro #include <sys/param.h>
     76        1.1    ichiro #include <sys/device.h>
     77        1.1    ichiro #include <sys/systm.h>
     78        1.1    ichiro #include <sys/kernel.h>
     79        1.1    ichiro #include <sys/exec.h>
     80        1.1    ichiro #include <sys/proc.h>
     81        1.1    ichiro #include <sys/msgbuf.h>
     82        1.1    ichiro #include <sys/reboot.h>
     83        1.1    ichiro #include <sys/termios.h>
     84        1.1    ichiro #include <sys/ksyms.h>
     85       1.34      matt #include <sys/bus.h>
     86       1.34      matt #include <sys/cpu.h>
     87        1.1    ichiro 
     88        1.1    ichiro #include <uvm/uvm_extern.h>
     89        1.1    ichiro 
     90        1.1    ichiro #include <dev/cons.h>
     91        1.1    ichiro 
     92        1.1    ichiro #include <machine/db_machdep.h>
     93        1.1    ichiro #include <ddb/db_sym.h>
     94        1.1    ichiro #include <ddb/db_extern.h>
     95        1.1    ichiro 
     96        1.1    ichiro #include <machine/bootconfig.h>
     97       1.34      matt #include <arm/locore.h>
     98        1.1    ichiro #include <arm/undefined.h>
     99        1.1    ichiro 
    100        1.1    ichiro #include <arm/arm32/machdep.h>
    101        1.1    ichiro 
    102        1.1    ichiro #include <arm/xscale/ixp425reg.h>
    103        1.1    ichiro #include <arm/xscale/ixp425var.h>
    104        1.8       scw #include <arm/xscale/ixp425_sipvar.h>
    105        1.1    ichiro 
    106        1.9       scw #include <evbarm/ixdp425/ixdp425reg.h>
    107        1.9       scw 
    108        1.8       scw #include "com.h"
    109        1.8       scw #if NCOM > 0
    110        1.8       scw #include <dev/ic/comreg.h>
    111        1.8       scw #include <dev/ic/comvar.h>
    112        1.8       scw #endif
    113        1.1    ichiro 
    114        1.1    ichiro #include "ksyms.h"
    115        1.1    ichiro 
    116        1.1    ichiro /* Kernel text starts 2MB in from the bottom of the kernel address space. */
    117        1.1    ichiro #define	KERNEL_TEXT_BASE	(KERNEL_BASE + 0x00200000)
    118        1.1    ichiro #define	KERNEL_VM_BASE		(KERNEL_BASE + 0x01000000)
    119        1.1    ichiro 
    120        1.1    ichiro /*
    121        1.1    ichiro  * The range 0xc1000000 - 0xccffffff is available for kernel VM space
    122        1.1    ichiro  * Core-logic registers and I/O mappings occupy 0xfd000000 - 0xffffffff
    123        1.1    ichiro  */
    124        1.1    ichiro #define	KERNEL_VM_SIZE		0x0C000000
    125        1.1    ichiro 
    126        1.1    ichiro BootConfig bootconfig;		/* Boot config storage */
    127        1.1    ichiro char *boot_args = NULL;
    128        1.1    ichiro char *boot_file = NULL;
    129        1.1    ichiro 
    130       1.35      matt vaddr_t physical_start;
    131       1.35      matt vaddr_t physical_freestart;
    132       1.35      matt vaddr_t physical_freeend;
    133       1.35      matt vaddr_t physical_end;
    134        1.1    ichiro u_int free_pages;
    135        1.1    ichiro 
    136        1.1    ichiro /* Physical and virtual addresses for some global pages */
    137        1.1    ichiro pv_addr_t minidataclean;
    138        1.1    ichiro 
    139       1.35      matt paddr_t msgbufphys;
    140        1.1    ichiro 
    141        1.1    ichiro extern int end;
    142        1.1    ichiro 
    143        1.1    ichiro #ifdef PMAP_DEBUG
    144        1.1    ichiro extern int pmap_debug_level;
    145        1.1    ichiro #endif
    146        1.1    ichiro 
    147        1.1    ichiro #define KERNEL_PT_SYS		0	/* L2 table for mapping zero page */
    148        1.1    ichiro 
    149        1.1    ichiro #define KERNEL_PT_KERNEL	1	/* L2 table for mapping kernel */
    150        1.1    ichiro #define	KERNEL_PT_KERNEL_NUM	4
    151        1.1    ichiro #define	KERNEL_PT_IO		(KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM)
    152        1.1    ichiro 					/* L2 tables for mapping kernel VM */
    153        1.1    ichiro #define KERNEL_PT_VMDATA	(KERNEL_PT_IO + 1)
    154        1.1    ichiro #define	KERNEL_PT_VMDATA_NUM	4	/* start with 16MB of KVM */
    155        1.1    ichiro #define NUM_KERNEL_PTS		(KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
    156        1.1    ichiro 
    157        1.1    ichiro pv_addr_t kernel_pt_table[NUM_KERNEL_PTS];
    158        1.1    ichiro 
    159        1.1    ichiro /* Prototypes */
    160        1.1    ichiro 
    161        1.1    ichiro void	consinit(void);
    162       1.21       dsl u_int	cpu_get_control(void);
    163        1.1    ichiro 
    164        1.1    ichiro /*
    165        1.1    ichiro  * Define the default console speed for the board.  This is generally
    166        1.1    ichiro  * what the firmware provided with the board defaults to.
    167        1.1    ichiro  */
    168        1.1    ichiro #ifndef CONSPEED
    169        1.1    ichiro #define CONSPEED B115200
    170        1.1    ichiro #endif /* ! CONSPEED */
    171        1.1    ichiro 
    172        1.1    ichiro #ifndef CONUNIT
    173        1.1    ichiro #define	CONUNIT	0
    174        1.1    ichiro #endif
    175        1.1    ichiro 
    176        1.1    ichiro #ifndef CONMODE
    177        1.1    ichiro #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB)) | CS8) /* 8N1 */
    178        1.1    ichiro #endif
    179        1.1    ichiro 
    180        1.1    ichiro int comcnspeed = CONSPEED;
    181        1.1    ichiro int comcnmode = CONMODE;
    182        1.1    ichiro int comcnunit = CONUNIT;
    183        1.1    ichiro 
    184        1.1    ichiro #if KGDB
    185        1.1    ichiro #ifndef KGDB_DEVNAME
    186        1.1    ichiro #error Must define KGDB_DEVNAME
    187        1.1    ichiro #endif
    188        1.1    ichiro const char kgdb_devname[] = KGDB_DEVNAME;
    189        1.1    ichiro 
    190        1.1    ichiro #ifndef KGDB_DEVADDR
    191        1.1    ichiro #error Must define KGDB_DEVADDR
    192        1.1    ichiro #endif
    193        1.1    ichiro unsigned long kgdb_devaddr = KGDB_DEVADDR;
    194        1.1    ichiro 
    195        1.1    ichiro #ifndef KGDB_DEVRATE
    196        1.1    ichiro #define KGDB_DEVRATE	CONSPEED
    197        1.1    ichiro #endif
    198        1.1    ichiro int kgdb_devrate = KGDB_DEVRATE;
    199        1.1    ichiro 
    200        1.1    ichiro #ifndef KGDB_DEVMODE
    201        1.1    ichiro #define KGDB_DEVMODE	CONMODE
    202        1.1    ichiro #endif
    203        1.1    ichiro int kgdb_devmode = KGDB_DEVMODE;
    204        1.1    ichiro #endif /* KGDB */
    205        1.1    ichiro 
    206        1.1    ichiro /*
    207        1.1    ichiro  * void cpu_reboot(int howto, char *bootstr)
    208        1.1    ichiro  *
    209        1.1    ichiro  * Reboots the system
    210        1.1    ichiro  *
    211        1.1    ichiro  * Deal with any syncing, unmounting, dumping and shutdown hooks,
    212        1.1    ichiro  * then reset the CPU.
    213        1.1    ichiro  */
    214        1.1    ichiro void
    215        1.1    ichiro cpu_reboot(int howto, char *bootstr)
    216        1.1    ichiro {
    217       1.33     skrll 	uint32_t reg;
    218        1.9       scw 
    219        1.1    ichiro #ifdef DIAGNOSTIC
    220        1.1    ichiro 	/* info */
    221        1.1    ichiro 	printf("boot: howto=%08x curproc=%p\n", howto, curproc);
    222        1.1    ichiro #endif
    223        1.1    ichiro 
    224        1.1    ichiro 	/*
    225        1.1    ichiro 	 * If we are still cold then hit the air brakes
    226        1.1    ichiro 	 * and crash to earth fast
    227        1.1    ichiro 	 */
    228        1.1    ichiro 	if (cold) {
    229        1.1    ichiro 		doshutdownhooks();
    230       1.18    dyoung 		pmf_system_shutdown(boothowto);
    231        1.1    ichiro 		printf("The operating system has halted.\n");
    232        1.1    ichiro 		printf("Please press any key to reboot.\n\n");
    233        1.1    ichiro 		cngetc();
    234        1.1    ichiro 		printf("rebooting...\n");
    235        1.1    ichiro 		goto reset;
    236        1.1    ichiro 	}
    237        1.1    ichiro 
    238        1.1    ichiro 	/* Disable console buffering */
    239        1.1    ichiro 
    240        1.1    ichiro 	/*
    241        1.1    ichiro 	 * If RB_NOSYNC was not specified sync the discs.
    242        1.1    ichiro 	 * Note: Unless cold is set to 1 here, syslogd will die during the
    243        1.1    ichiro 	 * unmount.  It looks like syslogd is getting woken up only to find
    244        1.1    ichiro 	 * that it cannot page part of the binary in as the filesystem has
    245        1.1    ichiro 	 * been unmounted.
    246        1.1    ichiro 	 */
    247        1.1    ichiro 	if (!(howto & RB_NOSYNC))
    248        1.1    ichiro 		bootsync();
    249        1.1    ichiro 
    250        1.1    ichiro 	/* Say NO to interrupts */
    251        1.1    ichiro 	splhigh();
    252        1.1    ichiro 
    253        1.1    ichiro 	/* Do a dump if requested. */
    254        1.1    ichiro 	if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
    255        1.1    ichiro 		dumpsys();
    256        1.1    ichiro 
    257        1.1    ichiro 	/* Run any shutdown hooks */
    258        1.1    ichiro 	doshutdownhooks();
    259        1.1    ichiro 
    260       1.18    dyoung 	pmf_system_shutdown(boothowto);
    261       1.18    dyoung 
    262        1.1    ichiro 	/* Make sure IRQ's are disabled */
    263        1.1    ichiro 	IRQdisable;
    264        1.1    ichiro 
    265        1.1    ichiro 	if (howto & RB_HALT) {
    266        1.1    ichiro 		printf("The operating system has halted.\n");
    267        1.1    ichiro 		printf("Please press any key to reboot.\n\n");
    268        1.1    ichiro 		cngetc();
    269        1.1    ichiro 	}
    270        1.1    ichiro 
    271        1.1    ichiro 	printf("rebooting...\n\r");
    272        1.1    ichiro  reset:
    273        1.1    ichiro 	/*
    274        1.1    ichiro 	 * Make really really sure that all interrupts are disabled,
    275        1.1    ichiro 	 */
    276        1.1    ichiro 	(void) disable_interrupts(I32_bit|F32_bit);
    277        1.9       scw 	IXPREG(IXP425_INT_ENABLE) = 0;
    278        1.9       scw 
    279        1.9       scw 	/*
    280        1.9       scw 	 * Map the boot Flash device down at physical address 0.
    281        1.9       scw 	 * This is safe since NetBSD runs out of an alias of
    282        1.9       scw 	 * SDRAM at 0x10000000.
    283        1.9       scw 	 */
    284       1.11       scw 	reg = EXP_CSR_READ_4(ixpsip_softc, EXP_CNFG0_OFFSET);
    285        1.9       scw 	reg |= EXP_CNFG0_MEM_MAP;
    286       1.11       scw 	EXP_CSR_WRITE_4(ixpsip_softc, EXP_CNFG0_OFFSET, reg);
    287        1.9       scw 
    288        1.9       scw 	/*
    289        1.9       scw 	 * Jump into the bootcode's reset vector
    290        1.9       scw 	 *
    291        1.9       scw 	 * XXX:
    292        1.9       scw 	 * Redboot doesn't like the state in which we leave the PCI
    293        1.9       scw 	 * ethernet card, and so fails to detect it on reboot. This
    294        1.9       scw 	 * pretty much necessitates a hard reset/power cycle to be
    295        1.9       scw 	 * able to download a new kernel image over ethernet.
    296        1.9       scw 	 *
    297        1.9       scw 	 * I suspect this is due to a bug in Redboot's i82557 driver.
    298        1.9       scw 	 */
    299        1.9       scw 	cpu_reset();
    300        1.9       scw 
    301        1.1    ichiro 	/* ...and if that didn't work, just croak. */
    302        1.1    ichiro 	printf("RESET FAILED!\n");
    303        1.1    ichiro 	for (;;);
    304        1.1    ichiro }
    305        1.1    ichiro 
    306        1.5    ichiro /* Static device mappings. */
    307        1.5    ichiro static const struct pmap_devmap ixp425_devmap[] = {
    308        1.7    ichiro 	/* Physical/Virtual address for I/O space */
    309        1.5    ichiro     {
    310        1.5    ichiro 	IXP425_IO_VBASE,
    311        1.5    ichiro 	IXP425_IO_HWBASE,
    312        1.5    ichiro 	IXP425_IO_SIZE,
    313        1.5    ichiro 	VM_PROT_READ|VM_PROT_WRITE,
    314        1.5    ichiro 	PTE_NOCACHE,
    315        1.5    ichiro     },
    316        1.5    ichiro 
    317        1.7    ichiro 	/* Expansion Bus */
    318        1.5    ichiro     {
    319        1.5    ichiro 	IXP425_EXP_VBASE,
    320        1.5    ichiro 	IXP425_EXP_HWBASE,
    321        1.5    ichiro 	IXP425_EXP_SIZE,
    322        1.5    ichiro 	VM_PROT_READ|VM_PROT_WRITE,
    323        1.5    ichiro 	PTE_NOCACHE,
    324        1.5    ichiro     },
    325        1.7    ichiro 
    326        1.7    ichiro 	/* IXP425 PCI Configuration */
    327        1.1    ichiro     {
    328        1.5    ichiro 	IXP425_PCI_VBASE,
    329        1.5    ichiro 	IXP425_PCI_HWBASE,
    330        1.5    ichiro 	IXP425_PCI_SIZE,
    331        1.1    ichiro 	VM_PROT_READ|VM_PROT_WRITE,
    332        1.1    ichiro 	PTE_NOCACHE,
    333        1.1    ichiro     },
    334        1.5    ichiro 
    335       1.12       scw 	/* SDRAM Controller */
    336       1.12       scw     {
    337       1.12       scw 	IXP425_MCU_VBASE,
    338       1.12       scw 	IXP425_MCU_HWBASE,
    339       1.12       scw 	IXP425_MCU_SIZE,
    340       1.12       scw 	VM_PROT_READ|VM_PROT_WRITE,
    341       1.12       scw 	PTE_NOCACHE,
    342       1.12       scw     },
    343       1.12       scw 
    344        1.7    ichiro 	/* PCI Memory Space */
    345        1.7    ichiro     {
    346        1.7    ichiro 	IXP425_PCI_MEM_VBASE,
    347        1.7    ichiro 	IXP425_PCI_MEM_HWBASE,
    348        1.7    ichiro 	IXP425_PCI_MEM_SIZE,
    349        1.7    ichiro 	VM_PROT_READ|VM_PROT_WRITE,
    350        1.7    ichiro 	PTE_NOCACHE,
    351        1.7    ichiro     },
    352        1.7    ichiro 
    353        1.1    ichiro     {
    354        1.1    ichiro 	0,
    355        1.1    ichiro 	0,
    356        1.1    ichiro 	0,
    357        1.1    ichiro 	0,
    358        1.1    ichiro 	0,
    359        1.1    ichiro     }
    360        1.1    ichiro };
    361        1.1    ichiro 
    362        1.1    ichiro /*
    363        1.1    ichiro  * u_int initarm(...)
    364        1.1    ichiro  *
    365        1.1    ichiro  * Initial entry point on startup. This gets called before main() is
    366        1.1    ichiro  * entered.
    367        1.1    ichiro  * It should be responsible for setting up everything that must be
    368        1.1    ichiro  * in place when main is called.
    369        1.1    ichiro  * This includes
    370        1.1    ichiro  *   Taking a copy of the boot configuration structure.
    371        1.1    ichiro  *   Initialising the physical console so characters can be printed.
    372        1.1    ichiro  *   Setting up page tables for the kernel
    373        1.1    ichiro  *   Relocating the kernel to the bottom of physical memory
    374        1.1    ichiro  */
    375        1.1    ichiro u_int
    376        1.1    ichiro initarm(void *arg)
    377        1.1    ichiro {
    378        1.1    ichiro 	extern vaddr_t xscale_cache_clean_addr;
    379        1.1    ichiro #ifdef DIAGNOSTIC
    380        1.1    ichiro 	extern vsize_t xscale_minidata_clean_size;
    381        1.1    ichiro #endif
    382        1.1    ichiro 	int loop;
    383        1.1    ichiro 	int loop1;
    384       1.10       scw 	u_int kerneldatasize;
    385        1.1    ichiro 	u_int l1pagetable;
    386        1.1    ichiro 	u_int freemempos;
    387        1.1    ichiro 
    388        1.1    ichiro 	/*
    389        1.1    ichiro 	 * Since we map v0xf0000000 == p0xc8000000, it's possible for
    390        1.1    ichiro 	 * us to initialize the console now.
    391        1.1    ichiro 	 */
    392        1.1    ichiro 	consinit();
    393        1.1    ichiro 
    394        1.1    ichiro #ifdef VERBOSE_INIT_ARM
    395        1.1    ichiro 	/* Talk to the user */
    396        1.8       scw 	printf("\nNetBSD/evbarm (Intel IXDP425) booting ...\n");
    397        1.1    ichiro #endif
    398        1.1    ichiro 
    399        1.1    ichiro 	/*
    400        1.1    ichiro 	 * Heads up ... Setup the CPU / MMU / TLB functions
    401        1.1    ichiro 	 */
    402        1.1    ichiro 	if (set_cpufuncs())
    403        1.1    ichiro 		panic("cpu not recognized!");
    404        1.1    ichiro 
    405        1.1    ichiro 	/* XXX overwrite bootconfig to hardcoded values */
    406        1.1    ichiro 	bootconfig.dramblocks = 1;
    407        1.1    ichiro 	bootconfig.dram[0].address = 0x10000000;
    408       1.12       scw 	bootconfig.dram[0].pages = ixp425_sdram_size() / PAGE_SIZE;
    409        1.1    ichiro 
    410       1.33     skrll 	kerneldatasize = (uint32_t)&end - (uint32_t)KERNEL_TEXT_BASE;
    411        1.1    ichiro 
    412        1.1    ichiro #ifdef VERBOSE_INIT_ARM
    413        1.1    ichiro         printf("kernsize=0x%x\n", kerneldatasize);
    414        1.1    ichiro #endif
    415        1.1    ichiro         kerneldatasize = ((kerneldatasize - 1) & ~(PAGE_SIZE * 4 - 1)) + PAGE_SIZE * 8;
    416        1.1    ichiro 
    417        1.1    ichiro 	/*
    418        1.1    ichiro 	 * Set up the variables that define the availablilty of
    419        1.1    ichiro 	 * physical memory.  For now, we're going to set
    420        1.1    ichiro 	 * physical_freestart to 0x10200000 (where the kernel
    421        1.1    ichiro 	 * was loaded), and allocate the memory we need downwards.
    422        1.1    ichiro 	 * If we get too close to the L1 table that we set up, we
    423        1.1    ichiro 	 * will panic.  We will update physical_freestart and
    424        1.1    ichiro 	 * physical_freeend later to reflect what pmap_bootstrap()
    425        1.1    ichiro 	 * wants to see.
    426        1.1    ichiro 	 *
    427        1.1    ichiro 	 * XXX pmap_bootstrap() needs an enema.
    428        1.1    ichiro 	 */
    429        1.1    ichiro 	physical_start = bootconfig.dram[0].address;
    430        1.1    ichiro 	physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE);
    431        1.1    ichiro 
    432        1.1    ichiro 	physical_freestart = physical_start
    433        1.1    ichiro                 + (KERNEL_TEXT_BASE - KERNEL_BASE) + kerneldatasize;
    434        1.1    ichiro         physical_freeend = physical_end;
    435        1.1    ichiro 
    436        1.1    ichiro 	physmem = (physical_end - physical_start) / PAGE_SIZE;
    437        1.1    ichiro 
    438        1.1    ichiro 	/* Tell the user about the memory */
    439        1.1    ichiro #ifdef VERBOSE_INIT_ARM
    440  1.37.14.1  pgoyette 	printf("physmemory: %"PRIuPSIZE" pages at 0x%08lx -> 0x%08lx\n", physmem,
    441        1.1    ichiro 	    physical_start, physical_end - 1);
    442        1.1    ichiro 
    443        1.1    ichiro 	printf("Allocating page tables\n");
    444        1.1    ichiro #endif
    445        1.1    ichiro 	free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE;
    446        1.1    ichiro 
    447        1.1    ichiro 	freemempos = 0x10000000;
    448        1.1    ichiro 
    449        1.1    ichiro #ifdef VERBOSE_INIT_ARM
    450        1.1    ichiro         printf("physical_start = 0x%08lx, physical_end = 0x%08lx\n",
    451        1.1    ichiro                 physical_start, physical_end);
    452        1.1    ichiro #endif
    453        1.1    ichiro 
    454        1.1    ichiro 	/* Define a macro to simplify memory allocation */
    455        1.1    ichiro #define	valloc_pages(var, np)				\
    456        1.1    ichiro 	alloc_pages((var).pv_pa, (np));			\
    457        1.1    ichiro 	(var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start;
    458        1.1    ichiro 
    459        1.1    ichiro #if 0
    460        1.1    ichiro #define alloc_pages(var, np)				\
    461        1.1    ichiro 	physical_freeend -= ((np) * PAGE_SIZE);		\
    462        1.1    ichiro 	if (physical_freeend < physical_freestart)	\
    463        1.1    ichiro 		panic("initarm: out of memory");	\
    464        1.1    ichiro 	(var) = physical_freeend;			\
    465        1.1    ichiro 	free_pages -= (np);				\
    466        1.1    ichiro 	memset((char *)(var), 0, ((np) * PAGE_SIZE));
    467        1.1    ichiro #else
    468        1.1    ichiro #define alloc_pages(var, np)				\
    469        1.1    ichiro         (var) = freemempos;                             \
    470        1.1    ichiro         memset((char *)(var), 0, ((np) * PAGE_SIZE));   \
    471        1.1    ichiro         freemempos += (np) * PAGE_SIZE;
    472        1.1    ichiro #endif
    473        1.1    ichiro 
    474        1.1    ichiro 	loop1 = 0;
    475        1.1    ichiro 	for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
    476        1.1    ichiro 		/* Are we 16KB aligned for an L1 ? */
    477        1.1    ichiro 		if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0
    478        1.1    ichiro 		    && kernel_l1pt.pv_pa == 0) {
    479        1.1    ichiro 			valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
    480        1.1    ichiro 		} else {
    481        1.1    ichiro 			valloc_pages(kernel_pt_table[loop1],
    482        1.1    ichiro 			    L2_TABLE_SIZE / PAGE_SIZE);
    483        1.1    ichiro 			++loop1;
    484        1.1    ichiro 		}
    485        1.1    ichiro 	}
    486        1.1    ichiro 
    487        1.1    ichiro 	/* This should never be able to happen but better confirm that. */
    488        1.1    ichiro 	if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE-1)) != 0)
    489        1.1    ichiro 		panic("initarm: Failed to align the kernel page directory");
    490        1.1    ichiro 
    491        1.1    ichiro 	/*
    492        1.8       scw 	 * Allocate a page for the system page.
    493        1.1    ichiro 	 * This page will just contain the system vectors and can be
    494        1.1    ichiro 	 * shared by all processes.
    495        1.1    ichiro 	 */
    496        1.1    ichiro 	alloc_pages(systempage.pv_pa, 1);
    497        1.1    ichiro 
    498        1.1    ichiro 	/* Allocate stacks for all modes */
    499        1.1    ichiro 	valloc_pages(irqstack, IRQ_STACK_SIZE);
    500        1.1    ichiro 	valloc_pages(abtstack, ABT_STACK_SIZE);
    501        1.1    ichiro 	valloc_pages(undstack, UND_STACK_SIZE);
    502        1.1    ichiro 	valloc_pages(kernelstack, UPAGES);
    503        1.1    ichiro 
    504        1.1    ichiro 	/* Allocate enough pages for cleaning the Mini-Data cache. */
    505        1.1    ichiro 	KASSERT(xscale_minidata_clean_size <= PAGE_SIZE);
    506        1.1    ichiro 	valloc_pages(minidataclean, 1);
    507        1.1    ichiro 
    508        1.1    ichiro #ifdef VERBOSE_INIT_ARM
    509        1.1    ichiro 	printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa,
    510        1.1    ichiro 	    irqstack.pv_va);
    511        1.1    ichiro 	printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa,
    512        1.1    ichiro 	    abtstack.pv_va);
    513        1.1    ichiro 	printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa,
    514        1.1    ichiro 	    undstack.pv_va);
    515        1.1    ichiro 	printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa,
    516        1.1    ichiro 	    kernelstack.pv_va);
    517        1.1    ichiro #endif
    518        1.1    ichiro 
    519        1.1    ichiro 	/*
    520        1.1    ichiro 	 * XXX Defer this to later so that we can reclaim the memory
    521        1.1    ichiro 	 * XXX used by the RedBoot page tables.
    522        1.1    ichiro 	 */
    523        1.1    ichiro 	alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE);
    524        1.1    ichiro 
    525        1.1    ichiro 	/*
    526        1.1    ichiro 	 * Ok we have allocated physical pages for the primary kernel
    527        1.1    ichiro 	 * page tables
    528        1.1    ichiro 	 */
    529        1.1    ichiro 
    530        1.1    ichiro #ifdef VERBOSE_INIT_ARM
    531        1.1    ichiro 	printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa);
    532        1.1    ichiro #endif
    533        1.1    ichiro 
    534        1.1    ichiro 	/*
    535        1.1    ichiro 	 * Now we start construction of the L1 page table
    536        1.1    ichiro 	 * We start by mapping the L2 page tables into the L1.
    537        1.1    ichiro 	 * This means that we can replace L1 mappings later on if necessary
    538        1.1    ichiro 	 */
    539        1.1    ichiro 	l1pagetable = kernel_l1pt.pv_pa;
    540        1.1    ichiro 
    541        1.1    ichiro 	/* Map the L2 pages tables in the L1 page table */
    542        1.1    ichiro 	pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH & ~(0x00400000 - 1),
    543        1.1    ichiro 	    &kernel_pt_table[KERNEL_PT_SYS]);
    544        1.1    ichiro 	for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++)
    545        1.1    ichiro 		pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000,
    546        1.1    ichiro 		    &kernel_pt_table[KERNEL_PT_KERNEL + loop]);
    547        1.1    ichiro 	for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
    548        1.1    ichiro 		pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
    549        1.1    ichiro 		    &kernel_pt_table[KERNEL_PT_VMDATA + loop]);
    550        1.1    ichiro 
    551        1.1    ichiro 	/* update the top of the kernel VM */
    552        1.1    ichiro 	pmap_curmaxkvaddr =
    553        1.1    ichiro 	    KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000);
    554        1.1    ichiro 
    555        1.1    ichiro 	pmap_link_l2pt(l1pagetable, IXP425_IO_VBASE,
    556        1.1    ichiro 	    &kernel_pt_table[KERNEL_PT_IO]);
    557        1.1    ichiro 
    558        1.1    ichiro #ifdef VERBOSE_INIT_ARM
    559        1.1    ichiro 	printf("Mapping kernel\n");
    560        1.1    ichiro #endif
    561        1.1    ichiro 
    562        1.1    ichiro 	/* Now we fill in the L2 pagetable for the kernel static code/data */
    563        1.1    ichiro 	{
    564        1.1    ichiro 		extern char etext[], _end[];
    565        1.1    ichiro 		size_t textsize = (uintptr_t) etext - KERNEL_TEXT_BASE;
    566        1.1    ichiro 		size_t totalsize = (uintptr_t) _end - KERNEL_TEXT_BASE;
    567        1.1    ichiro 		u_int logical;
    568        1.1    ichiro 
    569        1.1    ichiro 		textsize = (textsize + PGOFSET) & ~PGOFSET;
    570        1.1    ichiro 		totalsize = (totalsize + PGOFSET) & ~PGOFSET;
    571        1.1    ichiro 
    572        1.1    ichiro 		logical = 0x00200000;	/* offset of kernel in RAM */
    573        1.1    ichiro 
    574        1.1    ichiro 		logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
    575        1.1    ichiro 		    physical_start + logical, textsize,
    576        1.1    ichiro 		    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    577        1.1    ichiro 		logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
    578        1.1    ichiro 		    physical_start + logical, totalsize - textsize,
    579        1.1    ichiro 		    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    580        1.1    ichiro 	}
    581        1.1    ichiro 
    582        1.1    ichiro #ifdef VERBOSE_INIT_ARM
    583        1.1    ichiro 	printf("Constructing L2 page tables\n");
    584        1.1    ichiro #endif
    585        1.1    ichiro 
    586        1.1    ichiro 	/* Map the stack pages */
    587        1.1    ichiro 	pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
    588        1.1    ichiro 	    IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    589        1.1    ichiro 	pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
    590        1.1    ichiro 	    ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    591        1.1    ichiro 	pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
    592        1.1    ichiro 	    UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    593        1.1    ichiro 	pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
    594        1.1    ichiro 	    UPAGES * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    595        1.1    ichiro 
    596        1.1    ichiro 	pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
    597        1.1    ichiro 	    L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
    598        1.1    ichiro 
    599        1.1    ichiro 	for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
    600        1.1    ichiro 		pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va,
    601        1.1    ichiro 		    kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
    602        1.1    ichiro 		    VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
    603        1.1    ichiro 	}
    604        1.1    ichiro 
    605        1.1    ichiro 	/* Map the Mini-Data cache clean area. */
    606        1.1    ichiro 	xscale_setup_minidata(l1pagetable, minidataclean.pv_va,
    607        1.1    ichiro 	    minidataclean.pv_pa);
    608        1.1    ichiro 
    609        1.1    ichiro 	/* Map the vector page. */
    610        1.1    ichiro 	pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
    611        1.1    ichiro 	    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    612        1.1    ichiro 
    613        1.1    ichiro         /*
    614        1.1    ichiro          * Map the IXP425 registers
    615        1.1    ichiro          */
    616        1.5    ichiro 	pmap_devmap_bootstrap(l1pagetable, ixp425_devmap);
    617        1.1    ichiro 
    618        1.1    ichiro 	/*
    619        1.1    ichiro 	 * Give the XScale global cache clean code an appropriately
    620        1.1    ichiro 	 * sized chunk of unmapped VA space starting at 0xff000000
    621        1.1    ichiro 	 * (our device mappings end before this address).
    622        1.1    ichiro 	 */
    623        1.1    ichiro 	xscale_cache_clean_addr = 0xff000000U;
    624        1.1    ichiro 
    625        1.1    ichiro 	/*
    626        1.1    ichiro 	 * Now we have the real page tables in place so we can switch to them.
    627        1.1    ichiro 	 * Once this is done we will be running with the REAL kernel page
    628        1.1    ichiro 	 * tables.
    629        1.1    ichiro 	 */
    630        1.1    ichiro 
    631        1.1    ichiro 	/*
    632        1.1    ichiro 	 * Update the physical_freestart/physical_freeend/free_pages
    633        1.1    ichiro 	 * variables.
    634        1.1    ichiro 	 */
    635        1.1    ichiro 	{
    636        1.1    ichiro 		extern char _end[];
    637        1.1    ichiro 
    638        1.1    ichiro 		physical_freestart = physical_start +
    639        1.1    ichiro 		    (((((uintptr_t) _end) + PGOFSET) & ~PGOFSET) -
    640        1.1    ichiro 		     KERNEL_BASE);
    641        1.1    ichiro 		physical_freeend = physical_end;
    642        1.1    ichiro 		free_pages =
    643        1.1    ichiro 		    (physical_freeend - physical_freestart) / PAGE_SIZE;
    644        1.1    ichiro 	}
    645        1.1    ichiro 
    646        1.1    ichiro 	/* Switch tables */
    647        1.1    ichiro #ifdef VERBOSE_INIT_ARM
    648        1.1    ichiro 	printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
    649        1.1    ichiro 	       physical_freestart, free_pages, free_pages);
    650        1.1    ichiro 	printf("switching to new L1 page table  @%#lx...", kernel_l1pt.pv_pa);
    651        1.1    ichiro #endif
    652        1.1    ichiro 	cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
    653       1.32      matt 	cpu_setttb(kernel_l1pt.pv_pa, true);
    654        1.1    ichiro 	cpu_tlb_flushID();
    655        1.1    ichiro 	cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
    656        1.1    ichiro 
    657        1.1    ichiro 	/*
    658        1.1    ichiro 	 * Moved from cpu_startup() as data_abort_handler() references
    659        1.1    ichiro 	 * this during uvm init
    660        1.1    ichiro 	 */
    661       1.25     rmind 	uvm_lwp_setuarea(&lwp0, kernelstack.pv_va);
    662        1.1    ichiro 
    663        1.1    ichiro #ifdef VERBOSE_INIT_ARM
    664        1.1    ichiro 	printf("bootstrap done.\n");
    665        1.1    ichiro #endif
    666        1.1    ichiro 
    667        1.1    ichiro 	arm32_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
    668        1.1    ichiro 
    669        1.1    ichiro 	/*
    670        1.1    ichiro 	 * Pages were allocated during the secondary bootstrap for the
    671        1.1    ichiro 	 * stacks for different CPU modes.
    672        1.1    ichiro 	 * We must now set the r13 registers in the different CPU modes to
    673        1.1    ichiro 	 * point to these stacks.
    674        1.1    ichiro 	 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
    675        1.1    ichiro 	 * of the stack memory.
    676        1.1    ichiro 	 */
    677        1.1    ichiro #ifdef VERBOSE_INIT_ARM
    678        1.1    ichiro 	printf("init subsystems: stacks ");
    679        1.1    ichiro #endif
    680        1.1    ichiro 
    681        1.1    ichiro 	set_stackptr(PSR_IRQ32_MODE,
    682        1.1    ichiro 	    irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
    683        1.1    ichiro 	set_stackptr(PSR_ABT32_MODE,
    684        1.1    ichiro 	    abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
    685        1.1    ichiro 	set_stackptr(PSR_UND32_MODE,
    686        1.1    ichiro 	    undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
    687        1.1    ichiro 
    688        1.1    ichiro 	/*
    689        1.1    ichiro 	 * Well we should set a data abort handler.
    690        1.1    ichiro 	 * Once things get going this will change as we will need a proper
    691        1.1    ichiro 	 * handler.
    692        1.1    ichiro 	 * Until then we will use a handler that just panics but tells us
    693        1.1    ichiro 	 * why.
    694        1.1    ichiro 	 * Initialisation of the vectors will just panic on a data abort.
    695       1.13       abs 	 * This just fills in a slightly better one.
    696        1.1    ichiro 	 */
    697        1.1    ichiro #ifdef VERBOSE_INIT_ARM
    698        1.1    ichiro 	printf("vectors ");
    699        1.1    ichiro #endif
    700        1.1    ichiro 	data_abort_handler_address = (u_int)data_abort_handler;
    701        1.1    ichiro 	prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
    702        1.1    ichiro 	undefined_handler_address = (u_int)undefinedinstruction_bounce;
    703        1.1    ichiro 
    704        1.1    ichiro 	/* Initialise the undefined instruction handlers */
    705        1.1    ichiro #ifdef VERBOSE_INIT_ARM
    706        1.1    ichiro 	printf("undefined ");
    707        1.1    ichiro #endif
    708        1.1    ichiro 	undefined_init();
    709        1.1    ichiro 
    710        1.1    ichiro 	/* Load memory into UVM. */
    711        1.1    ichiro #ifdef VERBOSE_INIT_ARM
    712        1.1    ichiro 	printf("page ");
    713        1.1    ichiro #endif
    714       1.37    cherry 	uvm_md_init();
    715        1.1    ichiro 	uvm_page_physload(atop(physical_freestart), atop(physical_freeend),
    716        1.1    ichiro 	    atop(physical_freestart), atop(physical_freeend),
    717        1.1    ichiro 	    VM_FREELIST_DEFAULT);
    718        1.1    ichiro 
    719        1.1    ichiro 	/* Boot strap pmap telling it where the kernel page table is */
    720        1.1    ichiro #ifdef VERBOSE_INIT_ARM
    721        1.1    ichiro 	printf("pmap ");
    722        1.1    ichiro #endif
    723       1.17      matt 	pmap_bootstrap(KERNEL_VM_BASE, KERNEL_VM_BASE + KERNEL_VM_SIZE);
    724        1.1    ichiro 
    725        1.1    ichiro 	/* Setup the IRQ system */
    726        1.1    ichiro #ifdef VERBOSE_INIT_ARM
    727        1.1    ichiro 	printf("irq ");
    728        1.1    ichiro #endif
    729        1.1    ichiro 	ixp425_intr_init();
    730        1.1    ichiro #ifdef VERBOSE_INIT_ARM
    731       1.36     skrll 	printf("\nAll initialization done!\nNow Starting NetBSD, Here we go!\n");
    732        1.1    ichiro #endif
    733        1.1    ichiro 
    734        1.1    ichiro #ifdef BOOTHOWTO
    735        1.1    ichiro 	boothowto = BOOTHOWTO;
    736        1.1    ichiro #endif
    737        1.1    ichiro 
    738        1.1    ichiro #ifdef DDB
    739        1.1    ichiro 	db_machine_init();
    740        1.1    ichiro 	if (boothowto & RB_KDB)
    741        1.1    ichiro 		Debugger();
    742        1.1    ichiro #endif
    743        1.1    ichiro 
    744        1.1    ichiro 	/* We return the new stack pointer address */
    745        1.1    ichiro 	return(kernelstack.pv_va + USPACE_SVC_STACK_TOP);
    746        1.1    ichiro }
    747        1.1    ichiro 
    748        1.1    ichiro /*
    749        1.1    ichiro  * consinit
    750        1.1    ichiro  */
    751        1.1    ichiro void
    752        1.1    ichiro consinit(void)
    753        1.1    ichiro {
    754        1.1    ichiro 	static int consinit_called;
    755        1.8       scw 	static const bus_addr_t addrs[2] = {
    756        1.8       scw 		IXP425_UART0_HWBASE, IXP425_UART1_HWBASE
    757        1.8       scw 	};
    758        1.1    ichiro 
    759        1.1    ichiro 	if (consinit_called != 0)
    760        1.1    ichiro 		return;
    761        1.1    ichiro 
    762        1.1    ichiro 	consinit_called = 1;
    763        1.7    ichiro 
    764        1.7    ichiro 	pmap_devmap_register(ixp425_devmap);
    765        1.7    ichiro 
    766        1.8       scw 	if (comcnattach(&ixp425_a4x_bs_tag, addrs[comcnunit],
    767        1.8       scw 	    comcnspeed, IXP425_UART_FREQ, COM_TYPE_PXA2x0, comcnmode))
    768        1.4    ichiro 		panic("can't init serial console (UART%d)", comcnunit);
    769        1.1    ichiro }
    770