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ixdp425_machdep.c revision 1.4.2.1
      1  1.4.2.1   skrll /*	$NetBSD: ixdp425_machdep.c,v 1.4.2.1 2004/08/03 10:34:02 skrll Exp $ */
      2      1.1  ichiro /*
      3      1.1  ichiro  * Copyright (c) 2003
      4      1.1  ichiro  *	Ichiro FUKUHARA <ichiro (at) ichiro.org>.
      5      1.1  ichiro  * All rights reserved.
      6      1.1  ichiro  *
      7      1.1  ichiro  * Redistribution and use in source and binary forms, with or without
      8      1.1  ichiro  * modification, are permitted provided that the following conditions
      9      1.1  ichiro  * are met:
     10      1.1  ichiro  * 1. Redistributions of source code must retain the above copyright
     11      1.1  ichiro  *    notice, this list of conditions and the following disclaimer.
     12      1.1  ichiro  * 2. Redistributions in binary form must reproduce the above copyright
     13      1.1  ichiro  *    notice, this list of conditions and the following disclaimer in the
     14      1.1  ichiro  *    documentation and/or other materials provided with the distribution.
     15      1.1  ichiro  * 3. All advertising materials mentioning features or use of this software
     16      1.1  ichiro  *    must display the following acknowledgement:
     17      1.1  ichiro  *	This product includes software developed by Ichiro FUKUHARA.
     18      1.1  ichiro  * 4. The name of the company nor the name of the author may be used to
     19      1.1  ichiro  *    endorse or promote products derived from this software without specific
     20      1.1  ichiro  *    prior written permission.
     21      1.1  ichiro  *
     22      1.1  ichiro  * THIS SOFTWARE IS PROVIDED BY ICHIRO FUKUHARA ``AS IS'' AND ANY EXPRESS OR
     23      1.1  ichiro  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     24      1.1  ichiro  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     25      1.1  ichiro  * IN NO EVENT SHALL ICHIRO FUKUHARA OR THE VOICES IN HIS HEAD BE LIABLE FOR
     26      1.1  ichiro  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     27      1.1  ichiro  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     28      1.1  ichiro  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     29      1.1  ichiro  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     30      1.1  ichiro  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     31      1.1  ichiro  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     32      1.1  ichiro  * SUCH DAMAGE.
     33      1.1  ichiro  */
     34      1.1  ichiro /*
     35      1.1  ichiro  * Copyright (c) 1997,1998 Mark Brinicombe.
     36      1.1  ichiro  * Copyright (c) 1997,1998 Causality Limited.
     37      1.1  ichiro  * All rights reserved.
     38      1.1  ichiro  *
     39      1.1  ichiro  * Redistribution and use in source and binary forms, with or without
     40      1.1  ichiro  * modification, are permitted provided that the following conditions
     41      1.1  ichiro  * are met:
     42      1.1  ichiro  * 1. Redistributions of source code must retain the above copyright
     43      1.1  ichiro  *    notice, this list of conditions and the following disclaimer.
     44      1.1  ichiro  * 2. Redistributions in binary form must reproduce the above copyright
     45      1.1  ichiro  *    notice, this list of conditions and the following disclaimer in the
     46      1.1  ichiro  *    documentation and/or other materials provided with the distribution.
     47      1.1  ichiro  * 3. All advertising materials mentioning features or use of this software
     48      1.1  ichiro  *    must display the following acknowledgement:
     49      1.1  ichiro  *	This product includes software developed by Mark Brinicombe
     50      1.1  ichiro  *	for the NetBSD Project.
     51      1.1  ichiro  * 4. The name of the company nor the name of the author may be used to
     52      1.1  ichiro  *    endorse or promote products derived from this software without specific
     53      1.1  ichiro  *    prior written permission.
     54      1.1  ichiro  *
     55      1.1  ichiro  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
     56      1.1  ichiro  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
     57      1.1  ichiro  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     58      1.1  ichiro  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
     59      1.1  ichiro  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     60      1.1  ichiro  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
     61      1.1  ichiro  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     62      1.1  ichiro  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     63      1.1  ichiro  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     64      1.1  ichiro  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     65      1.1  ichiro  * SUCH DAMAGE.
     66      1.1  ichiro  */
     67      1.1  ichiro 
     68      1.1  ichiro /* Machine dependant functions for kernel setup for Intel IXP425 evaluation
     69      1.1  ichiro  * boards using RedBoot firmware.
     70      1.1  ichiro  */
     71      1.1  ichiro 
     72  1.4.2.1   skrll #include <sys/cdefs.h>
     73  1.4.2.1   skrll __KERNEL_RCSID(0, "$NetBSD: ixdp425_machdep.c,v 1.4.2.1 2004/08/03 10:34:02 skrll Exp $");
     74  1.4.2.1   skrll 
     75      1.1  ichiro #include "opt_ddb.h"
     76      1.1  ichiro #include "opt_kgdb.h"
     77      1.1  ichiro #include "opt_pmap_debug.h"
     78      1.1  ichiro 
     79      1.1  ichiro #include <sys/param.h>
     80      1.1  ichiro #include <sys/device.h>
     81      1.1  ichiro #include <sys/systm.h>
     82      1.1  ichiro #include <sys/kernel.h>
     83      1.1  ichiro #include <sys/exec.h>
     84      1.1  ichiro #include <sys/proc.h>
     85      1.1  ichiro #include <sys/msgbuf.h>
     86      1.1  ichiro #include <sys/reboot.h>
     87      1.1  ichiro #include <sys/termios.h>
     88      1.1  ichiro #include <sys/ksyms.h>
     89      1.1  ichiro 
     90      1.1  ichiro #include <uvm/uvm_extern.h>
     91      1.1  ichiro 
     92      1.1  ichiro #include <dev/cons.h>
     93      1.1  ichiro 
     94      1.1  ichiro #include <machine/db_machdep.h>
     95      1.1  ichiro #include <ddb/db_sym.h>
     96      1.1  ichiro #include <ddb/db_extern.h>
     97      1.1  ichiro 
     98      1.1  ichiro #include <machine/bootconfig.h>
     99      1.1  ichiro #include <machine/bus.h>
    100      1.1  ichiro #include <machine/cpu.h>
    101      1.1  ichiro #include <machine/frame.h>
    102      1.1  ichiro #include <arm/undefined.h>
    103      1.1  ichiro 
    104      1.1  ichiro #include <arm/arm32/machdep.h>
    105      1.1  ichiro 
    106      1.1  ichiro #include <arm/xscale/ixp425reg.h>
    107      1.1  ichiro #include <arm/xscale/ixp425var.h>
    108      1.1  ichiro #include <arm/xscale/ixp425_sipvar.h>
    109  1.4.2.1   skrll 
    110  1.4.2.1   skrll #include <evbarm/ixdp425/ixdp425reg.h>
    111  1.4.2.1   skrll 
    112  1.4.2.1   skrll #include "com.h"
    113  1.4.2.1   skrll #if NCOM > 0
    114  1.4.2.1   skrll #include <dev/ic/comreg.h>
    115  1.4.2.1   skrll #include <dev/ic/comvar.h>
    116  1.4.2.1   skrll #endif
    117      1.1  ichiro 
    118      1.1  ichiro #include "opt_ipkdb.h"
    119      1.1  ichiro #include "ksyms.h"
    120      1.1  ichiro 
    121      1.1  ichiro /* Kernel text starts 2MB in from the bottom of the kernel address space. */
    122      1.1  ichiro #define	KERNEL_TEXT_BASE	(KERNEL_BASE + 0x00200000)
    123      1.1  ichiro #define	KERNEL_VM_BASE		(KERNEL_BASE + 0x01000000)
    124      1.1  ichiro 
    125      1.1  ichiro /*
    126      1.1  ichiro  * The range 0xc1000000 - 0xccffffff is available for kernel VM space
    127      1.1  ichiro  * Core-logic registers and I/O mappings occupy 0xfd000000 - 0xffffffff
    128      1.1  ichiro  */
    129      1.1  ichiro #define	KERNEL_VM_SIZE		0x0C000000
    130      1.1  ichiro 
    131      1.1  ichiro 
    132      1.1  ichiro /*
    133      1.1  ichiro  * Address to call from cpu_reset() to reset the machine.
    134      1.1  ichiro  * This is machine architecture dependant as it varies depending
    135      1.1  ichiro  * on where the ROM appears when you turn the MMU off.
    136      1.1  ichiro  */
    137      1.1  ichiro 
    138      1.1  ichiro u_int cpu_reset_address = 0x00000000;
    139      1.1  ichiro 
    140      1.1  ichiro /* Define various stack sizes in pages */
    141      1.1  ichiro #define IRQ_STACK_SIZE	1
    142      1.1  ichiro #define ABT_STACK_SIZE	1
    143      1.1  ichiro #ifdef IPKDB
    144      1.1  ichiro #define UND_STACK_SIZE	2
    145      1.1  ichiro #else
    146      1.1  ichiro #define UND_STACK_SIZE	1
    147      1.1  ichiro #endif
    148      1.1  ichiro 
    149      1.1  ichiro BootConfig bootconfig;		/* Boot config storage */
    150      1.1  ichiro char *boot_args = NULL;
    151      1.1  ichiro char *boot_file = NULL;
    152      1.1  ichiro 
    153      1.1  ichiro vm_offset_t physical_start;
    154      1.1  ichiro vm_offset_t physical_freestart;
    155      1.1  ichiro vm_offset_t physical_freeend;
    156      1.1  ichiro vm_offset_t physical_end;
    157      1.1  ichiro u_int free_pages;
    158      1.1  ichiro vm_offset_t pagetables_start;
    159      1.1  ichiro int physmem = 0;
    160      1.1  ichiro 
    161      1.1  ichiro /* Physical and virtual addresses for some global pages */
    162      1.1  ichiro pv_addr_t systempage;
    163      1.1  ichiro pv_addr_t irqstack;
    164      1.1  ichiro pv_addr_t undstack;
    165      1.1  ichiro pv_addr_t abtstack;
    166      1.1  ichiro pv_addr_t kernelstack;
    167      1.1  ichiro pv_addr_t minidataclean;
    168      1.1  ichiro 
    169      1.1  ichiro vm_offset_t msgbufphys;
    170      1.1  ichiro 
    171      1.1  ichiro extern u_int data_abort_handler_address;
    172      1.1  ichiro extern u_int prefetch_abort_handler_address;
    173      1.1  ichiro extern u_int undefined_handler_address;
    174      1.1  ichiro extern int end;
    175      1.1  ichiro 
    176      1.1  ichiro #ifdef PMAP_DEBUG
    177      1.1  ichiro extern int pmap_debug_level;
    178      1.1  ichiro #endif
    179      1.1  ichiro 
    180      1.1  ichiro #define KERNEL_PT_SYS		0	/* L2 table for mapping zero page */
    181      1.1  ichiro 
    182      1.1  ichiro #define KERNEL_PT_KERNEL	1	/* L2 table for mapping kernel */
    183      1.1  ichiro #define	KERNEL_PT_KERNEL_NUM	4
    184      1.1  ichiro #define	KERNEL_PT_IO		(KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM)
    185      1.1  ichiro 					/* L2 tables for mapping kernel VM */
    186      1.1  ichiro #define KERNEL_PT_VMDATA	(KERNEL_PT_IO + 1)
    187      1.1  ichiro #define	KERNEL_PT_VMDATA_NUM	4	/* start with 16MB of KVM */
    188      1.1  ichiro #define NUM_KERNEL_PTS		(KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
    189      1.1  ichiro 
    190      1.1  ichiro pv_addr_t kernel_pt_table[NUM_KERNEL_PTS];
    191      1.1  ichiro 
    192      1.1  ichiro struct user *proc0paddr;
    193      1.1  ichiro 
    194      1.1  ichiro /* Prototypes */
    195      1.1  ichiro 
    196      1.1  ichiro void	consinit(void);
    197      1.1  ichiro u_int	cpu_get_control   __P((void));
    198      1.1  ichiro 
    199      1.1  ichiro /*
    200      1.1  ichiro  * Define the default console speed for the board.  This is generally
    201      1.1  ichiro  * what the firmware provided with the board defaults to.
    202      1.1  ichiro  */
    203      1.1  ichiro #ifndef CONSPEED
    204      1.1  ichiro #define CONSPEED B115200
    205      1.1  ichiro #endif /* ! CONSPEED */
    206      1.1  ichiro 
    207      1.1  ichiro #ifndef CONUNIT
    208      1.1  ichiro #define	CONUNIT	0
    209      1.1  ichiro #endif
    210      1.1  ichiro 
    211      1.1  ichiro #ifndef CONMODE
    212      1.1  ichiro #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB)) | CS8) /* 8N1 */
    213      1.1  ichiro #endif
    214      1.1  ichiro 
    215      1.1  ichiro int comcnspeed = CONSPEED;
    216      1.1  ichiro int comcnmode = CONMODE;
    217      1.1  ichiro int comcnunit = CONUNIT;
    218      1.1  ichiro 
    219      1.1  ichiro #if KGDB
    220      1.1  ichiro #ifndef KGDB_DEVNAME
    221      1.1  ichiro #error Must define KGDB_DEVNAME
    222      1.1  ichiro #endif
    223      1.1  ichiro const char kgdb_devname[] = KGDB_DEVNAME;
    224      1.1  ichiro 
    225      1.1  ichiro #ifndef KGDB_DEVADDR
    226      1.1  ichiro #error Must define KGDB_DEVADDR
    227      1.1  ichiro #endif
    228      1.1  ichiro unsigned long kgdb_devaddr = KGDB_DEVADDR;
    229      1.1  ichiro 
    230      1.1  ichiro #ifndef KGDB_DEVRATE
    231      1.1  ichiro #define KGDB_DEVRATE	CONSPEED
    232      1.1  ichiro #endif
    233      1.1  ichiro int kgdb_devrate = KGDB_DEVRATE;
    234      1.1  ichiro 
    235      1.1  ichiro #ifndef KGDB_DEVMODE
    236      1.1  ichiro #define KGDB_DEVMODE	CONMODE
    237      1.1  ichiro #endif
    238      1.1  ichiro int kgdb_devmode = KGDB_DEVMODE;
    239      1.1  ichiro #endif /* KGDB */
    240      1.1  ichiro 
    241      1.1  ichiro /*
    242      1.1  ichiro  * void cpu_reboot(int howto, char *bootstr)
    243      1.1  ichiro  *
    244      1.1  ichiro  * Reboots the system
    245      1.1  ichiro  *
    246      1.1  ichiro  * Deal with any syncing, unmounting, dumping and shutdown hooks,
    247      1.1  ichiro  * then reset the CPU.
    248      1.1  ichiro  */
    249      1.1  ichiro void
    250      1.1  ichiro cpu_reboot(int howto, char *bootstr)
    251      1.1  ichiro {
    252  1.4.2.1   skrll 	u_int32_t reg;
    253  1.4.2.1   skrll 
    254      1.1  ichiro #ifdef DIAGNOSTIC
    255      1.1  ichiro 	/* info */
    256      1.1  ichiro 	printf("boot: howto=%08x curproc=%p\n", howto, curproc);
    257      1.1  ichiro #endif
    258      1.1  ichiro 
    259      1.1  ichiro 	/*
    260      1.1  ichiro 	 * If we are still cold then hit the air brakes
    261      1.1  ichiro 	 * and crash to earth fast
    262      1.1  ichiro 	 */
    263      1.1  ichiro 	if (cold) {
    264      1.1  ichiro 		doshutdownhooks();
    265      1.1  ichiro 		printf("The operating system has halted.\n");
    266      1.1  ichiro 		printf("Please press any key to reboot.\n\n");
    267      1.1  ichiro 		cngetc();
    268      1.1  ichiro 		printf("rebooting...\n");
    269      1.1  ichiro 		goto reset;
    270      1.1  ichiro 	}
    271      1.1  ichiro 
    272      1.1  ichiro 	/* Disable console buffering */
    273      1.1  ichiro 
    274      1.1  ichiro 	/*
    275      1.1  ichiro 	 * If RB_NOSYNC was not specified sync the discs.
    276      1.1  ichiro 	 * Note: Unless cold is set to 1 here, syslogd will die during the
    277      1.1  ichiro 	 * unmount.  It looks like syslogd is getting woken up only to find
    278      1.1  ichiro 	 * that it cannot page part of the binary in as the filesystem has
    279      1.1  ichiro 	 * been unmounted.
    280      1.1  ichiro 	 */
    281      1.1  ichiro 	if (!(howto & RB_NOSYNC))
    282      1.1  ichiro 		bootsync();
    283      1.1  ichiro 
    284      1.1  ichiro 	/* Say NO to interrupts */
    285      1.1  ichiro 	splhigh();
    286      1.1  ichiro 
    287      1.1  ichiro 	/* Do a dump if requested. */
    288      1.1  ichiro 	if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
    289      1.1  ichiro 		dumpsys();
    290      1.1  ichiro 
    291      1.1  ichiro 	/* Run any shutdown hooks */
    292      1.1  ichiro 	doshutdownhooks();
    293      1.1  ichiro 
    294      1.1  ichiro 	/* Make sure IRQ's are disabled */
    295      1.1  ichiro 	IRQdisable;
    296      1.1  ichiro 
    297      1.1  ichiro 	if (howto & RB_HALT) {
    298      1.1  ichiro 		printf("The operating system has halted.\n");
    299      1.1  ichiro 		printf("Please press any key to reboot.\n\n");
    300      1.1  ichiro 		cngetc();
    301      1.1  ichiro 	}
    302      1.1  ichiro 
    303      1.1  ichiro 	printf("rebooting...\n\r");
    304      1.1  ichiro  reset:
    305      1.1  ichiro 	/*
    306      1.1  ichiro 	 * Make really really sure that all interrupts are disabled,
    307      1.1  ichiro 	 */
    308      1.1  ichiro 	(void) disable_interrupts(I32_bit|F32_bit);
    309  1.4.2.1   skrll 	IXPREG(IXP425_INT_ENABLE) = 0;
    310  1.4.2.1   skrll 
    311  1.4.2.1   skrll 	/*
    312  1.4.2.1   skrll 	 * Map the boot Flash device down at physical address 0.
    313  1.4.2.1   skrll 	 * This is safe since NetBSD runs out of an alias of
    314  1.4.2.1   skrll 	 * SDRAM at 0x10000000.
    315  1.4.2.1   skrll 	 */
    316  1.4.2.1   skrll 	reg = EXP_CSR_READ_4(ixpsip_softc, EXP_CNFG0_OFFSET);
    317  1.4.2.1   skrll 	reg |= EXP_CNFG0_MEM_MAP;
    318  1.4.2.1   skrll 	EXP_CSR_WRITE_4(ixpsip_softc, EXP_CNFG0_OFFSET, reg);
    319  1.4.2.1   skrll 
    320  1.4.2.1   skrll 	/*
    321  1.4.2.1   skrll 	 * Jump into the bootcode's reset vector
    322  1.4.2.1   skrll 	 *
    323  1.4.2.1   skrll 	 * XXX:
    324  1.4.2.1   skrll 	 * Redboot doesn't like the state in which we leave the PCI
    325  1.4.2.1   skrll 	 * ethernet card, and so fails to detect it on reboot. This
    326  1.4.2.1   skrll 	 * pretty much necessitates a hard reset/power cycle to be
    327  1.4.2.1   skrll 	 * able to download a new kernel image over ethernet.
    328  1.4.2.1   skrll 	 *
    329  1.4.2.1   skrll 	 * I suspect this is due to a bug in Redboot's i82557 driver.
    330  1.4.2.1   skrll 	 */
    331  1.4.2.1   skrll 	cpu_reset();
    332  1.4.2.1   skrll 
    333      1.1  ichiro 	/* ...and if that didn't work, just croak. */
    334      1.1  ichiro 	printf("RESET FAILED!\n");
    335      1.1  ichiro 	for (;;);
    336      1.1  ichiro }
    337      1.1  ichiro 
    338  1.4.2.1   skrll /* Static device mappings. */
    339  1.4.2.1   skrll static const struct pmap_devmap ixp425_devmap[] = {
    340  1.4.2.1   skrll 	/* Physical/Virtual address for I/O space */
    341      1.1  ichiro     {
    342  1.4.2.1   skrll 	IXP425_IO_VBASE,
    343  1.4.2.1   skrll 	IXP425_IO_HWBASE,
    344  1.4.2.1   skrll 	IXP425_IO_SIZE,
    345      1.1  ichiro 	VM_PROT_READ|VM_PROT_WRITE,
    346      1.1  ichiro 	PTE_NOCACHE,
    347      1.1  ichiro     },
    348  1.4.2.1   skrll 
    349  1.4.2.1   skrll 	/* Expansion Bus */
    350  1.4.2.1   skrll     {
    351  1.4.2.1   skrll 	IXP425_EXP_VBASE,
    352  1.4.2.1   skrll 	IXP425_EXP_HWBASE,
    353  1.4.2.1   skrll 	IXP425_EXP_SIZE,
    354  1.4.2.1   skrll 	VM_PROT_READ|VM_PROT_WRITE,
    355  1.4.2.1   skrll 	PTE_NOCACHE,
    356  1.4.2.1   skrll     },
    357  1.4.2.1   skrll 
    358  1.4.2.1   skrll 	/* IXP425 PCI Configuration */
    359  1.4.2.1   skrll     {
    360  1.4.2.1   skrll 	IXP425_PCI_VBASE,
    361  1.4.2.1   skrll 	IXP425_PCI_HWBASE,
    362  1.4.2.1   skrll 	IXP425_PCI_SIZE,
    363  1.4.2.1   skrll 	VM_PROT_READ|VM_PROT_WRITE,
    364  1.4.2.1   skrll 	PTE_NOCACHE,
    365  1.4.2.1   skrll     },
    366  1.4.2.1   skrll 
    367  1.4.2.1   skrll 	/* SDRAM Controller */
    368  1.4.2.1   skrll     {
    369  1.4.2.1   skrll 	IXP425_MCU_VBASE,
    370  1.4.2.1   skrll 	IXP425_MCU_HWBASE,
    371  1.4.2.1   skrll 	IXP425_MCU_SIZE,
    372  1.4.2.1   skrll 	VM_PROT_READ|VM_PROT_WRITE,
    373  1.4.2.1   skrll 	PTE_NOCACHE,
    374  1.4.2.1   skrll     },
    375  1.4.2.1   skrll 
    376  1.4.2.1   skrll 	/* PCI Memory Space */
    377  1.4.2.1   skrll     {
    378  1.4.2.1   skrll 	IXP425_PCI_MEM_VBASE,
    379  1.4.2.1   skrll 	IXP425_PCI_MEM_HWBASE,
    380  1.4.2.1   skrll 	IXP425_PCI_MEM_SIZE,
    381  1.4.2.1   skrll 	VM_PROT_READ|VM_PROT_WRITE,
    382  1.4.2.1   skrll 	PTE_NOCACHE,
    383  1.4.2.1   skrll     },
    384  1.4.2.1   skrll 
    385      1.1  ichiro     {
    386      1.1  ichiro 	0,
    387      1.1  ichiro 	0,
    388      1.1  ichiro 	0,
    389      1.1  ichiro 	0,
    390      1.1  ichiro 	0,
    391      1.1  ichiro     }
    392      1.1  ichiro };
    393      1.1  ichiro 
    394      1.1  ichiro /*
    395      1.1  ichiro  * u_int initarm(...)
    396      1.1  ichiro  *
    397      1.1  ichiro  * Initial entry point on startup. This gets called before main() is
    398      1.1  ichiro  * entered.
    399      1.1  ichiro  * It should be responsible for setting up everything that must be
    400      1.1  ichiro  * in place when main is called.
    401      1.1  ichiro  * This includes
    402      1.1  ichiro  *   Taking a copy of the boot configuration structure.
    403      1.1  ichiro  *   Initialising the physical console so characters can be printed.
    404      1.1  ichiro  *   Setting up page tables for the kernel
    405      1.1  ichiro  *   Relocating the kernel to the bottom of physical memory
    406      1.1  ichiro  */
    407      1.1  ichiro u_int
    408      1.1  ichiro initarm(void *arg)
    409      1.1  ichiro {
    410      1.1  ichiro 	extern vaddr_t xscale_cache_clean_addr;
    411      1.1  ichiro #ifdef DIAGNOSTIC
    412      1.1  ichiro 	extern vsize_t xscale_minidata_clean_size;
    413      1.1  ichiro #endif
    414      1.1  ichiro 	int loop;
    415      1.1  ichiro 	int loop1;
    416  1.4.2.1   skrll 	u_int kerneldatasize;
    417      1.1  ichiro 	u_int l1pagetable;
    418      1.1  ichiro 	u_int freemempos;
    419      1.1  ichiro 	pv_addr_t kernel_l1pt;
    420      1.1  ichiro 
    421      1.1  ichiro 	/*
    422      1.1  ichiro 	 * Since we map v0xf0000000 == p0xc8000000, it's possible for
    423      1.1  ichiro 	 * us to initialize the console now.
    424      1.1  ichiro 	 */
    425      1.1  ichiro 	consinit();
    426      1.1  ichiro 
    427      1.1  ichiro #ifdef VERBOSE_INIT_ARM
    428      1.1  ichiro 	/* Talk to the user */
    429  1.4.2.1   skrll 	printf("\nNetBSD/evbarm (Intel IXDP425) booting ...\n");
    430      1.1  ichiro #endif
    431      1.1  ichiro 
    432      1.1  ichiro 	/*
    433      1.1  ichiro 	 * Heads up ... Setup the CPU / MMU / TLB functions
    434      1.1  ichiro 	 */
    435      1.1  ichiro 	if (set_cpufuncs())
    436      1.1  ichiro 		panic("cpu not recognized!");
    437      1.1  ichiro 
    438      1.1  ichiro 	/* XXX overwrite bootconfig to hardcoded values */
    439      1.1  ichiro 	bootconfig.dramblocks = 1;
    440      1.1  ichiro 	bootconfig.dram[0].address = 0x10000000;
    441  1.4.2.1   skrll 	bootconfig.dram[0].pages = ixp425_sdram_size() / PAGE_SIZE;
    442      1.1  ichiro 
    443      1.1  ichiro 	kerneldatasize = (u_int32_t)&end - (u_int32_t)KERNEL_TEXT_BASE;
    444      1.1  ichiro 
    445      1.1  ichiro #ifdef VERBOSE_INIT_ARM
    446      1.1  ichiro         printf("kernsize=0x%x\n", kerneldatasize);
    447      1.1  ichiro #endif
    448      1.1  ichiro         kerneldatasize = ((kerneldatasize - 1) & ~(PAGE_SIZE * 4 - 1)) + PAGE_SIZE * 8;
    449      1.1  ichiro 
    450      1.1  ichiro 	/*
    451      1.1  ichiro 	 * Set up the variables that define the availablilty of
    452      1.1  ichiro 	 * physical memory.  For now, we're going to set
    453      1.1  ichiro 	 * physical_freestart to 0x10200000 (where the kernel
    454      1.1  ichiro 	 * was loaded), and allocate the memory we need downwards.
    455      1.1  ichiro 	 * If we get too close to the L1 table that we set up, we
    456      1.1  ichiro 	 * will panic.  We will update physical_freestart and
    457      1.1  ichiro 	 * physical_freeend later to reflect what pmap_bootstrap()
    458      1.1  ichiro 	 * wants to see.
    459      1.1  ichiro 	 *
    460      1.1  ichiro 	 * XXX pmap_bootstrap() needs an enema.
    461      1.1  ichiro 	 */
    462      1.1  ichiro 	physical_start = bootconfig.dram[0].address;
    463      1.1  ichiro 	physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE);
    464      1.1  ichiro 
    465      1.1  ichiro 	physical_freestart = physical_start
    466      1.1  ichiro                 + (KERNEL_TEXT_BASE - KERNEL_BASE) + kerneldatasize;
    467      1.1  ichiro         physical_freeend = physical_end;
    468      1.1  ichiro 
    469      1.1  ichiro 	physmem = (physical_end - physical_start) / PAGE_SIZE;
    470      1.1  ichiro 
    471      1.1  ichiro 	/* Tell the user about the memory */
    472      1.1  ichiro #ifdef VERBOSE_INIT_ARM
    473      1.1  ichiro 	printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem,
    474      1.1  ichiro 	    physical_start, physical_end - 1);
    475      1.1  ichiro 
    476      1.1  ichiro 	printf("Allocating page tables\n");
    477      1.1  ichiro #endif
    478      1.1  ichiro 	free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE;
    479      1.1  ichiro 
    480      1.1  ichiro 	freemempos = 0x10000000;
    481      1.1  ichiro 
    482      1.1  ichiro #ifdef VERBOSE_INIT_ARM
    483      1.1  ichiro         printf("physical_start = 0x%08lx, physical_end = 0x%08lx\n",
    484      1.1  ichiro                 physical_start, physical_end);
    485      1.1  ichiro #endif
    486      1.1  ichiro 
    487      1.1  ichiro 	/* Define a macro to simplify memory allocation */
    488      1.1  ichiro #define	valloc_pages(var, np)				\
    489      1.1  ichiro 	alloc_pages((var).pv_pa, (np));			\
    490      1.1  ichiro 	(var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start;
    491      1.1  ichiro 
    492      1.1  ichiro #if 0
    493      1.1  ichiro #define alloc_pages(var, np)				\
    494      1.1  ichiro 	physical_freeend -= ((np) * PAGE_SIZE);		\
    495      1.1  ichiro 	if (physical_freeend < physical_freestart)	\
    496      1.1  ichiro 		panic("initarm: out of memory");	\
    497      1.1  ichiro 	(var) = physical_freeend;			\
    498      1.1  ichiro 	free_pages -= (np);				\
    499      1.1  ichiro 	memset((char *)(var), 0, ((np) * PAGE_SIZE));
    500      1.1  ichiro #else
    501      1.1  ichiro #define alloc_pages(var, np)				\
    502      1.1  ichiro         (var) = freemempos;                             \
    503      1.1  ichiro         memset((char *)(var), 0, ((np) * PAGE_SIZE));   \
    504      1.1  ichiro         freemempos += (np) * PAGE_SIZE;
    505      1.1  ichiro #endif
    506      1.1  ichiro 
    507      1.1  ichiro 	loop1 = 0;
    508      1.1  ichiro 	kernel_l1pt.pv_pa = 0;
    509      1.1  ichiro 	for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
    510      1.1  ichiro 		/* Are we 16KB aligned for an L1 ? */
    511      1.1  ichiro 		if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0
    512      1.1  ichiro 		    && kernel_l1pt.pv_pa == 0) {
    513      1.1  ichiro 			valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
    514      1.1  ichiro 		} else {
    515      1.1  ichiro 			valloc_pages(kernel_pt_table[loop1],
    516      1.1  ichiro 			    L2_TABLE_SIZE / PAGE_SIZE);
    517      1.1  ichiro 			++loop1;
    518      1.1  ichiro 		}
    519      1.1  ichiro 	}
    520      1.1  ichiro 
    521      1.1  ichiro 	/* This should never be able to happen but better confirm that. */
    522      1.1  ichiro 	if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE-1)) != 0)
    523      1.1  ichiro 		panic("initarm: Failed to align the kernel page directory");
    524      1.1  ichiro 
    525      1.1  ichiro 	/*
    526  1.4.2.1   skrll 	 * Allocate a page for the system page.
    527      1.1  ichiro 	 * This page will just contain the system vectors and can be
    528      1.1  ichiro 	 * shared by all processes.
    529      1.1  ichiro 	 */
    530      1.1  ichiro 	alloc_pages(systempage.pv_pa, 1);
    531      1.1  ichiro 
    532      1.1  ichiro 	/* Allocate stacks for all modes */
    533      1.1  ichiro 	valloc_pages(irqstack, IRQ_STACK_SIZE);
    534      1.1  ichiro 	valloc_pages(abtstack, ABT_STACK_SIZE);
    535      1.1  ichiro 	valloc_pages(undstack, UND_STACK_SIZE);
    536      1.1  ichiro 	valloc_pages(kernelstack, UPAGES);
    537      1.1  ichiro 
    538      1.1  ichiro 	/* Allocate enough pages for cleaning the Mini-Data cache. */
    539      1.1  ichiro 	KASSERT(xscale_minidata_clean_size <= PAGE_SIZE);
    540      1.1  ichiro 	valloc_pages(minidataclean, 1);
    541      1.1  ichiro 
    542      1.1  ichiro #ifdef VERBOSE_INIT_ARM
    543      1.1  ichiro 	printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa,
    544      1.1  ichiro 	    irqstack.pv_va);
    545      1.1  ichiro 	printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa,
    546      1.1  ichiro 	    abtstack.pv_va);
    547      1.1  ichiro 	printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa,
    548      1.1  ichiro 	    undstack.pv_va);
    549      1.1  ichiro 	printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa,
    550      1.1  ichiro 	    kernelstack.pv_va);
    551      1.1  ichiro #endif
    552      1.1  ichiro 
    553      1.1  ichiro 	/*
    554      1.1  ichiro 	 * XXX Defer this to later so that we can reclaim the memory
    555      1.1  ichiro 	 * XXX used by the RedBoot page tables.
    556      1.1  ichiro 	 */
    557      1.1  ichiro 	alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE);
    558      1.1  ichiro 
    559      1.1  ichiro 	/*
    560      1.1  ichiro 	 * Ok we have allocated physical pages for the primary kernel
    561      1.1  ichiro 	 * page tables
    562      1.1  ichiro 	 */
    563      1.1  ichiro 
    564      1.1  ichiro #ifdef VERBOSE_INIT_ARM
    565      1.1  ichiro 	printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa);
    566      1.1  ichiro #endif
    567      1.1  ichiro 
    568      1.1  ichiro 	/*
    569      1.1  ichiro 	 * Now we start construction of the L1 page table
    570      1.1  ichiro 	 * We start by mapping the L2 page tables into the L1.
    571      1.1  ichiro 	 * This means that we can replace L1 mappings later on if necessary
    572      1.1  ichiro 	 */
    573      1.1  ichiro 	l1pagetable = kernel_l1pt.pv_pa;
    574      1.1  ichiro 
    575      1.1  ichiro 	/* Map the L2 pages tables in the L1 page table */
    576      1.1  ichiro 	pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH & ~(0x00400000 - 1),
    577      1.1  ichiro 	    &kernel_pt_table[KERNEL_PT_SYS]);
    578      1.1  ichiro 	for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++)
    579      1.1  ichiro 		pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000,
    580      1.1  ichiro 		    &kernel_pt_table[KERNEL_PT_KERNEL + loop]);
    581      1.1  ichiro 	for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
    582      1.1  ichiro 		pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
    583      1.1  ichiro 		    &kernel_pt_table[KERNEL_PT_VMDATA + loop]);
    584      1.1  ichiro 
    585      1.1  ichiro 	/* update the top of the kernel VM */
    586      1.1  ichiro 	pmap_curmaxkvaddr =
    587      1.1  ichiro 	    KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000);
    588      1.1  ichiro 
    589      1.1  ichiro 	pmap_link_l2pt(l1pagetable, IXP425_IO_VBASE,
    590      1.1  ichiro 	    &kernel_pt_table[KERNEL_PT_IO]);
    591      1.1  ichiro 
    592      1.1  ichiro #ifdef VERBOSE_INIT_ARM
    593      1.1  ichiro 	printf("Mapping kernel\n");
    594      1.1  ichiro #endif
    595      1.1  ichiro 
    596      1.1  ichiro 	/* Now we fill in the L2 pagetable for the kernel static code/data */
    597      1.1  ichiro 	{
    598      1.1  ichiro 		extern char etext[], _end[];
    599      1.1  ichiro 		size_t textsize = (uintptr_t) etext - KERNEL_TEXT_BASE;
    600      1.1  ichiro 		size_t totalsize = (uintptr_t) _end - KERNEL_TEXT_BASE;
    601      1.1  ichiro 		u_int logical;
    602      1.1  ichiro 
    603      1.1  ichiro 		textsize = (textsize + PGOFSET) & ~PGOFSET;
    604      1.1  ichiro 		totalsize = (totalsize + PGOFSET) & ~PGOFSET;
    605      1.1  ichiro 
    606      1.1  ichiro 		logical = 0x00200000;	/* offset of kernel in RAM */
    607      1.1  ichiro 
    608      1.1  ichiro 		logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
    609      1.1  ichiro 		    physical_start + logical, textsize,
    610      1.1  ichiro 		    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    611      1.1  ichiro 		logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
    612      1.1  ichiro 		    physical_start + logical, totalsize - textsize,
    613      1.1  ichiro 		    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    614      1.1  ichiro 	}
    615      1.1  ichiro 
    616      1.1  ichiro #ifdef VERBOSE_INIT_ARM
    617      1.1  ichiro 	printf("Constructing L2 page tables\n");
    618      1.1  ichiro #endif
    619      1.1  ichiro 
    620      1.1  ichiro 	/* Map the stack pages */
    621      1.1  ichiro 	pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
    622      1.1  ichiro 	    IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    623      1.1  ichiro 	pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
    624      1.1  ichiro 	    ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    625      1.1  ichiro 	pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
    626      1.1  ichiro 	    UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    627      1.1  ichiro 	pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
    628      1.1  ichiro 	    UPAGES * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    629      1.1  ichiro 
    630      1.1  ichiro 	pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
    631      1.1  ichiro 	    L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
    632      1.1  ichiro 
    633      1.1  ichiro 	for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
    634      1.1  ichiro 		pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va,
    635      1.1  ichiro 		    kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
    636      1.1  ichiro 		    VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
    637      1.1  ichiro 	}
    638      1.1  ichiro 
    639      1.1  ichiro 	/* Map the Mini-Data cache clean area. */
    640      1.1  ichiro 	xscale_setup_minidata(l1pagetable, minidataclean.pv_va,
    641      1.1  ichiro 	    minidataclean.pv_pa);
    642      1.1  ichiro 
    643      1.1  ichiro 	/* Map the vector page. */
    644      1.1  ichiro 	pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
    645      1.1  ichiro 	    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    646      1.1  ichiro 
    647      1.1  ichiro         /*
    648      1.1  ichiro          * Map the IXP425 registers
    649      1.1  ichiro          */
    650  1.4.2.1   skrll 	pmap_devmap_bootstrap(l1pagetable, ixp425_devmap);
    651      1.1  ichiro 
    652      1.1  ichiro 	/*
    653      1.1  ichiro 	 * Give the XScale global cache clean code an appropriately
    654      1.1  ichiro 	 * sized chunk of unmapped VA space starting at 0xff000000
    655      1.1  ichiro 	 * (our device mappings end before this address).
    656      1.1  ichiro 	 */
    657      1.1  ichiro 	xscale_cache_clean_addr = 0xff000000U;
    658      1.1  ichiro 
    659      1.1  ichiro 	/*
    660      1.1  ichiro 	 * Now we have the real page tables in place so we can switch to them.
    661      1.1  ichiro 	 * Once this is done we will be running with the REAL kernel page
    662      1.1  ichiro 	 * tables.
    663      1.1  ichiro 	 */
    664      1.1  ichiro 
    665      1.1  ichiro 	/*
    666      1.1  ichiro 	 * Update the physical_freestart/physical_freeend/free_pages
    667      1.1  ichiro 	 * variables.
    668      1.1  ichiro 	 */
    669      1.1  ichiro 	{
    670      1.1  ichiro 		extern char _end[];
    671      1.1  ichiro 
    672      1.1  ichiro 		physical_freestart = physical_start +
    673      1.1  ichiro 		    (((((uintptr_t) _end) + PGOFSET) & ~PGOFSET) -
    674      1.1  ichiro 		     KERNEL_BASE);
    675      1.1  ichiro 		physical_freeend = physical_end;
    676      1.1  ichiro 		free_pages =
    677      1.1  ichiro 		    (physical_freeend - physical_freestart) / PAGE_SIZE;
    678      1.1  ichiro 	}
    679      1.1  ichiro 
    680      1.1  ichiro 	/* Switch tables */
    681      1.1  ichiro #ifdef VERBOSE_INIT_ARM
    682      1.1  ichiro 	printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
    683      1.1  ichiro 	       physical_freestart, free_pages, free_pages);
    684      1.1  ichiro 	printf("switching to new L1 page table  @%#lx...", kernel_l1pt.pv_pa);
    685      1.1  ichiro #endif
    686      1.1  ichiro 	cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
    687      1.1  ichiro 	setttb(kernel_l1pt.pv_pa);
    688      1.1  ichiro 	cpu_tlb_flushID();
    689      1.1  ichiro 	cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
    690      1.1  ichiro 
    691      1.1  ichiro 	/*
    692      1.1  ichiro 	 * Moved from cpu_startup() as data_abort_handler() references
    693      1.1  ichiro 	 * this during uvm init
    694      1.1  ichiro 	 */
    695      1.1  ichiro 	proc0paddr = (struct user *)kernelstack.pv_va;
    696      1.1  ichiro 	lwp0.l_addr = proc0paddr;
    697      1.1  ichiro 
    698      1.1  ichiro #ifdef VERBOSE_INIT_ARM
    699      1.1  ichiro 	printf("bootstrap done.\n");
    700      1.1  ichiro #endif
    701      1.1  ichiro 
    702      1.1  ichiro 	arm32_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
    703      1.1  ichiro 
    704      1.1  ichiro 	/*
    705      1.1  ichiro 	 * Pages were allocated during the secondary bootstrap for the
    706      1.1  ichiro 	 * stacks for different CPU modes.
    707      1.1  ichiro 	 * We must now set the r13 registers in the different CPU modes to
    708      1.1  ichiro 	 * point to these stacks.
    709      1.1  ichiro 	 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
    710      1.1  ichiro 	 * of the stack memory.
    711      1.1  ichiro 	 */
    712      1.1  ichiro #ifdef VERBOSE_INIT_ARM
    713      1.1  ichiro 	printf("init subsystems: stacks ");
    714      1.1  ichiro #endif
    715      1.1  ichiro 
    716      1.1  ichiro 	set_stackptr(PSR_IRQ32_MODE,
    717      1.1  ichiro 	    irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
    718      1.1  ichiro 	set_stackptr(PSR_ABT32_MODE,
    719      1.1  ichiro 	    abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
    720      1.1  ichiro 	set_stackptr(PSR_UND32_MODE,
    721      1.1  ichiro 	    undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
    722      1.1  ichiro 
    723      1.1  ichiro 	/*
    724      1.1  ichiro 	 * Well we should set a data abort handler.
    725      1.1  ichiro 	 * Once things get going this will change as we will need a proper
    726      1.1  ichiro 	 * handler.
    727      1.1  ichiro 	 * Until then we will use a handler that just panics but tells us
    728      1.1  ichiro 	 * why.
    729      1.1  ichiro 	 * Initialisation of the vectors will just panic on a data abort.
    730      1.1  ichiro 	 * This just fills in a slighly better one.
    731      1.1  ichiro 	 */
    732      1.1  ichiro #ifdef VERBOSE_INIT_ARM
    733      1.1  ichiro 	printf("vectors ");
    734      1.1  ichiro #endif
    735      1.1  ichiro 	data_abort_handler_address = (u_int)data_abort_handler;
    736      1.1  ichiro 	prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
    737      1.1  ichiro 	undefined_handler_address = (u_int)undefinedinstruction_bounce;
    738      1.1  ichiro 
    739      1.1  ichiro 	/* Initialise the undefined instruction handlers */
    740      1.1  ichiro #ifdef VERBOSE_INIT_ARM
    741      1.1  ichiro 	printf("undefined ");
    742      1.1  ichiro #endif
    743      1.1  ichiro 	undefined_init();
    744      1.1  ichiro 
    745      1.1  ichiro 	/* Load memory into UVM. */
    746      1.1  ichiro #ifdef VERBOSE_INIT_ARM
    747      1.1  ichiro 	printf("page ");
    748      1.1  ichiro #endif
    749      1.1  ichiro 	uvm_setpagesize();	/* initialize PAGE_SIZE-dependent variables */
    750      1.1  ichiro 	uvm_page_physload(atop(physical_freestart), atop(physical_freeend),
    751      1.1  ichiro 	    atop(physical_freestart), atop(physical_freeend),
    752      1.1  ichiro 	    VM_FREELIST_DEFAULT);
    753      1.1  ichiro 
    754      1.1  ichiro 	/* Boot strap pmap telling it where the kernel page table is */
    755      1.1  ichiro #ifdef VERBOSE_INIT_ARM
    756      1.1  ichiro 	printf("pmap ");
    757      1.1  ichiro #endif
    758      1.1  ichiro 	pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, KERNEL_VM_BASE,
    759      1.1  ichiro 	    KERNEL_VM_BASE + KERNEL_VM_SIZE);
    760      1.1  ichiro 
    761      1.1  ichiro 	/* Setup the IRQ system */
    762      1.1  ichiro #ifdef VERBOSE_INIT_ARM
    763      1.1  ichiro 	printf("irq ");
    764      1.1  ichiro #endif
    765      1.1  ichiro 	ixp425_intr_init();
    766      1.1  ichiro #ifdef VERBOSE_INIT_ARM
    767      1.1  ichiro 	printf("\nAll initialize done!\nNow Starting NetBSD, Hear we go!\n");
    768      1.1  ichiro #endif
    769      1.1  ichiro 
    770      1.1  ichiro #ifdef BOOTHOWTO
    771      1.1  ichiro 	boothowto = BOOTHOWTO;
    772      1.1  ichiro #endif
    773      1.1  ichiro 
    774      1.1  ichiro #ifdef IPKDB
    775      1.1  ichiro 	/* Initialise ipkdb */
    776      1.1  ichiro 	ipkdb_init();
    777      1.1  ichiro 	if (boothowto & RB_KDB)
    778      1.1  ichiro 		ipkdb_connect(0);
    779      1.1  ichiro #endif
    780      1.1  ichiro 
    781      1.1  ichiro #if NKSYMS || defined(DDB) || defined(LKM)
    782      1.1  ichiro 	/* Firmware doesn't load symbols. */
    783      1.1  ichiro 	ksyms_init(0, NULL, NULL);
    784      1.1  ichiro #endif
    785      1.1  ichiro 
    786      1.1  ichiro #ifdef DDB
    787      1.1  ichiro 	db_machine_init();
    788      1.1  ichiro 	if (boothowto & RB_KDB)
    789      1.1  ichiro 		Debugger();
    790      1.1  ichiro #endif
    791      1.1  ichiro 
    792      1.1  ichiro 	/* We return the new stack pointer address */
    793      1.1  ichiro 	return(kernelstack.pv_va + USPACE_SVC_STACK_TOP);
    794      1.1  ichiro }
    795      1.1  ichiro 
    796      1.1  ichiro /*
    797      1.1  ichiro  * consinit
    798      1.1  ichiro  */
    799      1.1  ichiro void
    800      1.1  ichiro consinit(void)
    801      1.1  ichiro {
    802      1.1  ichiro 	static int consinit_called;
    803  1.4.2.1   skrll 	static const bus_addr_t addrs[2] = {
    804  1.4.2.1   skrll 		IXP425_UART0_HWBASE, IXP425_UART1_HWBASE
    805  1.4.2.1   skrll 	};
    806      1.1  ichiro 
    807      1.1  ichiro 	if (consinit_called != 0)
    808      1.1  ichiro 		return;
    809      1.1  ichiro 
    810      1.1  ichiro 	consinit_called = 1;
    811  1.4.2.1   skrll 
    812  1.4.2.1   skrll 	pmap_devmap_register(ixp425_devmap);
    813  1.4.2.1   skrll 
    814  1.4.2.1   skrll 	if (comcnattach(&ixp425_a4x_bs_tag, addrs[comcnunit],
    815  1.4.2.1   skrll 	    comcnspeed, IXP425_UART_FREQ, COM_TYPE_PXA2x0, comcnmode))
    816      1.4  ichiro 		panic("can't init serial console (UART%d)", comcnunit);
    817      1.1  ichiro }
    818