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ixdp425_machdep.c revision 1.46.4.1
      1  1.46.4.1  martin /*	$NetBSD: ixdp425_machdep.c,v 1.46.4.1 2023/10/14 06:52:18 martin Exp $ */
      2       1.1  ichiro /*
      3       1.1  ichiro  * Copyright (c) 2003
      4       1.1  ichiro  *	Ichiro FUKUHARA <ichiro (at) ichiro.org>.
      5       1.1  ichiro  * All rights reserved.
      6       1.1  ichiro  *
      7       1.1  ichiro  * Redistribution and use in source and binary forms, with or without
      8       1.1  ichiro  * modification, are permitted provided that the following conditions
      9       1.1  ichiro  * are met:
     10       1.1  ichiro  * 1. Redistributions of source code must retain the above copyright
     11       1.1  ichiro  *    notice, this list of conditions and the following disclaimer.
     12       1.1  ichiro  * 2. Redistributions in binary form must reproduce the above copyright
     13       1.1  ichiro  *    notice, this list of conditions and the following disclaimer in the
     14       1.1  ichiro  *    documentation and/or other materials provided with the distribution.
     15       1.1  ichiro  *
     16       1.1  ichiro  * THIS SOFTWARE IS PROVIDED BY ICHIRO FUKUHARA ``AS IS'' AND ANY EXPRESS OR
     17       1.1  ichiro  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     18       1.1  ichiro  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     19       1.1  ichiro  * IN NO EVENT SHALL ICHIRO FUKUHARA OR THE VOICES IN HIS HEAD BE LIABLE FOR
     20       1.1  ichiro  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     21       1.1  ichiro  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     22       1.1  ichiro  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     23       1.1  ichiro  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     24       1.1  ichiro  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     25       1.1  ichiro  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     26       1.1  ichiro  * SUCH DAMAGE.
     27       1.1  ichiro  */
     28       1.1  ichiro /*
     29       1.1  ichiro  * Copyright (c) 1997,1998 Mark Brinicombe.
     30       1.1  ichiro  * Copyright (c) 1997,1998 Causality Limited.
     31       1.1  ichiro  * All rights reserved.
     32       1.1  ichiro  *
     33       1.1  ichiro  * Redistribution and use in source and binary forms, with or without
     34       1.1  ichiro  * modification, are permitted provided that the following conditions
     35       1.1  ichiro  * are met:
     36       1.1  ichiro  * 1. Redistributions of source code must retain the above copyright
     37       1.1  ichiro  *    notice, this list of conditions and the following disclaimer.
     38       1.1  ichiro  * 2. Redistributions in binary form must reproduce the above copyright
     39       1.1  ichiro  *    notice, this list of conditions and the following disclaimer in the
     40       1.1  ichiro  *    documentation and/or other materials provided with the distribution.
     41       1.1  ichiro  * 3. All advertising materials mentioning features or use of this software
     42       1.1  ichiro  *    must display the following acknowledgement:
     43       1.1  ichiro  *	This product includes software developed by Mark Brinicombe
     44       1.1  ichiro  *	for the NetBSD Project.
     45       1.1  ichiro  * 4. The name of the company nor the name of the author may be used to
     46       1.1  ichiro  *    endorse or promote products derived from this software without specific
     47       1.1  ichiro  *    prior written permission.
     48       1.1  ichiro  *
     49       1.1  ichiro  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
     50       1.1  ichiro  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
     51       1.1  ichiro  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     52       1.1  ichiro  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
     53       1.1  ichiro  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     54       1.1  ichiro  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
     55       1.1  ichiro  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     56       1.1  ichiro  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     57       1.1  ichiro  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     58       1.1  ichiro  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     59       1.1  ichiro  * SUCH DAMAGE.
     60       1.1  ichiro  */
     61       1.1  ichiro 
     62      1.28     wiz /* Machine dependent functions for kernel setup for Intel IXP425 evaluation
     63       1.1  ichiro  * boards using RedBoot firmware.
     64       1.1  ichiro  */
     65       1.6   lukem 
     66       1.6   lukem #include <sys/cdefs.h>
     67  1.46.4.1  martin __KERNEL_RCSID(0, "$NetBSD: ixdp425_machdep.c,v 1.46.4.1 2023/10/14 06:52:18 martin Exp $");
     68       1.1  ichiro 
     69      1.39   skrll #include "opt_arm_debug.h"
     70      1.40   skrll #include "opt_console.h"
     71       1.1  ichiro #include "opt_ddb.h"
     72       1.1  ichiro #include "opt_kgdb.h"
     73       1.1  ichiro 
     74       1.1  ichiro #include <sys/param.h>
     75       1.1  ichiro #include <sys/device.h>
     76       1.1  ichiro #include <sys/systm.h>
     77       1.1  ichiro #include <sys/kernel.h>
     78       1.1  ichiro #include <sys/exec.h>
     79       1.1  ichiro #include <sys/proc.h>
     80       1.1  ichiro #include <sys/msgbuf.h>
     81       1.1  ichiro #include <sys/reboot.h>
     82       1.1  ichiro #include <sys/termios.h>
     83       1.1  ichiro #include <sys/ksyms.h>
     84      1.34    matt #include <sys/bus.h>
     85      1.34    matt #include <sys/cpu.h>
     86       1.1  ichiro 
     87       1.1  ichiro #include <uvm/uvm_extern.h>
     88       1.1  ichiro 
     89       1.1  ichiro #include <dev/cons.h>
     90       1.1  ichiro 
     91       1.1  ichiro #include <machine/db_machdep.h>
     92       1.1  ichiro #include <ddb/db_sym.h>
     93       1.1  ichiro #include <ddb/db_extern.h>
     94       1.1  ichiro 
     95       1.1  ichiro #include <machine/bootconfig.h>
     96      1.34    matt #include <arm/locore.h>
     97       1.1  ichiro #include <arm/undefined.h>
     98       1.1  ichiro 
     99       1.1  ichiro #include <arm/arm32/machdep.h>
    100       1.1  ichiro 
    101       1.1  ichiro #include <arm/xscale/ixp425reg.h>
    102       1.1  ichiro #include <arm/xscale/ixp425var.h>
    103       1.8     scw #include <arm/xscale/ixp425_sipvar.h>
    104       1.1  ichiro 
    105       1.9     scw #include <evbarm/ixdp425/ixdp425reg.h>
    106       1.9     scw 
    107       1.8     scw #include "com.h"
    108       1.8     scw #if NCOM > 0
    109       1.8     scw #include <dev/ic/comreg.h>
    110       1.8     scw #include <dev/ic/comvar.h>
    111       1.8     scw #endif
    112       1.1  ichiro 
    113       1.1  ichiro #include "ksyms.h"
    114       1.1  ichiro 
    115       1.1  ichiro /* Kernel text starts 2MB in from the bottom of the kernel address space. */
    116       1.1  ichiro #define	KERNEL_TEXT_BASE	(KERNEL_BASE + 0x00200000)
    117       1.1  ichiro #define	KERNEL_VM_BASE		(KERNEL_BASE + 0x01000000)
    118       1.1  ichiro 
    119       1.1  ichiro /*
    120       1.1  ichiro  * The range 0xc1000000 - 0xccffffff is available for kernel VM space
    121       1.1  ichiro  * Core-logic registers and I/O mappings occupy 0xfd000000 - 0xffffffff
    122       1.1  ichiro  */
    123       1.1  ichiro #define	KERNEL_VM_SIZE		0x0C000000
    124       1.1  ichiro 
    125       1.1  ichiro BootConfig bootconfig;		/* Boot config storage */
    126       1.1  ichiro char *boot_args = NULL;
    127       1.1  ichiro char *boot_file = NULL;
    128       1.1  ichiro 
    129      1.35    matt vaddr_t physical_start;
    130      1.35    matt vaddr_t physical_freestart;
    131      1.35    matt vaddr_t physical_freeend;
    132      1.35    matt vaddr_t physical_end;
    133       1.1  ichiro u_int free_pages;
    134       1.1  ichiro 
    135       1.1  ichiro /* Physical and virtual addresses for some global pages */
    136       1.1  ichiro pv_addr_t minidataclean;
    137       1.1  ichiro 
    138      1.35    matt paddr_t msgbufphys;
    139       1.1  ichiro 
    140       1.1  ichiro extern int end;
    141       1.1  ichiro 
    142       1.1  ichiro #define KERNEL_PT_SYS		0	/* L2 table for mapping zero page */
    143       1.1  ichiro 
    144       1.1  ichiro #define KERNEL_PT_KERNEL	1	/* L2 table for mapping kernel */
    145       1.1  ichiro #define	KERNEL_PT_KERNEL_NUM	4
    146       1.1  ichiro #define	KERNEL_PT_IO		(KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM)
    147      1.44   skrll 					/* L2 tables for mapping kernel VM */
    148       1.1  ichiro #define KERNEL_PT_VMDATA	(KERNEL_PT_IO + 1)
    149       1.1  ichiro #define	KERNEL_PT_VMDATA_NUM	4	/* start with 16MB of KVM */
    150       1.1  ichiro #define NUM_KERNEL_PTS		(KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
    151       1.1  ichiro 
    152       1.1  ichiro pv_addr_t kernel_pt_table[NUM_KERNEL_PTS];
    153       1.1  ichiro 
    154       1.1  ichiro /* Prototypes */
    155       1.1  ichiro 
    156       1.1  ichiro void	consinit(void);
    157      1.21     dsl u_int	cpu_get_control(void);
    158       1.1  ichiro 
    159       1.1  ichiro /*
    160       1.1  ichiro  * Define the default console speed for the board.  This is generally
    161       1.1  ichiro  * what the firmware provided with the board defaults to.
    162       1.1  ichiro  */
    163       1.1  ichiro #ifndef CONSPEED
    164       1.1  ichiro #define CONSPEED B115200
    165       1.1  ichiro #endif /* ! CONSPEED */
    166       1.1  ichiro 
    167       1.1  ichiro #ifndef CONUNIT
    168       1.1  ichiro #define	CONUNIT	0
    169       1.1  ichiro #endif
    170       1.1  ichiro 
    171       1.1  ichiro #ifndef CONMODE
    172       1.1  ichiro #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB)) | CS8) /* 8N1 */
    173       1.1  ichiro #endif
    174       1.1  ichiro 
    175       1.1  ichiro int comcnspeed = CONSPEED;
    176       1.1  ichiro int comcnmode = CONMODE;
    177       1.1  ichiro int comcnunit = CONUNIT;
    178       1.1  ichiro 
    179       1.1  ichiro #if KGDB
    180       1.1  ichiro #ifndef KGDB_DEVNAME
    181       1.1  ichiro #error Must define KGDB_DEVNAME
    182       1.1  ichiro #endif
    183       1.1  ichiro const char kgdb_devname[] = KGDB_DEVNAME;
    184       1.1  ichiro 
    185       1.1  ichiro #ifndef KGDB_DEVADDR
    186       1.1  ichiro #error Must define KGDB_DEVADDR
    187       1.1  ichiro #endif
    188       1.1  ichiro unsigned long kgdb_devaddr = KGDB_DEVADDR;
    189       1.1  ichiro 
    190       1.1  ichiro #ifndef KGDB_DEVRATE
    191       1.1  ichiro #define KGDB_DEVRATE	CONSPEED
    192       1.1  ichiro #endif
    193       1.1  ichiro int kgdb_devrate = KGDB_DEVRATE;
    194       1.1  ichiro 
    195       1.1  ichiro #ifndef KGDB_DEVMODE
    196       1.1  ichiro #define KGDB_DEVMODE	CONMODE
    197       1.1  ichiro #endif
    198       1.1  ichiro int kgdb_devmode = KGDB_DEVMODE;
    199       1.1  ichiro #endif /* KGDB */
    200       1.1  ichiro 
    201       1.1  ichiro /*
    202       1.1  ichiro  * void cpu_reboot(int howto, char *bootstr)
    203       1.1  ichiro  *
    204       1.1  ichiro  * Reboots the system
    205       1.1  ichiro  *
    206       1.1  ichiro  * Deal with any syncing, unmounting, dumping and shutdown hooks,
    207       1.1  ichiro  * then reset the CPU.
    208       1.1  ichiro  */
    209       1.1  ichiro void
    210       1.1  ichiro cpu_reboot(int howto, char *bootstr)
    211       1.1  ichiro {
    212      1.33   skrll 	uint32_t reg;
    213       1.9     scw 
    214       1.1  ichiro #ifdef DIAGNOSTIC
    215       1.1  ichiro 	/* info */
    216       1.1  ichiro 	printf("boot: howto=%08x curproc=%p\n", howto, curproc);
    217       1.1  ichiro #endif
    218       1.1  ichiro 
    219       1.1  ichiro 	/*
    220       1.1  ichiro 	 * If we are still cold then hit the air brakes
    221       1.1  ichiro 	 * and crash to earth fast
    222       1.1  ichiro 	 */
    223       1.1  ichiro 	if (cold) {
    224       1.1  ichiro 		doshutdownhooks();
    225      1.18  dyoung 		pmf_system_shutdown(boothowto);
    226       1.1  ichiro 		printf("The operating system has halted.\n");
    227       1.1  ichiro 		printf("Please press any key to reboot.\n\n");
    228       1.1  ichiro 		cngetc();
    229       1.1  ichiro 		printf("rebooting...\n");
    230       1.1  ichiro 		goto reset;
    231       1.1  ichiro 	}
    232       1.1  ichiro 
    233       1.1  ichiro 	/* Disable console buffering */
    234       1.1  ichiro 
    235       1.1  ichiro 	/*
    236       1.1  ichiro 	 * If RB_NOSYNC was not specified sync the discs.
    237       1.1  ichiro 	 * Note: Unless cold is set to 1 here, syslogd will die during the
    238       1.1  ichiro 	 * unmount.  It looks like syslogd is getting woken up only to find
    239       1.1  ichiro 	 * that it cannot page part of the binary in as the filesystem has
    240       1.1  ichiro 	 * been unmounted.
    241       1.1  ichiro 	 */
    242       1.1  ichiro 	if (!(howto & RB_NOSYNC))
    243       1.1  ichiro 		bootsync();
    244       1.1  ichiro 
    245       1.1  ichiro 	/* Say NO to interrupts */
    246       1.1  ichiro 	splhigh();
    247       1.1  ichiro 
    248       1.1  ichiro 	/* Do a dump if requested. */
    249       1.1  ichiro 	if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
    250       1.1  ichiro 		dumpsys();
    251      1.44   skrll 
    252       1.1  ichiro 	/* Run any shutdown hooks */
    253       1.1  ichiro 	doshutdownhooks();
    254       1.1  ichiro 
    255      1.18  dyoung 	pmf_system_shutdown(boothowto);
    256      1.18  dyoung 
    257       1.1  ichiro 	/* Make sure IRQ's are disabled */
    258       1.1  ichiro 	IRQdisable;
    259       1.1  ichiro 
    260       1.1  ichiro 	if (howto & RB_HALT) {
    261       1.1  ichiro 		printf("The operating system has halted.\n");
    262       1.1  ichiro 		printf("Please press any key to reboot.\n\n");
    263       1.1  ichiro 		cngetc();
    264       1.1  ichiro 	}
    265       1.1  ichiro 
    266       1.1  ichiro 	printf("rebooting...\n\r");
    267       1.1  ichiro  reset:
    268       1.1  ichiro 	/*
    269       1.1  ichiro 	 * Make really really sure that all interrupts are disabled,
    270       1.1  ichiro 	 */
    271       1.1  ichiro 	(void) disable_interrupts(I32_bit|F32_bit);
    272       1.9     scw 	IXPREG(IXP425_INT_ENABLE) = 0;
    273       1.9     scw 
    274       1.9     scw 	/*
    275       1.9     scw 	 * Map the boot Flash device down at physical address 0.
    276       1.9     scw 	 * This is safe since NetBSD runs out of an alias of
    277       1.9     scw 	 * SDRAM at 0x10000000.
    278       1.9     scw 	 */
    279      1.11     scw 	reg = EXP_CSR_READ_4(ixpsip_softc, EXP_CNFG0_OFFSET);
    280       1.9     scw 	reg |= EXP_CNFG0_MEM_MAP;
    281      1.11     scw 	EXP_CSR_WRITE_4(ixpsip_softc, EXP_CNFG0_OFFSET, reg);
    282       1.9     scw 
    283       1.9     scw 	/*
    284       1.9     scw 	 * Jump into the bootcode's reset vector
    285       1.9     scw 	 *
    286       1.9     scw 	 * XXX:
    287       1.9     scw 	 * Redboot doesn't like the state in which we leave the PCI
    288       1.9     scw 	 * ethernet card, and so fails to detect it on reboot. This
    289       1.9     scw 	 * pretty much necessitates a hard reset/power cycle to be
    290       1.9     scw 	 * able to download a new kernel image over ethernet.
    291       1.9     scw 	 *
    292       1.9     scw 	 * I suspect this is due to a bug in Redboot's i82557 driver.
    293       1.9     scw 	 */
    294       1.9     scw 	cpu_reset();
    295       1.9     scw 
    296       1.1  ichiro 	/* ...and if that didn't work, just croak. */
    297       1.1  ichiro 	printf("RESET FAILED!\n");
    298       1.1  ichiro 	for (;;);
    299       1.1  ichiro }
    300       1.1  ichiro 
    301       1.5  ichiro /* Static device mappings. */
    302       1.5  ichiro static const struct pmap_devmap ixp425_devmap[] = {
    303       1.7  ichiro 	/* Physical/Virtual address for I/O space */
    304       1.5  ichiro     {
    305       1.5  ichiro 	IXP425_IO_VBASE,
    306       1.5  ichiro 	IXP425_IO_HWBASE,
    307       1.5  ichiro 	IXP425_IO_SIZE,
    308       1.5  ichiro 	VM_PROT_READ|VM_PROT_WRITE,
    309       1.5  ichiro 	PTE_NOCACHE,
    310       1.5  ichiro     },
    311       1.5  ichiro 
    312       1.7  ichiro 	/* Expansion Bus */
    313       1.5  ichiro     {
    314       1.5  ichiro 	IXP425_EXP_VBASE,
    315       1.5  ichiro 	IXP425_EXP_HWBASE,
    316       1.5  ichiro 	IXP425_EXP_SIZE,
    317       1.5  ichiro 	VM_PROT_READ|VM_PROT_WRITE,
    318       1.5  ichiro 	PTE_NOCACHE,
    319       1.5  ichiro     },
    320       1.7  ichiro 
    321       1.7  ichiro 	/* IXP425 PCI Configuration */
    322       1.1  ichiro     {
    323       1.5  ichiro 	IXP425_PCI_VBASE,
    324       1.5  ichiro 	IXP425_PCI_HWBASE,
    325       1.5  ichiro 	IXP425_PCI_SIZE,
    326       1.1  ichiro 	VM_PROT_READ|VM_PROT_WRITE,
    327       1.1  ichiro 	PTE_NOCACHE,
    328       1.1  ichiro     },
    329       1.5  ichiro 
    330      1.12     scw 	/* SDRAM Controller */
    331      1.12     scw     {
    332      1.12     scw 	IXP425_MCU_VBASE,
    333      1.12     scw 	IXP425_MCU_HWBASE,
    334      1.12     scw 	IXP425_MCU_SIZE,
    335      1.12     scw 	VM_PROT_READ|VM_PROT_WRITE,
    336      1.12     scw 	PTE_NOCACHE,
    337      1.12     scw     },
    338      1.12     scw 
    339       1.7  ichiro 	/* PCI Memory Space */
    340       1.7  ichiro     {
    341       1.7  ichiro 	IXP425_PCI_MEM_VBASE,
    342       1.7  ichiro 	IXP425_PCI_MEM_HWBASE,
    343       1.7  ichiro 	IXP425_PCI_MEM_SIZE,
    344       1.7  ichiro 	VM_PROT_READ|VM_PROT_WRITE,
    345       1.7  ichiro 	PTE_NOCACHE,
    346       1.7  ichiro     },
    347       1.7  ichiro 
    348       1.1  ichiro     {
    349       1.1  ichiro 	0,
    350       1.1  ichiro 	0,
    351       1.1  ichiro 	0,
    352       1.1  ichiro 	0,
    353       1.1  ichiro 	0,
    354       1.1  ichiro     }
    355       1.1  ichiro };
    356       1.1  ichiro 
    357       1.1  ichiro /*
    358      1.43   skrll  * vaddr_t initarm(...)
    359       1.1  ichiro  *
    360       1.1  ichiro  * Initial entry point on startup. This gets called before main() is
    361       1.1  ichiro  * entered.
    362       1.1  ichiro  * It should be responsible for setting up everything that must be
    363       1.1  ichiro  * in place when main is called.
    364       1.1  ichiro  * This includes
    365       1.1  ichiro  *   Taking a copy of the boot configuration structure.
    366       1.1  ichiro  *   Initialising the physical console so characters can be printed.
    367       1.1  ichiro  *   Setting up page tables for the kernel
    368       1.1  ichiro  *   Relocating the kernel to the bottom of physical memory
    369       1.1  ichiro  */
    370      1.43   skrll vaddr_t
    371       1.1  ichiro initarm(void *arg)
    372       1.1  ichiro {
    373       1.1  ichiro 	int loop;
    374       1.1  ichiro 	int loop1;
    375      1.10     scw 	u_int kerneldatasize;
    376       1.1  ichiro 	u_int l1pagetable;
    377       1.1  ichiro 	u_int freemempos;
    378       1.1  ichiro 
    379       1.1  ichiro 	/*
    380       1.1  ichiro 	 * Since we map v0xf0000000 == p0xc8000000, it's possible for
    381       1.1  ichiro 	 * us to initialize the console now.
    382       1.1  ichiro 	 */
    383       1.1  ichiro 	consinit();
    384       1.1  ichiro 
    385       1.1  ichiro #ifdef VERBOSE_INIT_ARM
    386       1.1  ichiro 	/* Talk to the user */
    387       1.8     scw 	printf("\nNetBSD/evbarm (Intel IXDP425) booting ...\n");
    388       1.1  ichiro #endif
    389       1.1  ichiro 
    390       1.1  ichiro 	/*
    391       1.1  ichiro 	 * Heads up ... Setup the CPU / MMU / TLB functions
    392       1.1  ichiro 	 */
    393       1.1  ichiro 	if (set_cpufuncs())
    394       1.1  ichiro 		panic("cpu not recognized!");
    395       1.1  ichiro 
    396       1.1  ichiro 	/* XXX overwrite bootconfig to hardcoded values */
    397       1.1  ichiro 	bootconfig.dramblocks = 1;
    398       1.1  ichiro 	bootconfig.dram[0].address = 0x10000000;
    399      1.12     scw 	bootconfig.dram[0].pages = ixp425_sdram_size() / PAGE_SIZE;
    400       1.1  ichiro 
    401      1.33   skrll 	kerneldatasize = (uint32_t)&end - (uint32_t)KERNEL_TEXT_BASE;
    402       1.1  ichiro 
    403       1.1  ichiro #ifdef VERBOSE_INIT_ARM
    404       1.1  ichiro         printf("kernsize=0x%x\n", kerneldatasize);
    405       1.1  ichiro #endif
    406       1.1  ichiro         kerneldatasize = ((kerneldatasize - 1) & ~(PAGE_SIZE * 4 - 1)) + PAGE_SIZE * 8;
    407       1.1  ichiro 
    408       1.1  ichiro 	/*
    409      1.46  andvar 	 * Set up the variables that define the availability of
    410       1.1  ichiro 	 * physical memory.  For now, we're going to set
    411       1.1  ichiro 	 * physical_freestart to 0x10200000 (where the kernel
    412       1.1  ichiro 	 * was loaded), and allocate the memory we need downwards.
    413       1.1  ichiro 	 * If we get too close to the L1 table that we set up, we
    414       1.1  ichiro 	 * will panic.  We will update physical_freestart and
    415       1.1  ichiro 	 * physical_freeend later to reflect what pmap_bootstrap()
    416       1.1  ichiro 	 * wants to see.
    417       1.1  ichiro 	 *
    418       1.1  ichiro 	 * XXX pmap_bootstrap() needs an enema.
    419       1.1  ichiro 	 */
    420       1.1  ichiro 	physical_start = bootconfig.dram[0].address;
    421       1.1  ichiro 	physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE);
    422       1.1  ichiro 
    423       1.1  ichiro 	physical_freestart = physical_start
    424       1.1  ichiro                 + (KERNEL_TEXT_BASE - KERNEL_BASE) + kerneldatasize;
    425       1.1  ichiro         physical_freeend = physical_end;
    426       1.1  ichiro 
    427       1.1  ichiro 	physmem = (physical_end - physical_start) / PAGE_SIZE;
    428       1.1  ichiro 
    429       1.1  ichiro 	/* Tell the user about the memory */
    430       1.1  ichiro #ifdef VERBOSE_INIT_ARM
    431      1.38     ryo 	printf("physmemory: %"PRIuPSIZE" pages at 0x%08lx -> 0x%08lx\n", physmem,
    432       1.1  ichiro 	    physical_start, physical_end - 1);
    433       1.1  ichiro 
    434       1.1  ichiro 	printf("Allocating page tables\n");
    435       1.1  ichiro #endif
    436       1.1  ichiro 	free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE;
    437       1.1  ichiro 
    438       1.1  ichiro 	freemempos = 0x10000000;
    439       1.1  ichiro 
    440       1.1  ichiro #ifdef VERBOSE_INIT_ARM
    441       1.1  ichiro         printf("physical_start = 0x%08lx, physical_end = 0x%08lx\n",
    442       1.1  ichiro                 physical_start, physical_end);
    443       1.1  ichiro #endif
    444       1.1  ichiro 
    445       1.1  ichiro 	/* Define a macro to simplify memory allocation */
    446       1.1  ichiro #define	valloc_pages(var, np)				\
    447       1.1  ichiro 	alloc_pages((var).pv_pa, (np));			\
    448       1.1  ichiro 	(var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start;
    449       1.1  ichiro 
    450       1.1  ichiro #if 0
    451       1.1  ichiro #define alloc_pages(var, np)				\
    452       1.1  ichiro 	physical_freeend -= ((np) * PAGE_SIZE);		\
    453       1.1  ichiro 	if (physical_freeend < physical_freestart)	\
    454       1.1  ichiro 		panic("initarm: out of memory");	\
    455       1.1  ichiro 	(var) = physical_freeend;			\
    456       1.1  ichiro 	free_pages -= (np);				\
    457       1.1  ichiro 	memset((char *)(var), 0, ((np) * PAGE_SIZE));
    458       1.1  ichiro #else
    459       1.1  ichiro #define alloc_pages(var, np)				\
    460       1.1  ichiro         (var) = freemempos;                             \
    461       1.1  ichiro         memset((char *)(var), 0, ((np) * PAGE_SIZE));   \
    462       1.1  ichiro         freemempos += (np) * PAGE_SIZE;
    463       1.1  ichiro #endif
    464       1.1  ichiro 
    465       1.1  ichiro 	loop1 = 0;
    466       1.1  ichiro 	for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
    467       1.1  ichiro 		/* Are we 16KB aligned for an L1 ? */
    468       1.1  ichiro 		if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0
    469       1.1  ichiro 		    && kernel_l1pt.pv_pa == 0) {
    470       1.1  ichiro 			valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
    471       1.1  ichiro 		} else {
    472       1.1  ichiro 			valloc_pages(kernel_pt_table[loop1],
    473       1.1  ichiro 			    L2_TABLE_SIZE / PAGE_SIZE);
    474       1.1  ichiro 			++loop1;
    475       1.1  ichiro 		}
    476       1.1  ichiro 	}
    477       1.1  ichiro 
    478       1.1  ichiro 	/* This should never be able to happen but better confirm that. */
    479       1.1  ichiro 	if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE-1)) != 0)
    480       1.1  ichiro 		panic("initarm: Failed to align the kernel page directory");
    481       1.1  ichiro 
    482       1.1  ichiro 	/*
    483       1.8     scw 	 * Allocate a page for the system page.
    484       1.1  ichiro 	 * This page will just contain the system vectors and can be
    485       1.1  ichiro 	 * shared by all processes.
    486       1.1  ichiro 	 */
    487       1.1  ichiro 	alloc_pages(systempage.pv_pa, 1);
    488       1.1  ichiro 
    489       1.1  ichiro 	/* Allocate stacks for all modes */
    490       1.1  ichiro 	valloc_pages(irqstack, IRQ_STACK_SIZE);
    491       1.1  ichiro 	valloc_pages(abtstack, ABT_STACK_SIZE);
    492       1.1  ichiro 	valloc_pages(undstack, UND_STACK_SIZE);
    493       1.1  ichiro 	valloc_pages(kernelstack, UPAGES);
    494       1.1  ichiro 
    495       1.1  ichiro 	/* Allocate enough pages for cleaning the Mini-Data cache. */
    496       1.1  ichiro 	KASSERT(xscale_minidata_clean_size <= PAGE_SIZE);
    497       1.1  ichiro 	valloc_pages(minidataclean, 1);
    498       1.1  ichiro 
    499       1.1  ichiro #ifdef VERBOSE_INIT_ARM
    500       1.1  ichiro 	printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa,
    501      1.44   skrll 	    irqstack.pv_va);
    502       1.1  ichiro 	printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa,
    503      1.44   skrll 	    abtstack.pv_va);
    504       1.1  ichiro 	printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa,
    505      1.44   skrll 	    undstack.pv_va);
    506       1.1  ichiro 	printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa,
    507      1.44   skrll 	    kernelstack.pv_va);
    508       1.1  ichiro #endif
    509       1.1  ichiro 
    510       1.1  ichiro 	/*
    511       1.1  ichiro 	 * XXX Defer this to later so that we can reclaim the memory
    512       1.1  ichiro 	 * XXX used by the RedBoot page tables.
    513       1.1  ichiro 	 */
    514       1.1  ichiro 	alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE);
    515       1.1  ichiro 
    516       1.1  ichiro 	/*
    517       1.1  ichiro 	 * Ok we have allocated physical pages for the primary kernel
    518       1.1  ichiro 	 * page tables
    519       1.1  ichiro 	 */
    520       1.1  ichiro 
    521       1.1  ichiro #ifdef VERBOSE_INIT_ARM
    522       1.1  ichiro 	printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa);
    523       1.1  ichiro #endif
    524       1.1  ichiro 
    525       1.1  ichiro 	/*
    526       1.1  ichiro 	 * Now we start construction of the L1 page table
    527       1.1  ichiro 	 * We start by mapping the L2 page tables into the L1.
    528       1.1  ichiro 	 * This means that we can replace L1 mappings later on if necessary
    529       1.1  ichiro 	 */
    530       1.1  ichiro 	l1pagetable = kernel_l1pt.pv_pa;
    531       1.1  ichiro 
    532       1.1  ichiro 	/* Map the L2 pages tables in the L1 page table */
    533       1.1  ichiro 	pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH & ~(0x00400000 - 1),
    534       1.1  ichiro 	    &kernel_pt_table[KERNEL_PT_SYS]);
    535       1.1  ichiro 	for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++)
    536       1.1  ichiro 		pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000,
    537       1.1  ichiro 		    &kernel_pt_table[KERNEL_PT_KERNEL + loop]);
    538       1.1  ichiro 	for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
    539       1.1  ichiro 		pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
    540       1.1  ichiro 		    &kernel_pt_table[KERNEL_PT_VMDATA + loop]);
    541       1.1  ichiro 
    542       1.1  ichiro 	/* update the top of the kernel VM */
    543       1.1  ichiro 	pmap_curmaxkvaddr =
    544       1.1  ichiro 	    KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000);
    545       1.1  ichiro 
    546       1.1  ichiro 	pmap_link_l2pt(l1pagetable, IXP425_IO_VBASE,
    547       1.1  ichiro 	    &kernel_pt_table[KERNEL_PT_IO]);
    548       1.1  ichiro 
    549       1.1  ichiro #ifdef VERBOSE_INIT_ARM
    550       1.1  ichiro 	printf("Mapping kernel\n");
    551       1.1  ichiro #endif
    552       1.1  ichiro 
    553       1.1  ichiro 	/* Now we fill in the L2 pagetable for the kernel static code/data */
    554       1.1  ichiro 	{
    555       1.1  ichiro 		extern char etext[], _end[];
    556       1.1  ichiro 		size_t textsize = (uintptr_t) etext - KERNEL_TEXT_BASE;
    557       1.1  ichiro 		size_t totalsize = (uintptr_t) _end - KERNEL_TEXT_BASE;
    558       1.1  ichiro 		u_int logical;
    559       1.1  ichiro 
    560       1.1  ichiro 		textsize = (textsize + PGOFSET) & ~PGOFSET;
    561       1.1  ichiro 		totalsize = (totalsize + PGOFSET) & ~PGOFSET;
    562      1.44   skrll 
    563       1.1  ichiro 		logical = 0x00200000;	/* offset of kernel in RAM */
    564       1.1  ichiro 
    565       1.1  ichiro 		logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
    566       1.1  ichiro 		    physical_start + logical, textsize,
    567       1.1  ichiro 		    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    568       1.1  ichiro 		logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
    569       1.1  ichiro 		    physical_start + logical, totalsize - textsize,
    570       1.1  ichiro 		    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    571       1.1  ichiro 	}
    572       1.1  ichiro 
    573       1.1  ichiro #ifdef VERBOSE_INIT_ARM
    574       1.1  ichiro 	printf("Constructing L2 page tables\n");
    575       1.1  ichiro #endif
    576       1.1  ichiro 
    577       1.1  ichiro 	/* Map the stack pages */
    578       1.1  ichiro 	pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
    579       1.1  ichiro 	    IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    580       1.1  ichiro 	pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
    581       1.1  ichiro 	    ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    582       1.1  ichiro 	pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
    583       1.1  ichiro 	    UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    584       1.1  ichiro 	pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
    585       1.1  ichiro 	    UPAGES * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    586       1.1  ichiro 
    587       1.1  ichiro 	pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
    588       1.1  ichiro 	    L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
    589       1.1  ichiro 
    590       1.1  ichiro 	for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
    591       1.1  ichiro 		pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va,
    592       1.1  ichiro 		    kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
    593       1.1  ichiro 		    VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
    594       1.1  ichiro 	}
    595       1.1  ichiro 
    596       1.1  ichiro 	/* Map the Mini-Data cache clean area. */
    597       1.1  ichiro 	xscale_setup_minidata(l1pagetable, minidataclean.pv_va,
    598       1.1  ichiro 	    minidataclean.pv_pa);
    599       1.1  ichiro 
    600       1.1  ichiro 	/* Map the vector page. */
    601       1.1  ichiro 	pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
    602       1.1  ichiro 	    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
    603       1.1  ichiro 
    604       1.1  ichiro         /*
    605       1.1  ichiro          * Map the IXP425 registers
    606       1.1  ichiro          */
    607       1.5  ichiro 	pmap_devmap_bootstrap(l1pagetable, ixp425_devmap);
    608       1.1  ichiro 
    609       1.1  ichiro 	/*
    610       1.1  ichiro 	 * Give the XScale global cache clean code an appropriately
    611       1.1  ichiro 	 * sized chunk of unmapped VA space starting at 0xff000000
    612       1.1  ichiro 	 * (our device mappings end before this address).
    613       1.1  ichiro 	 */
    614       1.1  ichiro 	xscale_cache_clean_addr = 0xff000000U;
    615       1.1  ichiro 
    616       1.1  ichiro 	/*
    617       1.1  ichiro 	 * Now we have the real page tables in place so we can switch to them.
    618       1.1  ichiro 	 * Once this is done we will be running with the REAL kernel page
    619       1.1  ichiro 	 * tables.
    620       1.1  ichiro 	 */
    621       1.1  ichiro 
    622       1.1  ichiro 	/*
    623       1.1  ichiro 	 * Update the physical_freestart/physical_freeend/free_pages
    624       1.1  ichiro 	 * variables.
    625       1.1  ichiro 	 */
    626       1.1  ichiro 	{
    627       1.1  ichiro 		extern char _end[];
    628       1.1  ichiro 
    629       1.1  ichiro 		physical_freestart = physical_start +
    630       1.1  ichiro 		    (((((uintptr_t) _end) + PGOFSET) & ~PGOFSET) -
    631       1.1  ichiro 		     KERNEL_BASE);
    632       1.1  ichiro 		physical_freeend = physical_end;
    633       1.1  ichiro 		free_pages =
    634       1.1  ichiro 		    (physical_freeend - physical_freestart) / PAGE_SIZE;
    635       1.1  ichiro 	}
    636       1.1  ichiro 
    637       1.1  ichiro 	/* Switch tables */
    638       1.1  ichiro #ifdef VERBOSE_INIT_ARM
    639       1.1  ichiro 	printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
    640       1.1  ichiro 	       physical_freestart, free_pages, free_pages);
    641       1.1  ichiro 	printf("switching to new L1 page table  @%#lx...", kernel_l1pt.pv_pa);
    642       1.1  ichiro #endif
    643       1.1  ichiro 	cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
    644      1.32    matt 	cpu_setttb(kernel_l1pt.pv_pa, true);
    645       1.1  ichiro 	cpu_tlb_flushID();
    646       1.1  ichiro 	cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
    647       1.1  ichiro 
    648       1.1  ichiro 	/*
    649       1.1  ichiro 	 * Moved from cpu_startup() as data_abort_handler() references
    650       1.1  ichiro 	 * this during uvm init
    651       1.1  ichiro 	 */
    652      1.25   rmind 	uvm_lwp_setuarea(&lwp0, kernelstack.pv_va);
    653       1.1  ichiro 
    654       1.1  ichiro #ifdef VERBOSE_INIT_ARM
    655       1.1  ichiro 	printf("bootstrap done.\n");
    656       1.1  ichiro #endif
    657       1.1  ichiro 
    658       1.1  ichiro 	arm32_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
    659       1.1  ichiro 
    660       1.1  ichiro 	/*
    661       1.1  ichiro 	 * Pages were allocated during the secondary bootstrap for the
    662       1.1  ichiro 	 * stacks for different CPU modes.
    663       1.1  ichiro 	 * We must now set the r13 registers in the different CPU modes to
    664       1.1  ichiro 	 * point to these stacks.
    665       1.1  ichiro 	 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
    666       1.1  ichiro 	 * of the stack memory.
    667       1.1  ichiro 	 */
    668       1.1  ichiro #ifdef VERBOSE_INIT_ARM
    669       1.1  ichiro 	printf("init subsystems: stacks ");
    670       1.1  ichiro #endif
    671       1.1  ichiro 
    672       1.1  ichiro 	set_stackptr(PSR_IRQ32_MODE,
    673       1.1  ichiro 	    irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
    674       1.1  ichiro 	set_stackptr(PSR_ABT32_MODE,
    675       1.1  ichiro 	    abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
    676       1.1  ichiro 	set_stackptr(PSR_UND32_MODE,
    677       1.1  ichiro 	    undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
    678       1.1  ichiro 
    679       1.1  ichiro 	/*
    680       1.1  ichiro 	 * Well we should set a data abort handler.
    681       1.1  ichiro 	 * Once things get going this will change as we will need a proper
    682       1.1  ichiro 	 * handler.
    683       1.1  ichiro 	 * Until then we will use a handler that just panics but tells us
    684       1.1  ichiro 	 * why.
    685       1.1  ichiro 	 * Initialisation of the vectors will just panic on a data abort.
    686      1.13     abs 	 * This just fills in a slightly better one.
    687       1.1  ichiro 	 */
    688       1.1  ichiro #ifdef VERBOSE_INIT_ARM
    689       1.1  ichiro 	printf("vectors ");
    690       1.1  ichiro #endif
    691       1.1  ichiro 	data_abort_handler_address = (u_int)data_abort_handler;
    692       1.1  ichiro 	prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
    693       1.1  ichiro 	undefined_handler_address = (u_int)undefinedinstruction_bounce;
    694       1.1  ichiro 
    695       1.1  ichiro 	/* Initialise the undefined instruction handlers */
    696       1.1  ichiro #ifdef VERBOSE_INIT_ARM
    697       1.1  ichiro 	printf("undefined ");
    698       1.1  ichiro #endif
    699       1.1  ichiro 	undefined_init();
    700       1.1  ichiro 
    701       1.1  ichiro 	/* Load memory into UVM. */
    702       1.1  ichiro #ifdef VERBOSE_INIT_ARM
    703       1.1  ichiro 	printf("page ");
    704       1.1  ichiro #endif
    705      1.37  cherry 	uvm_md_init();
    706       1.1  ichiro 	uvm_page_physload(atop(physical_freestart), atop(physical_freeend),
    707       1.1  ichiro 	    atop(physical_freestart), atop(physical_freeend),
    708       1.1  ichiro 	    VM_FREELIST_DEFAULT);
    709       1.1  ichiro 
    710      1.41   skrll 	/* Boot strap pmap telling it where managed kernel virtual memory is */
    711       1.1  ichiro #ifdef VERBOSE_INIT_ARM
    712       1.1  ichiro 	printf("pmap ");
    713       1.1  ichiro #endif
    714      1.17    matt 	pmap_bootstrap(KERNEL_VM_BASE, KERNEL_VM_BASE + KERNEL_VM_SIZE);
    715       1.1  ichiro 
    716       1.1  ichiro 	/* Setup the IRQ system */
    717       1.1  ichiro #ifdef VERBOSE_INIT_ARM
    718       1.1  ichiro 	printf("irq ");
    719       1.1  ichiro #endif
    720       1.1  ichiro 	ixp425_intr_init();
    721       1.1  ichiro #ifdef VERBOSE_INIT_ARM
    722      1.36   skrll 	printf("\nAll initialization done!\nNow Starting NetBSD, Here we go!\n");
    723       1.1  ichiro #endif
    724       1.1  ichiro 
    725       1.1  ichiro #ifdef BOOTHOWTO
    726       1.1  ichiro 	boothowto = BOOTHOWTO;
    727       1.1  ichiro #endif
    728       1.1  ichiro 
    729       1.1  ichiro #ifdef DDB
    730       1.1  ichiro 	db_machine_init();
    731       1.1  ichiro 	if (boothowto & RB_KDB)
    732       1.1  ichiro 		Debugger();
    733       1.1  ichiro #endif
    734       1.1  ichiro 
    735       1.1  ichiro 	/* We return the new stack pointer address */
    736      1.42   skrll 	return kernelstack.pv_va + USPACE_SVC_STACK_TOP;
    737       1.1  ichiro }
    738       1.1  ichiro 
    739       1.1  ichiro /*
    740       1.1  ichiro  * consinit
    741       1.1  ichiro  */
    742       1.1  ichiro void
    743       1.1  ichiro consinit(void)
    744       1.1  ichiro {
    745       1.1  ichiro 	static int consinit_called;
    746       1.8     scw 	static const bus_addr_t addrs[2] = {
    747       1.8     scw 		IXP425_UART0_HWBASE, IXP425_UART1_HWBASE
    748       1.8     scw 	};
    749       1.1  ichiro 
    750       1.1  ichiro 	if (consinit_called != 0)
    751       1.1  ichiro 		return;
    752       1.1  ichiro 
    753       1.1  ichiro 	consinit_called = 1;
    754       1.7  ichiro 
    755       1.7  ichiro 	pmap_devmap_register(ixp425_devmap);
    756       1.7  ichiro 
    757       1.8     scw 	if (comcnattach(&ixp425_a4x_bs_tag, addrs[comcnunit],
    758       1.8     scw 	    comcnspeed, IXP425_UART_FREQ, COM_TYPE_PXA2x0, comcnmode))
    759       1.4  ichiro 		panic("can't init serial console (UART%d)", comcnunit);
    760       1.1  ichiro }
    761