ixm1200_machdep.c revision 1.17
1 /* $NetBSD: ixm1200_machdep.c,v 1.17 2003/05/03 00:39:22 thorpej Exp $ */ 2 #undef DEBUG_BEFOREMMU 3 /* 4 * Copyright (c) 2002, 2003 5 * Ichiro FUKUHARA <ichiro (at) ichiro.org>. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by Ichiro FUKUHARA. 19 * 4. The name of the company nor the name of the author may be used to 20 * endorse or promote products derived from this software without specific 21 * prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY ICHIRO FUKUHARA ``AS IS'' AND ANY EXPRESS OR 24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 26 * IN NO EVENT SHALL ICHIRO FUKUHARA OR THE VOICES IN HIS HEAD BE LIABLE FOR 27 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 */ 35 /* 36 * Copyright (c) 1997,1998 Mark Brinicombe. 37 * Copyright (c) 1997,1998 Causality Limited. 38 * All rights reserved. 39 * 40 * Redistribution and use in source and binary forms, with or without 41 * modification, are permitted provided that the following conditions 42 * are met: 43 * 1. Redistributions of source code must retain the above copyright 44 * notice, this list of conditions and the following disclaimer. 45 * 2. Redistributions in binary form must reproduce the above copyright 46 * notice, this list of conditions and the following disclaimer in the 47 * documentation and/or other materials provided with the distribution. 48 * 3. All advertising materials mentioning features or use of this software 49 * must display the following acknowledgement: 50 * This product includes software developed by Mark Brinicombe 51 * for the NetBSD Project. 52 * 4. The name of the company nor the name of the author may be used to 53 * endorse or promote products derived from this software without specific 54 * prior written permission. 55 * 56 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 57 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 58 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 59 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 60 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 61 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 62 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 63 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 64 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 65 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 66 * SUCH DAMAGE. 67 */ 68 69 #include <sys/cdefs.h> 70 __KERNEL_RCSID(0, "$NetBSD: ixm1200_machdep.c,v 1.17 2003/05/03 00:39:22 thorpej Exp $"); 71 72 #include "opt_ddb.h" 73 #include "opt_pmap_debug.h" 74 75 #include <sys/param.h> 76 #include <sys/device.h> 77 #include <sys/systm.h> 78 #include <sys/kernel.h> 79 #include <sys/exec.h> 80 #include <sys/proc.h> 81 #include <sys/msgbuf.h> 82 #include <sys/reboot.h> 83 #include <sys/termios.h> 84 #include <sys/ksyms.h> 85 86 #include <uvm/uvm_extern.h> 87 88 #include <dev/cons.h> 89 90 #include "ksyms.h" 91 92 #if NKSYMS || defined(DDB) || defined(LKM) 93 #include <machine/db_machdep.h> 94 #include <ddb/db_sym.h> 95 #include <ddb/db_extern.h> 96 #ifndef DB_ELFSIZE 97 #error Must define DB_ELFSIZE! 98 #endif 99 #define ELFSIZE DB_ELFSIZE 100 #include <sys/exec_elf.h> 101 #endif 102 103 #include <machine/bootconfig.h> 104 #include <machine/bus.h> 105 #include <machine/cpu.h> 106 #include <machine/frame.h> 107 #include <arm/undefined.h> 108 109 #include <arm/arm32/machdep.h> 110 111 #include <arm/ixp12x0/ixp12x0reg.h> 112 #include <arm/ixp12x0/ixp12x0var.h> 113 #include <arm/ixp12x0/ixp12x0_comreg.h> 114 #include <arm/ixp12x0/ixp12x0_comvar.h> 115 #include <arm/ixp12x0/ixp12x0_pcireg.h> 116 117 #include <evbarm/ixm1200/ixm1200reg.h> 118 #include <evbarm/ixm1200/ixm1200var.h> 119 120 #include "opt_ipkdb.h" 121 122 /* XXX for consinit related hacks */ 123 #include <sys/conf.h> 124 125 void ixp12x0_reset(void) __attribute__((noreturn)); 126 127 /* 128 * Address to call from cpu_reset() to reset the machine. 129 * This is machine architecture dependant as it varies depending 130 * on where the ROM appears when you turn the MMU off. 131 */ 132 133 u_int cpu_reset_address = (u_int) ixp12x0_reset; 134 135 /* 136 * Define the default console speed for the board. 137 */ 138 #ifndef CONMODE 139 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB)) | CS8) /* 8N1 */ 140 #endif 141 #ifndef CONSPEED 142 #define CONSPEED B38400 143 #endif 144 #ifndef CONADDR 145 #define CONADDR IXPCOM_UART_BASE 146 #endif 147 148 cons_decl(com); 149 cons_decl(ixpcom); 150 151 struct consdev constab[] = { 152 #if (NIXPCOM > 0) 153 cons_init(ixpcom), 154 #endif 155 { 0 }, 156 }; 157 158 /* Define various stack sizes in pages */ 159 #define IRQ_STACK_SIZE 1 160 #define ABT_STACK_SIZE 1 161 #ifdef IPKDB 162 #define UND_STACK_SIZE 2 163 #else 164 #define UND_STACK_SIZE 1 165 #endif 166 167 BootConfig bootconfig; /* Boot config storage */ 168 char *boot_args = NULL; 169 char *boot_file = NULL; 170 171 vm_offset_t physical_start; 172 vm_offset_t physical_freestart; 173 vm_offset_t physical_freeend; 174 vm_offset_t physical_end; 175 u_int free_pages; 176 vm_offset_t pagetables_start; 177 int physmem = 0; 178 179 /*int debug_flags;*/ 180 #ifndef PMAP_STATIC_L1S 181 int max_processes = 64; /* Default number */ 182 #endif /* !PMAP_STATIC_L1S */ 183 184 /* Physical and virtual addresses for some global pages */ 185 pv_addr_t systempage; 186 pv_addr_t irqstack; 187 pv_addr_t undstack; 188 pv_addr_t abtstack; 189 pv_addr_t kernelstack; 190 191 vm_offset_t msgbufphys; 192 193 extern u_int data_abort_handler_address; 194 extern u_int prefetch_abort_handler_address; 195 extern u_int undefined_handler_address; 196 extern int end; 197 198 #ifdef PMAP_DEBUG 199 extern int pmap_debug_level; 200 #endif /* PMAP_DEBUG */ 201 202 #define KERNEL_PT_SYS 0 /* Page table for mapping proc0 zero page */ 203 #define KERNEL_PT_KERNEL 1 /* Page table for mapping kernel */ 204 #define KERNEL_PT_KERNEL_NUM 2 205 #define KERNEL_PT_IO (KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM) 206 /* Page table for mapping IO */ 207 #define KERNEL_PT_VMDATA (KERNEL_PT_IO + 1) 208 /* Page tables for mapping kernel VM */ 209 #define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */ 210 #define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM) 211 212 pv_addr_t kernel_pt_table[NUM_KERNEL_PTS]; 213 214 struct user *proc0paddr; 215 216 #ifdef CPU_IXP12X0 217 #define CPU_IXP12X0_CACHE_CLEAN_SIZE (0x4000 * 2) 218 extern unsigned int ixp12x0_cache_clean_addr; 219 extern unsigned int ixp12x0_cache_clean_size; 220 static vaddr_t ixp12x0_cc_base; 221 #endif /* CPU_IXP12X0 */ 222 223 /* Prototypes */ 224 225 void consinit __P((void)); 226 u_int cpu_get_control __P((void)); 227 228 void ixdp_ixp12x0_cc_setup(void); 229 230 #ifdef DEBUG_BEFOREMMU 231 static void fakecninit(); 232 #endif 233 234 extern int db_trapper(u_int, u_int, trapframe_t *, int); 235 236 /* 237 * void cpu_reboot(int howto, char *bootstr) 238 * 239 * Reboots the system 240 * 241 * Deal with any syncing, unmounting, dumping and shutdown hooks, 242 * then reset the CPU. 243 */ 244 245 void 246 cpu_reboot(howto, bootstr) 247 int howto; 248 char *bootstr; 249 { 250 /* 251 * If we are still cold then hit the air brakes 252 * and crash to earth fast 253 */ 254 if (cold) { 255 doshutdownhooks(); 256 printf("Halted while still in the ICE age.\n"); 257 printf("The operating system has halted.\n"); 258 printf("Please press any key to reboot.\n\n"); 259 cngetc(); 260 printf("rebooting...\n"); 261 ixp12x0_reset(); 262 } 263 264 /* Disable console buffering */ 265 cnpollc(1); 266 267 /* 268 * If RB_NOSYNC was not specified sync the discs. 269 * Note: Unless cold is set to 1 here, syslogd will die during the unmount. 270 * It looks like syslogd is getting woken up only to find that it cannot 271 * page part of the binary in as the filesystem has been unmounted. 272 */ 273 if (!(howto & RB_NOSYNC)) 274 bootsync(); 275 276 /* Say NO to interrupts */ 277 splhigh(); 278 279 /* Do a dump if requested. */ 280 if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP) 281 dumpsys(); 282 283 /* Run any shutdown hooks */ 284 doshutdownhooks(); 285 286 /* Make sure IRQ's are disabled */ 287 IRQdisable; 288 289 if (howto & RB_HALT) { 290 printf("The operating system has halted.\n"); 291 printf("Please press any key to reboot.\n\n"); 292 cngetc(); 293 } 294 295 printf("rebooting...\n"); 296 297 /* all interrupts are disabled */ 298 disable_interrupts(I32_bit); 299 300 ixp12x0_reset(); 301 302 /* ...and if that didn't work, just croak. */ 303 printf("RESET FAILED!\n"); 304 for (;;); 305 } 306 307 /* 308 * Initial entry point on startup. This gets called before main() is 309 * entered. 310 * It should be responsible for setting up everything that must be 311 * in place when main is called. 312 * This includes 313 * Taking a copy of the boot configuration structure. 314 * Initialising the physical console so characters can be printed. 315 * Setting up page tables for the kernel 316 * Relocating the kernel to the bottom of physical memory 317 */ 318 u_int 319 initarm(void *arg) 320 { 321 int loop; 322 int loop1; 323 u_int kerneldatasize, symbolsize; 324 vaddr_t l1pagetable; 325 vaddr_t freemempos; 326 pv_addr_t kernel_l1pt; 327 #ifndef ARM32_PMAP_NEW 328 pv_addr_t kernel_ptpt; 329 #endif 330 #if NKSYMS || defined(DDB) || defined(LKM) 331 Elf_Shdr *sh; 332 #endif 333 334 #ifdef DEBUG_BEFOREMMU 335 /* 336 * At this point, we cannot call real consinit(). 337 * Just call a faked up version of consinit(), which does the thing 338 * with MMU disabled. 339 */ 340 fakecninit(); 341 #endif 342 /* 343 * Since we map v0xf0000000 == p0x90000000, it's possible for 344 * us to initialize the console now. 345 */ 346 consinit(); 347 348 /* Talk to the user */ 349 printf("\nNetBSD/evbarm (IXM1200) booting ...\n"); 350 351 /* 352 * Heads up ... Setup the CPU / MMU / TLB functions 353 */ 354 if (set_cpufuncs()) 355 panic("cpu not recognized!"); 356 357 /* XXX overwrite bootconfig to hardcoded values */ 358 bootconfig.dram[0].address = 0xc0000000; 359 bootconfig.dram[0].pages = 0x10000000 / PAGE_SIZE; /* SDRAM 256MB */ 360 bootconfig.dramblocks = 1; 361 362 kerneldatasize = (u_int32_t)&end - (u_int32_t)KERNEL_TEXT_BASE; 363 364 symbolsize = 0; 365 366 #ifdef PMAP_DEBUG 367 pmap_debug(-1); 368 #endif 369 370 #if NKSYMS || defined(DDB) || defined(LKM) 371 if (! memcmp(&end, "\177ELF", 4)) { 372 sh = (Elf_Shdr *)((char *)&end + ((Elf_Ehdr *)&end)->e_shoff); 373 loop = ((Elf_Ehdr *)&end)->e_shnum; 374 for(; loop; loop--, sh++) 375 if (sh->sh_offset > 0 && 376 (sh->sh_offset + sh->sh_size) > symbolsize) 377 symbolsize = sh->sh_offset + sh->sh_size; 378 } 379 #endif 380 printf("kernsize=0x%x\n", kerneldatasize); 381 kerneldatasize += symbolsize; 382 kerneldatasize = ((kerneldatasize - 1) & ~(PAGE_SIZE * 4 - 1)) + PAGE_SIZE * 8; 383 384 /* 385 * Set up the variables that define the availablilty of physcial 386 * memory 387 */ 388 physical_start = bootconfig.dram[0].address; 389 physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE); 390 391 physical_freestart = physical_start 392 + (KERNEL_TEXT_BASE - KERNEL_BASE) + kerneldatasize; 393 physical_freeend = physical_end; 394 395 physmem = (physical_end - physical_start) / PAGE_SIZE; 396 397 freemempos = 0xc0000000; 398 399 #ifdef VERBOSE_INIT_ARM 400 printf("Allocating page tables\n"); 401 #endif 402 free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE; 403 404 #ifdef VERBOSE_INIT_ARM 405 printf("CP15 Register1 = 0x%08x\n", cpu_get_control()); 406 printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n", 407 physical_freestart, free_pages, free_pages); 408 printf("physical_start = 0x%08lx, physical_end = 0x%08lx\n", 409 physical_start, physical_end); 410 #endif 411 412 /* Define a macro to simplify memory allocation */ 413 #define valloc_pages(var, np) \ 414 alloc_pages((var).pv_pa, (np)); \ 415 (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start; 416 #define alloc_pages(var, np) \ 417 (var) = freemempos; \ 418 memset((char *)(var), 0, ((np) * PAGE_SIZE)); \ 419 freemempos += (np) * PAGE_SIZE; 420 421 loop1 = 0; 422 kernel_l1pt.pv_pa = 0; 423 for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) { 424 /* Are we 16KB aligned for an L1 ? */ 425 if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0 426 && kernel_l1pt.pv_pa == 0) { 427 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE); 428 } else { 429 #ifdef ARM32_PMAP_NEW 430 valloc_pages(kernel_pt_table[loop1], 431 L2_TABLE_SIZE / PAGE_SIZE); 432 #else 433 alloc_pages(kernel_pt_table[loop1].pv_pa, 434 L2_TABLE_SIZE / PAGE_SIZE); 435 kernel_pt_table[loop1].pv_va = 436 kernel_pt_table[loop1].pv_pa; 437 #endif 438 ++loop1; 439 } 440 } 441 442 #ifdef DIAGNOSTIC 443 /* This should never be able to happen but better confirm that. */ 444 if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE-1)) != 0) 445 panic("initarm: Failed to align the kernel page directory"); 446 #endif 447 448 /* 449 * Allocate a page for the system page mapped to V0x00000000 450 * This page will just contain the system vectors and can be 451 * shared by all processes. 452 */ 453 alloc_pages(systempage.pv_pa, 1); 454 455 #ifndef ARM32_PMAP_NEW 456 /* Allocate a page for the page table to map kernel page tables. */ 457 valloc_pages(kernel_ptpt, L2_TABLE_SIZE / PAGE_SIZE); 458 #endif 459 460 /* Allocate stacks for all modes */ 461 valloc_pages(irqstack, IRQ_STACK_SIZE); 462 valloc_pages(abtstack, ABT_STACK_SIZE); 463 valloc_pages(undstack, UND_STACK_SIZE); 464 valloc_pages(kernelstack, UPAGES); 465 466 #ifdef VERBOSE_INIT_ARM 467 printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa, irqstack.pv_va); 468 printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa, abtstack.pv_va); 469 printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa, undstack.pv_va); 470 printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa, kernelstack.pv_va); 471 #endif 472 473 alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE); 474 475 #ifdef CPU_IXP12X0 476 /* 477 * XXX totally stuffed hack to work round problems introduced 478 * in recent versions of the pmap code. Due to the calls used there 479 * we cannot allocate virtual memory during bootstrap. 480 */ 481 for(;;) { 482 alloc_pages(ixp12x0_cc_base, 1); 483 if (! (ixp12x0_cc_base & (CPU_IXP12X0_CACHE_CLEAN_SIZE - 1))) 484 break; 485 } 486 { 487 vaddr_t dummy; 488 alloc_pages(dummy, CPU_IXP12X0_CACHE_CLEAN_SIZE / PAGE_SIZE - 1); 489 } 490 ixp12x0_cache_clean_addr = ixp12x0_cc_base; 491 ixp12x0_cache_clean_size = CPU_IXP12X0_CACHE_CLEAN_SIZE / 2; 492 #endif /* CPU_IXP12X0 */ 493 494 #ifdef VERBOSE_INIT_ARM 495 printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa); 496 #endif 497 498 /* 499 * Now we start construction of the L1 page table 500 * We start by mapping the L2 page tables into the L1. 501 * This means that we can replace L1 mappings later on if necessary 502 */ 503 l1pagetable = kernel_l1pt.pv_pa; 504 505 /* Map the L2 pages tables in the L1 page table */ 506 pmap_link_l2pt(l1pagetable, 0x00000000, 507 &kernel_pt_table[KERNEL_PT_SYS]); 508 509 for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++) 510 pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000, 511 &kernel_pt_table[KERNEL_PT_KERNEL + loop]); 512 513 for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++) 514 pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000, 515 &kernel_pt_table[KERNEL_PT_VMDATA + loop]); 516 #ifndef ARM32_PMAP_NEW 517 pmap_link_l2pt(l1pagetable, PTE_BASE, &kernel_ptpt); 518 #endif 519 520 /* update the top of the kernel VM */ 521 pmap_curmaxkvaddr = 522 KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000); 523 524 pmap_link_l2pt(l1pagetable, IXP12X0_IO_VBASE, 525 &kernel_pt_table[KERNEL_PT_IO]); 526 527 #ifdef VERBOSE_INIT_ARM 528 printf("Mapping kernel\n"); 529 #endif 530 531 #if XXX 532 /* Now we fill in the L2 pagetable for the kernel code/data */ 533 { 534 extern char etext[], _end[]; 535 size_t textsize = (uintptr_t) etext - KERNEL_TEXT_BASE; 536 size_t totalsize = (uintptr_t) _end - KERNEL_TEXT_BASE; 537 u_int logical; 538 539 textsize = (textsize + PGOFSET) & ~PGOFSET; 540 totalsize = (totalsize + PGOFSET) & ~PGOFSET; 541 542 logical = 0x00200000; /* offset of kernel in RAM */ 543 544 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical, 545 physical_start + logical, textsize, 546 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 547 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical, 548 physical_start + logical, totalsize - textsize, 549 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 550 } 551 #else 552 { 553 pmap_map_chunk(l1pagetable, KERNEL_TEXT_BASE, 554 KERNEL_TEXT_BASE, kerneldatasize, 555 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 556 } 557 #endif 558 559 #ifdef VERBOSE_INIT_ARM 560 printf("Constructing L2 page tables\n"); 561 #endif 562 563 /* Map the stack pages */ 564 pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa, 565 IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 566 pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa, 567 ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 568 pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa, 569 UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 570 pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa, 571 UPAGES * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 572 573 #ifndef ARM32_PMAP_NEW 574 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa, 575 L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 576 #else 577 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa, 578 L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 579 580 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) { 581 pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va, 582 kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE, 583 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 584 } 585 #endif 586 587 #ifndef ARM32_PMAP_NEW 588 /* Map the page table that maps the kernel pages */ 589 pmap_map_entry(l1pagetable, kernel_ptpt.pv_va, kernel_ptpt.pv_pa, 590 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE); 591 592 /* 593 * Map entries in the page table used to map PTE's 594 * Basically every kernel page table gets mapped here 595 */ 596 /* The -2 is slightly bogus, it should be -log2(sizeof(pt_entry_t)) */ 597 pmap_map_entry(l1pagetable, 598 PTE_BASE + (0x00000000 >> (PGSHIFT-2)), 599 kernel_pt_table[KERNEL_PT_SYS].pv_pa, 600 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 601 602 for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++) 603 pmap_map_entry(l1pagetable, 604 PTE_BASE + ((KERNEL_BASE + 605 (loop * 0x00400000)) >> (PGSHIFT-2)), 606 kernel_pt_table[KERNEL_PT_KERNEL + loop].pv_pa, 607 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 608 609 for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++) 610 pmap_map_entry(l1pagetable, 611 PTE_BASE + ((KERNEL_VM_BASE + 612 (loop * 0x00400000)) >> (PGSHIFT-2)), 613 kernel_pt_table[KERNEL_PT_VMDATA + loop].pv_pa, 614 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 615 616 pmap_map_entry(l1pagetable, 617 PTE_BASE + (PTE_BASE >> (PGSHIFT-2)), 618 kernel_ptpt.pv_pa, VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE); 619 #endif 620 621 /* Map the vector page. */ 622 pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa, 623 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 624 625 #ifdef VERBOSE_INIT_ARM 626 printf("systempage (vector page): p0x%08lx v0x%08lx\n", 627 systempage.pv_pa, vector_page); 628 #endif 629 630 /* 631 * Map the PCI I/O spaces and IXP12x0 registers 632 */ 633 634 ixp12x0_pmap_io_reg(l1pagetable); 635 636 printf("done.\n"); 637 638 /* 639 * Map the Dcache Flush page. 640 * Hw Ref Manual 3.2.4.5 Software Dcache Flush 641 */ 642 pmap_map_chunk(l1pagetable, ixp12x0_cache_clean_addr, 0xe0000000, 643 CPU_IXP12X0_CACHE_CLEAN_SIZE, VM_PROT_READ, PTE_CACHE); 644 645 /* 646 * Now we have the real page tables in place so we can switch to them. 647 * Once this is done we will be running with the REAL kernel page 648 * tables. 649 */ 650 651 /* Switch tables */ 652 #ifdef ARM32_PMAP_NEW 653 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT); 654 #endif 655 setttb(kernel_l1pt.pv_pa); 656 cpu_tlb_flushID(); 657 #ifdef ARM32_PMAP_NEW 658 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)); 659 660 /* 661 * Moved here from cpu_startup() as data_abort_handler() references 662 * this during init 663 */ 664 proc0paddr = (struct user *)kernelstack.pv_va; 665 lwp0.l_addr = proc0paddr; 666 #endif 667 668 /* 669 * We must now clean the cache again.... 670 * Cleaning may be done by reading new data to displace any 671 * dirty data in the cache. This will have happened in setttb() 672 * but since we are boot strapping the addresses used for the read 673 * may have just been remapped and thus the cache could be out 674 * of sync. A re-clean after the switch will cure this. 675 * After booting there are no gross reloations of the kernel thus 676 * this problem will not occur after initarm(). 677 */ 678 cpu_idcache_wbinv_all(); 679 680 arm32_vector_init(ARM_VECTORS_LOW, ARM_VEC_ALL); 681 682 /* 683 * Pages were allocated during the secondary bootstrap for the 684 * stacks for different CPU modes. 685 * We must now set the r13 registers in the different CPU modes to 686 * point to these stacks. 687 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 688 * of the stack memory. 689 */ 690 printf("init subsystems: stacks "); 691 692 set_stackptr(PSR_IRQ32_MODE, 693 irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE); 694 set_stackptr(PSR_ABT32_MODE, 695 abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE); 696 set_stackptr(PSR_UND32_MODE, 697 undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE); 698 #ifdef PMAP_DEBUG 699 if (pmap_debug_level >= 0) 700 printf("kstack V%08lx P%08lx\n", kernelstack.pv_va, 701 kernelstack.pv_pa); 702 #endif /* PMAP_DEBUG */ 703 704 /* 705 * Well we should set a data abort handler. 706 * Once things get going this will change as we will need a proper 707 * handler. Until then we will use a handler that just panics but 708 * tells us why. 709 * Initialisation of the vetcors will just panic on a data abort. 710 * This just fills in a slighly better one. 711 */ 712 printf("vectors "); 713 data_abort_handler_address = (u_int)data_abort_handler; 714 prefetch_abort_handler_address = (u_int)prefetch_abort_handler; 715 undefined_handler_address = (u_int)undefinedinstruction_bounce; 716 printf("\ndata_abort_handler_address = %08x\n", data_abort_handler_address); 717 printf("prefetch_abort_handler_address = %08x\n", prefetch_abort_handler_address); 718 printf("undefined_handler_address = %08x\n", undefined_handler_address); 719 720 /* Initialise the undefined instruction handlers */ 721 printf("undefined "); 722 undefined_init(); 723 724 /* Load memory into UVM. */ 725 printf("page "); 726 uvm_setpagesize(); /* initialize PAGE_SIZE-dependent variables */ 727 uvm_page_physload(atop(physical_freestart), atop(physical_freeend), 728 atop(physical_freestart), atop(physical_freeend), 729 VM_FREELIST_DEFAULT); 730 731 /* Boot strap pmap telling it where the kernel page table is */ 732 printf("pmap "); 733 #ifdef ARM32_PMAP_NEW 734 pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va); 735 #else 736 pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, kernel_ptpt); 737 #endif 738 739 /* Setup the IRQ system */ 740 printf("irq "); 741 ixp12x0_intr_init(); 742 printf("done.\n"); 743 744 #ifdef VERBOSE_INIT_ARM 745 printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n", 746 physical_freestart, free_pages, free_pages); 747 printf("freemempos=%08lx\n", freemempos); 748 printf("switching to new L1 page table @%#lx... \n", kernel_l1pt.pv_pa); 749 #endif 750 751 consinit(); 752 printf("consinit \n"); 753 754 ixdp_ixp12x0_cc_setup(); 755 756 printf("bootstrap done.\n"); 757 758 #ifdef IPKDB 759 /* Initialise ipkdb */ 760 ipkdb_init(); 761 if (boothowto & RB_KDB) 762 ipkdb_connect(0); 763 #endif /* NIPKDB */ 764 765 #if NKSYMS || defined(DDB) || defined(LKM) 766 ksyms_init(symbolsize, ((int *)&end), ((char *)&end) + symbolsize); 767 #endif 768 769 #ifdef DDB 770 { 771 static struct undefined_handler uh; 772 773 uh.uh_handler = db_trapper; 774 install_coproc_handler_static(0, &uh); 775 } 776 777 if (boothowto & RB_KDB) 778 Debugger(); 779 #endif 780 781 /* We return the new stack pointer address */ 782 return(kernelstack.pv_va + USPACE_SVC_STACK_TOP); 783 } 784 785 void 786 consinit(void) 787 { 788 extern struct bus_space ixpsip_bs_tag; 789 static int consinit_called = 0; 790 791 if (consinit_called != 0) 792 return; 793 794 consinit_called = 1; 795 796 if (ixpcomcnattach(&ixpsip_bs_tag, 797 IXPCOM_UART_HWBASE, IXPCOM_UART_VBASE, 798 CONSPEED, CONMODE)) 799 panic("can't init serial console @%lx", IXPCOM_UART_HWBASE); 800 } 801 802 #ifdef DEBUG_BEFOREMMU 803 cons_decl(ixpcom); 804 void 805 fakecninit() 806 { 807 static struct consdev fakecntab = cons_init(ixpcom); 808 cn_tab = &fakecntab; 809 810 (*cn_tab->cn_init)(0); 811 cn_tab->cn_pri = CN_REMOTE; 812 } 813 #endif 814 815 /* 816 * For optimal cache cleaning we need two 16K banks of 817 * virtual address space that NOTHING else will access 818 * and then we alternate the cache cleaning between the 819 * two banks. 820 * The cache cleaning code requires requires 2 banks aligned 821 * on total size boundry so the banks can be alternated by 822 * eorring the size bit (assumes the bank size is a power of 2) 823 */ 824 void 825 ixdp_ixp12x0_cc_setup(void) 826 { 827 int loop; 828 paddr_t kaddr; 829 pt_entry_t *pte; 830 831 (void) pmap_extract(pmap_kernel(), KERNEL_TEXT_BASE, &kaddr); 832 for (loop = 0; loop < CPU_IXP12X0_CACHE_CLEAN_SIZE; loop += PAGE_SIZE) { 833 pte = vtopte(ixp12x0_cc_base + loop); 834 *pte = L2_S_PROTO | kaddr | 835 L2_S_PROT(PTE_KERNEL, VM_PROT_READ) | pte_l2_s_cache_mode; 836 PTE_SYNC(pte); 837 } 838 ixp12x0_cache_clean_addr = ixp12x0_cc_base; 839 ixp12x0_cache_clean_size = CPU_IXP12X0_CACHE_CLEAN_SIZE / 2; 840 } 841
Indexes created Thu Oct 02 14:10:14 GMT 2025