1 1.13 jmcneill /* $NetBSD: ixm1200_pci.c,v 1.13 2018/11/16 15:06:23 jmcneill Exp $ */ 2 1.3 ichiro #define PCI_DEBUG 3 1.1 ichiro /* 4 1.3 ichiro * Copyright (c) 2002, 2003 5 1.1 ichiro * Ichiro FUKUHARA <ichiro (at) ichiro.org>. 6 1.1 ichiro * All rights reserved. 7 1.1 ichiro * 8 1.1 ichiro * Redistribution and use in source and binary forms, with or without 9 1.1 ichiro * modification, are permitted provided that the following conditions 10 1.1 ichiro * are met: 11 1.1 ichiro * 1. Redistributions of source code must retain the above copyright 12 1.1 ichiro * notice, this list of conditions and the following disclaimer. 13 1.1 ichiro * 2. Redistributions in binary form must reproduce the above copyright 14 1.1 ichiro * notice, this list of conditions and the following disclaimer in the 15 1.1 ichiro * documentation and/or other materials provided with the distribution. 16 1.1 ichiro * 17 1.1 ichiro * THIS SOFTWARE IS PROVIDED BY ICHIRO FUKUHARA ``AS IS'' AND ANY EXPRESS OR 18 1.1 ichiro * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 1.1 ichiro * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 1.1 ichiro * IN NO EVENT SHALL ICHIRO FUKUHARA OR THE VOICES IN HIS HEAD BE LIABLE FOR 21 1.1 ichiro * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 1.1 ichiro * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 1.1 ichiro * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 1.1 ichiro * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 1.1 ichiro * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 1.1 ichiro * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 1.1 ichiro * SUCH DAMAGE. 28 1.1 ichiro */ 29 1.4 igy 30 1.4 igy #include <sys/cdefs.h> 31 1.13 jmcneill __KERNEL_RCSID(0, "$NetBSD: ixm1200_pci.c,v 1.13 2018/11/16 15:06:23 jmcneill Exp $"); 32 1.1 ichiro 33 1.1 ichiro /* 34 1.1 ichiro * IXM1200 PCI interrupt support. 35 1.1 ichiro */ 36 1.1 ichiro 37 1.1 ichiro #include <sys/param.h> 38 1.1 ichiro #include <sys/systm.h> 39 1.1 ichiro #include <sys/device.h> 40 1.1 ichiro 41 1.1 ichiro #include <machine/autoconf.h> 42 1.9 dyoung #include <sys/bus.h> 43 1.1 ichiro 44 1.1 ichiro #include <evbarm/ixm1200/ixm1200reg.h> 45 1.1 ichiro #include <evbarm/ixm1200/ixm1200var.h> 46 1.1 ichiro 47 1.1 ichiro #include <arm/ixp12x0/ixp12x0reg.h> 48 1.1 ichiro #include <arm/ixp12x0/ixp12x0var.h> 49 1.1 ichiro 50 1.1 ichiro #include <arm/ixp12x0/ixp12x0_pcireg.h> 51 1.1 ichiro 52 1.1 ichiro #include <dev/pci/pcidevs.h> 53 1.1 ichiro #include <dev/pci/ppbreg.h> 54 1.1 ichiro 55 1.8 dyoung int ixm1200_pci_intr_map(const struct pci_attach_args *, pci_intr_handle_t *); 56 1.11 christos const char *ixm1200_pci_intr_string(void *, pci_intr_handle_t, char *, size_t); 57 1.1 ichiro const struct evcnt *ixm1200_pci_intr_evcnt(void *, pci_intr_handle_t); 58 1.1 ichiro void *ixm1200_pci_intr_establish(void *, pci_intr_handle_t, int, 59 1.13 jmcneill int (*func)(void *), void *, const char *); 60 1.1 ichiro void ixm1200_pci_intr_disestablish(void *, void *); 61 1.1 ichiro 62 1.1 ichiro void 63 1.5 dsl ixm1200_pci_init(pci_chipset_tag_t pc, void *cookie) 64 1.1 ichiro { 65 1.1 ichiro pc->pc_intr_v = cookie; 66 1.1 ichiro pc->pc_intr_map = ixm1200_pci_intr_map; 67 1.1 ichiro pc->pc_intr_string = ixm1200_pci_intr_string; 68 1.1 ichiro pc->pc_intr_evcnt = ixm1200_pci_intr_evcnt; 69 1.1 ichiro pc->pc_intr_establish = ixm1200_pci_intr_establish; 70 1.1 ichiro pc->pc_intr_disestablish = ixm1200_pci_intr_disestablish; 71 1.1 ichiro } 72 1.1 ichiro 73 1.1 ichiro int 74 1.8 dyoung ixm1200_pci_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp) 75 1.1 ichiro { 76 1.1 ichiro #ifdef PCI_DEBUG 77 1.1 ichiro void *v = pa->pa_pc; 78 1.3 ichiro int pin = pa->pa_intrpin; 79 1.3 ichiro int line = pa->pa_intrline; 80 1.3 ichiro int dev=pa->pa_device; 81 1.1 ichiro pcitag_t intrtag = pa->pa_intrtag; 82 1.1 ichiro 83 1.1 ichiro printf("ixm1200_pci_intr_map: v=%p, tag=%08lx intrpin=%d line=%d dev=%d\n", 84 1.3 ichiro v, intrtag, pin, line, dev); 85 1.1 ichiro #endif 86 1.1 ichiro 87 1.3 ichiro /* ixp12x0 has only one interrupt line for PCI */ 88 1.1 ichiro *ihp = IXPPCI_INTR_PIL; 89 1.1 ichiro return (0); 90 1.1 ichiro } 91 1.1 ichiro 92 1.1 ichiro const char * 93 1.11 christos ixm1200_pci_intr_string(void *v, pci_intr_handle_t ih, char *buf, size_t len) 94 1.1 ichiro { 95 1.12 jmcneill snprintf(buf, len, "IXM1200 irq %" PRIu64, ih); 96 1.11 christos return buf; 97 1.1 ichiro } 98 1.1 ichiro 99 1.1 ichiro const struct evcnt * 100 1.5 dsl ixm1200_pci_intr_evcnt(void *v, pci_intr_handle_t ih) 101 1.1 ichiro { 102 1.1 ichiro return (NULL); 103 1.1 ichiro } 104 1.1 ichiro 105 1.1 ichiro void * 106 1.13 jmcneill ixm1200_pci_intr_establish(void *v, pci_intr_handle_t ih, int ipl, int (*func)(void *), 107 1.13 jmcneill void *arg, const char *xname) 108 1.1 ichiro { 109 1.3 ichiro #ifdef PCI_DEBUG 110 1.13 jmcneill printf("ixm1200_pci_intr_establish(v=%p, irq=%d, ipl=%d, func=%p, arg=%p, xname=%s)\n", 111 1.13 jmcneill v, (int) ih, ipl, func, arg, xname); 112 1.3 ichiro #endif 113 1.3 ichiro 114 1.1 ichiro return (ixp12x0_intr_establish(ih, ipl, func, arg)); 115 1.1 ichiro } 116 1.1 ichiro 117 1.1 ichiro void 118 1.1 ichiro ixm1200_pci_intr_disestablish(void *v, void *cookie) 119 1.1 ichiro { 120 1.3 ichiro #ifdef PCI_DEBUG 121 1.3 ichiro printf("ixm1200_pci_intr_disestablish(v=%p, cookie=%p)\n", 122 1.3 ichiro v, cookie); 123 1.3 ichiro #endif 124 1.3 ichiro 125 1.1 ichiro ixp12x0_intr_disestablish(cookie); 126 1.1 ichiro } 127