1 1.2 rmind /* $NetBSD: ixm1200reg.h,v 1.2 2009/10/21 14:15:51 rmind Exp $ */ 2 1.1 ichiro /* 3 1.1 ichiro * Copyright (c) 2002 4 1.1 ichiro * Ichiro FUKUHARA <ichiro (at) ichiro.org>. 5 1.1 ichiro * All rights reserved. 6 1.1 ichiro * 7 1.1 ichiro * Redistribution and use in source and binary forms, with or without 8 1.1 ichiro * modification, are permitted provided that the following conditions 9 1.1 ichiro * are met: 10 1.1 ichiro * 1. Redistributions of source code must retain the above copyright 11 1.1 ichiro * notice, this list of conditions and the following disclaimer. 12 1.1 ichiro * 2. Redistributions in binary form must reproduce the above copyright 13 1.1 ichiro * notice, this list of conditions and the following disclaimer in the 14 1.1 ichiro * documentation and/or other materials provided with the distribution. 15 1.1 ichiro * 16 1.1 ichiro * THIS SOFTWARE IS PROVIDED BY ICHIRO FUKUHARA ``AS IS'' AND ANY EXPRESS OR 17 1.1 ichiro * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 1.1 ichiro * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 1.1 ichiro * IN NO EVENT SHALL ICHIRO FUKUHARA OR THE VOICES IN HIS HEAD BE LIABLE FOR 20 1.1 ichiro * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 1.1 ichiro * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 1.1 ichiro * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 1.1 ichiro * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 1.1 ichiro * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 1.1 ichiro * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 1.1 ichiro * SUCH DAMAGE. 27 1.1 ichiro */ 28 1.1 ichiro 29 1.1 ichiro #ifndef _IXM1200REG_H_ 30 1.1 ichiro #define _IXM1200REG_H_ 31 1.1 ichiro 32 1.1 ichiro /* 33 1.1 ichiro * Memory map and register definitions for the Intel IXM1200 34 1.1 ichiro * Evaluation Board. 35 1.1 ichiro */ 36 1.1 ichiro 37 1.1 ichiro /* Virtual address for SlowPort I/O space */ 38 1.1 ichiro #define IXM1200_SLOWPORT_VBASE (IXP12X0_PCI_IO_VBASE + IXP12X0_PCI_IO_SIZE) 39 1.1 ichiro /* va=0xf0021000 */ 40 1.1 ichiro 41 1.1 ichiro /* 42 1.1 ichiro * Slow Port I/O 43 1.1 ichiro */ 44 1.1 ichiro 45 1.1 ichiro /* Status LEDs (4x2 bits) write-only */ 46 1.1 ichiro #define IXM1200_LED_VADDR IXM1200_SLOWPORT_VBASE 47 1.1 ichiro #define IXM1200_LED_ADDR_SIZE 0x1000 48 1.1 ichiro #define IXM1200_LED_ADDR 0x38508000 49 1.1 ichiro 50 1.1 ichiro /* Dip Switches (4 Bits) read-only */ 51 1.1 ichiro #define IXM1200_DIP_VADDR (IXM1200_SLOWPORT_VBASE + IXM1200_LED_VADDR_SIZE) 52 1.1 ichiro #define IXM1200_DIP_ADDR_SIZE 0x1000 53 1.1 ichiro #define IXM1200_DIP_ADDR 0x38509000 54 1.1 ichiro 55 1.1 ichiro /* Board Revision, read-only */ 56 1.1 ichiro #define IXM1200_REV_ADDR 0x3850A000 57 1.1 ichiro 58 1.1 ichiro /* SDRAM Address Width, read-only */ 59 1.1 ichiro #define IXM1200_SDRAM_WIDTH 0x3850B000 60 1.1 ichiro 61 1.1 ichiro /* MAC0(IXF440 Multiport 10/100Mbps Ethernet Cont. ) */ 62 1.1 ichiro 63 1.1 ichiro /* PCI Configuration Cycles */ 64 1.1 ichiro #define IXM1200_PCI_CYCLE_SIZE 0x00000100 65 1.1 ichiro 66 1.1 ichiro /* IXP1200, IDSEL=A11 */ 67 1.1 ichiro #define IXM1200_CYCLE_ADDR 0x00000800 68 1.1 ichiro #define IXM1200_CYCLE_SIZE IXM1200_PCI_CYCLE_SIZE 69 1.1 ichiro 70 1.1 ichiro /* PCIBridge, IDSEL=A12 */ 71 1.1 ichiro #define IXM1200_PB_CYCLE_ADDR 0x00001000 72 1.1 ichiro #define IXM1200_PB_CYCLE_SIZE IXM1200_PCI_CYCLE_SIZE 73 1.1 ichiro 74 1.1 ichiro /* Ether MAC/PHY, IDSEL=A13 */ 75 1.1 ichiro #define IXM1200_MAC_CYCLE_ADDR 0x00002000 76 1.1 ichiro #define IXM1200_MAC_CYCLE_SIZE IXM1200_PCI_CYCLE_SIZE 77 1.1 ichiro 78 1.1 ichiro /* PMC Expansion, IDSEL=A14 */ 79 1.1 ichiro #define IXM1200_PMC_CYCLE_ADDR 0x00002000 80 1.1 ichiro #define IXM1200_MAC_CYCLE_SIZE IXM1200_PCI_CYCLE_SIZE 81 1.1 ichiro 82 1.1 ichiro #endif /* _IXM1200REG_H_ */ 83
Indexes created Thu Oct 02 14:10:14 GMT 2025