ixm1200reg.h revision 1.1
1 /* $NetBSD: ixm1200reg.h,v 1.1 2002/07/15 17:13:33 ichiro Exp $ */ 2 /* 3 * Copyright (c) 2002 4 * Ichiro FUKUHARA <ichiro (at) ichiro.org>. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Ichiro FUKUHARA. 18 * 4. The name of the company nor the name of the author may be used to 19 * endorse or promote products derived from this software without specific 20 * prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY ICHIRO FUKUHARA ``AS IS'' AND ANY EXPRESS OR 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 25 * IN NO EVENT SHALL ICHIRO FUKUHARA OR THE VOICES IN HIS HEAD BE LIABLE FOR 26 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 */ 34 35 #ifndef _IXM1200REG_H_ 36 #define _IXM1200REG_H_ 37 38 /* 39 * Memory map and register definitions for the Intel IXM1200 40 * Evaluation Board. 41 */ 42 43 /* Virtual address for SlowPort I/O space */ 44 #define IXM1200_SLOWPORT_VBASE (IXP12X0_PCI_IO_VBASE + IXP12X0_PCI_IO_SIZE) 45 /* va=0xf0021000 */ 46 47 /* 48 * Slow Port I/O 49 */ 50 51 /* Status LEDs (4x2 bits) write-only */ 52 #define IXM1200_LED_VADDR IXM1200_SLOWPORT_VBASE 53 #define IXM1200_LED_ADDR_SIZE 0x1000 54 #define IXM1200_LED_ADDR 0x38508000 55 56 /* Dip Switches (4 Bits) read-only */ 57 #define IXM1200_DIP_VADDR (IXM1200_SLOWPORT_VBASE + IXM1200_LED_VADDR_SIZE) 58 #define IXM1200_DIP_ADDR_SIZE 0x1000 59 #define IXM1200_DIP_ADDR 0x38509000 60 61 /* Board Revision, read-only */ 62 #define IXM1200_REV_ADDR 0x3850A000 63 64 /* SDRAM Address Width, read-only */ 65 #define IXM1200_SDRAM_WIDTH 0x3850B000 66 67 /* MAC0(IXF440 Multiport 10/100Mbps Ethernet Cont. ) */ 68 69 /* PCI Configuration Cycles */ 70 #define IXM1200_PCI_CYCLE_SIZE 0x00000100 71 72 /* IXP1200, IDSEL=A11 */ 73 #define IXM1200_CYCLE_ADDR 0x00000800 74 #define IXM1200_CYCLE_SIZE IXM1200_PCI_CYCLE_SIZE 75 76 /* PCIBridge, IDSEL=A12 */ 77 #define IXM1200_PB_CYCLE_ADDR 0x00001000 78 #define IXM1200_PB_CYCLE_SIZE IXM1200_PCI_CYCLE_SIZE 79 80 /* Ether MAC/PHY, IDSEL=A13 */ 81 #define IXM1200_MAC_CYCLE_ADDR 0x00002000 82 #define IXM1200_MAC_CYCLE_SIZE IXM1200_PCI_CYCLE_SIZE 83 84 /* PMC Expansion, IDSEL=A14 */ 85 #define IXM1200_PMC_CYCLE_ADDR 0x00002000 86 #define IXM1200_MAC_CYCLE_SIZE IXM1200_PCI_CYCLE_SIZE 87 88 #endif /* _IXM1200REG_H_ */ 89
Indexes created Fri Oct 03 02:09:57 GMT 2025