ixp12x0_mainbus.c revision 1.10
11.10Schs/* $NetBSD: ixp12x0_mainbus.c,v 1.10 2012/10/27 17:17:48 chs Exp $ */ 21.1Sichiro/* 31.1Sichiro * Copyright (c) 2002 41.1Sichiro * Ichiro FUKUHARA <ichiro@ichiro.org>. 51.1Sichiro * All rights reserved. 61.1Sichiro * 71.1Sichiro * Redistribution and use in source and binary forms, with or without 81.1Sichiro * modification, are permitted provided that the following conditions 91.1Sichiro * are met: 101.1Sichiro * 1. Redistributions of source code must retain the above copyright 111.1Sichiro * notice, this list of conditions and the following disclaimer. 121.1Sichiro * 2. Redistributions in binary form must reproduce the above copyright 131.1Sichiro * notice, this list of conditions and the following disclaimer in the 141.1Sichiro * documentation and/or other materials provided with the distribution. 151.1Sichiro * 161.1Sichiro * THIS SOFTWARE IS PROVIDED BY ICHIRO FUKUHARA ``AS IS'' AND ANY EXPRESS OR 171.1Sichiro * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 181.1Sichiro * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 191.1Sichiro * IN NO EVENT SHALL ICHIRO FUKUHARA OR THE VOICES IN HIS HEAD BE LIABLE FOR 201.1Sichiro * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 211.1Sichiro * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 221.1Sichiro * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 231.1Sichiro * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 241.1Sichiro * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 251.1Sichiro * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 261.1Sichiro * SUCH DAMAGE. 271.1Sichiro */ 281.5Sigy 291.5Sigy#include <sys/cdefs.h> 301.10Schs__KERNEL_RCSID(0, "$NetBSD: ixp12x0_mainbus.c,v 1.10 2012/10/27 17:17:48 chs Exp $"); 311.1Sichiro 321.1Sichiro/* 331.1Sichiro * front-end for the ixp12x0 I/O Processor. 341.1Sichiro */ 351.1Sichiro 361.1Sichiro#include <sys/param.h> 371.1Sichiro#include <sys/systm.h> 381.1Sichiro#include <sys/device.h> 391.1Sichiro 401.1Sichiro#include <machine/autoconf.h> 411.9Sdyoung#include <sys/bus.h> 421.1Sichiro 431.1Sichiro#include <evbarm/ixm1200/ixm1200reg.h> 441.1Sichiro#include <evbarm/ixm1200/ixm1200var.h> 451.1Sichiro 461.1Sichiro#include <arm/ixp12x0/ixp12x0reg.h> 471.1Sichiro#include <arm/ixp12x0/ixp12x0var.h> 481.1Sichiro 491.1Sichiro#include "locators.h" 501.1Sichiro 511.10Schsstatic int ixp12x0_mainbus_match(device_t, cfdata_t, void *); 521.10Schsstatic void ixp12x0_mainbus_attach(device_t, device_t, void *); 531.1Sichiro 541.10SchsCFATTACH_DECL_NEW(ixpio_mainbus, sizeof(struct ixp12x0_softc), 551.3Sthorpej ixp12x0_mainbus_match, ixp12x0_mainbus_attach, NULL, NULL); 561.1Sichiro 571.1Sichiroextern struct bus_space ixp12x0_bs_tag; 581.1Sichiro 591.1Sichiroint 601.10Schsixp12x0_mainbus_match(device_t parent, cfdata_t cf, void *aux) 611.1Sichiro{ 621.1Sichiro return (1); 631.1Sichiro} 641.1Sichiro 651.1Sichirovoid 661.10Schsixp12x0_mainbus_attach(device_t parent, device_t self, void *aux) 671.1Sichiro{ 681.10Schs struct ixp12x0_softc *sc = device_private(self); 691.10Schs 701.10Schs sc->sc_dev = self; 711.1Sichiro 721.1Sichiro /* 731.1Sichiro * Initialize the interrupt part of our PCI chipset tag 741.1Sichiro */ 751.1Sichiro ixm1200_pci_init(&sc->ia_pci_chipset, sc); 761.1Sichiro 771.1Sichiro ixp12x0_attach(sc); 781.1Sichiro} 79