kobo_machdep.c revision 1.5
1 /* $NetBSD: kobo_machdep.c,v 1.5 2018/09/21 12:04:09 skrll Exp $ */ 2 3 /* 4 * Copyright (c) 2002, 2003, 2005, 2010 Genetec Corporation. 5 * All rights reserved. 6 * Written by Hiroyuki Bessho for Genetec Corporation. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 19 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION 21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 * POSSIBILITY OF SUCH DAMAGE. 28 * 29 * Machine dependent functions for kernel setup for RAKUTEN Kobo. 30 * Based on iq80310_machhdep.c 31 */ 32 /* 33 * Copyright (c) 2001 Wasabi Systems, Inc. 34 * All rights reserved. 35 * 36 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 37 * 38 * Redistribution and use in source and binary forms, with or without 39 * modification, are permitted provided that the following conditions 40 * are met: 41 * 1. Redistributions of source code must retain the above copyright 42 * notice, this list of conditions and the following disclaimer. 43 * 2. Redistributions in binary form must reproduce the above copyright 44 * notice, this list of conditions and the following disclaimer in the 45 * documentation and/or other materials provided with the distribution. 46 * 3. All advertising materials mentioning features or use of this software 47 * must display the following acknowledgement: 48 * This product includes software developed for the NetBSD Project by 49 * Wasabi Systems, Inc. 50 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 51 * or promote products derived from this software without specific prior 52 * written permission. 53 * 54 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 55 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 56 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 57 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 58 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 59 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 60 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 61 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 62 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 63 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 64 * POSSIBILITY OF SUCH DAMAGE. 65 */ 66 67 /* 68 * Copyright (c) 1997,1998 Mark Brinicombe. 69 * Copyright (c) 1997,1998 Causality Limited. 70 * All rights reserved. 71 * 72 * Redistribution and use in source and binary forms, with or without 73 * modification, are permitted provided that the following conditions 74 * are met: 75 * 1. Redistributions of source code must retain the above copyright 76 * notice, this list of conditions and the following disclaimer. 77 * 2. Redistributions in binary form must reproduce the above copyright 78 * notice, this list of conditions and the following disclaimer in the 79 * documentation and/or other materials provided with the distribution. 80 * 3. All advertising materials mentioning features or use of this software 81 * must display the following acknowledgement: 82 * This product includes software developed by Mark Brinicombe 83 * for the NetBSD Project. 84 * 4. The name of the company nor the name of the author may be used to 85 * endorse or promote products derived from this software without specific 86 * prior written permission. 87 * 88 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 89 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 90 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 91 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 92 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 93 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 94 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 95 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 96 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 97 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 98 * SUCH DAMAGE. 99 * 100 * Machine dependent functions for kernel setup for Intel IQ80310 evaluation 101 * boards using RedBoot firmware. 102 */ 103 104 #include <sys/cdefs.h> 105 __KERNEL_RCSID(0, "$NetBSD: kobo_machdep.c,v 1.5 2018/09/21 12:04:09 skrll Exp $"); 106 107 #include "opt_evbarm_boardtype.h" 108 #include "opt_arm_debug.h" 109 #include "opt_console.h" 110 #include "opt_cputypes.h" 111 #include "opt_ddb.h" 112 #include "opt_kgdb.h" 113 #include "opt_md.h" 114 #include "opt_com.h" 115 #include "imxuart.h" 116 #include "opt_imxuart.h" 117 #include "opt_imx.h" 118 #include "opt_machdep.h" 119 120 #include <sys/param.h> 121 #include <sys/device.h> 122 #include <sys/reboot.h> 123 #include <sys/termios.h> 124 #include <sys/bus.h> 125 126 #include <machine/db_machdep.h> 127 #ifdef KGDB 128 #include <sys/kgdb.h> 129 #endif 130 131 #include <machine/bootconfig.h> 132 133 #include <arm/arm32/machdep.h> 134 135 #include <arm/imx/imx51reg.h> 136 #include <arm/imx/imx51var.h> 137 #include <arm/imx/imxuartreg.h> 138 #include <arm/imx/imxuartvar.h> 139 #include <arm/imx/imx50_iomuxreg.h> 140 #include <arm/imx/imxgpiovar.h> 141 142 #include <evbarm/kobo/kobo.h> 143 #include <evbarm/kobo/kobo_reg.h> 144 145 /* Kernel text starts 1MB in from the bottom of the kernel address space. */ 146 #define KERNEL_TEXT_BASE (KERNEL_BASE + 0x00100000) 147 148 BootConfig bootconfig; /* Boot config storage */ 149 static char bootargs[MAX_BOOT_STRING]; 150 char *boot_args = NULL; 151 152 extern char KERNEL_BASE_phys[]; 153 154 /* 155 * Macros to translate between physical and virtual for a subset of the 156 * kernel address space. *Not* for general use. 157 */ 158 #define KERNEL_BASE_PHYS ((paddr_t)KERNEL_BASE_phys) 159 160 void consinit(void); 161 162 #ifdef KGDB 163 void kgdb_port_init(void); 164 #endif 165 166 static void init_clocks(void); 167 static void setup_ioports(void); 168 169 #ifndef CONSPEED 170 #define CONSPEED B115200 /* What RedBoot uses */ 171 #endif 172 #ifndef CONMODE 173 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 174 #endif 175 176 int comcnspeed = CONSPEED; 177 int comcnmode = CONMODE; 178 179 /* 180 * Static device mappings. These peripheral registers are mapped at 181 * fixed virtual addresses very early in initarm() so that we can use 182 * them while booting the kernel, and stay at the same address 183 * throughout whole kernel's life time. 184 * 185 * We use this table twice; once with bootstrap page table, and once 186 * with kernel's page table which we build up in initarm(). 187 * 188 * Since we map these registers into the bootstrap page table using 189 * pmap_devmap_bootstrap() which calls pmap_map_chunk(), we map 190 * registers segment-aligned and segment-rounded in order to avoid 191 * using the 2nd page tables. 192 */ 193 194 #define _A(a) ((a) & ~L1_S_OFFSET) 195 #define _S(s) (((s) + L1_S_SIZE - 1) & ~(L1_S_SIZE-1)) 196 197 const struct pmap_devmap kobo_devmap[] = { 198 { 199 /* for UART2, IOMUXC */ 200 .pd_va = _A(KOBO_IO_VBASE0), 201 .pd_pa = _A(KOBO_IO_PBASE0), 202 .pd_size = _S(L1_S_SIZE * 4), 203 .pd_prot = VM_PROT_READ|VM_PROT_WRITE, 204 .pd_cache = PTE_NOCACHE 205 }, 206 {0} 207 }; 208 209 #undef _A 210 #undef _S 211 212 #ifndef MEMSTART 213 #define MEMSTART 0x70000000 214 #endif 215 #ifndef MEMSIZE 216 #define MEMSIZE 256 217 #endif 218 219 static void 220 init_clocks(void) 221 { 222 cortex_pmc_ccnt_init(); 223 } 224 225 struct iomux_setup { 226 /* iomux registers are 32-bit wide, but upper 16 bits are not 227 * used. */ 228 uint16_t reg; 229 uint16_t val; 230 }; 231 232 #define IOMUX_M(padname, mux) \ 233 IOMUX_DATA(__CONCAT(IOMUXC_SW_MUX_CTL_PAD_,padname), mux) 234 235 #define IOMUX_P(padname, pad) \ 236 IOMUX_DATA(__CONCAT(IOMUXC_SW_PAD_CTL_PAD_,padname), pad) 237 238 #define IOMUX_MP(padname, mux, pad) \ 239 IOMUX_M(padname, mux), \ 240 IOMUX_P(padname, pad) 241 242 #define IOMUX_DATA(offset, value) \ 243 { \ 244 .reg = (offset), \ 245 .val = (value), \ 246 } 247 248 const struct iomux_setup iomux_setup_data[] = { 249 #define HYS PAD_CTL_HYS 250 #define ODE PAD_CTL_ODE 251 #define DSEHIGH PAD_CTL_DSE_HIGH 252 #define DSEMID PAD_CTL_DSE_MID 253 #define DSELOW PAD_CTL_DSE_LOW 254 #define DSEMAX PAD_CTL_DSE_MAX 255 #define SRE PAD_CTL_SRE 256 #define KEEPER PAD_CTL_KEEPER 257 #define PULL PAD_CTL_PULL 258 #define PU_22K PAD_CTL_PUS_22K_PU 259 #define PU_47K PAD_CTL_PUS_47K_PU 260 #define PU_100K PAD_CTL_PUS_100K_PU 261 #define PD_100K PAD_CTL_PUS_100K_PD 262 #define HVE PAD_CTL_HVE /* Low output voltage */ 263 264 #define ALT0 IOMUX_CONFIG_ALT0 265 #define ALT1 IOMUX_CONFIG_ALT1 266 #define ALT2 IOMUX_CONFIG_ALT2 267 #define ALT3 IOMUX_CONFIG_ALT3 268 #define ALT4 IOMUX_CONFIG_ALT4 269 #define ALT5 IOMUX_CONFIG_ALT5 270 #define ALT6 IOMUX_CONFIG_ALT6 271 #define ALT7 IOMUX_CONFIG_ALT7 272 #define SION IOMUX_CONFIG_SION 273 274 /* I2C1 */ 275 IOMUX_MP(I2C1_SCL, ALT0 | SION, PULL | PU_100K | HYS | ODE | DSEHIGH), 276 IOMUX_MP(I2C1_SDA, ALT0 | SION, PULL | PU_100K | HYS | ODE | DSEHIGH), 277 278 /* I2C2 */ 279 IOMUX_MP(I2C2_SCL, ALT0 | SION, PULL | PU_100K | HYS | ODE | DSEHIGH), 280 IOMUX_MP(I2C2_SDA, ALT0 | SION, PULL | PU_100K | HYS | ODE | DSEHIGH), 281 282 /* I2C3 */ 283 IOMUX_MP(I2C3_SCL, ALT0 | SION, PULL | PU_100K | HYS | ODE | DSEHIGH), 284 IOMUX_MP(I2C3_SDA, ALT0 | SION, PULL | PU_100K | HYS | ODE | DSEHIGH), 285 286 /* UART2 */ 287 IOMUX_MP(UART2_RXD, ALT0, HYS | PULL | DSEHIGH | SRE), 288 IOMUX_MP(UART2_TXD, ALT0, HYS | PULL | DSEHIGH | SRE), 289 290 /* SD1 */ 291 IOMUX_MP(SD1_CMD, ALT0, HVE | PU_22K | DSEMAX | SRE), 292 IOMUX_MP(SD1_CLK, ALT0, HVE | PU_22K | DSEMAX | SRE), 293 IOMUX_MP(SD1_D0, ALT0, HVE | PU_22K | DSEMAX | SRE), 294 IOMUX_MP(SD1_D1, ALT0, HVE | PU_22K | DSEMAX | SRE), 295 IOMUX_MP(SD1_D2, ALT0, HVE | PU_22K | DSEMAX | SRE), 296 IOMUX_MP(SD1_D3, ALT0, HVE | PU_22K | DSEMAX | SRE), 297 // IOMUX_MP(SD1_CD, ALT0, HVE | PU_22K | DSEMAX | SRE), 298 299 /* SD2 */ 300 IOMUX_MP(SD2_CMD, ALT0, HVE | PU_22K | DSEMAX | SRE), 301 IOMUX_MP(SD2_CLK, ALT0, HVE | PU_22K | DSEMAX | SRE), 302 IOMUX_MP(SD2_D0, ALT0, HVE | PU_22K | DSEMAX | SRE), 303 IOMUX_MP(SD2_D1, ALT0, HVE | PU_22K | DSEMAX | SRE), 304 IOMUX_MP(SD2_D2, ALT0, HVE | PU_22K | DSEMAX | SRE), 305 IOMUX_MP(SD2_D3, ALT0, HVE | PU_22K | DSEMAX | SRE), 306 IOMUX_MP(SD2_CD, ALT0, HVE | PU_22K | DSEMAX | SRE), 307 308 IOMUX_DATA(IOMUXC_ESDHC2_IPP_CARD_DET_SELECT_INPUT, INPUT_DAISY_1), 309 310 /* SD3 */ 311 IOMUX_MP(SD3_CMD, ALT0, HVE | PU_22K | DSEMAX | SRE), 312 IOMUX_MP(SD3_CLK, ALT0, HVE | PU_22K | DSEMAX | SRE), 313 IOMUX_MP(SD3_D0, ALT0, HVE | PU_22K | DSEMAX | SRE), 314 IOMUX_MP(SD3_D1, ALT0, HVE | PU_22K | DSEMAX | SRE), 315 IOMUX_MP(SD3_D2, ALT0, HVE | PU_22K | DSEMAX | SRE), 316 IOMUX_MP(SD3_D3, ALT0, HVE | PU_22K | DSEMAX | SRE), 317 // IOMUX_MP(SD3_CD, ALT0, HVE | PU_22K | DSEMAX | SRE), 318 319 /* OTG */ 320 IOMUX_M(PWM2, ALT2), 321 // IOMUX_MP(PWM1, ALT2, HYS | KEEPER | DSEHIGH), 322 323 /* EPDC */ 324 IOMUX_M(EPDC_D0, ALT0), 325 IOMUX_M(EPDC_D1, ALT0), 326 IOMUX_M(EPDC_D2, ALT0), 327 IOMUX_M(EPDC_D3, ALT0), 328 IOMUX_M(EPDC_D4, ALT0), 329 IOMUX_M(EPDC_D5, ALT0), 330 IOMUX_M(EPDC_D6, ALT0), 331 IOMUX_M(EPDC_D7, ALT0), 332 IOMUX_M(EPDC_GDCLK, ALT0), 333 IOMUX_M(EPDC_GDSP, ALT0), 334 IOMUX_M(EPDC_GDOE, ALT0), 335 IOMUX_M(EPDC_GDRL, ALT0), 336 IOMUX_M(EPDC_SDCLK, ALT0), 337 IOMUX_M(EPDC_SDOE, ALT0), 338 IOMUX_M(EPDC_SDLE, ALT0), 339 IOMUX_M(EPDC_BDR0, ALT0), 340 IOMUX_M(EPDC_BDR1, ALT0), 341 IOMUX_M(EPDC_SDCE0, ALT0), 342 343 IOMUX_M(EPDC_PWRSTAT, ALT1), /* GPIO3[28] */ 344 IOMUX_M(EPDC_PWRCTRL0, ALT1), /* GPIO3[29] */ 345 IOMUX_M(EPDC_VCOM0, ALT1), /* GPIO4[21] */ 346 IOMUX_M(UART4_TXD, ALT1), /* GPIO6[16] */ 347 IOMUX_M(UART4_RXD, ALT1), /* GPIO6[17] */ 348 349 // IOMUX_M(PWM2, ALT1), /* GPIO6[25] */ 350 351 #undef ODE 352 #undef HYS 353 #undef SRE 354 #undef PULL 355 #undef KEEPER 356 #undef PU_22K 357 #undef PU_47K 358 #undef PU_100K 359 #undef PD_100K 360 #undef HVE 361 #undef DSEMAX 362 #undef DSEHIGH 363 #undef DSEMID 364 #undef DSELOW 365 366 #undef ALT0 367 #undef ALT1 368 #undef ALT2 369 #undef ALT3 370 #undef ALT4 371 #undef ALT5 372 #undef ALT6 373 #undef ALT7 374 #undef SION 375 }; 376 377 static void 378 setup_ioports(void) 379 { 380 int i; 381 const struct iomux_setup *p; 382 383 for (i=0; i < __arraycount(iomux_setup_data); ++i) { 384 p = iomux_setup_data + i; 385 386 ioreg_write(KOBO_IOMUXC_VBASE + p->reg, 387 p->val); 388 } 389 } 390 391 #ifdef CONSDEVNAME 392 const char consdevname[] = CONSDEVNAME; 393 394 #ifndef CONMODE 395 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 396 #endif 397 #ifndef CONSPEED 398 #define CONSPEED 115200 399 #endif 400 401 int consmode = CONMODE; 402 int consrate = CONSPEED; 403 404 #endif /* CONSDEVNAME */ 405 406 #ifndef IMXUART_FREQ 407 #define IMXUART_FREQ 24000000 408 #endif 409 410 /* 411 * u_int initarm(...) 412 * 413 * Initial entry point on startup. This gets called before main() is 414 * entered. 415 * It should be responsible for setting up everything that must be 416 * in place when main is called. 417 * This includes 418 * Taking a copy of the boot configuration structure. 419 * Initialising the physical console so characters can be printed. 420 * Setting up page tables for the kernel 421 */ 422 u_int 423 initarm(void *arg) 424 { 425 /* 426 * Heads up ... Setup the CPU / MMU / TLB functions 427 */ 428 if (set_cpufuncs()) // starts PMC counter 429 panic("cpu not recognized!"); 430 431 /* map some peripheral registers */ 432 pmap_devmap_bootstrap((vaddr_t)armreg_ttbr_read() & -L1_TABLE_SIZE, 433 kobo_devmap); 434 435 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT); 436 437 /* Register devmap for devices we mapped in start */ 438 pmap_devmap_register(kobo_devmap); 439 setup_ioports(); 440 441 consinit(); 442 443 init_clocks(); 444 445 #ifdef KGDB 446 kgdb_port_init(); 447 #endif 448 449 /* Talk to the user */ 450 printf("\nNetBSD/evbarm (" ___STRING(EVBARM_BOARDTYPE) ") booting ...\n"); 451 452 #ifdef BOOT_ARGS 453 char mi_bootargs[] = BOOT_ARGS; 454 parse_mi_bootargs(mi_bootargs); 455 #endif 456 bootargs[0] = '\0'; 457 458 #ifdef VERBOSE_INIT_ARM 459 printf("initarm: Configuring system"); 460 printf(", CLIDR=%010o CTR=%#x", 461 armreg_clidr_read(), armreg_ctr_read()); 462 printf("\n"); 463 #endif 464 465 #ifdef VERBOSE_INIT_ARM 466 printf("initarm: Configuring system ...\n"); 467 #endif 468 /* 469 * Set up the variables that define the availability of physical 470 * memory. 471 */ 472 473 /* Fake bootconfig structure for the benefit of pmap.c. */ 474 bootconfig.dramblocks = 1; 475 bootconfig.dram[0].address = MEMSTART; 476 bootconfig.dram[0].pages = (MEMSIZE * 1024 * 1024) / PAGE_SIZE; 477 478 psize_t ram_size = bootconfig.dram[0].pages * PAGE_SIZE; 479 480 #ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS 481 const bool mapallmem_p = true; 482 if (ram_size > (KERNEL_VM_BASE - KERNEL_BASE)) { 483 printf("%s: dropping RAM size from %luMB to %uMB\n", 484 __func__, (unsigned long) (ram_size >> 20), 485 (KERNEL_VM_BASE - KERNEL_BASE) >> 20); 486 ram_size = KERNEL_VM_BASE - KERNEL_BASE; 487 } 488 KASSERT(ram_size <= KERNEL_VM_BASE - KERNEL_BASE); 489 #else 490 const bool mapallmem_p = false; 491 #endif 492 493 arm32_bootmem_init(bootconfig.dram[0].address, ram_size, 494 KERNEL_BASE_PHYS); 495 arm32_kernel_vm_init(KERNEL_VM_BASE, ARM_VECTORS_HIGH, 0, 496 kobo_devmap, mapallmem_p); 497 498 #ifdef BOOTHOWTO 499 boothowto |= BOOTHOWTO; 500 #endif 501 502 return initarm_common(KERNEL_VM_BASE, KERNEL_VM_SIZE, NULL, 0); 503 } 504 505 void 506 consinit(void) 507 { 508 static int consinit_called = 0; 509 510 if (consinit_called) 511 return; 512 513 consinit_called = 1; 514 515 #ifdef CONSDEVNAME 516 517 #if NIMXUART > 0 518 imxuart_set_frequency(IMXUART_FREQ, 2); 519 #endif 520 521 #if (NIMXUART > 0) && defined(IMXUARTCONSOLE) 522 if (strcmp(consdevname, "imxuart") == 0) { 523 paddr_t consaddr; 524 #ifdef CONADDR 525 consaddr = CONADDR; 526 #else 527 consaddr = IMX51_UART2_BASE; 528 #endif 529 imxuart_cnattach(&armv7_generic_bs_tag, consaddr, consrate, consmode); 530 return; 531 } 532 #endif 533 534 #endif 535 536 #if (NWSDISPLAY > 0) && defined(IMXEPDCCONSOLE) 537 #if NUKBD > 0 538 ukbd_cnattach(); 539 #endif 540 { 541 extern void kobo_cnattach(void); 542 kobo_cnattach(); 543 } 544 #endif 545 } 546 547 #ifdef KGDB 548 #ifndef KGDB_DEVNAME 549 #define KGDB_DEVNAME "imxuart" 550 #endif 551 #ifndef KGDB_DEVMODE 552 #define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 553 #endif 554 555 const char kgdb_devname[20] = KGDB_DEVNAME; 556 int kgdb_mode = KGDB_DEVMODE; 557 int kgdb_addr = KGDB_DEVADDR; 558 extern int kgdb_rate; /* defined in kgdb_stub.c */ 559 560 void 561 kgdb_port_init(void) 562 { 563 #if (NIMXUART > 0) 564 if (strcmp(kgdb_devname, "imxuart") == 0) { 565 imxuart_kgdb_attach(&armv7_generic_bs_tag, kgdb_addr, 566 kgdb_rate, kgdb_mode); 567 return; 568 } 569 570 #endif 571 } 572 #endif 573
Indexes created Wed Oct 22 13:09:56 GMT 2025