11.17Sriastrad/*	$NetBSD: sacc_obio.c,v 1.17 2023/07/13 21:29:49 riastradh Exp $ */
21.1Sbsh
31.1Sbsh/*-
41.1Sbsh * Copyright (c) 2001 The NetBSD Foundation, Inc.
51.1Sbsh * All rights reserved.
61.1Sbsh *
71.1Sbsh * This code is derived from software contributed to The NetBSD Foundation
81.1Sbsh * by IWAMOTO Toshihiro.
91.1Sbsh *
101.1Sbsh * Redistribution and use in source and binary forms, with or without
111.1Sbsh * modification, are permitted provided that the following conditions
121.1Sbsh * are met:
131.1Sbsh * 1. Redistributions of source code must retain the above copyright
141.1Sbsh *    notice, this list of conditions and the following disclaimer.
151.1Sbsh * 2. Redistributions in binary form must reproduce the above copyright
161.1Sbsh *    notice, this list of conditions and the following disclaimer in the
171.1Sbsh *    documentation and/or other materials provided with the distribution.
181.1Sbsh *
191.1Sbsh * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
201.1Sbsh * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
211.1Sbsh * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
221.1Sbsh * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
231.1Sbsh * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
241.1Sbsh * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
251.1Sbsh * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
261.1Sbsh * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
271.1Sbsh * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
281.1Sbsh * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
291.1Sbsh * POSSIBILITY OF SUCH DAMAGE.
301.1Sbsh */
311.1Sbsh
321.1Sbsh/*
331.1Sbsh * for SA-1111 companion chip on Intel DBPXA250 evaluation board.
341.1Sbsh */
351.1Sbsh
361.1Sbsh#include <sys/cdefs.h>
371.17Sriastrad__KERNEL_RCSID(0, "$NetBSD: sacc_obio.c,v 1.17 2023/07/13 21:29:49 riastradh Exp $");
381.1Sbsh
391.1Sbsh#include <sys/param.h>
401.1Sbsh#include <sys/systm.h>
411.1Sbsh#include <sys/mbuf.h>
421.1Sbsh#include <sys/socket.h>
431.1Sbsh#include <sys/ioctl.h>
441.1Sbsh#include <sys/errno.h>
451.1Sbsh#include <sys/syslog.h>
461.1Sbsh#include <sys/select.h>
471.1Sbsh#include <sys/device.h>
481.16Sriastrad#include <sys/bitops.h>
491.1Sbsh
501.1Sbsh#include <net/if.h>
511.1Sbsh#include <net/if_dl.h>
521.1Sbsh#include <net/if_ether.h>
531.1Sbsh#include <net/if_media.h>
541.1Sbsh
551.1Sbsh#include <machine/intr.h>
561.12Sdyoung#include <sys/bus.h>
571.1Sbsh
581.1Sbsh#include <arm/sa11x0/sa1111_reg.h>
591.1Sbsh#include <arm/sa11x0/sa1111_var.h>
601.6Snonaka#include <arm/xscale/pxa2x0cpu.h>
611.1Sbsh#include <arm/xscale/pxa2x0reg.h>
621.1Sbsh#include <arm/xscale/pxa2x0var.h>
631.1Sbsh#include <arm/xscale/pxa2x0_gpio.h>
641.1Sbsh
651.1Sbsh#include <evbarm/lubbock/lubbock_reg.h>
661.1Sbsh#include <evbarm/lubbock/lubbock_var.h>
671.1Sbsh
681.1Sbsh
691.11Sbshstatic	int    	sacc_obio_probe(device_t parent, cfdata_t match, void *aux);
701.10Srjsstatic	void	sacc_obio_attach(device_t, device_t, void *);
711.1Sbshstatic	int  sacc_obio_intr(void *arg);
721.1Sbsh
731.11SbshCFATTACH_DECL_NEW(sacc_obio, sizeof(struct sacc_softc), sacc_obio_probe,
741.1Sbsh    sacc_obio_attach, NULL, NULL);
751.1Sbsh
761.1Sbsh#if 0
771.10Srjs#define DPRINTF(arg)	aprint_normal arg
781.1Sbsh#else
791.1Sbsh#define DPRINTF(arg)
801.1Sbsh#endif
811.1Sbsh
821.1Sbshuint16_t cs2_memctl_init = 0x7ff0;
831.1Sbsh
841.11Sbshstatic int
851.11Sbshsacc_obio_probe(device_t parent, cfdata_t match, void *aux)
861.11Sbsh{
871.11Sbsh	struct obio_attach_args *oa = aux;
881.11Sbsh	struct sa11x0_attach_args sa;
891.11Sbsh
901.11Sbsh	printf("%s: addr=%lx\n", __func__, oa->oba_addr);
911.11Sbsh
921.11Sbsh	sa.sa_sc = oa->oba_sc;
931.11Sbsh	sa.sa_iot = oa->oba_iot;
941.11Sbsh	sa.sa_addr = oa->oba_addr;
951.11Sbsh	sa.sa_size = 0x2000;
961.11Sbsh
971.11Sbsh	return sacc_probe(parent, match, &sa);
981.11Sbsh}
991.11Sbsh
1001.1Sbshstatic void
1011.10Srjssacc_obio_attach(device_t parent, device_t self, void *aux)
1021.1Sbsh{
1031.1Sbsh	int i;
1041.13Sskrll	uint32_t skid, tmp;
1051.10Srjs	struct sacc_softc *sc = device_private(self);
1061.10Srjs	struct obio_softc *psc = device_private(parent);
1071.1Sbsh	struct obio_attach_args *sa = aux;
1081.1Sbsh	bus_space_tag_t iot = sa->oba_iot;
1091.1Sbsh	bus_space_handle_t memctl_ioh;
1101.1Sbsh
1111.10Srjs	aprint_normal("\n");
1121.1Sbsh
1131.1Sbsh	/* Set alternative function for GPIO pings 48..57 on PXA2X0 */
1141.1Sbsh	for (i=48; i <= 55; ++i)
1151.1Sbsh		pxa2x0_gpio_set_function(i, GPIO_ALT_FN_2_OUT);
1161.1Sbsh	pxa2x0_gpio_set_function(56, GPIO_ALT_FN_1_IN);
1171.1Sbsh	pxa2x0_gpio_set_function(57, GPIO_ALT_FN_1_IN);
1181.1Sbsh
1191.1Sbsh	/* XXX */
1201.1Sbsh	if (bus_space_map(iot, PXA2X0_MEMCTL_BASE, PXA2X0_MEMCTL_SIZE, 0,
1211.1Sbsh			  &memctl_ioh))
1221.1Sbsh		goto fail;
1231.1Sbsh
1241.1Sbsh	tmp = bus_space_read_4(iot, memctl_ioh, MEMCTL_MSC2 );
1251.1Sbsh	bus_space_write_4(iot, memctl_ioh, MEMCTL_MSC2,
1261.1Sbsh	    (tmp & 0xffff0000) | cs2_memctl_init );
1271.1Sbsh
1281.1Sbsh	bus_space_unmap(iot, memctl_ioh, PXA2X0_MEMCTL_SIZE);
1291.1Sbsh
1301.10Srjs	sc->sc_dev = self;
1311.1Sbsh	sc->sc_piot = sc->sc_iot = iot;
1321.3Sbjh21	sc->sc_gpioh = 0;	/* not used */
1331.1Sbsh
1341.1Sbsh	if (bus_space_map(iot, sa->oba_addr, 0x2000/*size*/, 0, &sc->sc_ioh))
1351.1Sbsh		goto fail;
1361.1Sbsh
1371.1Sbsh	skid = bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACCSBI_SKID);
1381.1Sbsh
1391.10Srjs	aprint_normal_dev(self, "SA1111 rev %d.%d\n",
1401.10Srjs			  (skid & 0xf0) >> 4, skid & 0xf);
1411.1Sbsh
1421.1Sbsh	tmp = bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACCSBI_SKCR);
1431.1Sbsh	tmp = (tmp & ~SKCR_VCOOFF) | SKCR_PLLBYPASS;
1441.1Sbsh	bus_space_write_4( sc->sc_iot, sc->sc_ioh, SACCSBI_SKCR, tmp );
1451.1Sbsh
1461.1Sbsh	delay(100);			/* XXX */
1471.1Sbsh
1481.1Sbsh	tmp |= SKCR_RCLKEN;
1491.1Sbsh	bus_space_write_4( sc->sc_iot, sc->sc_ioh, SACCSBI_SKCR, tmp );
1501.1Sbsh
1511.1Sbsh#if 1
1521.1Sbsh	if( tmp != bus_space_read_4( sc->sc_iot, sc->sc_ioh, SACCSBI_SKCR ) )
1531.1Sbsh		printf( "!!! FAIL SKCR\n" );
1541.1Sbsh#endif
1551.1Sbsh
1561.1Sbsh	/* PCMCIA socket0 power control */
1571.1Sbsh	bus_space_write_4( sc->sc_iot, sc->sc_ioh, SACCGPIOA_DVR, 0 );
1581.1Sbsh	bus_space_write_4( sc->sc_iot, sc->sc_ioh, SACCGPIOA_DDR, 0 );
1591.1Sbsh
1601.1Sbsh	for(i = 0; i < SACCIC_LEN; i++)
1611.1Sbsh		sc->sc_intrhand[i] = NULL;
1621.1Sbsh
1631.1Sbsh	/* initialize SA1111 interrupt controller */
1641.1Sbsh	bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTEN0, 0);
1651.1Sbsh	bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTEN1, 0);
1661.1Sbsh	bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTTSTSEL, 0);
1671.1Sbsh	bus_space_write_4(sc->sc_iot, sc->sc_ioh,
1681.1Sbsh			  SACCIC_INTSTATCLR0, 0xffffffff);
1691.1Sbsh	bus_space_write_4(sc->sc_iot, sc->sc_ioh,
1701.1Sbsh			  SACCIC_INTSTATCLR1, 0xffffffff);
1711.1Sbsh
1721.1Sbsh	/* connect to On-board peripheral interrupt */
1731.1Sbsh	obio_intr_establish(psc, sa->oba_intr,
1741.1Sbsh			    IPL_HIGH, sacc_obio_intr, sc );
1751.1Sbsh	/*
1761.1Sbsh	 *  Attach each devices
1771.1Sbsh	 */
1781.14Sthorpej	config_search(self, NULL,
1791.15Sthorpej	    CFARGS(.search = sa1111_search));
1801.1Sbsh
1811.1Sbsh	return;
1821.1Sbsh
1831.1Sbsh fail:
1841.10Srjs	aprint_normal_dev(self, "unable to map registers\n");
1851.1Sbsh}
1861.1Sbsh
1871.1Sbshstatic int
1881.1Sbshsacc_obio_intr(void *arg)
1891.1Sbsh{
1901.1Sbsh	int i;
1911.1Sbsh	struct sacc_intrvec intstat;
1921.1Sbsh	struct sacc_softc *sc = arg;
1931.1Sbsh	struct sacc_intrhand *ih;
1941.1Sbsh
1951.1Sbsh	intstat.lo =
1961.1Sbsh	    bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTSTATCLR0);
1971.1Sbsh	intstat.hi =
1981.1Sbsh	    bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTSTATCLR1);
1991.1Sbsh	DPRINTF(("sacc_obio_intr_dispatch: %x %x\n", intstat.lo, intstat.hi));
2001.1Sbsh
2011.16Sriastrad	while ((i = fls32(intstat.lo) - 1) >= 0) {
2021.1Sbsh
2031.2Sbsh		/*
2041.2Sbsh		 * Clear intr status before calling intr handlers.
2051.2Sbsh		 * This cause stray interrupts, but clearing
2061.2Sbsh		 * after calling intr handlers cause intr lossage.
2071.2Sbsh		 */
2081.2Sbsh		bus_space_write_4(sc->sc_iot, sc->sc_ioh,
2091.2Sbsh				  SACCIC_INTSTATCLR0, 1U<<i );
2101.2Sbsh
2111.2Sbsh		for(ih = sc->sc_intrhand[i]; ih; ih = ih->ih_next)
2121.7Smatt			softint_schedule(ih->ih_soft);
2131.2Sbsh
2141.2Sbsh		intstat.lo &= ~(1U<<i);
2151.1Sbsh	}
2161.2Sbsh
2171.17Sriastrad	while ((i = fls32(intstat.hi) - 1) >= 0) {
2181.2Sbsh		bus_space_write_4(sc->sc_iot, sc->sc_ioh,
2191.2Sbsh				  SACCIC_INTSTATCLR1, 1U<<i);
2201.2Sbsh
2211.2Sbsh		for(ih = sc->sc_intrhand[i + 32]; ih; ih = ih->ih_next)
2221.7Smatt			softint_schedule(ih->ih_soft);
2231.2Sbsh
2241.2Sbsh		intstat.hi &= ~(1U<<i);
2251.2Sbsh	}
2261.2Sbsh
2271.1Sbsh	return 1;
2281.1Sbsh}
229