sacc_obio.c revision 1.6
1/* $NetBSD: sacc_obio.c,v 1.6 2006/12/18 15:32:10 nonaka Exp $ */ 2 3/*- 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by IWAMOTO Toshihiro. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39/* 40 * for SA-1111 companion chip on Intel DBPXA250 evaluation board. 41 */ 42 43#include <sys/cdefs.h> 44__KERNEL_RCSID(0, "$NetBSD: sacc_obio.c,v 1.6 2006/12/18 15:32:10 nonaka Exp $"); 45 46#include <sys/param.h> 47#include <sys/systm.h> 48#include <sys/mbuf.h> 49#include <sys/socket.h> 50#include <sys/ioctl.h> 51#include <sys/errno.h> 52#include <sys/syslog.h> 53#include <sys/select.h> 54#include <sys/device.h> 55 56#include <net/if.h> 57#include <net/if_dl.h> 58#include <net/if_ether.h> 59#include <net/if_media.h> 60 61#include <machine/intr.h> 62#include <machine/bus.h> 63 64#include <arm/sa11x0/sa1111_reg.h> 65#include <arm/sa11x0/sa1111_var.h> 66#include <arm/xscale/pxa2x0cpu.h> 67#include <arm/xscale/pxa2x0reg.h> 68#include <arm/xscale/pxa2x0var.h> 69#include <arm/xscale/pxa2x0_gpio.h> 70 71#include <evbarm/lubbock/lubbock_reg.h> 72#include <evbarm/lubbock/lubbock_var.h> 73 74 75static void sacc_obio_attach(struct device *, struct device *, void *); 76static int sacc_obio_intr(void *arg); 77 78CFATTACH_DECL(sacc_obio, sizeof(struct sacc_softc), sacc_probe, 79 sacc_obio_attach, NULL, NULL); 80 81#if 0 82#define DPRINTF(arg) printf arg 83#else 84#define DPRINTF(arg) 85#endif 86 87uint16_t cs2_memctl_init = 0x7ff0; 88 89static void 90sacc_obio_attach(parent, self, aux) 91 struct device *parent; 92 struct device *self; 93 void *aux; 94{ 95 int i; 96 u_int32_t skid, tmp; 97 struct sacc_softc *sc = (struct sacc_softc *)self; 98 struct obio_softc *psc = (struct obio_softc *)parent; 99 struct obio_attach_args *sa = aux; 100 bus_space_tag_t iot = sa->oba_iot; 101 bus_space_handle_t memctl_ioh; 102 103 printf("\n"); 104 105 /* Set alternative function for GPIO pings 48..57 on PXA2X0 */ 106 for (i=48; i <= 55; ++i) 107 pxa2x0_gpio_set_function(i, GPIO_ALT_FN_2_OUT); 108 pxa2x0_gpio_set_function(56, GPIO_ALT_FN_1_IN); 109 pxa2x0_gpio_set_function(57, GPIO_ALT_FN_1_IN); 110 111 /* XXX */ 112 if (bus_space_map(iot, PXA2X0_MEMCTL_BASE, PXA2X0_MEMCTL_SIZE, 0, 113 &memctl_ioh)) 114 goto fail; 115 116 tmp = bus_space_read_4(iot, memctl_ioh, MEMCTL_MSC2 ); 117 bus_space_write_4(iot, memctl_ioh, MEMCTL_MSC2, 118 (tmp & 0xffff0000) | cs2_memctl_init ); 119 120 bus_space_unmap(iot, memctl_ioh, PXA2X0_MEMCTL_SIZE); 121 122 sc->sc_piot = sc->sc_iot = iot; 123 sc->sc_gpioh = 0; /* not used */ 124 125 if (bus_space_map(iot, sa->oba_addr, 0x2000/*size*/, 0, &sc->sc_ioh)) 126 goto fail; 127 128 skid = bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACCSBI_SKID); 129 130 printf("%s: SA1111 rev %d.%d\n", sc->sc_dev.dv_xname, 131 (skid & 0xf0) >> 4, skid & 0xf); 132 133 tmp = bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACCSBI_SKCR); 134 tmp = (tmp & ~SKCR_VCOOFF) | SKCR_PLLBYPASS; 135 bus_space_write_4( sc->sc_iot, sc->sc_ioh, SACCSBI_SKCR, tmp ); 136 137 delay(100); /* XXX */ 138 139 tmp |= SKCR_RCLKEN; 140 bus_space_write_4( sc->sc_iot, sc->sc_ioh, SACCSBI_SKCR, tmp ); 141 142#if 1 143 if( tmp != bus_space_read_4( sc->sc_iot, sc->sc_ioh, SACCSBI_SKCR ) ) 144 printf( "!!! FAIL SKCR\n" ); 145#endif 146 147 /* PCMCIA socket0 power control */ 148 bus_space_write_4( sc->sc_iot, sc->sc_ioh, SACCGPIOA_DVR, 0 ); 149 bus_space_write_4( sc->sc_iot, sc->sc_ioh, SACCGPIOA_DDR, 0 ); 150 151 for(i = 0; i < SACCIC_LEN; i++) 152 sc->sc_intrhand[i] = NULL; 153 154 /* initialize SA1111 interrupt controller */ 155 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTEN0, 0); 156 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTEN1, 0); 157 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTTSTSEL, 0); 158 bus_space_write_4(sc->sc_iot, sc->sc_ioh, 159 SACCIC_INTSTATCLR0, 0xffffffff); 160 bus_space_write_4(sc->sc_iot, sc->sc_ioh, 161 SACCIC_INTSTATCLR1, 0xffffffff); 162 163 /* connect to On-board peripheral interrupt */ 164 obio_intr_establish(psc, sa->oba_intr, 165 IPL_HIGH, sacc_obio_intr, sc ); 166 /* 167 * Attach each devices 168 */ 169 config_search_ia(sa1111_search, self, "sacc", NULL); 170 171 return; 172 173 fail: 174 printf("%s: unable to map registers\n", sc->sc_dev.dv_xname); 175} 176 177static int 178sacc_obio_intr(void *arg) 179{ 180 int i; 181 struct sacc_intrvec intstat; 182 struct sacc_softc *sc = arg; 183 struct sacc_intrhand *ih; 184 185 intstat.lo = 186 bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTSTATCLR0); 187 intstat.hi = 188 bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTSTATCLR1); 189 DPRINTF(("sacc_obio_intr_dispatch: %x %x\n", intstat.lo, intstat.hi)); 190 191 while ((i = find_first_bit(intstat.lo)) >= 0) { 192 193 /* 194 * Clear intr status before calling intr handlers. 195 * This cause stray interrupts, but clearing 196 * after calling intr handlers cause intr lossage. 197 */ 198 bus_space_write_4(sc->sc_iot, sc->sc_ioh, 199 SACCIC_INTSTATCLR0, 1U<<i ); 200 201 for(ih = sc->sc_intrhand[i]; ih; ih = ih->ih_next) 202 softintr_schedule(ih->ih_soft); 203 204 intstat.lo &= ~(1U<<i); 205 } 206 207 while ((i = find_first_bit(intstat.hi)) >= 0) { 208 bus_space_write_4(sc->sc_iot, sc->sc_ioh, 209 SACCIC_INTSTATCLR1, 1U<<i); 210 211 for(ih = sc->sc_intrhand[i + 32]; ih; ih = ih->ih_next) 212 softintr_schedule(ih->ih_soft); 213 214 intstat.hi &= ~(1U<<i); 215 } 216 217 return 1; 218} 219