1 1.5 matt /* $NetBSD: sm_obio_space_asm.S,v 1.5 2013/08/12 21:17:03 matt Exp $ */ 2 1.1 bsh 3 1.1 bsh /* 4 1.1 bsh * Copyright (c) 2002, 2003 Genetec Corporation. All rights reserved. 5 1.1 bsh * Written by Hiroyuki Bessho for Genetec Corporation. 6 1.1 bsh * 7 1.1 bsh * Redistribution and use in source and binary forms, with or without 8 1.1 bsh * modification, are permitted provided that the following conditions 9 1.1 bsh * are met: 10 1.1 bsh * 1. Redistributions of source code must retain the above copyright 11 1.1 bsh * notice, this list of conditions and the following disclaimer. 12 1.1 bsh * 2. Redistributions in binary form must reproduce the above copyright 13 1.1 bsh * notice, this list of conditions and the following disclaimer in the 14 1.1 bsh * documentation and/or other materials provided with the distribution. 15 1.1 bsh * 3. The name of Genetec Corporation may not be used to endorse or 16 1.1 bsh * promote products derived from this software without specific prior 17 1.1 bsh * written permission. 18 1.1 bsh * 19 1.1 bsh * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND 20 1.1 bsh * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 1.1 bsh * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 1.1 bsh * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION 23 1.1 bsh * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 1.1 bsh * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 1.1 bsh * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 1.1 bsh * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 1.1 bsh * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 1.1 bsh * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 1.1 bsh * POSSIBILITY OF SUCH DAMAGE. 30 1.1 bsh */ 31 1.1 bsh 32 1.1 bsh /* 33 1.1 bsh * These are special bus space functions for Lubbock's on-board I/O. 34 1.1 bsh * Especially for SMC91c96 chip in 8-bit mode. 35 1.1 bsh */ 36 1.1 bsh 37 1.1 bsh #include <machine/asm.h> 38 1.1 bsh 39 1.5 matt RCSID("$NetBSD: sm_obio_space_asm.S,v 1.5 2013/08/12 21:17:03 matt Exp $") 40 1.3 bjh21 41 1.1 bsh /* 42 1.1 bsh * bus_space I/O functions with offset*4, 8-bit access. 43 1.1 bsh */ 44 1.1 bsh 45 1.1 bsh /* 46 1.1 bsh * read single 47 1.1 bsh */ 48 1.1 bsh 49 1.1 bsh ENTRY(smobio8_bs_r_2) 50 1.1 bsh add r1, r1, r2, LSL #2 51 1.1 bsh ldrb r0, [r1], #4 52 1.1 bsh ldrb r2, [r1] 53 1.1 bsh orr r0, r0, r2, LSL #8 54 1.5 matt RET 55 1.5 matt END(smobio8_bs_r_2) 56 1.1 bsh 57 1.1 bsh /* 58 1.1 bsh * write single 59 1.1 bsh */ 60 1.1 bsh 61 1.1 bsh ENTRY(smobio8_bs_w_2) 62 1.1 bsh add r1, r1, r2, LSL #2 63 1.1 bsh strb r3, [r1], #4 64 1.1 bsh mov r3, r3, LSR #8 65 1.1 bsh strb r3, [r1] 66 1.5 matt RET 67 1.5 matt END(smobio8_bs_w_2) 68 1.1 bsh 69 1.1 bsh /* 70 1.1 bsh * read multiple 71 1.1 bsh */ 72 1.1 bsh ENTRY(smobio8_bs_rm_2) 73 1.1 bsh add r0, r1, r2, LSL #2 74 1.1 bsh ldr r2, [sp, #0] 75 1.1 bsh cmp r2, #0x00000000 76 1.5 matt RETc(le) 77 1.1 bsh 78 1.1 bsh Lbs_rm_2_loop: 79 1.1 bsh ldrb r1, [r0] 80 1.1 bsh ldrb lr, [r0, #4] 81 1.1 bsh subs r2, r2, #0x00000001 82 1.1 bsh orr r1, r1, lr, LSL #8 83 1.1 bsh strh r1, [r3], #0x0002 84 1.1 bsh bgt Lbs_rm_2_loop 85 1.1 bsh 86 1.5 matt RET 87 1.5 matt END(smobio8_bs_rm_2) 88 1.1 bsh 89 1.1 bsh 90 1.1 bsh 91 1.1 bsh /* 92 1.1 bsh * write multiple 93 1.1 bsh */ 94 1.1 bsh ENTRY(smobio8_bs_wm_2) 95 1.1 bsh add r0, r1, r2, LSL #2 96 1.1 bsh ldr r2, [sp, #0] 97 1.1 bsh cmp r2, #0x00000000 98 1.5 matt RETc(le) 99 1.1 bsh 100 1.1 bsh Lbs_wm_2_loop: 101 1.1 bsh ldrh r1, [r3], #0x0002 102 1.1 bsh subs r2, r2, #0x00000001 103 1.1 bsh strb r1, [r0] 104 1.1 bsh mov r1, r1, LSR #8 105 1.1 bsh strb r1, [r0,#4] 106 1.1 bsh bgt Lbs_wm_2_loop 107 1.1 bsh 108 1.5 matt RET 109 1.5 matt END(smobio8_bs_wm_2) 110 1.1 bsh 111 1.1 bsh 112 1.1 bsh /* 113 1.1 bsh * For 16-bit mode 114 1.1 bsh */ 115 1.1 bsh 116 1.1 bsh /* 117 1.1 bsh * read single 118 1.1 bsh */ 119 1.1 bsh 120 1.1 bsh ENTRY(smobio16_bs_r_1) 121 1.1 bsh tst r2, #1 /* Even/Odd ? */ 122 1.5 matt ldrbeq r0, [r1, r2, LSL #2] 123 1.5 matt RETc(eq) 124 1.1 bsh 125 1.1 bsh /* Odd byte. read 16bits and get high byte */ 126 1.1 bsh bic r2, r2, #1 127 1.1 bsh add r1, r1, r2, LSL #2 128 1.1 bsh ldrh r0, [r1] 129 1.1 bsh mov r0, r0, LSR #8 130 1.5 matt RET 131 1.5 matt END(smobio16_bs_r_1) 132 1.1 bsh 133 1.1 bsh 134 1.1 bsh /* 135 1.1 bsh * write single 136 1.1 bsh */ 137 1.1 bsh 138 1.1 bsh ENTRY(smobio16_bs_w_1) 139 1.1 bsh tst r2, #1 /* Even/Odd ? */ 140 1.5 matt strbeq r3, [r1, r2, LSL #2] 141 1.5 matt RETc(eq) 142 1.1 bsh 143 1.1 bsh /* Odd byte. write 16bit with low byte is 0. */ 144 1.1 bsh bic r2, r2, #1 145 1.1 bsh mov r3, r3, LSL #8 146 1.1 bsh add r1, r1, r2, LSL #2 147 1.1 bsh strh r3, [r1] 148 1.5 matt RET 149 1.5 matt END(smobio16_bs_w_1) 150