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sm_obio_space_asm.S revision 1.1
      1  1.1  bsh /*	$NetBSD: sm_obio_space_asm.S,v 1.1 2003/06/18 10:51:15 bsh Exp $ */
      2  1.1  bsh 
      3  1.1  bsh /*
      4  1.1  bsh  * Copyright (c) 2002, 2003  Genetec Corporation.  All rights reserved.
      5  1.1  bsh  * Written by Hiroyuki Bessho for Genetec Corporation.
      6  1.1  bsh  *
      7  1.1  bsh  * Redistribution and use in source and binary forms, with or without
      8  1.1  bsh  * modification, are permitted provided that the following conditions
      9  1.1  bsh  * are met:
     10  1.1  bsh  * 1. Redistributions of source code must retain the above copyright
     11  1.1  bsh  *    notice, this list of conditions and the following disclaimer.
     12  1.1  bsh  * 2. Redistributions in binary form must reproduce the above copyright
     13  1.1  bsh  *    notice, this list of conditions and the following disclaimer in the
     14  1.1  bsh  *    documentation and/or other materials provided with the distribution.
     15  1.1  bsh  * 3. The name of Genetec Corporation may not be used to endorse or
     16  1.1  bsh  *    promote products derived from this software without specific prior
     17  1.1  bsh  *    written permission.
     18  1.1  bsh  *
     19  1.1  bsh  * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
     20  1.1  bsh  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  1.1  bsh  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  1.1  bsh  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL GENETEC CORPORATION
     23  1.1  bsh  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  1.1  bsh  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  1.1  bsh  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  1.1  bsh  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  1.1  bsh  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  1.1  bsh  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  1.1  bsh  * POSSIBILITY OF SUCH DAMAGE.
     30  1.1  bsh  */
     31  1.1  bsh 
     32  1.1  bsh /*
     33  1.1  bsh  * These are special bus space functions for Lubbock's on-board I/O.
     34  1.1  bsh  * Especially for SMC91c96 chip in 8-bit mode.
     35  1.1  bsh  */
     36  1.1  bsh 
     37  1.1  bsh #include <machine/asm.h>
     38  1.1  bsh 
     39  1.1  bsh /*
     40  1.1  bsh  * bus_space I/O functions with offset*4, 8-bit access.
     41  1.1  bsh  */
     42  1.1  bsh 
     43  1.1  bsh /*
     44  1.1  bsh  * read single
     45  1.1  bsh  */
     46  1.1  bsh 
     47  1.1  bsh ENTRY(smobio8_bs_r_2)
     48  1.1  bsh 	add	r1, r1, r2, LSL #2
     49  1.1  bsh 	ldrb	r0, [r1], #4
     50  1.1  bsh 	ldrb	r2, [r1]
     51  1.1  bsh 	orr	r0, r0, r2, LSL #8
     52  1.1  bsh 	mov	pc, lr
     53  1.1  bsh 
     54  1.1  bsh /*
     55  1.1  bsh  * write single
     56  1.1  bsh  */
     57  1.1  bsh 
     58  1.1  bsh ENTRY(smobio8_bs_w_2)
     59  1.1  bsh 	add	r1, r1, r2, LSL #2
     60  1.1  bsh 	strb	r3, [r1], #4
     61  1.1  bsh 	mov	r3, r3, LSR #8
     62  1.1  bsh 	strb	r3, [r1]
     63  1.1  bsh 	mov	pc, lr
     64  1.1  bsh 
     65  1.1  bsh /*
     66  1.1  bsh  * read multiple
     67  1.1  bsh  */
     68  1.1  bsh ENTRY(smobio8_bs_rm_2)
     69  1.1  bsh 	add	r0, r1, r2, LSL #2
     70  1.1  bsh 	ldr	r2, [sp, #0]
     71  1.1  bsh 	cmp     r2, #0x00000000
     72  1.1  bsh 	movle   pc, lr
     73  1.1  bsh 
     74  1.1  bsh 	stmfd	sp!, {lr}
     75  1.1  bsh Lbs_rm_2_loop:
     76  1.1  bsh 	ldrb	r1, [r0]
     77  1.1  bsh 	ldrb	lr, [r0, #4]
     78  1.1  bsh 	subs	r2, r2, #0x00000001
     79  1.1  bsh 	orr	r1, r1, lr, LSL #8
     80  1.1  bsh 	strh	r1, [r3], #0x0002
     81  1.1  bsh 	bgt	Lbs_rm_2_loop
     82  1.1  bsh 
     83  1.1  bsh 	ldmfd	sp!, {pc}
     84  1.1  bsh 
     85  1.1  bsh 
     86  1.1  bsh 
     87  1.1  bsh /*
     88  1.1  bsh  * write multiple
     89  1.1  bsh  */
     90  1.1  bsh ENTRY(smobio8_bs_wm_2)
     91  1.1  bsh 	add	r0, r1, r2, LSL #2
     92  1.1  bsh 	ldr	r2, [sp, #0]
     93  1.1  bsh 	cmp     r2, #0x00000000
     94  1.1  bsh 	movle   pc, lr
     95  1.1  bsh 
     96  1.1  bsh Lbs_wm_2_loop:
     97  1.1  bsh 	ldrh	r1, [r3], #0x0002
     98  1.1  bsh 	subs	r2, r2, #0x00000001
     99  1.1  bsh 	strb	r1, [r0]
    100  1.1  bsh 	mov	r1, r1, LSR #8
    101  1.1  bsh 	strb	r1, [r0,#4]
    102  1.1  bsh 	bgt	Lbs_wm_2_loop
    103  1.1  bsh 
    104  1.1  bsh 	mov	pc, lr
    105  1.1  bsh 
    106  1.1  bsh 
    107  1.1  bsh /*
    108  1.1  bsh  * For 16-bit mode
    109  1.1  bsh  */
    110  1.1  bsh 
    111  1.1  bsh /*
    112  1.1  bsh  * read single
    113  1.1  bsh  */
    114  1.1  bsh 
    115  1.1  bsh ENTRY(smobio16_bs_r_1)
    116  1.1  bsh 	tst	r2, #1    /* Even/Odd ? */
    117  1.1  bsh 	ldreqb	r0, [r1, r2, LSL #2]
    118  1.1  bsh 	moveq	pc,lr
    119  1.1  bsh 
    120  1.1  bsh 	/* Odd byte.  read 16bits and get high byte */
    121  1.1  bsh 	bic	r2, r2, #1
    122  1.1  bsh 	add	r1, r1, r2, LSL #2
    123  1.1  bsh 	ldrh	r0, [r1]
    124  1.1  bsh 	mov	r0, r0, LSR #8
    125  1.1  bsh 	mov	pc, lr
    126  1.1  bsh 
    127  1.1  bsh 
    128  1.1  bsh /*
    129  1.1  bsh  * write single
    130  1.1  bsh  */
    131  1.1  bsh 
    132  1.1  bsh ENTRY(smobio16_bs_w_1)
    133  1.1  bsh 	tst	r2, #1    /* Even/Odd ? */
    134  1.1  bsh 	streqb	r3, [r1, r2, LSL #2]
    135  1.1  bsh 	moveq	pc,lr
    136  1.1  bsh 
    137  1.1  bsh 	/* Odd byte.  write 16bit with low byte is 0. */
    138  1.1  bsh 	bic	r2, r2, #1
    139  1.1  bsh 	mov	r3, r3, LSL #8
    140  1.1  bsh 	add	r1, r1, r2, LSL #2
    141  1.1  bsh 	strh	r3, [r1]
    142  1.1  bsh 	mov	pc, lr
    143  1.1  bsh 
    144  1.1  bsh