mini2440_machdep.c revision 1.15 1 1.1 nisimura /*-
2 1.1 nisimura * Copyright (c) 2012 The NetBSD Foundation, Inc.
3 1.1 nisimura * All rights reserved.
4 1.1 nisimura *
5 1.1 nisimura * This code is derived from software contributed to The NetBSD Foundation
6 1.1 nisimura * by Paul Fleischer <paul (at) xpg.dk>
7 1.1 nisimura *
8 1.1 nisimura * Redistribution and use in source and binary forms, with or without
9 1.1 nisimura * modification, are permitted provided that the following conditions
10 1.1 nisimura * are met:
11 1.1 nisimura * 1. Redistributions of source code must retain the above copyright
12 1.1 nisimura * notice, this list of conditions and the following disclaimer.
13 1.1 nisimura * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 nisimura * notice, this list of conditions and the following disclaimer in the
15 1.1 nisimura * documentation and/or other materials provided with the distribution.
16 1.1 nisimura *
17 1.1 nisimura * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
18 1.1 nisimura * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
19 1.1 nisimura * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
20 1.1 nisimura * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
21 1.1 nisimura * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22 1.1 nisimura * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 1.1 nisimura * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 1.1 nisimura * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25 1.1 nisimura * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 1.1 nisimura * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27 1.1 nisimura * POSSIBILITY OF SUCH DAMAGE.
28 1.1 nisimura */
29 1.1 nisimura /* This file is based on arch/evbarm/smdk2xx0/smdk2410_machdep.c */
30 1.1 nisimura /*
31 1.1 nisimura * Copyright (c) 2002, 2003 Fujitsu Component Limited
32 1.1 nisimura * Copyright (c) 2002, 2003, 2005 Genetec Corporation
33 1.1 nisimura * All rights reserved.
34 1.1 nisimura *
35 1.1 nisimura * Redistribution and use in source and binary forms, with or without
36 1.1 nisimura * modification, are permitted provided that the following conditions
37 1.1 nisimura * are met:
38 1.1 nisimura * 1. Redistributions of source code must retain the above copyright
39 1.1 nisimura * notice, this list of conditions and the following disclaimer.
40 1.1 nisimura * 2. Redistributions in binary form must reproduce the above copyright
41 1.1 nisimura * notice, this list of conditions and the following disclaimer in the
42 1.1 nisimura * documentation and/or other materials provided with the distribution.
43 1.1 nisimura * 3. Neither the name of The Fujitsu Component Limited nor the name of
44 1.1 nisimura * Genetec corporation may not be used to endorse or promote products
45 1.1 nisimura * derived from this software without specific prior written permission.
46 1.1 nisimura *
47 1.1 nisimura * THIS SOFTWARE IS PROVIDED BY FUJITSU COMPONENT LIMITED AND GENETEC
48 1.1 nisimura * CORPORATION ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
49 1.1 nisimura * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
50 1.1 nisimura * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
51 1.1 nisimura * DISCLAIMED. IN NO EVENT SHALL FUJITSU COMPONENT LIMITED OR GENETEC
52 1.1 nisimura * CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
53 1.1 nisimura * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
54 1.1 nisimura * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
55 1.1 nisimura * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
56 1.1 nisimura * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
57 1.1 nisimura * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
58 1.1 nisimura * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
59 1.1 nisimura * SUCH DAMAGE.
60 1.1 nisimura */
61 1.1 nisimura /*
62 1.1 nisimura * Copyright (c) 2001,2002 ARM Ltd
63 1.1 nisimura * All rights reserved.
64 1.1 nisimura *
65 1.1 nisimura * Redistribution and use in source and binary forms, with or without
66 1.1 nisimura * modification, are permitted provided that the following conditions
67 1.1 nisimura * are met:
68 1.1 nisimura * 1. Redistributions of source code must retain the above copyright
69 1.1 nisimura * notice, this list of conditions and the following disclaimer.
70 1.1 nisimura * 2. Redistributions in binary form must reproduce the above copyright
71 1.1 nisimura * notice, this list of conditions and the following disclaimer in the
72 1.1 nisimura * documentation and/or other materials provided with the distribution.
73 1.1 nisimura * 3. The name of the company may not be used to endorse or promote
74 1.1 nisimura * products derived from this software without specific prior written
75 1.1 nisimura * permission.
76 1.1 nisimura *
77 1.1 nisimura * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND
78 1.1 nisimura * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
79 1.1 nisimura * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
80 1.1 nisimura * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ARM LTD
81 1.1 nisimura * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
82 1.1 nisimura * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
83 1.1 nisimura * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
84 1.1 nisimura * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
85 1.1 nisimura * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
86 1.1 nisimura * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
87 1.1 nisimura * POSSIBILITY OF SUCH DAMAGE.
88 1.1 nisimura *
89 1.1 nisimura */
90 1.1 nisimura
91 1.1 nisimura /*
92 1.1 nisimura * Copyright (c) 1997,1998 Mark Brinicombe.
93 1.1 nisimura * Copyright (c) 1997,1998 Causality Limited.
94 1.1 nisimura * All rights reserved.
95 1.1 nisimura *
96 1.1 nisimura * Redistribution and use in source and binary forms, with or without
97 1.1 nisimura * modification, are permitted provided that the following conditions
98 1.1 nisimura * are met:
99 1.1 nisimura * 1. Redistributions of source code must retain the above copyright
100 1.1 nisimura * notice, this list of conditions and the following disclaimer.
101 1.1 nisimura * 2. Redistributions in binary form must reproduce the above copyright
102 1.1 nisimura * notice, this list of conditions and the following disclaimer in the
103 1.1 nisimura * documentation and/or other materials provided with the distribution.
104 1.1 nisimura * 3. All advertising materials mentioning features or use of this software
105 1.1 nisimura * must display the following acknowledgement:
106 1.1 nisimura * This product includes software developed by Mark Brinicombe
107 1.1 nisimura * for the NetBSD Project.
108 1.1 nisimura * 4. The name of the company nor the name of the author may be used to
109 1.1 nisimura * endorse or promote products derived from this software without specific
110 1.1 nisimura * prior written permission.
111 1.1 nisimura *
112 1.1 nisimura * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
113 1.1 nisimura * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
114 1.1 nisimura * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
115 1.1 nisimura * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
116 1.1 nisimura * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
117 1.1 nisimura * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
118 1.1 nisimura * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
119 1.1 nisimura * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
120 1.1 nisimura * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
121 1.1 nisimura * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
122 1.1 nisimura * SUCH DAMAGE.
123 1.1 nisimura *
124 1.1 nisimura * Machine dependant functions for kernel setup for integrator board
125 1.1 nisimura *
126 1.1 nisimura * Created : 24/11/97
127 1.1 nisimura */
128 1.1 nisimura
129 1.1 nisimura /*
130 1.1 nisimura * Machine dependant functions for kernel setup for FriendlyARM MINI2440
131 1.1 nisimura */
132 1.1 nisimura
133 1.1 nisimura #include <sys/cdefs.h>
134 1.15 skrll __KERNEL_RCSID(0, "$NetBSD: mini2440_machdep.c,v 1.15 2019/07/16 14:41:47 skrll Exp $");
135 1.1 nisimura
136 1.11 skrll #include "opt_arm_debug.h"
137 1.12 skrll #include "opt_console.h"
138 1.1 nisimura #include "opt_ddb.h"
139 1.1 nisimura #include "opt_kgdb.h"
140 1.1 nisimura #include "opt_pmap_debug.h"
141 1.1 nisimura #include "opt_md.h"
142 1.1 nisimura
143 1.1 nisimura #include <sys/param.h>
144 1.1 nisimura #include <sys/device.h>
145 1.1 nisimura #include <sys/systm.h>
146 1.1 nisimura #include <sys/kernel.h>
147 1.1 nisimura #include <sys/exec.h>
148 1.1 nisimura #include <sys/proc.h>
149 1.1 nisimura #include <sys/msgbuf.h>
150 1.1 nisimura #include <sys/reboot.h>
151 1.1 nisimura #include <sys/termios.h>
152 1.1 nisimura #include <sys/ksyms.h>
153 1.1 nisimura #include <sys/mount.h>
154 1.1 nisimura
155 1.1 nisimura #include <net/if.h>
156 1.1 nisimura #include <net/if_ether.h>
157 1.1 nisimura #include <net/if_media.h>
158 1.1 nisimura
159 1.1 nisimura #include <uvm/uvm_extern.h>
160 1.1 nisimura
161 1.1 nisimura #include <dev/cons.h>
162 1.1 nisimura #include <dev/md.h>
163 1.1 nisimura
164 1.1 nisimura #include <machine/db_machdep.h>
165 1.1 nisimura #include <ddb/db_sym.h>
166 1.1 nisimura #include <ddb/db_extern.h>
167 1.1 nisimura #ifdef KGDB
168 1.1 nisimura #include <sys/kgdb.h>
169 1.1 nisimura #endif
170 1.1 nisimura
171 1.1 nisimura #include <sys/exec_elf.h>
172 1.1 nisimura
173 1.1 nisimura #include <sys/bus.h>
174 1.1 nisimura #include <machine/cpu.h>
175 1.1 nisimura #include <machine/frame.h>
176 1.1 nisimura #include <machine/intr.h>
177 1.1 nisimura #include <arm/undefined.h>
178 1.1 nisimura
179 1.1 nisimura #include <machine/autoconf.h>
180 1.1 nisimura
181 1.8 matt #include <arm/locore.h>
182 1.1 nisimura #include <arm/arm32/machdep.h>
183 1.1 nisimura
184 1.1 nisimura #include <arm/s3c2xx0/s3c2440reg.h>
185 1.1 nisimura #include <arm/s3c2xx0/s3c2440var.h>
186 1.1 nisimura
187 1.1 nisimura #include <arch/evbarm/mini2440/mini2440_bootinfo.h>
188 1.1 nisimura
189 1.1 nisimura #include "ksyms.h"
190 1.1 nisimura
191 1.1 nisimura #ifndef SDRAM_START
192 1.1 nisimura #define SDRAM_START S3C2440_SDRAM_START
193 1.1 nisimura #endif
194 1.1 nisimura #ifndef SDRAM_SIZE
195 1.1 nisimura #define SDRAM_SIZE (64*1024*1024) /* 64 Mb */
196 1.1 nisimura #endif
197 1.1 nisimura
198 1.1 nisimura /*
199 1.1 nisimura * Address to map I/O registers in early initialize stage.
200 1.1 nisimura */
201 1.1 nisimura #define MINI2440_IO_VBASE 0xfd000000
202 1.1 nisimura
203 1.1 nisimura /* Kernel text starts 2MB in from the bottom of the kernel address space. */
204 1.1 nisimura #define KERNEL_OFFSET 0x00200000
205 1.1 nisimura #define KERNEL_TEXT_BASE (KERNEL_BASE + KERNEL_OFFSET)
206 1.1 nisimura #define KERNEL_VM_BASE (KERNEL_BASE + 0x01000000)
207 1.1 nisimura
208 1.1 nisimura /*
209 1.1 nisimura * The range 0xc1000000 - 0xccffffff is available for kernel VM space
210 1.1 nisimura * Core-logic registers and I/O mappings occupy 0xfd000000 - 0xffffffff
211 1.1 nisimura */
212 1.1 nisimura #define KERNEL_VM_SIZE 0x0C000000
213 1.1 nisimura
214 1.1 nisimura /* Declared extern elsewhere in the kernel */
215 1.1 nisimura BootConfig bootconfig; /* Boot config storage */
216 1.1 nisimura char *boot_args = NULL;
217 1.1 nisimura //char *boot_file = NULL;
218 1.1 nisimura
219 1.1 nisimura char bootinfo[BOOTINFO_MAXSIZE];
220 1.1 nisimura struct btinfo_rootdevice *bi_rdev;
221 1.1 nisimura struct btinfo_net *bi_net;
222 1.1 nisimura struct btinfo_bootpath *bi_path;
223 1.1 nisimura
224 1.9 matt vaddr_t physical_start;
225 1.9 matt vaddr_t physical_freestart;
226 1.9 matt vaddr_t physical_freeend;
227 1.9 matt vaddr_t physical_freeend_low;
228 1.9 matt vaddr_t physical_end;
229 1.1 nisimura u_int free_pages;
230 1.9 matt vaddr_t pagetables_start;
231 1.1 nisimura
232 1.1 nisimura /*int debug_flags;*/
233 1.1 nisimura #ifndef PMAP_STATIC_L1S
234 1.1 nisimura int max_processes = 64; /* Default number */
235 1.1 nisimura #endif /* !PMAP_STATIC_L1S */
236 1.1 nisimura
237 1.9 matt paddr_t msgbufphys;
238 1.1 nisimura
239 1.1 nisimura #ifdef PMAP_DEBUG
240 1.1 nisimura extern int pmap_debug_level;
241 1.1 nisimura #endif
242 1.1 nisimura
243 1.1 nisimura #define KERNEL_PT_SYS 0 /* L2 table for mapping zero page */
244 1.1 nisimura #define KERNEL_PT_KERNEL 1 /* L2 table for mapping kernel */
245 1.2 nisimura #define KERNEL_PT_KERNEL_NUM 3 /* L2 tables for mapping kernel VM */
246 1.1 nisimura
247 1.1 nisimura #define KERNEL_PT_VMDATA (KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM)
248 1.1 nisimura
249 1.2 nisimura #define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */
250 1.1 nisimura #define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
251 1.1 nisimura
252 1.1 nisimura pv_addr_t kernel_pt_table[NUM_KERNEL_PTS];
253 1.1 nisimura
254 1.1 nisimura /* Prototypes */
255 1.1 nisimura
256 1.1 nisimura void consinit(void);
257 1.1 nisimura void kgdb_port_init(void);
258 1.1 nisimura static void mini2440_ksyms(struct btinfo_symtab *bi_symtab);
259 1.1 nisimura static void *lookup_bootinfo(int type);
260 1.1 nisimura static void mini2440_device_register(device_t dev, void *aux);
261 1.1 nisimura
262 1.1 nisimura
263 1.1 nisimura #include "com.h"
264 1.1 nisimura #if NCOM > 0
265 1.1 nisimura #include <dev/ic/comreg.h>
266 1.1 nisimura #include <dev/ic/comvar.h>
267 1.1 nisimura #endif
268 1.1 nisimura
269 1.1 nisimura #include "sscom.h"
270 1.1 nisimura #if NSSCOM > 0
271 1.1 nisimura #include "opt_sscom.h"
272 1.1 nisimura #include <arm/s3c2xx0/sscom_var.h>
273 1.1 nisimura #endif
274 1.1 nisimura
275 1.1 nisimura /*
276 1.1 nisimura * Define the default console speed for the board. This is generally
277 1.1 nisimura * what the firmware provided with the board defaults to.
278 1.1 nisimura */
279 1.1 nisimura #ifndef CONSPEED
280 1.1 nisimura #define CONSPEED B115200 /* TTYDEF_SPEED */
281 1.1 nisimura #endif
282 1.1 nisimura #ifndef CONMODE
283 1.1 nisimura #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
284 1.1 nisimura #endif
285 1.1 nisimura
286 1.1 nisimura int comcnspeed = CONSPEED;
287 1.1 nisimura int comcnmode = CONMODE;
288 1.1 nisimura
289 1.1 nisimura /*
290 1.1 nisimura * void cpu_reboot(int howto, char *bootstr)
291 1.1 nisimura *
292 1.1 nisimura * Reboots the system
293 1.1 nisimura *
294 1.1 nisimura * Deal with any syncing, unmounting, dumping and shutdown hooks,
295 1.1 nisimura * then reset the CPU.
296 1.1 nisimura */
297 1.1 nisimura void
298 1.1 nisimura cpu_reboot(int howto, char *bootstr)
299 1.1 nisimura {
300 1.1 nisimura #ifdef DIAGNOSTIC
301 1.1 nisimura /* info */
302 1.1 nisimura printf("boot: howto=%08x curproc=%p\n", howto, curproc);
303 1.1 nisimura #endif
304 1.1 nisimura
305 1.5 matt cpu_reset_address_paddr = vtophys((uintptr_t)s3c2440_softreset);
306 1.1 nisimura
307 1.1 nisimura /*
308 1.1 nisimura * If we are still cold then hit the air brakes
309 1.1 nisimura * and crash to earth fast
310 1.1 nisimura */
311 1.1 nisimura if (cold) {
312 1.1 nisimura doshutdownhooks();
313 1.1 nisimura printf("The operating system has halted.\n");
314 1.1 nisimura printf("Please press any key to reboot.\n\n");
315 1.1 nisimura cngetc();
316 1.1 nisimura printf("rebooting...\n");
317 1.1 nisimura cpu_reset();
318 1.1 nisimura /* NOTREACHED */
319 1.1 nisimura }
320 1.1 nisimura /* Disable console buffering */
321 1.1 nisimura
322 1.1 nisimura /*
323 1.1 nisimura * If RB_NOSYNC was not specified sync the discs.
324 1.1 nisimura * Note: Unless cold is set to 1 here, syslogd will die during the
325 1.1 nisimura * unmount. It looks like syslogd is getting woken up only to find
326 1.1 nisimura * that it cannot page part of the binary in as the filesystem has
327 1.1 nisimura * been unmounted.
328 1.1 nisimura */
329 1.1 nisimura if (!(howto & RB_NOSYNC))
330 1.1 nisimura bootsync();
331 1.1 nisimura
332 1.1 nisimura /* Say NO to interrupts */
333 1.1 nisimura splhigh();
334 1.1 nisimura
335 1.1 nisimura /* Do a dump if requested. */
336 1.1 nisimura if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
337 1.1 nisimura dumpsys();
338 1.1 nisimura
339 1.1 nisimura /* Run any shutdown hooks */
340 1.1 nisimura doshutdownhooks();
341 1.1 nisimura
342 1.1 nisimura /* Make sure IRQ's are disabled */
343 1.1 nisimura IRQdisable;
344 1.1 nisimura
345 1.1 nisimura if (howto & RB_HALT) {
346 1.1 nisimura printf("The operating system has halted.\n");
347 1.1 nisimura printf("Please press any key to reboot.\n\n");
348 1.1 nisimura cngetc();
349 1.1 nisimura }
350 1.1 nisimura printf("rebooting...\n");
351 1.1 nisimura cpu_reset();
352 1.1 nisimura /* NOTREACHED */
353 1.1 nisimura }
354 1.1 nisimura
355 1.1 nisimura /*
356 1.1 nisimura * Static device mappings. These peripheral registers are mapped at
357 1.1 nisimura * fixed virtual addresses very early in initarm() so that we can use
358 1.1 nisimura * them while booting the kernel , and stay at the same address
359 1.1 nisimura * throughout whole kernel's life time.
360 1.1 nisimura *
361 1.1 nisimura * We use this table twice; once with bootstrap page table, and once
362 1.1 nisimura * with kernel's page table which we build up in initarm().
363 1.1 nisimura *
364 1.1 nisimura * Since we map these registers into the bootstrap page table using
365 1.1 nisimura * pmap_devmap_bootstrap() which calls pmap_map_chunk(), we map
366 1.1 nisimura * registers segment-aligned and segment-rounded in order to avoid
367 1.1 nisimura * using the 2nd page tables.
368 1.1 nisimura */
369 1.1 nisimura
370 1.1 nisimura #define _A(a) ((a) & ~L1_S_OFFSET)
371 1.1 nisimura #define _S(s) (((s) + L1_S_SIZE - 1) & ~(L1_S_SIZE-1))
372 1.1 nisimura
373 1.1 nisimura #define _V(n) (MINI2440_IO_VBASE + (n) * L1_S_SIZE)
374 1.1 nisimura
375 1.1 nisimura #define GPIO_VBASE _V(0)
376 1.1 nisimura #define INTCTL_VBASE _V(1)
377 1.1 nisimura #define CLKMAN_VBASE _V(2)
378 1.1 nisimura #define UART_VBASE _V(3)
379 1.1 nisimura
380 1.1 nisimura static const struct pmap_devmap mini2440_devmap[] = {
381 1.1 nisimura /* GPIO registers */
382 1.1 nisimura {
383 1.1 nisimura GPIO_VBASE,
384 1.1 nisimura _A(S3C2440_GPIO_BASE),
385 1.1 nisimura _S(S3C2440_GPIO_SIZE),
386 1.1 nisimura VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE,
387 1.1 nisimura },
388 1.1 nisimura {
389 1.1 nisimura INTCTL_VBASE,
390 1.1 nisimura _A(S3C2440_INTCTL_BASE),
391 1.1 nisimura _S(S3C2440_INTCTL_SIZE),
392 1.1 nisimura VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE,
393 1.1 nisimura },
394 1.1 nisimura {
395 1.1 nisimura CLKMAN_VBASE,
396 1.1 nisimura _A(S3C2440_CLKMAN_BASE),
397 1.1 nisimura _S(S3C24X0_CLKMAN_SIZE),
398 1.1 nisimura VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE,
399 1.1 nisimura },
400 1.1 nisimura { /* UART registers for UART0, 1, 2. */
401 1.1 nisimura UART_VBASE,
402 1.1 nisimura _A(S3C2440_UART0_BASE),
403 1.1 nisimura _S(S3C2440_UART_BASE(3) - S3C2440_UART0_BASE),
404 1.1 nisimura VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE,
405 1.1 nisimura },
406 1.1 nisimura
407 1.1 nisimura { 0, 0, 0, 0 }
408 1.1 nisimura };
409 1.1 nisimura
410 1.1 nisimura #undef _A
411 1.1 nisimura #undef _S
412 1.1 nisimura
413 1.1 nisimura static inline pd_entry_t *
414 1.1 nisimura read_ttb(void)
415 1.1 nisimura {
416 1.1 nisimura long ttb;
417 1.1 nisimura
418 1.1 nisimura __asm volatile("mrc p15, 0, %0, c2, c0, 0" : "=r"(ttb));
419 1.1 nisimura
420 1.1 nisimura
421 1.1 nisimura return (pd_entry_t *)(ttb & ~((1 << 14) - 1));
422 1.1 nisimura }
423 1.1 nisimura
424 1.1 nisimura
425 1.1 nisimura #define ioreg_write32(a,v) (*(volatile uint32_t *)(a)=(v))
426 1.1 nisimura
427 1.1 nisimura /*
428 1.15 skrll * vaddr_t initarm(...)
429 1.1 nisimura *
430 1.1 nisimura * Initial entry point on startup. This gets called before main() is
431 1.1 nisimura * entered.
432 1.1 nisimura * It should be responsible for setting up everything that must be
433 1.1 nisimura * in place when main is called.
434 1.1 nisimura * This includes
435 1.1 nisimura * Taking a copy of the boot configuration structure.
436 1.1 nisimura * Initialising the physical console so characters can be printed.
437 1.1 nisimura * Setting up page tables for the kernel
438 1.1 nisimura * Relocating the kernel to the bottom of physical memory
439 1.1 nisimura */
440 1.1 nisimura
441 1.15 skrll vaddr_t
442 1.1 nisimura initarm(void *arg)
443 1.1 nisimura {
444 1.1 nisimura int loop;
445 1.1 nisimura int loop1;
446 1.1 nisimura u_int l1pagetable;
447 1.1 nisimura extern int etext __asm("_etext");
448 1.1 nisimura extern int end __asm("_end");
449 1.1 nisimura uint32_t kerneldatasize;
450 1.1 nisimura struct btinfo_magic *bi_magic = arg;
451 1.1 nisimura struct btinfo_bootstring *bi_bootstring;
452 1.1 nisimura struct btinfo_symtab *bi_symtab;
453 1.1 nisimura
454 1.1 nisimura boothowto = 0;
455 1.1 nisimura
456 1.1 nisimura /* Copy bootinfo from boot loader into kernel memory where it remains.
457 1.1 nisimura */
458 1.1 nisimura if (bi_magic != 0x0 && bi_magic->magic == BOOTINFO_MAGIC) {
459 1.1 nisimura memcpy(bootinfo, bi_magic, sizeof(bootinfo));
460 1.1 nisimura } else {
461 1.1 nisimura memset(bootinfo, 0, sizeof(bootinfo));
462 1.1 nisimura }
463 1.1 nisimura
464 1.1 nisimura /* Extract boot_args from bootinfo */
465 1.1 nisimura bi_bootstring = lookup_bootinfo(BTINFO_BOOTSTRING);
466 1.1 nisimura if (bi_bootstring ) {
467 1.1 nisimura printf("Bootloader args are %s\n", bi_bootstring->bootstring);
468 1.1 nisimura boot_args = bi_bootstring->bootstring;
469 1.1 nisimura parse_mi_bootargs(boot_args);
470 1.1 nisimura }
471 1.1 nisimura
472 1.1 nisimura #define pdatb (*(volatile uint8_t *)(S3C2440_GPIO_BASE+GPIO_PBDAT))
473 1.1 nisimura
474 1.1 nisimura // 0x1E0 is the mask for GPB5, GPB6, GPB7, and GPB8
475 1.1 nisimura #define __LED(x) (pdatb = (pdatb & ~0x1e0) | (~(1<<(x+5)) & 0x1e0))
476 1.1 nisimura
477 1.1 nisimura __LED(0);
478 1.1 nisimura
479 1.1 nisimura /*
480 1.1 nisimura * Heads up ... Setup the CPU / MMU / TLB functions
481 1.1 nisimura */
482 1.1 nisimura if (set_cpufuncs())
483 1.1 nisimura panic("cpu not recognized!");
484 1.1 nisimura
485 1.1 nisimura /*
486 1.1 nisimura * Map I/O registers that are used in startup. Now we are
487 1.1 nisimura * still using page table prepared by bootloader. Later we'll
488 1.1 nisimura * map those registers at the same address in the kernel page
489 1.1 nisimura * table.
490 1.1 nisimura */
491 1.1 nisimura pmap_devmap_bootstrap((vaddr_t)read_ttb(), mini2440_devmap);
492 1.1 nisimura
493 1.1 nisimura #undef pdatb
494 1.1 nisimura #define pdatb (*(volatile uint8_t *)(GPIO_VBASE+GPIO_PBDAT))
495 1.1 nisimura
496 1.1 nisimura /* Disable all peripheral interrupts */
497 1.1 nisimura ioreg_write32(INTCTL_VBASE + INTCTL_INTMSK, ~0);
498 1.1 nisimura
499 1.1 nisimura __LED(1);
500 1.1 nisimura
501 1.1 nisimura /* initialize some variables so that splfoo() doesn't
502 1.1 nisimura touch illegal address. */
503 1.1 nisimura s3c2xx0_intr_bootstrap(INTCTL_VBASE);
504 1.1 nisimura
505 1.1 nisimura __LED(2);
506 1.1 nisimura consinit();
507 1.1 nisimura __LED(3);
508 1.1 nisimura
509 1.1 nisimura /* Extract information from the bootloader configuration */
510 1.1 nisimura bi_rdev = lookup_bootinfo(BTINFO_ROOTDEVICE);
511 1.1 nisimura bi_net = lookup_bootinfo(BTINFO_NET);
512 1.1 nisimura bi_path = lookup_bootinfo(BTINFO_BOOTPATH);
513 1.1 nisimura
514 1.1 nisimura #ifdef VERBOSE_INIT_ARM
515 1.1 nisimura printf("consinit done\n");
516 1.1 nisimura #endif
517 1.1 nisimura
518 1.1 nisimura #ifdef KGDB
519 1.1 nisimura kgdb_port_init();
520 1.1 nisimura #endif
521 1.1 nisimura
522 1.1 nisimura #ifdef VERBOSE_INIT_ARM
523 1.1 nisimura /* Talk to the user */
524 1.1 nisimura printf("\nNetBSD/evbarm (MINI2440) booting ...\n");
525 1.1 nisimura #endif
526 1.1 nisimura /*
527 1.1 nisimura * Ok we have the following memory map
528 1.1 nisimura *
529 1.1 nisimura * Physical Address Range Description
530 1.1 nisimura * ----------------------- ----------------------------------
531 1.1 nisimura * 0x30000000 - 0x33ffffff SDRAM (64MB)
532 1.1 nisimura *
533 1.1 nisimura * Kernel is loaded by bootloader at 0x30200000
534 1.1 nisimura *
535 1.1 nisimura * The initarm() has the responsibility for creating the kernel
536 1.1 nisimura * page tables.
537 1.1 nisimura * It must also set up various memory pointers that are used
538 1.1 nisimura * by pmap etc.
539 1.1 nisimura */
540 1.1 nisimura
541 1.1 nisimura /* Fake bootconfig structure for the benefit of pmap.c */
542 1.1 nisimura /* XXX must make the memory description h/w independent */
543 1.1 nisimura bootconfig.dramblocks = 1;
544 1.1 nisimura bootconfig.dram[0].address = SDRAM_START;
545 1.1 nisimura bootconfig.dram[0].pages = SDRAM_SIZE / PAGE_SIZE;
546 1.1 nisimura
547 1.1 nisimura /*
548 1.1 nisimura * Set up the variables that define the availablilty of
549 1.1 nisimura * physical memory.
550 1.1 nisimura * We use the 2MB between the physical start and the kernel to
551 1.1 nisimura * begin with. Allocating from 0x30200000 and downwards
552 1.1 nisimura * If we get too close to the bottom of SDRAM, we
553 1.1 nisimura * will panic. We will update physical_freestart and
554 1.1 nisimura * physical_freeend later to reflect what pmap_bootstrap()
555 1.1 nisimura * wants to see.
556 1.1 nisimura *
557 1.1 nisimura * XXX pmap_bootstrap() needs an enema.
558 1.1 nisimura */
559 1.1 nisimura physical_start = bootconfig.dram[0].address;
560 1.1 nisimura physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE);
561 1.1 nisimura
562 1.1 nisimura physical_freestart = SDRAM_START; /* XXX */
563 1.1 nisimura physical_freeend = SDRAM_START + KERNEL_OFFSET;
564 1.1 nisimura
565 1.1 nisimura physmem = (physical_end - physical_start) / PAGE_SIZE;
566 1.1 nisimura
567 1.1 nisimura #ifdef VERBOSE_INIT_ARM
568 1.1 nisimura /* Tell the user about the memory */
569 1.1 nisimura printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem,
570 1.1 nisimura physical_start, physical_end - 1);
571 1.1 nisimura printf("phys_end: 0x%08lx\n", physical_end);
572 1.1 nisimura #endif
573 1.1 nisimura
574 1.1 nisimura /*
575 1.1 nisimura * XXX
576 1.1 nisimura * Okay, the kernel starts 2MB in from the bottom of physical
577 1.1 nisimura * memory. We are going to allocate our bootstrap pages downwards
578 1.1 nisimura * from there.
579 1.1 nisimura *
580 1.1 nisimura * We need to allocate some fixed page tables to get the kernel
581 1.1 nisimura * going. We allocate one page directory and a number of page
582 1.1 nisimura * tables and store the physical addresses in the kernel_pt_table
583 1.1 nisimura * array.
584 1.1 nisimura *
585 1.1 nisimura * The kernel page directory must be on a 16K boundary. The page
586 1.1 nisimura * tables must be on 4K boundaries. What we do is allocate the
587 1.1 nisimura * page directory on the first 16K boundary that we encounter, and
588 1.1 nisimura * the page tables on 4K boundaries otherwise. Since we allocate
589 1.1 nisimura * at least 3 L2 page tables, we are guaranteed to encounter at
590 1.1 nisimura * least one 16K aligned region.
591 1.1 nisimura */
592 1.1 nisimura
593 1.1 nisimura #ifdef VERBOSE_INIT_ARM
594 1.1 nisimura printf("Allocating page tables\n");
595 1.1 nisimura #endif
596 1.1 nisimura
597 1.1 nisimura free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE;
598 1.1 nisimura
599 1.1 nisimura #ifdef VERBOSE_INIT_ARM
600 1.1 nisimura printf("freestart = 0x%08lx, free_pages = %d (0x%08x), freeend = 0x%08lx\n",
601 1.1 nisimura physical_freestart, free_pages, free_pages, physical_freeend);
602 1.1 nisimura #endif
603 1.1 nisimura
604 1.1 nisimura /* Define a macro to simplify memory allocation */
605 1.1 nisimura #define valloc_pages(var, np) \
606 1.1 nisimura alloc_pages((var).pv_pa, (np)); \
607 1.1 nisimura (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start;
608 1.1 nisimura
609 1.1 nisimura #define alloc_pages(var, np) \
610 1.1 nisimura physical_freeend -= ((np) * PAGE_SIZE); \
611 1.1 nisimura if (physical_freeend < physical_freestart) \
612 1.1 nisimura panic("initarm: out of memory"); \
613 1.1 nisimura (var) = physical_freeend; \
614 1.1 nisimura free_pages -= (np); \
615 1.1 nisimura memset((char *)(var), 0, ((np) * PAGE_SIZE));
616 1.1 nisimura
617 1.1 nisimura loop1 = 0;
618 1.1 nisimura for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
619 1.1 nisimura /* Are we 16KB aligned for an L1 ? */
620 1.1 nisimura if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0
621 1.1 nisimura && kernel_l1pt.pv_pa == 0) {
622 1.1 nisimura valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
623 1.1 nisimura } else {
624 1.1 nisimura valloc_pages(kernel_pt_table[loop1],
625 1.1 nisimura L2_TABLE_SIZE / PAGE_SIZE);
626 1.1 nisimura ++loop1;
627 1.1 nisimura }
628 1.1 nisimura }
629 1.1 nisimura
630 1.1 nisimura /* This should never be able to happen but better confirm that. */
631 1.1 nisimura if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE - 1)) != 0)
632 1.1 nisimura panic("initarm: Failed to align the kernel page directory\n");
633 1.1 nisimura
634 1.1 nisimura /*
635 1.1 nisimura * Allocate a page for the system page mapped to V0x00000000
636 1.1 nisimura * This page will just contain the system vectors and can be
637 1.1 nisimura * shared by all processes.
638 1.1 nisimura */
639 1.1 nisimura alloc_pages(systempage.pv_pa, 1);
640 1.1 nisimura
641 1.1 nisimura /* Allocate stacks for all modes */
642 1.1 nisimura valloc_pages(irqstack, IRQ_STACK_SIZE);
643 1.1 nisimura valloc_pages(abtstack, ABT_STACK_SIZE);
644 1.1 nisimura valloc_pages(undstack, UND_STACK_SIZE);
645 1.1 nisimura valloc_pages(kernelstack, UPAGES);
646 1.1 nisimura
647 1.1 nisimura #ifdef VERBOSE_INIT_ARM
648 1.1 nisimura printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa,
649 1.1 nisimura irqstack.pv_va);
650 1.1 nisimura printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa,
651 1.1 nisimura abtstack.pv_va);
652 1.1 nisimura printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa,
653 1.1 nisimura undstack.pv_va);
654 1.1 nisimura printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa,
655 1.1 nisimura kernelstack.pv_va);
656 1.1 nisimura printf("Free memory in bootstrap region: %ld bytes\n", physical_freeend - physical_freestart);
657 1.1 nisimura #endif
658 1.1 nisimura
659 1.1 nisimura alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE);
660 1.1 nisimura
661 1.1 nisimura physical_freeend_low = physical_freeend;
662 1.1 nisimura
663 1.1 nisimura /*
664 1.1 nisimura * Ok we have allocated physical pages for the primary kernel
665 1.1 nisimura * page tables
666 1.1 nisimura */
667 1.1 nisimura
668 1.1 nisimura #ifdef VERBOSE_INIT_ARM
669 1.1 nisimura printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa);
670 1.1 nisimura #endif
671 1.1 nisimura
672 1.1 nisimura /*
673 1.1 nisimura * Now we start construction of the L1 page table
674 1.1 nisimura * We start by mapping the L2 page tables into the L1.
675 1.1 nisimura * This means that we can replace L1 mappings later on if necessary
676 1.1 nisimura */
677 1.1 nisimura l1pagetable = kernel_l1pt.pv_pa;
678 1.1 nisimura
679 1.1 nisimura /* Map the L2 pages tables in the L1 page table */
680 1.1 nisimura pmap_link_l2pt(l1pagetable, 0x00000000,
681 1.1 nisimura &kernel_pt_table[KERNEL_PT_SYS]);
682 1.1 nisimura for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++)
683 1.1 nisimura pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000,
684 1.1 nisimura &kernel_pt_table[KERNEL_PT_KERNEL + loop]);
685 1.1 nisimura for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
686 1.1 nisimura pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
687 1.1 nisimura &kernel_pt_table[KERNEL_PT_VMDATA + loop]);
688 1.1 nisimura
689 1.1 nisimura /* update the top of the kernel VM */
690 1.1 nisimura pmap_curmaxkvaddr =
691 1.1 nisimura KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000);
692 1.1 nisimura
693 1.1 nisimura #ifdef VERBOSE_INIT_ARM
694 1.1 nisimura printf("Mapping kernel\n");
695 1.1 nisimura #endif
696 1.1 nisimura
697 1.1 nisimura /* Now we fill in the L2 pagetable for the kernel static code/data */
698 1.1 nisimura {
699 1.1 nisimura /* Total size must include symbol table, if it exists.
700 1.1 nisimura The size of the symbol table can be acquired from the ELF
701 1.1 nisimura header, to which a pointer is passed in the boot info (ssym).
702 1.1 nisimura */
703 1.1 nisimura size_t textsize = (uintptr_t)&etext - KERNEL_TEXT_BASE;
704 1.1 nisimura kerneldatasize = (uintptr_t)&end - KERNEL_TEXT_BASE;
705 1.1 nisimura u_int logical;
706 1.1 nisimura
707 1.1 nisimura bi_symtab = lookup_bootinfo(BTINFO_SYMTAB);
708 1.1 nisimura
709 1.1 nisimura if (bi_symtab) {
710 1.1 nisimura Elf_Ehdr *elfHeader;
711 1.1 nisimura Elf_Shdr *sectionHeader;
712 1.1 nisimura int nsection;
713 1.1 nisimura int sz = 0;
714 1.1 nisimura
715 1.1 nisimura elfHeader = bi_symtab->ssym;
716 1.1 nisimura
717 1.1 nisimura #ifdef VERBOSE_INIT_ARM
718 1.1 nisimura printf("Symbol table information provided by bootloader\n");
719 1.1 nisimura printf("ELF header is at %p\n", elfHeader);
720 1.1 nisimura #endif
721 1.1 nisimura sectionHeader = (Elf_Shdr*)((char*)(bi_symtab->ssym) +
722 1.1 nisimura (elfHeader->e_shoff));
723 1.1 nisimura nsection = elfHeader->e_shnum;
724 1.1 nisimura #ifdef VERBOSE_INIT_ARM
725 1.1 nisimura printf("Number of sections: %d\n", nsection);
726 1.1 nisimura #endif
727 1.1 nisimura for(; nsection > 0; nsection--, sectionHeader++) {
728 1.1 nisimura if (sectionHeader->sh_offset > 0 &&
729 1.1 nisimura (sectionHeader->sh_offset + sectionHeader->sh_size) > sz)
730 1.1 nisimura sz = sectionHeader->sh_offset + sectionHeader->sh_size;
731 1.1 nisimura }
732 1.1 nisimura #ifdef VERBOSE_INIT_ARM
733 1.1 nisimura printf("Max size of sections: %d\n", sz);
734 1.1 nisimura #endif
735 1.1 nisimura kerneldatasize += sz;
736 1.1 nisimura }
737 1.1 nisimura
738 1.1 nisimura #ifdef VERBOSE_INIT_ARM
739 1.1 nisimura printf("Textsize: %u, kerneldatasize: %u\n", (uint)textsize,
740 1.1 nisimura (uint)kerneldatasize);
741 1.1 nisimura printf("&etext: 0x%x\n", (uint)&etext);
742 1.1 nisimura printf("&end: 0x%x\n", (uint)&end);
743 1.1 nisimura printf("KERNEL_TEXT_BASE: 0x%x\n", KERNEL_TEXT_BASE);
744 1.1 nisimura #endif
745 1.1 nisimura
746 1.1 nisimura textsize = (textsize + PGOFSET) & ~PGOFSET;
747 1.1 nisimura kerneldatasize = (kerneldatasize + PGOFSET) & ~PGOFSET;
748 1.1 nisimura
749 1.1 nisimura logical = KERNEL_OFFSET; /* offset of kernel in RAM */
750 1.1 nisimura
751 1.1 nisimura logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
752 1.1 nisimura physical_start + logical, textsize,
753 1.1 nisimura VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
754 1.1 nisimura logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
755 1.1 nisimura physical_start + logical, kerneldatasize - textsize,
756 1.1 nisimura VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
757 1.1 nisimura }
758 1.1 nisimura
759 1.1 nisimura #ifdef VERBOSE_INIT_ARM
760 1.1 nisimura printf("Constructing L2 page tables\n");
761 1.1 nisimura #endif
762 1.1 nisimura
763 1.1 nisimura /* Map the stack pages */
764 1.1 nisimura pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
765 1.1 nisimura IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE,
766 1.1 nisimura PTE_CACHE);
767 1.1 nisimura pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
768 1.1 nisimura ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE,
769 1.1 nisimura PTE_CACHE);
770 1.1 nisimura pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
771 1.1 nisimura UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE,
772 1.1 nisimura PTE_CACHE);
773 1.1 nisimura pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
774 1.1 nisimura UPAGES * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
775 1.1 nisimura
776 1.1 nisimura pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
777 1.1 nisimura L1_TABLE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_PAGETABLE);
778 1.1 nisimura
779 1.1 nisimura for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
780 1.1 nisimura pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va,
781 1.1 nisimura kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
782 1.1 nisimura VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
783 1.1 nisimura }
784 1.1 nisimura
785 1.1 nisimura /* Map the vector page. */
786 1.1 nisimura #if 0
787 1.1 nisimura /* MULTI-ICE requires that page 0 is NC/NB so that it can download the
788 1.1 nisimura * cache-clean code there. */
789 1.1 nisimura pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa,
790 1.1 nisimura VM_PROT_READ | VM_PROT_WRITE, PTE_NOCACHE);
791 1.1 nisimura #else
792 1.1 nisimura pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa,
793 1.1 nisimura VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
794 1.1 nisimura #endif
795 1.1 nisimura
796 1.1 nisimura /*
797 1.1 nisimura * map integrated peripherals at same address in l1pagetable
798 1.1 nisimura * so that we can continue to use console.
799 1.1 nisimura */
800 1.1 nisimura pmap_devmap_bootstrap(l1pagetable, mini2440_devmap);
801 1.1 nisimura
802 1.1 nisimura /*
803 1.1 nisimura * Now we have the real page tables in place so we can switch to them.
804 1.1 nisimura * Once this is done we will be running with the REAL kernel page
805 1.1 nisimura * tables.
806 1.1 nisimura */
807 1.1 nisimura /*
808 1.1 nisimura * Update the physical_freestart/physical_freeend/free_pages
809 1.1 nisimura * variables.
810 1.1 nisimura */
811 1.1 nisimura physical_freestart = physical_start +
812 1.1 nisimura (KERNEL_TEXT_BASE - KERNEL_BASE) + kerneldatasize;
813 1.1 nisimura physical_freeend = physical_end;
814 1.1 nisimura free_pages =
815 1.1 nisimura (physical_freeend - physical_freestart) / PAGE_SIZE;
816 1.1 nisimura
817 1.1 nisimura /* Switch tables */
818 1.1 nisimura #ifdef VERBOSE_INIT_ARM
819 1.1 nisimura printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
820 1.1 nisimura physical_freestart, free_pages, free_pages);
821 1.1 nisimura printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa);
822 1.1 nisimura #endif
823 1.1 nisimura cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
824 1.6 matt cpu_setttb(kernel_l1pt.pv_pa, true);
825 1.1 nisimura cpu_tlb_flushID();
826 1.1 nisimura cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
827 1.1 nisimura
828 1.1 nisimura /*
829 1.1 nisimura * Moved from cpu_startup() as data_abort_handler() references
830 1.1 nisimura * this during uvm init
831 1.1 nisimura */
832 1.1 nisimura uvm_lwp_setuarea(&lwp0, kernelstack.pv_va);
833 1.1 nisimura
834 1.1 nisimura #ifdef VERBOSE_INIT_ARM
835 1.1 nisimura printf("done!\n");
836 1.1 nisimura #endif
837 1.1 nisimura
838 1.1 nisimura #ifdef VERBOSE_INIT_ARM
839 1.1 nisimura printf("bootstrap done.\n");
840 1.1 nisimura #endif
841 1.1 nisimura
842 1.1 nisimura arm32_vector_init(ARM_VECTORS_LOW, ARM_VEC_ALL);
843 1.1 nisimura
844 1.1 nisimura /*
845 1.1 nisimura * Pages were allocated during the secondary bootstrap for the
846 1.1 nisimura * stacks for different CPU modes.
847 1.1 nisimura * We must now set the r13 registers in the different CPU modes to
848 1.1 nisimura * point to these stacks.
849 1.1 nisimura * Since the ARM stacks use STMFD etc. we must set r13 to the top end
850 1.1 nisimura * of the stack memory.
851 1.1 nisimura */
852 1.1 nisimura #ifdef VERBOSE_INIT_ARM
853 1.1 nisimura printf("init subsystems: stacks ");
854 1.1 nisimura #endif
855 1.1 nisimura
856 1.1 nisimura set_stackptr(PSR_IRQ32_MODE,
857 1.1 nisimura irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
858 1.1 nisimura set_stackptr(PSR_ABT32_MODE,
859 1.1 nisimura abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
860 1.1 nisimura set_stackptr(PSR_UND32_MODE,
861 1.1 nisimura undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
862 1.1 nisimura
863 1.1 nisimura cpu_idcache_wbinv_all();
864 1.1 nisimura
865 1.1 nisimura /*
866 1.1 nisimura * Well we should set a data abort handler.
867 1.1 nisimura * Once things get going this will change as we will need a proper
868 1.1 nisimura * handler.
869 1.1 nisimura * Until then we will use a handler that just panics but tells us
870 1.1 nisimura * why.
871 1.1 nisimura * Initialisation of the vectors will just panic on a data abort.
872 1.1 nisimura * This just fills in a slightly better one.
873 1.1 nisimura */
874 1.1 nisimura #ifdef VERBOSE_INIT_ARM
875 1.1 nisimura printf("vectors ");
876 1.1 nisimura #endif
877 1.1 nisimura data_abort_handler_address = (u_int)data_abort_handler;
878 1.1 nisimura prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
879 1.1 nisimura undefined_handler_address = (u_int)undefinedinstruction_bounce;
880 1.1 nisimura
881 1.1 nisimura /* Initialise the undefined instruction handlers */
882 1.1 nisimura #ifdef VERBOSE_INIT_ARM
883 1.1 nisimura printf("undefined ");
884 1.1 nisimura #endif
885 1.1 nisimura undefined_init();
886 1.1 nisimura
887 1.1 nisimura /* Load memory into UVM. */
888 1.1 nisimura #ifdef VERBOSE_INIT_ARM
889 1.1 nisimura printf("page ");
890 1.1 nisimura #endif
891 1.10 cherry uvm_md_init();
892 1.1 nisimura uvm_page_physload(atop(physical_freestart), atop(physical_freeend),
893 1.1 nisimura atop(physical_freestart), atop(physical_freeend),
894 1.1 nisimura VM_FREELIST_DEFAULT);
895 1.1 nisimura uvm_page_physload(atop(SDRAM_START), atop(physical_freeend_low),
896 1.1 nisimura atop(SDRAM_START), atop(physical_freeend_low),
897 1.1 nisimura VM_FREELIST_DEFAULT);
898 1.1 nisimura
899 1.1 nisimura
900 1.13 skrll /* Boot strap pmap telling it where managed kernel virtual memory is */
901 1.1 nisimura #ifdef VERBOSE_INIT_ARM
902 1.1 nisimura printf("pmap ");
903 1.1 nisimura #endif
904 1.1 nisimura pmap_bootstrap(KERNEL_VM_BASE, KERNEL_VM_BASE + KERNEL_VM_SIZE);
905 1.1 nisimura
906 1.1 nisimura #ifdef VERBOSE_INIT_ARM
907 1.1 nisimura printf("done.\n");
908 1.1 nisimura #endif
909 1.1 nisimura
910 1.1 nisimura #ifdef BOOTHOWTO
911 1.1 nisimura boothowto |= BOOTHOWTO;
912 1.1 nisimura #endif
913 1.1 nisimura
914 1.1 nisimura #ifdef KGDB
915 1.1 nisimura if (boothowto & RB_KDB) {
916 1.1 nisimura kgdb_debug_init = 1;
917 1.1 nisimura kgdb_connect(1);
918 1.1 nisimura }
919 1.1 nisimura #endif
920 1.1 nisimura
921 1.1 nisimura mini2440_ksyms(bi_symtab);
922 1.1 nisimura
923 1.1 nisimura #ifdef DDB
924 1.1 nisimura /*db_machine_init();*/
925 1.1 nisimura if (boothowto & RB_KDB)
926 1.1 nisimura Debugger();
927 1.1 nisimura #endif
928 1.1 nisimura
929 1.1 nisimura evbarm_device_register = mini2440_device_register;
930 1.1 nisimura
931 1.1 nisimura /* We return the new stack pointer address */
932 1.14 skrll return kernelstack.pv_va + USPACE_SVC_STACK_TOP;
933 1.1 nisimura }
934 1.1 nisimura
935 1.1 nisimura void
936 1.1 nisimura consinit(void)
937 1.1 nisimura {
938 1.1 nisimura static int consinit_done = 0;
939 1.1 nisimura #if defined(SSCOM0CONSOLE) || defined(SSCOM1CONSOLE)
940 1.1 nisimura bus_space_tag_t iot = &s3c2xx0_bs_tag;
941 1.1 nisimura #endif
942 1.1 nisimura int pclk;
943 1.1 nisimura
944 1.1 nisimura if (consinit_done != 0)
945 1.1 nisimura return;
946 1.1 nisimura
947 1.1 nisimura consinit_done = 1;
948 1.1 nisimura
949 1.1 nisimura s3c24x0_clock_freq2(CLKMAN_VBASE, NULL, NULL, &pclk);
950 1.1 nisimura
951 1.1 nisimura #if NSSCOM > 0
952 1.1 nisimura #ifdef SSCOM0CONSOLE
953 1.1 nisimura if (0 == s3c2440_sscom_cnattach(iot, 0, comcnspeed,
954 1.1 nisimura pclk, comcnmode))
955 1.1 nisimura return;
956 1.1 nisimura #endif
957 1.1 nisimura #ifdef SSCOM1CONSOLE
958 1.1 nisimura if (0 == s3c2440_sscom_cnattach(iot, 1, comcnspeed,
959 1.1 nisimura pclk, comcnmode))
960 1.1 nisimura return;
961 1.1 nisimura #endif
962 1.1 nisimura #endif /* NSSCOM */
963 1.1 nisimura #if NCOM>0 && defined(CONCOMADDR)
964 1.1 nisimura if (comcnattach(&isa_io_bs_tag, CONCOMADDR, comcnspeed,
965 1.1 nisimura COM_FREQ, COM_TYPE_NORMAL, comcnmode))
966 1.1 nisimura panic("can't init serial console @%x", CONCOMADDR);
967 1.1 nisimura return;
968 1.1 nisimura #endif
969 1.1 nisimura
970 1.1 nisimura consinit_done = 0;
971 1.1 nisimura }
972 1.1 nisimura
973 1.1 nisimura
974 1.1 nisimura #ifdef KGDB
975 1.1 nisimura
976 1.1 nisimura #if (NSSCOM > 0)
977 1.1 nisimura
978 1.1 nisimura #ifdef KGDB_DEVNAME
979 1.1 nisimura const char kgdb_devname[] = KGDB_DEVNAME;
980 1.1 nisimura #else
981 1.1 nisimura const char kgdb_devname[] = "";
982 1.1 nisimura #endif
983 1.1 nisimura
984 1.1 nisimura #ifndef KGDB_DEVMODE
985 1.1 nisimura #define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE|CSTOPB|PARENB))|CS8) /* 8N1 */
986 1.1 nisimura #endif
987 1.1 nisimura int kgdb_sscom_mode = KGDB_DEVMODE;
988 1.1 nisimura
989 1.1 nisimura #endif /* NSSCOM */
990 1.1 nisimura
991 1.1 nisimura void
992 1.1 nisimura kgdb_port_init(void)
993 1.1 nisimura {
994 1.1 nisimura #if (NSSCOM > 0)
995 1.1 nisimura int unit = -1;
996 1.1 nisimura int pclk;
997 1.1 nisimura
998 1.1 nisimura if (strcmp(kgdb_devname, "sscom0") == 0)
999 1.1 nisimura unit = 0;
1000 1.1 nisimura else if (strcmp(kgdb_devname, "sscom1") == 0)
1001 1.1 nisimura unit = 1;
1002 1.1 nisimura
1003 1.1 nisimura if (unit >= 0) {
1004 1.1 nisimura s3c24x0_clock_freq2(CLKMAN_VBASE, NULL, NULL, &pclk);
1005 1.1 nisimura
1006 1.1 nisimura s3c2440_sscom_kgdb_attach(&s3c2xx0_bs_tag,
1007 1.1 nisimura unit, kgdb_rate, pclk, kgdb_sscom_mode);
1008 1.1 nisimura }
1009 1.1 nisimura #endif
1010 1.1 nisimura }
1011 1.1 nisimura #endif
1012 1.1 nisimura
1013 1.1 nisimura
1014 1.1 nisimura static struct arm32_dma_range mini2440_dma_ranges[1];
1015 1.1 nisimura
1016 1.1 nisimura bus_dma_tag_t
1017 1.1 nisimura s3c2xx0_bus_dma_init(struct arm32_bus_dma_tag *dma_tag_template)
1018 1.1 nisimura {
1019 1.1 nisimura extern paddr_t physical_start, physical_end;
1020 1.1 nisimura struct arm32_bus_dma_tag *dmat;
1021 1.1 nisimura
1022 1.1 nisimura mini2440_dma_ranges[0].dr_sysbase = physical_start;
1023 1.1 nisimura mini2440_dma_ranges[0].dr_busbase = physical_start;
1024 1.1 nisimura mini2440_dma_ranges[0].dr_len = physical_end - physical_start;
1025 1.1 nisimura
1026 1.1 nisimura #if 1
1027 1.1 nisimura dmat = dma_tag_template;
1028 1.1 nisimura #else
1029 1.1 nisimura dmat = malloc(sizeof *dmat, M_DEVBUF, M_NOWAIT);
1030 1.1 nisimura if (dmat == NULL)
1031 1.1 nisimura return NULL;
1032 1.1 nisimura *dmat = *dma_tag_template;
1033 1.1 nisimura #endif
1034 1.1 nisimura
1035 1.1 nisimura dmat->_ranges = mini2440_dma_ranges;
1036 1.1 nisimura dmat->_nranges = 1;
1037 1.1 nisimura
1038 1.1 nisimura return dmat;
1039 1.1 nisimura }
1040 1.1 nisimura
1041 1.1 nisimura void
1042 1.1 nisimura mini2440_ksyms(struct btinfo_symtab *bi_symtab)
1043 1.1 nisimura {
1044 1.1 nisimura #if NKSYMS || defined(DDB) || defined(LKM)
1045 1.1 nisimura extern int end;
1046 1.1 nisimura
1047 1.1 nisimura #ifdef DDB
1048 1.1 nisimura db_machine_init();
1049 1.1 nisimura #endif
1050 1.1 nisimura if (bi_symtab == NULL) {
1051 1.1 nisimura return;
1052 1.1 nisimura }
1053 1.1 nisimura #ifdef VERBOSE_INIT_ARM
1054 1.1 nisimura printf("Got symbol table. nsym=%d, ssym=%p, esym=%p\n",
1055 1.1 nisimura bi_symtab->nsym,
1056 1.1 nisimura bi_symtab->ssym,
1057 1.1 nisimura bi_symtab->esym);
1058 1.1 nisimura #endif
1059 1.1 nisimura
1060 1.1 nisimura ksyms_addsyms_elf(bi_symtab->nsym,
1061 1.1 nisimura (int*)bi_symtab->ssym,
1062 1.1 nisimura (int*)bi_symtab->esym);
1063 1.1 nisimura #endif
1064 1.1 nisimura }
1065 1.1 nisimura
1066 1.1 nisimura void *
1067 1.1 nisimura lookup_bootinfo(int type)
1068 1.1 nisimura {
1069 1.1 nisimura struct btinfo_common *bt;
1070 1.1 nisimura struct btinfo_common *help = (struct btinfo_common *)bootinfo;
1071 1.1 nisimura
1072 1.1 nisimura if (help->next == 0)
1073 1.1 nisimura return (NULL); /* bootinfo[] was not made */
1074 1.1 nisimura do {
1075 1.1 nisimura bt = help;
1076 1.1 nisimura if (bt->type == type)
1077 1.1 nisimura return (help);
1078 1.1 nisimura help = (struct btinfo_common *)((char*)help + bt->next);
1079 1.1 nisimura } while (bt->next &&
1080 1.1 nisimura (size_t)help < (size_t)bootinfo + BOOTINFO_MAXSIZE);
1081 1.1 nisimura
1082 1.1 nisimura return (NULL);
1083 1.1 nisimura }
1084 1.1 nisimura
1085 1.1 nisimura
1086 1.1 nisimura extern char *booted_kernel;
1087 1.1 nisimura
1088 1.1 nisimura static void
1089 1.1 nisimura mini2440_device_register(device_t dev, void *aux) {
1090 1.1 nisimura if (device_class(dev) == DV_IFNET) {
1091 1.2 nisimura #ifndef MEMORY_DISK_IS_ROOT
1092 1.1 nisimura if (bi_rdev != NULL && device_is_a(dev, bi_rdev->devname) ) {
1093 1.1 nisimura booted_device = dev;
1094 1.1 nisimura rootfstype = MOUNT_NFS;
1095 1.1 nisimura if( bi_path != NULL ) {
1096 1.1 nisimura booted_kernel = bi_path->bootpath;
1097 1.1 nisimura }
1098 1.1 nisimura }
1099 1.2 nisimura #endif
1100 1.1 nisimura if (bi_net != NULL && device_is_a(dev, bi_net->devname)) {
1101 1.1 nisimura prop_data_t pd;
1102 1.1 nisimura pd = prop_data_create_data_nocopy(bi_net->mac_address, ETHER_ADDR_LEN);
1103 1.1 nisimura KASSERT(pd != NULL);
1104 1.1 nisimura if (prop_dictionary_set(device_properties(dev), "mac-address", pd) == false) {
1105 1.1 nisimura printf("WARNING: Unable to set mac-address property for %s\n", device_xname(dev));
1106 1.1 nisimura }
1107 1.1 nisimura prop_object_release(pd);
1108 1.1 nisimura bi_net = NULL;
1109 1.1 nisimura }
1110 1.1 nisimura }
1111 1.2 nisimura #ifndef MEMORY_DISK_IS_ROOT
1112 1.1 nisimura if (bi_rdev != NULL && device_class(dev) == DV_DISK
1113 1.1 nisimura && device_is_a(dev, bi_rdev->devname)
1114 1.1 nisimura && device_unit(dev) == bi_rdev->cookie) {
1115 1.1 nisimura booted_device = dev;
1116 1.1 nisimura booted_partition = bi_rdev->partition;
1117 1.1 nisimura rootfstype = ROOT_FSTYPE_ANY;
1118 1.1 nisimura if( bi_path != NULL ) {
1119 1.1 nisimura booted_kernel = bi_path->bootpath;
1120 1.1 nisimura }
1121 1.1 nisimura }
1122 1.2 nisimura #endif
1123 1.1 nisimura }
1124