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mpcsa_start.S revision 1.3
      1 /*
      2  * mpcsa_start.S
      3  * Copyright (c) 2007, S. Kantoluoto <sami.kantoluoto (at) iki.fi>
      4  * All rights reserved.
      5  *
      6  * Based on vx115_vep_start.S
      7  * Copyright (c) 2007, J. Sevy <jsevy (at) cs.drexel.edu>
      8  *
      9  * Based on g42xxeb_start.S
     10  * Copyright (c) 2002, 2003  Genetec Corporation.  All rights reserved.
     11  * Written by Hiroyuki Bessho for Genetec Corporation.
     12  *
     13  * Redistribution and use in source and binary forms, with or without
     14  * modification, are permitted provided that the following conditions
     15  * are met:
     16  * 1. Redistributions of source code must retain the above copyright
     17  *    notice, this list of conditions and the following disclaimer.
     18  * 2. Redistributions in binary form must reproduce the above copyright
     19  *    notice, this list of conditions and the following disclaimer in the
     20  *    documentation and/or other materials provided with the distribution.
     21  * 3. The name of Genetec Corporation may not be used to endorse or
     22  *    promote products derived from this software without specific prior
     23  *    written permission.
     24  *
     25  * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
     26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL GENETEC CORPORATION
     29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     35  * POSSIBILITY OF SUCH DAMAGE.
     36  */
     37 
     38 #include <machine/asm.h>
     39 #include <arm/armreg.h>
     40 #include "assym.h"
     41 
     42 RCSID("$NetBSD: mpcsa_start.S,v 1.3 2011/01/31 06:28:04 matt Exp $")
     43 
     44 #ifndef	FLASH_START
     45 #define	FLASH_START	0x10020000
     46 #endif
     47 
     48 #ifndef SDRAM_START
     49 #define SDRAM_START    0x20000000
     50 #endif
     51 
     52 #define	MODBASE	       0x20200000
     53 
     54 /*
     55  * CPWAIT -- Canonical method to wait for CP15 update.
     56  * NOTE: Clobbers the specified temp reg.
     57  * copied from arm/arm/cpufunc_asm_xscale.S
     58  * XXX: better be in a common header file.
     59  */
     60 #define    CPWAIT_BRANCH    \
     61     sub pc, pc, #4
     62 
     63 #define    CPWAIT(tmp)                             				 \
     64     mrc p15, 0, tmp, c2, c0, 0  /* arbitrary read of CP15 */    ;\
     65     mov tmp, tmp        		/* wait for it to complete */   ;\
     66     CPWAIT_BRANCH            	/* branch to next insn */
     67 
     68 /*
     69  * Kernel start routine for MPCSA board.
     70  * This code is executed from Flash when the bootloader jumps to it.
     71  */
     72     .text
     73 
     74     .global _C_LABEL(mpcsa_start)
     75 _C_LABEL(mpcsa_start):
     76 
     77     /* make sure we're in supervisor mode */
     78     mov	   r0,sp
     79     msr    CPSR_c,#I32_bit | F32_bit | PSR_SVC32_MODE
     80     mov	   sp,r0
     81 
     82     /* move code to RAM */
     83     ldr    r1, Lcopy_size
     84     adr    r0, _C_LABEL(mpcsa_start)
     85     add    r1, r1, #3
     86     mov    r1, r1, LSR #2         /* get size of code in words */
     87     mov    r2, #SDRAM_START
     88     add    r2, r2, #0x200000    /* code placed 2MB above kernel base */
     89     mov    r4, r2
     90 
     91     /* copy kernel to RAM */
     92 5:  ldr    r3, [r0], #4
     93     subs   r1, r1, #1
     94     str    r3, [r2], #4
     95     bhi    5b
     96 
     97     /* jump to RAM */
     98     ldr    r0, Lstart_off
     99     add    pc, r4, r0
    100 
    101 
    102 Lcopy_size:    .word _edata-_C_LABEL(mpcsa_start)
    103 Lstart_off:    .word mpcsa_start_ram-_C_LABEL(mpcsa_start)
    104 
    105 mpcsa_start_ram:
    106     /*
    107      *  Kernel is loaded in SDRAM (0x20200000), and is expected to run
    108      *  in VA 0xc0200000.
    109      */
    110 
    111     /* build page table from scratch */
    112     ldr    r0, Lstartup_pagetable
    113     adr    r4, mmu_init_table
    114     b      3f
    115 
    116 2:
    117     str    r3, [r0, r2]
    118     add    r2, r2, #4
    119     add    r3, r3, #(L1_S_SIZE)
    120     adds   r1, r1, #-1
    121     bhi    2b
    122 3:
    123     ldmia  r4!, {r1,r2,r3}   /* # of sections, PA|attr, VA */
    124     cmp    r1, #0
    125     bne    2b
    126 
    127 
    128     mcr    p15, 0, r0, c2, c0, 0    /* Set TTB */
    129     mcr    p15, 0, r0, c8, c7, 0    /* Flush TLB */
    130 
    131     /* Set the Domain Access register.  Very important! */
    132     mov    r0, #((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT)
    133     mcr    p15, 0, r0, c3, c0, 0
    134 
    135     /* Enable MMU */
    136     mrc    p15, 0, r0, c1, c0, 0
    137     orr    r0, r0, #CPU_CONTROL_MMU_ENABLE
    138     mcr    p15, 0, r0, c1, c0, 0
    139     CPWAIT(r0)
    140 
    141     /* Jump to kernel code in TRUE VA */
    142     adr    r0, Lstart
    143     ldr    pc, [r0]
    144 
    145 Lstart:
    146     .word    start
    147 
    148 
    149 #define MMU_INIT(va,pa,n_sec,attr)  \
    150     .word    n_sec                 ;\
    151     .word    4*((va)>>L1_S_SHIFT)  ;\
    152     .word    (pa) | (attr)
    153 
    154 #define STARTUP_PAGETABLE_ADDR  0x20100000 + 0x4000
    155 
    156 Lstartup_pagetable:
    157 	.word STARTUP_PAGETABLE_ADDR
    158 
    159 mmu_init_table:
    160     /* fill all table VA==PA */
    161     MMU_INIT(0x00000000, 0x00000000, 1<<(32-L1_S_SHIFT), L1_TYPE_S|L1_S_AP_KRW)
    162     /* map in peripheral space */
    163     MMU_INIT(0xfff00000, 0xfff00000, 1, L1_TYPE_S|L1_S_AP_KRW)
    164     /* map SDRAM VA==PA, WT cacheable */
    165     MMU_INIT(0x20100000, 0x20100000, 63, L1_TYPE_S|L1_S_C|L1_S_AP_KRW)
    166     /* map VA 0xc0000000..0xc0efffff to PA 0x20100000..0x23ffffff */
    167     MMU_INIT(0xc0000000, 0x20000000, 63, L1_TYPE_S|L1_S_C|L1_S_AP_KRW)
    168     .word 0    /* end of table */
    169 
    170 	.align	7
    171 jme_module_header:
    172 	.word	0xe990510e		/* magic number			*/
    173 	.string	"NetBSD/mpcsa\0\0\0"	/* module name			*/
    174 	.short	0			/* build flags			*/
    175 	.short	0			/* flags			*/
    176 	.word	0			/* version			*/
    177 	.word	0			/* compile / link timestamp	*/
    178 	.word	MODBASE		/* pointer to init routine	*/
    179 	.word	MODBASE		/* start address		*/
    180 	.word	(_edata-(_C_LABEL(mpcsa_start)))			/* length of module		*/
    181 	.word	(jme_module_header-_C_LABEL(mpcsa_start)+MODBASE)			/* back pointer to module struct*/
    182 	.word	0			/* data pointer (ignored but SBZ)*/
    183 	.word	0			/* data length (ignored but SBZ)*/
    184 	.word	0x20200000		/* alternate address		*/
    185 	.word	0			/* reserved, SBZ		*/
    186 
    187 jme_kmodule_header:
    188 	.word	0xe000301e		/* magic number			*/
    189 	.string	"JME kernel\0\0\0\0\0"	/* module name			*/
    190 	.short	0			/* build flags			*/
    191 	.short	0			/* flags			*/
    192 	.word	0			/* version			*/
    193 	.word	0			/* compile / link timestamp	*/
    194 	.word	MODBASE		/* pointer to init routine	*/
    195 	.word	MODBASE		/* start address		*/
    196 	.word	(_edata-(_C_LABEL(mpcsa_start)))			/* length of module		*/
    197 	.word	(jme_kmodule_header-_C_LABEL(mpcsa_start)+MODBASE)	/* back pointer to module struct*/
    198 	.word	0			/* data pointer (ignored but SBZ)*/
    199 	.word	0			/* data length (ignored but SBZ)*/
    200 	.word	0x20200000		/* alternate address		*/
    201 	.word	0			/* reserved, SBZ		*/
    202