netwalker_machdep.c revision 1.13 1 1.13 hkenken /* $NetBSD: netwalker_machdep.c,v 1.13 2014/01/24 02:06:03 hkenken Exp $ */
2 1.1 bsh
3 1.1 bsh /*
4 1.13 hkenken * Copyright (c) 2002, 2003, 2005, 2010 Genetec Corporation.
5 1.1 bsh * All rights reserved.
6 1.1 bsh * Written by Hiroyuki Bessho for Genetec Corporation.
7 1.1 bsh *
8 1.1 bsh * Redistribution and use in source and binary forms, with or without
9 1.1 bsh * modification, are permitted provided that the following conditions
10 1.1 bsh * are met:
11 1.1 bsh * 1. Redistributions of source code must retain the above copyright
12 1.1 bsh * notice, this list of conditions and the following disclaimer.
13 1.1 bsh * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 bsh * notice, this list of conditions and the following disclaimer in the
15 1.1 bsh * documentation and/or other materials provided with the distribution.
16 1.1 bsh *
17 1.1 bsh * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
18 1.1 bsh * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
19 1.1 bsh * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
20 1.1 bsh * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION
21 1.1 bsh * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22 1.1 bsh * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 1.1 bsh * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 1.1 bsh * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25 1.1 bsh * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 1.1 bsh * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27 1.1 bsh * POSSIBILITY OF SUCH DAMAGE.
28 1.1 bsh *
29 1.4 wiz * Machine dependent functions for kernel setup for Sharp Netwalker.
30 1.1 bsh * Based on iq80310_machhdep.c
31 1.1 bsh */
32 1.1 bsh /*
33 1.1 bsh * Copyright (c) 2001 Wasabi Systems, Inc.
34 1.1 bsh * All rights reserved.
35 1.1 bsh *
36 1.1 bsh * Written by Jason R. Thorpe for Wasabi Systems, Inc.
37 1.1 bsh *
38 1.1 bsh * Redistribution and use in source and binary forms, with or without
39 1.1 bsh * modification, are permitted provided that the following conditions
40 1.1 bsh * are met:
41 1.1 bsh * 1. Redistributions of source code must retain the above copyright
42 1.1 bsh * notice, this list of conditions and the following disclaimer.
43 1.1 bsh * 2. Redistributions in binary form must reproduce the above copyright
44 1.1 bsh * notice, this list of conditions and the following disclaimer in the
45 1.1 bsh * documentation and/or other materials provided with the distribution.
46 1.1 bsh * 3. All advertising materials mentioning features or use of this software
47 1.1 bsh * must display the following acknowledgement:
48 1.1 bsh * This product includes software developed for the NetBSD Project by
49 1.1 bsh * Wasabi Systems, Inc.
50 1.1 bsh * 4. The name of Wasabi Systems, Inc. may not be used to endorse
51 1.1 bsh * or promote products derived from this software without specific prior
52 1.1 bsh * written permission.
53 1.1 bsh *
54 1.1 bsh * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
55 1.1 bsh * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
56 1.1 bsh * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
57 1.1 bsh * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
58 1.1 bsh * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
59 1.1 bsh * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
60 1.1 bsh * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
61 1.1 bsh * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
62 1.1 bsh * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
63 1.1 bsh * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
64 1.1 bsh * POSSIBILITY OF SUCH DAMAGE.
65 1.1 bsh */
66 1.1 bsh
67 1.1 bsh /*
68 1.1 bsh * Copyright (c) 1997,1998 Mark Brinicombe.
69 1.1 bsh * Copyright (c) 1997,1998 Causality Limited.
70 1.1 bsh * All rights reserved.
71 1.1 bsh *
72 1.1 bsh * Redistribution and use in source and binary forms, with or without
73 1.1 bsh * modification, are permitted provided that the following conditions
74 1.1 bsh * are met:
75 1.1 bsh * 1. Redistributions of source code must retain the above copyright
76 1.1 bsh * notice, this list of conditions and the following disclaimer.
77 1.1 bsh * 2. Redistributions in binary form must reproduce the above copyright
78 1.1 bsh * notice, this list of conditions and the following disclaimer in the
79 1.1 bsh * documentation and/or other materials provided with the distribution.
80 1.1 bsh * 3. All advertising materials mentioning features or use of this software
81 1.1 bsh * must display the following acknowledgement:
82 1.1 bsh * This product includes software developed by Mark Brinicombe
83 1.1 bsh * for the NetBSD Project.
84 1.1 bsh * 4. The name of the company nor the name of the author may be used to
85 1.1 bsh * endorse or promote products derived from this software without specific
86 1.1 bsh * prior written permission.
87 1.1 bsh *
88 1.1 bsh * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
89 1.1 bsh * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
90 1.1 bsh * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
91 1.1 bsh * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
92 1.1 bsh * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
93 1.1 bsh * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
94 1.1 bsh * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
95 1.1 bsh * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
96 1.1 bsh * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
97 1.1 bsh * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
98 1.1 bsh * SUCH DAMAGE.
99 1.1 bsh *
100 1.4 wiz * Machine dependent functions for kernel setup for Intel IQ80310 evaluation
101 1.1 bsh * boards using RedBoot firmware.
102 1.1 bsh */
103 1.1 bsh
104 1.1 bsh #include <sys/cdefs.h>
105 1.13 hkenken __KERNEL_RCSID(0, "$NetBSD: netwalker_machdep.c,v 1.13 2014/01/24 02:06:03 hkenken Exp $");
106 1.1 bsh
107 1.1 bsh #include "opt_ddb.h"
108 1.1 bsh #include "opt_kgdb.h"
109 1.1 bsh #include "opt_md.h"
110 1.1 bsh #include "opt_com.h"
111 1.1 bsh #include "imxuart.h"
112 1.1 bsh #include "opt_imxuart.h"
113 1.1 bsh #include "opt_imx.h"
114 1.12 hkenken #include "opt_imx51_ipuv3.h"
115 1.12 hkenken #include "wsdisplay.h"
116 1.1 bsh
117 1.1 bsh #include <sys/param.h>
118 1.1 bsh #include <sys/device.h>
119 1.1 bsh #include <sys/termios.h>
120 1.11 matt #include <sys/bus.h>
121 1.1 bsh
122 1.1 bsh #include <machine/db_machdep.h>
123 1.1 bsh #ifdef KGDB
124 1.1 bsh #include <sys/kgdb.h>
125 1.1 bsh #endif
126 1.1 bsh
127 1.1 bsh #include <machine/bootconfig.h>
128 1.1 bsh
129 1.1 bsh #include <arm/arm32/machdep.h>
130 1.1 bsh
131 1.1 bsh #include <arm/imx/imx51reg.h>
132 1.1 bsh #include <arm/imx/imx51var.h>
133 1.1 bsh #include <arm/imx/imxgpioreg.h>
134 1.1 bsh #include <arm/imx/imxwdogreg.h>
135 1.1 bsh #include <arm/imx/imxuartreg.h>
136 1.1 bsh #include <arm/imx/imxuartvar.h>
137 1.1 bsh #include <arm/imx/imx51_iomuxreg.h>
138 1.1 bsh #include <evbarm/netwalker/netwalker_reg.h>
139 1.1 bsh
140 1.12 hkenken #include "ukbd.h"
141 1.12 hkenken #if (NUKBD > 0)
142 1.12 hkenken #include <dev/usb/ukbdvar.h>
143 1.12 hkenken #endif
144 1.12 hkenken
145 1.1 bsh /* Kernel text starts 1MB in from the bottom of the kernel address space. */
146 1.1 bsh #define KERNEL_TEXT_BASE (KERNEL_BASE + 0x00100000)
147 1.1 bsh #define KERNEL_VM_BASE (KERNEL_BASE + 0x01000000)
148 1.1 bsh
149 1.1 bsh /*
150 1.1 bsh * The range 0xc1000000 - 0xccffffff is available for kernel VM space
151 1.1 bsh * Core-logic registers and I/O mappings occupy 0xfd000000 - 0xffffffff
152 1.1 bsh */
153 1.1 bsh #define KERNEL_VM_SIZE 0x0C000000
154 1.1 bsh
155 1.1 bsh BootConfig bootconfig; /* Boot config storage */
156 1.13 hkenken static char bootargs[MAX_BOOT_STRING];
157 1.1 bsh char *boot_args = NULL;
158 1.1 bsh
159 1.1 bsh extern char KERNEL_BASE_phys[];
160 1.1 bsh extern char KERNEL_BASE_virt[];
161 1.13 hkenken
162 1.1 bsh extern int cpu_do_powersave;
163 1.1 bsh
164 1.1 bsh /*
165 1.1 bsh * Macros to translate between physical and virtual for a subset of the
166 1.1 bsh * kernel address space. *Not* for general use.
167 1.1 bsh */
168 1.1 bsh #define KERNEL_BASE_PHYS ((paddr_t)&KERNEL_BASE_phys)
169 1.1 bsh #define KERNEL_BASE_VIRT ((vaddr_t)&KERNEL_BASE_virt)
170 1.1 bsh #define KERN_VTOPHYS(va) \
171 1.1 bsh ((paddr_t)((vaddr_t)va - KERNEL_BASE_VIRT + KERNEL_BASE_PHYS))
172 1.1 bsh #define KERN_PHYSTOV(pa) \
173 1.1 bsh ((vaddr_t)((paddr_t)pa - KERNEL_BASE_PHYS + KERNEL_BASE_VIRT))
174 1.1 bsh
175 1.1 bsh
176 1.1 bsh /* Prototypes */
177 1.1 bsh
178 1.1 bsh void consinit(void);
179 1.1 bsh
180 1.1 bsh #ifdef KGDB
181 1.1 bsh void kgdb_port_init(void);
182 1.1 bsh #endif
183 1.1 bsh
184 1.1 bsh static void init_clocks(void);
185 1.1 bsh static void setup_ioports(void);
186 1.1 bsh
187 1.1 bsh #ifndef CONSPEED
188 1.1 bsh #define CONSPEED B115200 /* What RedBoot uses */
189 1.1 bsh #endif
190 1.1 bsh #ifndef CONMODE
191 1.1 bsh #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
192 1.1 bsh #endif
193 1.1 bsh
194 1.1 bsh int comcnspeed = CONSPEED;
195 1.1 bsh int comcnmode = CONMODE;
196 1.1 bsh
197 1.1 bsh /*
198 1.1 bsh * Static device mappings. These peripheral registers are mapped at
199 1.1 bsh * fixed virtual addresses very early in netwalker_start() so that we
200 1.1 bsh * can use them while booting the kernel, and stay at the same address
201 1.1 bsh * throughout whole kernel's life time.
202 1.1 bsh *
203 1.1 bsh * We use this table twice; once with bootstrap page table, and once
204 1.1 bsh * with kernel's page table which we build up in initarm().
205 1.1 bsh */
206 1.1 bsh
207 1.1 bsh #define _A(a) ((a) & ~L1_S_OFFSET)
208 1.1 bsh #define _S(s) (((s) + L1_S_SIZE - 1) & ~(L1_S_SIZE-1))
209 1.1 bsh
210 1.1 bsh static const struct pmap_devmap netwalker_devmap[] = {
211 1.1 bsh {
212 1.1 bsh /* for UART1, IOMUXC */
213 1.1 bsh NETWALKER_IO_VBASE0,
214 1.1 bsh _A(NETWALKER_IO_PBASE0),
215 1.1 bsh L1_S_SIZE * 4,
216 1.1 bsh VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE
217 1.1 bsh },
218 1.1 bsh {0, 0, 0, 0, 0 }
219 1.1 bsh };
220 1.1 bsh
221 1.1 bsh #ifndef MEMSTART
222 1.1 bsh #define MEMSTART 0x90000000
223 1.1 bsh #endif
224 1.1 bsh #ifndef MEMSIZE
225 1.1 bsh #define MEMSIZE 512
226 1.1 bsh #endif
227 1.1 bsh
228 1.1 bsh /*
229 1.1 bsh * u_int initarm(...)
230 1.1 bsh *
231 1.1 bsh * Initial entry point on startup. This gets called before main() is
232 1.1 bsh * entered.
233 1.1 bsh * It should be responsible for setting up everything that must be
234 1.1 bsh * in place when main is called.
235 1.1 bsh * This includes
236 1.1 bsh * Taking a copy of the boot configuration structure.
237 1.1 bsh * Initialising the physical console so characters can be printed.
238 1.1 bsh * Setting up page tables for the kernel
239 1.1 bsh * Relocating the kernel to the bottom of physical memory
240 1.1 bsh */
241 1.1 bsh u_int
242 1.1 bsh initarm(void *arg)
243 1.1 bsh {
244 1.13 hkenken /*
245 1.13 hkenken * Heads up ... Setup the CPU / MMU / TLB functions
246 1.13 hkenken */
247 1.13 hkenken if (set_cpufuncs())
248 1.13 hkenken panic("cpu not recognized!");
249 1.1 bsh
250 1.13 hkenken /* map some peripheral registers */
251 1.13 hkenken pmap_devmap_bootstrap((vaddr_t)armreg_ttbr_read() & -L1_TABLE_SIZE,
252 1.13 hkenken netwalker_devmap);
253 1.1 bsh
254 1.13 hkenken cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
255 1.1 bsh
256 1.1 bsh /* Register devmap for devices we mapped in start */
257 1.1 bsh pmap_devmap_register(netwalker_devmap);
258 1.1 bsh setup_ioports();
259 1.1 bsh
260 1.1 bsh consinit();
261 1.1 bsh
262 1.1 bsh #ifdef NO_POWERSAVE
263 1.1 bsh cpu_do_powersave=0;
264 1.1 bsh #endif
265 1.1 bsh
266 1.1 bsh init_clocks();
267 1.1 bsh
268 1.1 bsh #ifdef KGDB
269 1.1 bsh kgdb_port_init();
270 1.1 bsh #endif
271 1.1 bsh
272 1.1 bsh /* Talk to the user */
273 1.13 hkenken printf("\nNetBSD/evbarm (" ___STRING(EVBARM_BOARDTYPE) ") booting ...\n");
274 1.13 hkenken
275 1.13 hkenken bootargs[0] = '\0';
276 1.1 bsh
277 1.13 hkenken #if defined(VERBOSE_INIT_ARM) || 1
278 1.13 hkenken printf("initarm: Configuring system");
279 1.13 hkenken printf(", CLIDR=%010o CTR=%#x",
280 1.13 hkenken armreg_clidr_read(), armreg_ctr_read());
281 1.13 hkenken printf("\n");
282 1.13 hkenken #endif
283 1.1 bsh /*
284 1.1 bsh * Ok we have the following memory map
285 1.1 bsh *
286 1.1 bsh * Physical Address Range Description
287 1.1 bsh * ----------------------- ----------------------------------
288 1.1 bsh *
289 1.1 bsh * 0x90000000 - 0x97FFFFFF DDR SDRAM (128MByte)
290 1.1 bsh *
291 1.1 bsh * The initarm() has the responsibility for creating the kernel
292 1.1 bsh * page tables.
293 1.1 bsh * It must also set up various memory pointers that are used
294 1.1 bsh * by pmap etc.
295 1.1 bsh */
296 1.1 bsh
297 1.1 bsh #ifdef VERBOSE_INIT_ARM
298 1.1 bsh printf("initarm: Configuring system ...\n");
299 1.1 bsh #endif
300 1.1 bsh /* Fake bootconfig structure for the benefit of pmap.c */
301 1.1 bsh /* XXX must make the memory description h/w independent */
302 1.1 bsh bootconfig.dramblocks = 1;
303 1.1 bsh bootconfig.dram[0].address = MEMSTART;
304 1.13 hkenken bootconfig.dram[0].pages = (MEMSIZE * 1024 * 1024) / PAGE_SIZE;
305 1.1 bsh
306 1.13 hkenken arm32_bootmem_init(bootconfig.dram[0].address,
307 1.13 hkenken bootconfig.dram[0].pages * PAGE_SIZE, (uintptr_t)KERNEL_BASE_PHYS);
308 1.1 bsh
309 1.13 hkenken arm32_kernel_vm_init(KERNEL_VM_BASE, ARM_VECTORS_HIGH, 0,
310 1.13 hkenken netwalker_devmap, false);
311 1.1 bsh
312 1.1 bsh /* disable power down counter in watch dog,
313 1.1 bsh This must be done within 16 seconds of start-up. */
314 1.1 bsh ioreg16_write(NETWALKER_WDOG_VBASE + IMX_WDOG_WMCR, 0);
315 1.1 bsh
316 1.13 hkenken #ifdef BOOTHOWTO
317 1.13 hkenken boothowto |= BOOTHOWTO;
318 1.1 bsh #endif
319 1.1 bsh
320 1.1 bsh #ifdef VERBOSE_INIT_ARM
321 1.13 hkenken printf("initarm done.\n");
322 1.1 bsh #endif
323 1.13 hkenken return initarm_common(KERNEL_VM_BASE, KERNEL_VM_SIZE, NULL, 0);
324 1.1 bsh }
325 1.1 bsh
326 1.1 bsh
327 1.1 bsh static void
328 1.1 bsh init_clocks(void)
329 1.1 bsh {
330 1.9 matt cortex_pmc_ccnt_init();
331 1.1 bsh }
332 1.1 bsh
333 1.1 bsh struct iomux_setup {
334 1.6 bsh /* iomux registers are 32-bit wide, but upper 16 bits are not
335 1.6 bsh * used. */
336 1.6 bsh uint16_t reg;
337 1.6 bsh uint16_t val;
338 1.1 bsh };
339 1.1 bsh
340 1.6 bsh #define IOMUX_M(padname, mux) \
341 1.6 bsh IOMUX_DATA(__CONCAT(IOMUXC_SW_MUX_CTL_PAD_,padname), mux)
342 1.6 bsh
343 1.6 bsh #define IOMUX_P(padname, pad) \
344 1.6 bsh IOMUX_DATA(__CONCAT(IOMUXC_SW_PAD_CTL_PAD_,padname), pad)
345 1.6 bsh
346 1.6 bsh #define IOMUX_MP(padname, mux, pad) \
347 1.6 bsh IOMUX_M(padname, mux), \
348 1.6 bsh IOMUX_P(padname, pad)
349 1.6 bsh
350 1.6 bsh
351 1.6 bsh #define IOMUX_DATA(offset, value) \
352 1.6 bsh { \
353 1.6 bsh .reg = (offset), \
354 1.6 bsh .val = (value), \
355 1.1 bsh }
356 1.1 bsh
357 1.1 bsh
358 1.13 hkenken /*
359 1.13 hkenken * set same values to IOMUX registers as linux kernel does
360 1.6 bsh */
361 1.1 bsh const struct iomux_setup iomux_setup_data[] = {
362 1.6 bsh #define HYS PAD_CTL_HYS
363 1.6 bsh #define ODE PAD_CTL_ODE
364 1.6 bsh #define DSEHIGH PAD_CTL_DSE_HIGH
365 1.6 bsh #define DSEMID PAD_CTL_DSE_MID
366 1.6 bsh #define DSELOW PAD_CTL_DSE_LOW
367 1.6 bsh #define DSEMAX PAD_CTL_DSE_MAX
368 1.6 bsh #define SRE PAD_CTL_SRE
369 1.6 bsh #define KEEPER PAD_CTL_KEEPER
370 1.6 bsh #define PULL PAD_CTL_PULL
371 1.6 bsh #define PU_22K PAD_CTL_PUS_22K_PU
372 1.6 bsh #define PU_47K PAD_CTL_PUS_47K_PU
373 1.6 bsh #define PU_100K PAD_CTL_PUS_100K_PU
374 1.6 bsh #define PD_100K PAD_CTL_PUS_100K_PD
375 1.6 bsh #define HVE PAD_CTL_HVE /* Low output voltage */
376 1.6 bsh
377 1.6 bsh #define ALT0 IOMUX_CONFIG_ALT0
378 1.6 bsh #define ALT1 IOMUX_CONFIG_ALT1
379 1.6 bsh #define ALT2 IOMUX_CONFIG_ALT2
380 1.6 bsh #define ALT3 IOMUX_CONFIG_ALT3
381 1.6 bsh #define ALT4 IOMUX_CONFIG_ALT4
382 1.6 bsh #define ALT5 IOMUX_CONFIG_ALT5
383 1.6 bsh #define ALT6 IOMUX_CONFIG_ALT6
384 1.6 bsh #define ALT7 IOMUX_CONFIG_ALT7
385 1.6 bsh #define SION IOMUX_CONFIG_SION
386 1.6 bsh
387 1.6 bsh /* left button */
388 1.6 bsh IOMUX_MP(EIM_EB2, ALT1, HYS),
389 1.6 bsh /* right button */
390 1.6 bsh IOMUX_MP(EIM_EB3, ALT1, HYS),
391 1.6 bsh
392 1.6 bsh /* UART1 */
393 1.6 bsh IOMUX_MP(UART1_RXD, ALT0, HYS | PULL | DSEHIGH | SRE),
394 1.6 bsh IOMUX_MP(UART1_TXD, ALT0, HYS | PULL | DSEHIGH | SRE),
395 1.6 bsh IOMUX_MP(UART1_RTS, ALT0, HYS | PULL | DSEHIGH),
396 1.6 bsh IOMUX_MP(UART1_CTS, ALT0, HYS | PULL | DSEHIGH),
397 1.6 bsh
398 1.6 bsh /* LCD Display */
399 1.6 bsh IOMUX_M(DI1_PIN2, ALT0),
400 1.6 bsh IOMUX_M(DI1_PIN3, ALT0),
401 1.6 bsh
402 1.6 bsh IOMUX_DATA(IOMUXC_SW_PAD_CTL_GRP_DISP1_PKE0, PAD_CTL_PKE),
403 1.6 bsh #if 0
404 1.6 bsh IOMUX_MP(DISP1_DAT0, ALT0, SRE | DSEMAX | PULL),
405 1.6 bsh IOMUX_MP(DISP1_DAT1, ALT0, SRE | DSEMAX | PULL),
406 1.6 bsh IOMUX_MP(DISP1_DAT2, ALT0, SRE | DSEMAX | PULL),
407 1.6 bsh IOMUX_MP(DISP1_DAT3, ALT0, SRE | DSEMAX | PULL),
408 1.6 bsh IOMUX_MP(DISP1_DAT4, ALT0, SRE | DSEMAX | PULL),
409 1.6 bsh IOMUX_MP(DISP1_DAT5, ALT0, SRE | DSEMAX | PULL),
410 1.6 bsh #endif
411 1.6 bsh IOMUX_M(DISP1_DAT6, ALT0),
412 1.6 bsh IOMUX_M(DISP1_DAT7, ALT0),
413 1.6 bsh IOMUX_M(DISP1_DAT8, ALT0),
414 1.6 bsh IOMUX_M(DISP1_DAT9, ALT0),
415 1.6 bsh IOMUX_M(DISP1_DAT10, ALT0),
416 1.6 bsh IOMUX_M(DISP1_DAT11, ALT0),
417 1.6 bsh IOMUX_M(DISP1_DAT12, ALT0),
418 1.6 bsh IOMUX_M(DISP1_DAT13, ALT0),
419 1.6 bsh IOMUX_M(DISP1_DAT14, ALT0),
420 1.6 bsh IOMUX_M(DISP1_DAT15, ALT0),
421 1.6 bsh IOMUX_M(DISP1_DAT16, ALT0),
422 1.6 bsh IOMUX_M(DISP1_DAT17, ALT0),
423 1.6 bsh IOMUX_M(DISP1_DAT18, ALT0),
424 1.6 bsh IOMUX_M(DISP1_DAT19, ALT0),
425 1.6 bsh IOMUX_M(DISP1_DAT20, ALT0),
426 1.6 bsh IOMUX_M(DISP1_DAT21, ALT0),
427 1.6 bsh IOMUX_M(DISP1_DAT22, ALT0),
428 1.6 bsh IOMUX_M(DISP1_DAT23, ALT0),
429 1.6 bsh
430 1.6 bsh IOMUX_MP(DI1_D0_CS, ALT4, KEEPER | DSEHIGH | SRE), /* GPIO3_3 */
431 1.6 bsh IOMUX_DATA(IOMUXC_GPIO3_IPP_IND_G_IN_3_SELECT_INPUT, INPUT_DAISY_0),
432 1.6 bsh IOMUX_MP(CSI2_D12, ALT3, KEEPER | DSEHIGH | SRE), /* GPIO4_9 */
433 1.6 bsh IOMUX_MP(CSI2_D13, ALT3, KEEPER | DSEHIGH | SRE),
434 1.6 bsh IOMUX_MP(GPIO1_2, ALT0, ODE | DSEHIGH),
435 1.6 bsh IOMUX_MP(EIM_A19, ALT1, SRE | DSEHIGH),
436 1.6 bsh /* XXX VGA pins */
437 1.6 bsh IOMUX_M(DI_GP4, ALT4),
438 1.6 bsh IOMUX_M(GPIO1_8, SION | ALT0),
439 1.1 bsh
440 1.1 bsh
441 1.6 bsh #if 0
442 1.6 bsh IOMUX_MP(GPIO1_2, ALT1, DSEHIGH | ODE), /* LCD backlight by PWM */
443 1.6 bsh #else
444 1.6 bsh IOMUX_P(GPIO1_2, DSEHIGH | ODE), /* LCD backlight by GPIO */
445 1.6 bsh #endif
446 1.6 bsh IOMUX_MP(GPIO1_8, SION | ALT0, HYS | DSEMID | PU_100K),
447 1.6 bsh /* I2C1 */
448 1.6 bsh IOMUX_MP(EIM_D16, SION | ALT4, HYS | ODE | DSEHIGH | SRE),
449 1.6 bsh IOMUX_MP(EIM_D19, SION | ALT4, SRE), /* SCL */
450 1.6 bsh IOMUX_MP(EIM_A19, ALT1, SRE | DSEHIGH), /* GPIO2_13 */
451 1.6 bsh
452 1.6 bsh #if 0
453 1.6 bsh IOMUX_MP(EIM_A23, ALT1, 0),
454 1.6 bsh #else
455 1.6 bsh IOMUX_M(EIM_A23, ALT1), /* GPIO2_17 */
456 1.6 bsh #endif
457 1.6 bsh
458 1.6 bsh /* BT */
459 1.6 bsh IOMUX_M(EIM_D20, ALT1), /* GPIO2_4 BT host wakeup */
460 1.6 bsh IOMUX_M(EIM_D22, ALT1), /* GPIO2_6 BT RESET */
461 1.6 bsh IOMUX_M(EIM_D23, ALT1), /* GPIO2_7 BT wakeup */
462 1.6 bsh
463 1.6 bsh /* UART3 */
464 1.6 bsh IOMUX_MP(EIM_D24, ALT3, KEEPER | PU_100K | DSEHIGH | SRE),
465 1.6 bsh IOMUX_MP(EIM_D25, ALT3, KEEPER | PU_100K | DSEHIGH | SRE), /* CTS */
466 1.6 bsh IOMUX_MP(EIM_D26, ALT3, KEEPER | PU_100K | DSEHIGH | SRE), /* TXD */
467 1.6 bsh IOMUX_MP(EIM_D27, ALT3, KEEPER | PU_100K | DSEHIGH | SRE), /* RTS */
468 1.6 bsh IOMUX_M(NANDF_D15, ALT3), /* GPIO3_25 */
469 1.6 bsh IOMUX_MP(NANDF_D14, ALT3, HYS | PULL | PU_100K ), /* GPIO3_26 */
470 1.6 bsh IOMUX_M(CSI1_D9, ALT3), /* GPIO3_13 */
471 1.6 bsh IOMUX_M(CSI1_VSYNC, ALT3), /* GPIO3_14 */
472 1.6 bsh IOMUX_M(CSI1_HSYNC, ALT3), /* GPIO3_15 */
473 1.6 bsh
474 1.6 bsh /* audio pins */
475 1.6 bsh IOMUX_MP(AUD3_BB_TXD, ALT0, DSEHIGH | PU_100K | SRE),
476 1.6 bsh /* XXX: linux code:
477 1.6 bsh (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH |
478 1.6 bsh PAD_CTL_100K_PU | PAD_CTL_HYS_NONE |
479 1.6 bsh PAD_CTL_DDR_INPUT_CMOS | PAD_CTL_DRV_VOT_LOW), */
480 1.6 bsh
481 1.6 bsh IOMUX_MP(AUD3_BB_RXD, ALT0, KEEPER | DSEHIGH | SRE),
482 1.6 bsh IOMUX_MP(AUD3_BB_CK, ALT0, KEEPER | DSEHIGH | SRE),
483 1.6 bsh IOMUX_MP(AUD3_BB_FS, ALT0, KEEPER | DSEHIGH | SRE),
484 1.6 bsh
485 1.6 bsh /* headphone detect */
486 1.6 bsh IOMUX_MP(NANDF_D14, ALT3, HYS | PULL | PU_100K),
487 1.6 bsh IOMUX_MP(CSPI1_RDY, ALT3, SRE | DSEHIGH),
488 1.6 bsh /* XXX more audio pins ? */
489 1.6 bsh
490 1.6 bsh /* CSPI */
491 1.6 bsh /* ??? doesn't work ??? */
492 1.6 bsh IOMUX_P(CSPI1_MOSI, HYS | PULL | PD_100K | DSEHIGH | SRE),
493 1.6 bsh IOMUX_P(CSPI1_MISO, HYS | PULL | PD_100K | DSEHIGH | SRE),
494 1.6 bsh IOMUX_M(CSPI1_SS0, ALT3),
495 1.6 bsh IOMUX_MP(CSPI1_SS1, ALT0, HYS | KEEPER | DSEHIGH | SRE),
496 1.6 bsh IOMUX_MP(DI1_PIN11, ALT7, HYS | PULL | DSEHIGH | SRE),
497 1.6 bsh IOMUX_P(CSPI1_SCLK, HYS | KEEPER | DSEHIGH | SRE),
498 1.6 bsh /* 26M Osc */
499 1.6 bsh IOMUX_MP(DI1_PIN12, ALT4, KEEPER | DSEHIGH | SRE), /* GPIO3_1 */
500 1.6 bsh
501 1.6 bsh /* I2C */
502 1.6 bsh IOMUX_MP(KEY_COL4, SION | ALT3, SRE),
503 1.6 bsh IOMUX_DATA(IOMUXC_I2C2_IPP_SCL_IN_SELECT_INPUT, INPUT_DAISY_1),
504 1.6 bsh IOMUX_MP(KEY_COL5, SION | ALT3, HYS | ODE | DSEHIGH | SRE),
505 1.6 bsh IOMUX_DATA(IOMUXC_I2C2_IPP_SDA_IN_SELECT_INPUT, INPUT_DAISY_1),
506 1.6 bsh IOMUX_DATA(IOMUXC_UART3_IPP_UART_RTS_B_SELECT_INPUT, INPUT_DAISY_3),
507 1.1 bsh #if 1
508 1.6 bsh /* NAND */
509 1.6 bsh IOMUX_MP(NANDF_WE_B, ALT0, HVE | DSEHIGH | PULL | PU_47K),
510 1.6 bsh IOMUX_MP(NANDF_RE_B, ALT0, HVE | DSEHIGH | PULL | PU_47K),
511 1.6 bsh IOMUX_MP(NANDF_ALE, ALT0, HVE | DSEHIGH | KEEPER),
512 1.6 bsh IOMUX_MP(NANDF_CLE, ALT0, HVE | DSEHIGH | KEEPER),
513 1.6 bsh IOMUX_MP(NANDF_WP_B, ALT0, HVE | DSEHIGH | PULL | PU_100K),
514 1.6 bsh IOMUX_MP(NANDF_RB0, ALT0, HVE | DSELOW | PULL | PU_100K),
515 1.6 bsh IOMUX_MP(NANDF_RB1, ALT0, HVE | DSELOW | PULL | PU_100K),
516 1.6 bsh IOMUX_MP(NANDF_D7, ALT0, HVE | DSEHIGH | KEEPER | PU_100K),
517 1.6 bsh IOMUX_MP(NANDF_D6, ALT0, HVE | DSEHIGH | KEEPER | PU_100K),
518 1.6 bsh IOMUX_MP(NANDF_D5, ALT0, HVE | DSEHIGH | KEEPER | PU_100K),
519 1.6 bsh IOMUX_MP(NANDF_D4, ALT0, HVE | DSEHIGH | KEEPER | PU_100K),
520 1.6 bsh IOMUX_MP(NANDF_D3, ALT0, HVE | DSEHIGH | KEEPER | PU_100K),
521 1.6 bsh IOMUX_MP(NANDF_D2, ALT0, HVE | DSEHIGH | KEEPER | PU_100K),
522 1.6 bsh IOMUX_MP(NANDF_D1, ALT0, HVE | DSEHIGH | KEEPER | PU_100K),
523 1.6 bsh IOMUX_MP(NANDF_D0, ALT0, HVE | DSEHIGH | KEEPER | PU_100K),
524 1.6 bsh #endif
525 1.6 bsh
526 1.6 bsh /* Batttery pins */
527 1.6 bsh IOMUX_MP(NANDF_D13, ALT3, HYS | DSEHIGH),
528 1.6 bsh IOMUX_MP(NANDF_D12, ALT3, HYS | DSEHIGH),
529 1.6 bsh #if 0
530 1.6 bsh IOMUX_MP(NANDF_D11, ALT3, HYS | DSEHIGH),
531 1.1 bsh #endif
532 1.6 bsh IOMUX_MP(NANDF_D10, ALT3, HYS | DSEHIGH),
533 1.6 bsh
534 1.6 bsh /* SD1 */
535 1.6 bsh IOMUX_MP(SD1_CMD, SION | ALT0, DSEHIGH | SRE),
536 1.6 bsh IOMUX_MP(SD1_CLK, SION | ALT0, KEEPER | PU_47K | DSEHIGH),
537 1.6 bsh IOMUX_MP(SD1_DATA0, ALT0, DSEHIGH | SRE),
538 1.6 bsh IOMUX_MP(SD1_DATA1, ALT0, DSEHIGH | SRE),
539 1.6 bsh IOMUX_MP(SD1_DATA2, ALT0, DSEHIGH | SRE),
540 1.6 bsh IOMUX_MP(SD1_DATA3, ALT0, DSEHIGH | SRE),
541 1.6 bsh IOMUX_MP(GPIO1_0, SION | ALT0, HYS | PU_100K),
542 1.6 bsh
543 1.6 bsh /* SD2 */
544 1.6 bsh IOMUX_P(SD2_CMD, HVE | PU_22K | DSEMAX | SRE),
545 1.6 bsh IOMUX_P(SD2_CLK, HVE | PU_22K | DSEMAX | SRE),
546 1.6 bsh IOMUX_P(SD2_DATA0, HVE | PU_22K | DSEMAX | SRE),
547 1.6 bsh IOMUX_P(SD2_DATA1, HVE | PU_22K | DSEMAX | SRE),
548 1.6 bsh IOMUX_P(SD2_DATA2, HVE | PU_22K | DSEMAX | SRE),
549 1.6 bsh IOMUX_P(SD2_DATA3, HVE | PU_22K | DSEMAX | SRE),
550 1.6 bsh
551 1.6 bsh /* USB */
552 1.6 bsh IOMUX_MP(USBH1_CLK, ALT0, HYS | KEEPER | DSEHIGH | SRE),
553 1.6 bsh IOMUX_MP(USBH1_DIR, ALT0, HYS | KEEPER | DSEHIGH | SRE),
554 1.6 bsh IOMUX_MP(USBH1_STP, ALT0, HYS | KEEPER | DSEHIGH | SRE),
555 1.6 bsh IOMUX_MP(USBH1_NXT, ALT0, HYS | KEEPER | PU_100K | DSEHIGH | SRE),
556 1.6 bsh IOMUX_MP(USBH1_DATA0, ALT0, HYS | KEEPER | DSEHIGH | SRE),
557 1.6 bsh IOMUX_MP(USBH1_DATA1, ALT0, HYS | KEEPER | DSEHIGH | SRE),
558 1.6 bsh IOMUX_MP(USBH1_DATA2, ALT0, HYS | KEEPER | DSEHIGH | SRE),
559 1.6 bsh IOMUX_MP(USBH1_DATA3, ALT0, HYS | KEEPER | DSEHIGH | SRE),
560 1.6 bsh IOMUX_MP(USBH1_DATA4, ALT0, HYS | KEEPER | DSEHIGH | SRE),
561 1.6 bsh IOMUX_MP(USBH1_DATA5, ALT0, HYS | KEEPER | DSEHIGH | SRE),
562 1.6 bsh IOMUX_MP(USBH1_DATA6, ALT0, HYS | KEEPER | DSEHIGH | SRE),
563 1.6 bsh IOMUX_MP(USBH1_DATA7, ALT0, HYS | KEEPER | DSEHIGH | SRE),
564 1.6 bsh IOMUX_MP(EIM_D17, ALT1, KEEPER | DSEHIGH | SRE),
565 1.6 bsh IOMUX_MP(EIM_D21, ALT1, KEEPER | DSEHIGH | SRE),
566 1.6 bsh IOMUX_P(GPIO1_7, /*ALT0,*/ DSEHIGH | SRE), /* USB Hub reset */
567 1.6 bsh
568 1.6 bsh #undef ODE
569 1.6 bsh #undef HYS
570 1.6 bsh #undef SRE
571 1.6 bsh #undef PULL
572 1.6 bsh #undef KEEPER
573 1.6 bsh #undef PU_22K
574 1.6 bsh #undef PU_47K
575 1.6 bsh #undef PU_100K
576 1.6 bsh #undef PD_100K
577 1.6 bsh #undef HVE
578 1.6 bsh #undef DSEMAX
579 1.6 bsh #undef DSEHIGH
580 1.6 bsh #undef DSEMID
581 1.6 bsh #undef DSELOW
582 1.6 bsh
583 1.6 bsh #undef ALT0
584 1.6 bsh #undef ALT1
585 1.6 bsh #undef ALT2
586 1.6 bsh #undef ALT3
587 1.6 bsh #undef ALT4
588 1.6 bsh #undef ALT5
589 1.6 bsh #undef ALT6
590 1.6 bsh #undef ALT7
591 1.6 bsh #undef SION
592 1.1 bsh };
593 1.1 bsh
594 1.1 bsh static void
595 1.1 bsh setup_ioports(void)
596 1.1 bsh {
597 1.1 bsh int i;
598 1.1 bsh const struct iomux_setup *p;
599 1.1 bsh
600 1.6 bsh /* Initialize all IOMUX registers */
601 1.1 bsh for (i=0; i < __arraycount(iomux_setup_data); ++i) {
602 1.1 bsh p = iomux_setup_data + i;
603 1.1 bsh
604 1.6 bsh ioreg_write(NETWALKER_IOMUXC_VBASE + p->reg,
605 1.6 bsh p->val);
606 1.1 bsh }
607 1.1 bsh
608 1.1 bsh
609 1.1 bsh #if 0 /* already done by bootloader */
610 1.1 bsh /* GPIO2[22,23]: input (left/right button)
611 1.1 bsh GPIO2[21]: input (power button) */
612 1.1 bsh ioreg_write(NETWALKER_GPIO_VBASE(2) + GPIO_DIR,
613 1.1 bsh ~__BITS(21,23) &
614 1.1 bsh ioreg_read(NETWALKER_GPIO_VBASE(2) + GPIO_DIR));
615 1.1 bsh #endif
616 1.1 bsh
617 1.1 bsh #if 0 /* already done by bootloader */
618 1.1 bsh /* GPIO4[12]: input (cover switch) */
619 1.1 bsh ioreg_write(NETWALKER_GPIO_VBASE(4) + GPIO_DIR,
620 1.1 bsh ~__BIT(12) &
621 1.1 bsh ioreg_read(NETWALKER_GPIO_VBASE(4) + GPIO_DIR));
622 1.1 bsh #endif
623 1.1 bsh }
624 1.1 bsh
625 1.1 bsh
626 1.1 bsh #ifdef CONSDEVNAME
627 1.1 bsh const char consdevname[] = CONSDEVNAME;
628 1.1 bsh
629 1.1 bsh #ifndef CONMODE
630 1.1 bsh #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
631 1.1 bsh #endif
632 1.1 bsh #ifndef CONSPEED
633 1.1 bsh #define CONSPEED 115200
634 1.1 bsh #endif
635 1.1 bsh
636 1.1 bsh int consmode = CONMODE;
637 1.1 bsh int consrate = CONSPEED;
638 1.1 bsh
639 1.1 bsh #endif /* CONSDEVNAME */
640 1.1 bsh
641 1.1 bsh #ifndef IMXUART_FREQ
642 1.6 bsh #define IMXUART_FREQ 66500000
643 1.1 bsh #endif
644 1.1 bsh
645 1.1 bsh void
646 1.1 bsh consinit(void)
647 1.1 bsh {
648 1.1 bsh static int consinit_called = 0;
649 1.1 bsh
650 1.1 bsh if (consinit_called)
651 1.1 bsh return;
652 1.1 bsh
653 1.1 bsh consinit_called = 1;
654 1.1 bsh
655 1.1 bsh #ifdef CONSDEVNAME
656 1.1 bsh
657 1.1 bsh #if NIMXUART > 0
658 1.1 bsh imxuart_set_frequency(IMXUART_FREQ, 2);
659 1.1 bsh #endif
660 1.1 bsh
661 1.1 bsh #if (NIMXUART > 0) && defined(IMXUARTCONSOLE)
662 1.1 bsh if (strcmp(consdevname, "imxuart") == 0) {
663 1.1 bsh paddr_t consaddr;
664 1.1 bsh #ifdef CONADDR
665 1.1 bsh consaddr = CONADDR;
666 1.1 bsh #else
667 1.1 bsh consaddr = IMX51_UART1_BASE;
668 1.1 bsh #endif
669 1.1 bsh imxuart_cons_attach(&imx_bs_tag, consaddr, consrate, consmode);
670 1.1 bsh return;
671 1.1 bsh }
672 1.1 bsh #endif
673 1.1 bsh
674 1.1 bsh #endif
675 1.1 bsh
676 1.12 hkenken #if (NWSDISPLAY > 0) && defined(IMXIPUCONSOLE)
677 1.12 hkenken #if NUKBD > 0
678 1.12 hkenken ukbd_cnattach();
679 1.12 hkenken #endif
680 1.1 bsh {
681 1.1 bsh extern void netwalker_cnattach(void);
682 1.1 bsh netwalker_cnattach();
683 1.1 bsh }
684 1.1 bsh #endif
685 1.1 bsh }
686 1.1 bsh
687 1.1 bsh #ifdef KGDB
688 1.1 bsh #ifndef KGDB_DEVNAME
689 1.1 bsh #define KGDB_DEVNAME "imxuart"
690 1.1 bsh #endif
691 1.1 bsh #ifndef KGDB_DEVMODE
692 1.1 bsh #define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
693 1.1 bsh #endif
694 1.1 bsh
695 1.1 bsh const char kgdb_devname[20] = KGDB_DEVNAME;
696 1.1 bsh int kgdb_mode = KGDB_DEVMODE;
697 1.1 bsh int kgdb_addr = KGDB_DEVADDR;
698 1.1 bsh extern int kgdb_rate; /* defined in kgdb_stub.c */
699 1.1 bsh
700 1.1 bsh void
701 1.1 bsh kgdb_port_init(void)
702 1.1 bsh {
703 1.1 bsh #if (NIMXUART > 0)
704 1.1 bsh if (strcmp(kgdb_devname, "imxuart") == 0) {
705 1.1 bsh imxuart_kgdb_attach(&imx_bs_tag, kgdb_addr,
706 1.1 bsh kgdb_rate, kgdb_mode);
707 1.1 bsh return;
708 1.1 bsh }
709 1.1 bsh
710 1.1 bsh #endif
711 1.1 bsh }
712 1.1 bsh #endif
713 1.1 bsh
714 1.1 bsh
715