netwalker_machdep.c revision 1.9 1 1.9 matt /* $NetBSD: netwalker_machdep.c,v 1.9 2012/08/29 19:10:17 matt Exp $ */
2 1.1 bsh
3 1.1 bsh /*
4 1.1 bsh * Copyright (c) 2002, 2003, 2005, 2010 Genetec Corporation.
5 1.1 bsh * All rights reserved.
6 1.1 bsh * Written by Hiroyuki Bessho for Genetec Corporation.
7 1.1 bsh *
8 1.1 bsh * Redistribution and use in source and binary forms, with or without
9 1.1 bsh * modification, are permitted provided that the following conditions
10 1.1 bsh * are met:
11 1.1 bsh * 1. Redistributions of source code must retain the above copyright
12 1.1 bsh * notice, this list of conditions and the following disclaimer.
13 1.1 bsh * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 bsh * notice, this list of conditions and the following disclaimer in the
15 1.1 bsh * documentation and/or other materials provided with the distribution.
16 1.1 bsh *
17 1.1 bsh * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
18 1.1 bsh * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
19 1.1 bsh * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
20 1.1 bsh * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION
21 1.1 bsh * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22 1.1 bsh * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 1.1 bsh * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 1.1 bsh * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25 1.1 bsh * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 1.1 bsh * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27 1.1 bsh * POSSIBILITY OF SUCH DAMAGE.
28 1.1 bsh *
29 1.4 wiz * Machine dependent functions for kernel setup for Sharp Netwalker.
30 1.1 bsh * Based on iq80310_machhdep.c
31 1.1 bsh */
32 1.1 bsh /*
33 1.1 bsh * Copyright (c) 2001 Wasabi Systems, Inc.
34 1.1 bsh * All rights reserved.
35 1.1 bsh *
36 1.1 bsh * Written by Jason R. Thorpe for Wasabi Systems, Inc.
37 1.1 bsh *
38 1.1 bsh * Redistribution and use in source and binary forms, with or without
39 1.1 bsh * modification, are permitted provided that the following conditions
40 1.1 bsh * are met:
41 1.1 bsh * 1. Redistributions of source code must retain the above copyright
42 1.1 bsh * notice, this list of conditions and the following disclaimer.
43 1.1 bsh * 2. Redistributions in binary form must reproduce the above copyright
44 1.1 bsh * notice, this list of conditions and the following disclaimer in the
45 1.1 bsh * documentation and/or other materials provided with the distribution.
46 1.1 bsh * 3. All advertising materials mentioning features or use of this software
47 1.1 bsh * must display the following acknowledgement:
48 1.1 bsh * This product includes software developed for the NetBSD Project by
49 1.1 bsh * Wasabi Systems, Inc.
50 1.1 bsh * 4. The name of Wasabi Systems, Inc. may not be used to endorse
51 1.1 bsh * or promote products derived from this software without specific prior
52 1.1 bsh * written permission.
53 1.1 bsh *
54 1.1 bsh * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
55 1.1 bsh * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
56 1.1 bsh * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
57 1.1 bsh * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
58 1.1 bsh * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
59 1.1 bsh * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
60 1.1 bsh * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
61 1.1 bsh * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
62 1.1 bsh * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
63 1.1 bsh * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
64 1.1 bsh * POSSIBILITY OF SUCH DAMAGE.
65 1.1 bsh */
66 1.1 bsh
67 1.1 bsh /*
68 1.1 bsh * Copyright (c) 1997,1998 Mark Brinicombe.
69 1.1 bsh * Copyright (c) 1997,1998 Causality Limited.
70 1.1 bsh * All rights reserved.
71 1.1 bsh *
72 1.1 bsh * Redistribution and use in source and binary forms, with or without
73 1.1 bsh * modification, are permitted provided that the following conditions
74 1.1 bsh * are met:
75 1.1 bsh * 1. Redistributions of source code must retain the above copyright
76 1.1 bsh * notice, this list of conditions and the following disclaimer.
77 1.1 bsh * 2. Redistributions in binary form must reproduce the above copyright
78 1.1 bsh * notice, this list of conditions and the following disclaimer in the
79 1.1 bsh * documentation and/or other materials provided with the distribution.
80 1.1 bsh * 3. All advertising materials mentioning features or use of this software
81 1.1 bsh * must display the following acknowledgement:
82 1.1 bsh * This product includes software developed by Mark Brinicombe
83 1.1 bsh * for the NetBSD Project.
84 1.1 bsh * 4. The name of the company nor the name of the author may be used to
85 1.1 bsh * endorse or promote products derived from this software without specific
86 1.1 bsh * prior written permission.
87 1.1 bsh *
88 1.1 bsh * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
89 1.1 bsh * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
90 1.1 bsh * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
91 1.1 bsh * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
92 1.1 bsh * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
93 1.1 bsh * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
94 1.1 bsh * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
95 1.1 bsh * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
96 1.1 bsh * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
97 1.1 bsh * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
98 1.1 bsh * SUCH DAMAGE.
99 1.1 bsh *
100 1.4 wiz * Machine dependent functions for kernel setup for Intel IQ80310 evaluation
101 1.1 bsh * boards using RedBoot firmware.
102 1.1 bsh */
103 1.1 bsh
104 1.1 bsh #include <sys/cdefs.h>
105 1.9 matt __KERNEL_RCSID(0, "$NetBSD: netwalker_machdep.c,v 1.9 2012/08/29 19:10:17 matt Exp $");
106 1.1 bsh
107 1.1 bsh #include "opt_ddb.h"
108 1.1 bsh #include "opt_kgdb.h"
109 1.1 bsh #include "opt_ipkdb.h"
110 1.1 bsh #include "opt_pmap_debug.h"
111 1.1 bsh #include "opt_md.h"
112 1.1 bsh #include "opt_com.h"
113 1.1 bsh #include "imxuart.h"
114 1.1 bsh #include "opt_imxuart.h"
115 1.1 bsh #include "opt_imx.h"
116 1.1 bsh
117 1.1 bsh #include <sys/param.h>
118 1.1 bsh #include <sys/device.h>
119 1.1 bsh #include <sys/systm.h>
120 1.1 bsh #include <sys/kernel.h>
121 1.1 bsh #include <sys/exec.h>
122 1.1 bsh #include <sys/proc.h>
123 1.1 bsh #include <sys/msgbuf.h>
124 1.1 bsh #include <sys/reboot.h>
125 1.1 bsh #include <sys/termios.h>
126 1.1 bsh #include <sys/ksyms.h>
127 1.1 bsh
128 1.1 bsh #include <uvm/uvm_extern.h>
129 1.1 bsh
130 1.1 bsh #include <sys/conf.h>
131 1.1 bsh #include <dev/cons.h>
132 1.1 bsh #include <dev/md.h>
133 1.1 bsh
134 1.1 bsh #include <machine/db_machdep.h>
135 1.1 bsh #include <ddb/db_sym.h>
136 1.1 bsh #include <ddb/db_extern.h>
137 1.1 bsh #ifdef KGDB
138 1.1 bsh #include <sys/kgdb.h>
139 1.1 bsh #endif
140 1.1 bsh
141 1.1 bsh #include <machine/bootconfig.h>
142 1.5 dyoung #include <sys/bus.h>
143 1.1 bsh #include <machine/cpu.h>
144 1.1 bsh #include <machine/frame.h>
145 1.1 bsh #include <arm/undefined.h>
146 1.1 bsh
147 1.1 bsh #include <arm/arm32/pte.h>
148 1.1 bsh #include <arm/arm32/machdep.h>
149 1.1 bsh
150 1.1 bsh #include <arm/imx/imx51reg.h>
151 1.1 bsh #include <arm/imx/imx51var.h>
152 1.1 bsh #include <arm/imx/imxgpioreg.h>
153 1.1 bsh #include <arm/imx/imxwdogreg.h>
154 1.1 bsh #include <arm/imx/imxuartreg.h>
155 1.1 bsh #include <arm/imx/imxuartvar.h>
156 1.1 bsh #include <arm/imx/imx51_iomuxreg.h>
157 1.1 bsh #include <evbarm/netwalker/netwalker_reg.h>
158 1.1 bsh
159 1.1 bsh /* Kernel text starts 1MB in from the bottom of the kernel address space. */
160 1.1 bsh #define KERNEL_TEXT_BASE (KERNEL_BASE + 0x00100000)
161 1.1 bsh #define KERNEL_VM_BASE (KERNEL_BASE + 0x01000000)
162 1.1 bsh
163 1.1 bsh /*
164 1.1 bsh * The range 0xc1000000 - 0xccffffff is available for kernel VM space
165 1.1 bsh * Core-logic registers and I/O mappings occupy 0xfd000000 - 0xffffffff
166 1.1 bsh */
167 1.1 bsh #define KERNEL_VM_SIZE 0x0C000000
168 1.1 bsh
169 1.1 bsh BootConfig bootconfig; /* Boot config storage */
170 1.1 bsh char *boot_args = NULL;
171 1.1 bsh char *boot_file = NULL;
172 1.1 bsh
173 1.1 bsh vm_offset_t physical_start;
174 1.1 bsh vm_offset_t physical_freestart;
175 1.1 bsh vm_offset_t physical_freeend;
176 1.1 bsh vm_offset_t physical_end;
177 1.1 bsh u_int free_pages;
178 1.1 bsh vm_offset_t pagetables_start;
179 1.1 bsh
180 1.1 bsh /*int debug_flags;*/
181 1.1 bsh #ifndef PMAP_STATIC_L1S
182 1.1 bsh int max_processes = 64; /* Default number */
183 1.1 bsh #endif /* !PMAP_STATIC_L1S */
184 1.1 bsh
185 1.1 bsh vm_offset_t msgbufphys;
186 1.1 bsh
187 1.1 bsh extern char KERNEL_BASE_phys[];
188 1.1 bsh extern char KERNEL_BASE_virt[];
189 1.1 bsh extern char etext[], __data_start[], _edata[], __bss_start[], __bss_end__[];
190 1.1 bsh extern char _end[];
191 1.1 bsh extern int cpu_do_powersave;
192 1.1 bsh
193 1.1 bsh #define KERNEL_PT_SYS 0 /* Page table for mapping proc0 zero page */
194 1.1 bsh #define KERNEL_PT_KERNEL 1 /* Page table for mapping kernel */
195 1.1 bsh #define KERNEL_PT_KERNEL_NUM 4
196 1.1 bsh #define KERNEL_PT_VMDATA (KERNEL_PT_KERNEL+KERNEL_PT_KERNEL_NUM)
197 1.1 bsh /* Page tables for mapping kernel VM */
198 1.1 bsh #define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */
199 1.1 bsh #define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
200 1.1 bsh
201 1.1 bsh pv_addr_t kernel_pt_table[NUM_KERNEL_PTS];
202 1.1 bsh
203 1.1 bsh /*
204 1.1 bsh * Macros to translate between physical and virtual for a subset of the
205 1.1 bsh * kernel address space. *Not* for general use.
206 1.1 bsh */
207 1.1 bsh #define KERNEL_BASE_PHYS ((paddr_t)&KERNEL_BASE_phys)
208 1.1 bsh #define KERNEL_BASE_VIRT ((vaddr_t)&KERNEL_BASE_virt)
209 1.1 bsh #define KERN_VTOPHYS(va) \
210 1.1 bsh ((paddr_t)((vaddr_t)va - KERNEL_BASE_VIRT + KERNEL_BASE_PHYS))
211 1.1 bsh #define KERN_PHYSTOV(pa) \
212 1.1 bsh ((vaddr_t)((paddr_t)pa - KERNEL_BASE_PHYS + KERNEL_BASE_VIRT))
213 1.1 bsh
214 1.1 bsh
215 1.1 bsh /* Prototypes */
216 1.1 bsh
217 1.1 bsh void consinit(void);
218 1.1 bsh #if 0
219 1.1 bsh void process_kernel_args(char *);
220 1.1 bsh #endif
221 1.1 bsh
222 1.1 bsh #ifdef KGDB
223 1.1 bsh void kgdb_port_init(void);
224 1.1 bsh #endif
225 1.1 bsh void change_clock(uint32_t v);
226 1.1 bsh
227 1.1 bsh static void init_clocks(void);
228 1.1 bsh static void setup_ioports(void);
229 1.1 bsh #ifdef DEBUG_IOPORTS
230 1.1 bsh void dump_registers(void);
231 1.1 bsh #endif
232 1.1 bsh
233 1.1 bsh bs_protos(bs_notimpl);
234 1.1 bsh
235 1.1 bsh #ifndef CONSPEED
236 1.1 bsh #define CONSPEED B115200 /* What RedBoot uses */
237 1.1 bsh #endif
238 1.1 bsh #ifndef CONMODE
239 1.1 bsh #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
240 1.1 bsh #endif
241 1.1 bsh
242 1.1 bsh int comcnspeed = CONSPEED;
243 1.1 bsh int comcnmode = CONMODE;
244 1.1 bsh
245 1.1 bsh /*
246 1.1 bsh * void cpu_reboot(int howto, char *bootstr)
247 1.1 bsh *
248 1.1 bsh * Reboots the system
249 1.1 bsh *
250 1.1 bsh * Deal with any syncing, unmounting, dumping and shutdown hooks,
251 1.1 bsh * then reset the CPU.
252 1.1 bsh */
253 1.1 bsh void
254 1.1 bsh cpu_reboot(int howto, char *bootstr)
255 1.1 bsh {
256 1.1 bsh #ifdef DIAGNOSTIC
257 1.1 bsh /* info */
258 1.1 bsh printf("boot: howto=%08x curproc=%p\n", howto, curproc);
259 1.1 bsh #endif
260 1.1 bsh
261 1.1 bsh /*
262 1.1 bsh * If we are still cold then hit the air brakes
263 1.1 bsh * and crash to earth fast
264 1.1 bsh */
265 1.1 bsh if (cold) {
266 1.1 bsh doshutdownhooks();
267 1.1 bsh pmf_system_shutdown(boothowto);
268 1.1 bsh printf("The operating system has halted.\n");
269 1.1 bsh printf("Please press any key to reboot.\n\n");
270 1.1 bsh cngetc();
271 1.1 bsh printf("rebooting...\n");
272 1.1 bsh cpu_reset();
273 1.1 bsh /*NOTREACHED*/
274 1.1 bsh }
275 1.1 bsh
276 1.1 bsh /* Disable console buffering */
277 1.1 bsh /* cnpollc(1);*/
278 1.1 bsh
279 1.1 bsh /*
280 1.1 bsh * If RB_NOSYNC was not specified sync the discs.
281 1.1 bsh * Note: Unless cold is set to 1 here, syslogd will die during the
282 1.1 bsh * unmount. It looks like syslogd is getting woken up only to find
283 1.1 bsh * that it cannot page part of the binary in as the filesystem has
284 1.1 bsh * been unmounted.
285 1.1 bsh */
286 1.1 bsh if (!(howto & RB_NOSYNC))
287 1.1 bsh bootsync();
288 1.1 bsh
289 1.1 bsh /* Say NO to interrupts */
290 1.1 bsh splhigh();
291 1.1 bsh
292 1.1 bsh /* Do a dump if requested. */
293 1.1 bsh if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
294 1.1 bsh dumpsys();
295 1.1 bsh
296 1.1 bsh /* Run any shutdown hooks */
297 1.1 bsh doshutdownhooks();
298 1.1 bsh
299 1.1 bsh pmf_system_shutdown(boothowto);
300 1.1 bsh
301 1.1 bsh /* Make sure IRQ's are disabled */
302 1.1 bsh IRQdisable;
303 1.1 bsh
304 1.1 bsh if (howto & RB_HALT) {
305 1.1 bsh printf("The operating system has halted.\n");
306 1.1 bsh printf("Please press any key to reboot.\n\n");
307 1.1 bsh cngetc();
308 1.1 bsh }
309 1.1 bsh
310 1.1 bsh printf("rebooting...\n");
311 1.1 bsh cpu_reset();
312 1.1 bsh /*NOTREACHED*/
313 1.1 bsh }
314 1.1 bsh
315 1.1 bsh /*
316 1.1 bsh * Static device mappings. These peripheral registers are mapped at
317 1.1 bsh * fixed virtual addresses very early in netwalker_start() so that we
318 1.1 bsh * can use them while booting the kernel, and stay at the same address
319 1.1 bsh * throughout whole kernel's life time.
320 1.1 bsh *
321 1.1 bsh * We use this table twice; once with bootstrap page table, and once
322 1.1 bsh * with kernel's page table which we build up in initarm().
323 1.1 bsh */
324 1.1 bsh
325 1.1 bsh #define _A(a) ((a) & ~L1_S_OFFSET)
326 1.1 bsh #define _S(s) (((s) + L1_S_SIZE - 1) & ~(L1_S_SIZE-1))
327 1.1 bsh
328 1.1 bsh static const struct pmap_devmap netwalker_devmap[] = {
329 1.1 bsh {
330 1.1 bsh /* for UART1, IOMUXC */
331 1.1 bsh NETWALKER_IO_VBASE0,
332 1.1 bsh _A(NETWALKER_IO_PBASE0),
333 1.1 bsh L1_S_SIZE * 4,
334 1.1 bsh VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE
335 1.1 bsh },
336 1.1 bsh {0, 0, 0, 0, 0 }
337 1.1 bsh };
338 1.1 bsh
339 1.1 bsh #ifndef MEMSTART
340 1.1 bsh #define MEMSTART 0x90000000
341 1.1 bsh #endif
342 1.1 bsh #ifndef MEMSIZE
343 1.1 bsh #define MEMSIZE 512
344 1.1 bsh #endif
345 1.1 bsh
346 1.1 bsh /*
347 1.1 bsh * u_int initarm(...)
348 1.1 bsh *
349 1.1 bsh * Initial entry point on startup. This gets called before main() is
350 1.1 bsh * entered.
351 1.1 bsh * It should be responsible for setting up everything that must be
352 1.1 bsh * in place when main is called.
353 1.1 bsh * This includes
354 1.1 bsh * Taking a copy of the boot configuration structure.
355 1.1 bsh * Initialising the physical console so characters can be printed.
356 1.1 bsh * Setting up page tables for the kernel
357 1.1 bsh * Relocating the kernel to the bottom of physical memory
358 1.1 bsh */
359 1.1 bsh u_int
360 1.1 bsh initarm(void *arg)
361 1.1 bsh {
362 1.1 bsh int loop;
363 1.1 bsh int loop1;
364 1.1 bsh vaddr_t l1pagetable;
365 1.1 bsh
366 1.1 bsh #ifdef RBFLAGS
367 1.1 bsh boothowto |= RBFLAGS;
368 1.1 bsh #endif
369 1.1 bsh
370 1.1 bsh disable_interrupts(I32_bit|F32_bit);
371 1.1 bsh /* XXX move to netwalker_start.S */
372 1.1 bsh
373 1.1 bsh /* Register devmap for devices we mapped in start */
374 1.1 bsh pmap_devmap_register(netwalker_devmap);
375 1.1 bsh
376 1.1 bsh setup_ioports();
377 1.1 bsh
378 1.1 bsh consinit();
379 1.1 bsh
380 1.1 bsh #ifdef DEBUG_IOPORTS
381 1.1 bsh dump_registers();
382 1.1 bsh #endif
383 1.1 bsh
384 1.1 bsh /*
385 1.1 bsh * Heads up ... Setup the CPU / MMU / TLB functions
386 1.1 bsh */
387 1.1 bsh if (set_cpufuncs())
388 1.1 bsh panic("cpu not recognized!");
389 1.1 bsh
390 1.1 bsh #ifdef NO_POWERSAVE
391 1.1 bsh cpu_do_powersave=0;
392 1.1 bsh #endif
393 1.1 bsh
394 1.1 bsh init_clocks();
395 1.1 bsh
396 1.1 bsh #ifdef KGDB
397 1.1 bsh kgdb_port_init();
398 1.1 bsh #endif
399 1.1 bsh
400 1.1 bsh /* Talk to the user */
401 1.1 bsh printf("\nNetBSD/evbarm (netwalker) booting ...\n");
402 1.1 bsh
403 1.1 bsh /*
404 1.1 bsh * Ok we have the following memory map
405 1.1 bsh *
406 1.1 bsh * Physical Address Range Description
407 1.1 bsh * ----------------------- ----------------------------------
408 1.1 bsh *
409 1.1 bsh * 0x90000000 - 0x97FFFFFF DDR SDRAM (128MByte)
410 1.1 bsh *
411 1.1 bsh * The initarm() has the responsibility for creating the kernel
412 1.1 bsh * page tables.
413 1.1 bsh * It must also set up various memory pointers that are used
414 1.1 bsh * by pmap etc.
415 1.1 bsh */
416 1.1 bsh
417 1.1 bsh #if 0
418 1.1 bsh /*
419 1.1 bsh * Examine the boot args string for options we need to know about
420 1.1 bsh * now.
421 1.1 bsh */
422 1.1 bsh process_kernel_args((char *)nwbootinfo.bt_args);
423 1.1 bsh #endif
424 1.1 bsh
425 1.1 bsh #ifdef VERBOSE_INIT_ARM
426 1.1 bsh printf("initarm: Configuring system ...\n");
427 1.1 bsh #endif
428 1.1 bsh /* Fake bootconfig structure for the benefit of pmap.c */
429 1.1 bsh /* XXX must make the memory description h/w independent */
430 1.1 bsh bootconfig.dramblocks = 1;
431 1.1 bsh bootconfig.dram[0].address = MEMSTART;
432 1.1 bsh bootconfig.dram[0].pages = (MEMSIZE * 1024 * 1024)/ PAGE_SIZE;
433 1.1 bsh
434 1.1 bsh /*
435 1.1 bsh * Set up the variables that define the availablilty of
436 1.1 bsh * physical memory. For now, we're going to set
437 1.1 bsh * physical_freestart to 0x80100000 (where the kernel
438 1.1 bsh * was loaded), and allocate the memory we need downwards.
439 1.1 bsh * If we get too close to the bottom of SDRAM, we
440 1.1 bsh * will panic. We will update physical_freestart and
441 1.1 bsh * physical_freeend later to reflect what pmap_bootstrap()
442 1.1 bsh * wants to see.
443 1.1 bsh *
444 1.1 bsh * XXX pmap_bootstrap() needs an enema.
445 1.1 bsh */
446 1.1 bsh physical_start = bootconfig.dram[0].address;
447 1.1 bsh physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE);
448 1.1 bsh
449 1.1 bsh physical_freestart = 0x90000000UL; /* top of loadaddres */
450 1.1 bsh physical_freeend = 0x90100000UL; /* base of kernel */
451 1.1 bsh
452 1.1 bsh physmem = (physical_end - physical_start) / PAGE_SIZE;
453 1.1 bsh
454 1.1 bsh #ifdef VERBOSE_INIT_ARM
455 1.1 bsh /* Tell the user about the memory */
456 1.1 bsh printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem,
457 1.1 bsh physical_start, physical_end - 1);
458 1.1 bsh #endif
459 1.1 bsh
460 1.1 bsh /*
461 1.1 bsh * Okay, the kernel starts 1MB in from the bottom of physical
462 1.1 bsh * memory. We are going to allocate our bootstrap pages downwards
463 1.1 bsh * from there.
464 1.1 bsh *
465 1.1 bsh * We need to allocate some fixed page tables to get the kernel
466 1.1 bsh * going. We allocate one page directory and a number of page
467 1.1 bsh * tables and store the physical addresses in the kernel_pt_table
468 1.1 bsh * array.
469 1.1 bsh *
470 1.1 bsh * The kernel page directory must be on a 16K boundary. The page
471 1.1 bsh * tables must be on 4K boundaries. What we do is allocate the
472 1.1 bsh * page directory on the first 16K boundary that we encounter, and
473 1.1 bsh * the page tables on 4K boundaries otherwise. Since we allocate
474 1.1 bsh * at least 3 L2 page tables, we are guaranteed to encounter at
475 1.1 bsh * least one 16K aligned region.
476 1.1 bsh */
477 1.1 bsh
478 1.1 bsh #ifdef VERBOSE_INIT_ARM
479 1.1 bsh printf("Allocating page tables\n");
480 1.1 bsh #endif
481 1.1 bsh
482 1.1 bsh free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE;
483 1.1 bsh
484 1.1 bsh #ifdef VERBOSE_INIT_ARM
485 1.1 bsh printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n",
486 1.1 bsh physical_freestart, free_pages, free_pages);
487 1.1 bsh #endif
488 1.1 bsh
489 1.1 bsh /* Define a macro to simplify memory allocation */
490 1.1 bsh #define valloc_pages(var, np) \
491 1.1 bsh alloc_pages((var).pv_pa, (np)); \
492 1.1 bsh (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start;
493 1.1 bsh
494 1.1 bsh #define alloc_pages(var, np) \
495 1.1 bsh physical_freeend -= ((np) * PAGE_SIZE); \
496 1.1 bsh if (physical_freeend < physical_freestart) \
497 1.1 bsh panic("initarm: out of memory"); \
498 1.1 bsh (var) = physical_freeend; \
499 1.1 bsh free_pages -= (np); \
500 1.1 bsh memset((char *)(var), 0, ((np) * PAGE_SIZE));
501 1.1 bsh
502 1.1 bsh loop1 = 0;
503 1.1 bsh for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
504 1.1 bsh /* Are we 16KB aligned for an L1 ? */
505 1.1 bsh if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0
506 1.1 bsh && kernel_l1pt.pv_pa == 0) {
507 1.1 bsh valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
508 1.1 bsh } else {
509 1.1 bsh valloc_pages(kernel_pt_table[loop1],
510 1.1 bsh L2_TABLE_SIZE / PAGE_SIZE);
511 1.1 bsh ++loop1;
512 1.1 bsh }
513 1.1 bsh }
514 1.1 bsh
515 1.1 bsh /* This should never be able to happen but better confirm that. */
516 1.1 bsh if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE-1)) != 0)
517 1.1 bsh panic("initarm: Failed to align the kernel page directory");
518 1.1 bsh
519 1.1 bsh /*
520 1.1 bsh * Allocate a page for the system page mapped to V0x00000000
521 1.1 bsh * This page will just contain the system vectors and can be
522 1.1 bsh * shared by all processes.
523 1.1 bsh */
524 1.1 bsh valloc_pages(systempage, 1);
525 1.1 bsh systempage.pv_va = ARM_VECTORS_HIGH;
526 1.1 bsh
527 1.1 bsh /* Allocate stacks for all modes */
528 1.1 bsh valloc_pages(fiqstack, FIQ_STACK_SIZE);
529 1.1 bsh valloc_pages(irqstack, IRQ_STACK_SIZE);
530 1.1 bsh valloc_pages(abtstack, ABT_STACK_SIZE);
531 1.1 bsh valloc_pages(undstack, UND_STACK_SIZE);
532 1.1 bsh valloc_pages(kernelstack, UPAGES);
533 1.1 bsh
534 1.1 bsh #ifdef VERBOSE_INIT_ARM
535 1.1 bsh printf("FIQ stack: p0x%08lx v0x%08lx\n", fiqstack.pv_pa,
536 1.1 bsh fiqstack.pv_va);
537 1.1 bsh printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa,
538 1.1 bsh irqstack.pv_va);
539 1.1 bsh printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa,
540 1.1 bsh abtstack.pv_va);
541 1.1 bsh printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa,
542 1.1 bsh undstack.pv_va);
543 1.1 bsh printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa,
544 1.1 bsh kernelstack.pv_va);
545 1.1 bsh #endif
546 1.1 bsh
547 1.1 bsh alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE);
548 1.1 bsh
549 1.1 bsh /*
550 1.1 bsh * Ok we have allocated physical pages for the primary kernel
551 1.1 bsh * page tables
552 1.1 bsh */
553 1.1 bsh
554 1.1 bsh #ifdef VERBOSE_INIT_ARM
555 1.1 bsh printf("Creating L1 page table at p0x%08lx v0x%08lx\n",
556 1.1 bsh kernel_l1pt.pv_pa, kernel_l1pt.pv_va);
557 1.1 bsh #endif
558 1.1 bsh
559 1.1 bsh /*
560 1.1 bsh * Now we start construction of the L1 page table
561 1.1 bsh * We start by mapping the L2 page tables into the L1.
562 1.1 bsh * This means that we can replace L1 mappings later on if necessary
563 1.1 bsh */
564 1.1 bsh l1pagetable = kernel_l1pt.pv_pa;
565 1.1 bsh
566 1.1 bsh /* Map the L2 pages tables in the L1 page table */
567 1.1 bsh pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH & ~(0x00400000 - 1),
568 1.1 bsh &kernel_pt_table[KERNEL_PT_SYS]);
569 1.1 bsh for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++)
570 1.1 bsh pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000,
571 1.1 bsh &kernel_pt_table[KERNEL_PT_KERNEL + loop]);
572 1.1 bsh for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
573 1.1 bsh pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
574 1.1 bsh &kernel_pt_table[KERNEL_PT_VMDATA + loop]);
575 1.1 bsh
576 1.1 bsh /* update the top of the kernel VM */
577 1.1 bsh pmap_curmaxkvaddr =
578 1.1 bsh KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000);
579 1.1 bsh
580 1.1 bsh #ifdef VERBOSE_INIT_ARM
581 1.1 bsh printf("Mapping kernel\n");
582 1.1 bsh #endif
583 1.1 bsh
584 1.1 bsh /* Now we fill in the L2 pagetable for the kernel static code/data */
585 1.1 bsh #define round_L_page(x) (((x) + L2_L_OFFSET) & L2_L_FRAME)
586 1.1 bsh {
587 1.1 bsh size_t textsize = round_L_page((size_t)etext - KERNEL_TEXT_BASE);
588 1.1 bsh size_t totalsize = round_L_page((size_t)_end - KERNEL_TEXT_BASE);
589 1.1 bsh u_int logical;
590 1.1 bsh
591 1.1 bsh
592 1.1 bsh #ifdef VERBOSE_INIT_ARM
593 1.1 bsh printf("%s: etext %lx, _end %lx\n",
594 1.1 bsh __func__, (uintptr_t)etext, (uintptr_t)_end);
595 1.1 bsh printf("%s: textsize %#lx, totalsize %#lx\n",
596 1.1 bsh __func__, textsize, totalsize);
597 1.1 bsh #endif
598 1.1 bsh logical = 0x00100000; /* offset of kernel in RAM */
599 1.1 bsh
600 1.1 bsh /* Map text section read-only. */
601 1.1 bsh logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
602 1.1 bsh physical_start + logical, textsize,
603 1.1 bsh VM_PROT_READ|VM_PROT_EXECUTE, PTE_CACHE);
604 1.1 bsh
605 1.1 bsh /* Map data and bss sections read-write. */
606 1.1 bsh logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
607 1.1 bsh physical_start + logical, totalsize - textsize,
608 1.1 bsh VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
609 1.1 bsh }
610 1.1 bsh
611 1.1 bsh #ifdef VERBOSE_INIT_ARM
612 1.1 bsh printf("Constructing L2 page tables\n");
613 1.1 bsh #endif
614 1.1 bsh
615 1.1 bsh /* Map the stack pages */
616 1.1 bsh pmap_map_chunk(l1pagetable, fiqstack.pv_va, fiqstack.pv_pa,
617 1.1 bsh FIQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
618 1.1 bsh pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
619 1.1 bsh IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
620 1.1 bsh pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
621 1.1 bsh ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
622 1.1 bsh pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
623 1.1 bsh UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
624 1.1 bsh pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
625 1.1 bsh UPAGES * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
626 1.1 bsh
627 1.1 bsh pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
628 1.1 bsh L1_TABLE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_PAGETABLE);
629 1.1 bsh
630 1.1 bsh for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
631 1.1 bsh pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va,
632 1.1 bsh kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
633 1.1 bsh VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
634 1.1 bsh }
635 1.1 bsh
636 1.1 bsh /* Map the vector page. */
637 1.1 bsh #if 0
638 1.1 bsh /* MULTI-ICE requires that page 0 is NC/NB so that it can download the
639 1.1 bsh * cache-clean code there. */
640 1.1 bsh pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
641 1.1 bsh VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
642 1.1 bsh #else
643 1.1 bsh pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
644 1.1 bsh VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
645 1.1 bsh #endif
646 1.1 bsh
647 1.1 bsh /*
648 1.1 bsh * map integrated peripherals at same address in l1pagetable
649 1.1 bsh * so that we can continue to use console.
650 1.1 bsh */
651 1.1 bsh pmap_devmap_bootstrap(l1pagetable, netwalker_devmap);
652 1.1 bsh
653 1.1 bsh /*
654 1.1 bsh * Now we have the real page tables in place so we can switch to them.
655 1.1 bsh * Once this is done we will be running with the REAL kernel page
656 1.1 bsh * tables.
657 1.1 bsh */
658 1.1 bsh
659 1.1 bsh /*
660 1.1 bsh * Update the physical_freestart/physical_freeend/free_pages
661 1.1 bsh * variables.
662 1.1 bsh */
663 1.1 bsh physical_freestart = physical_start +
664 1.1 bsh (((((uintptr_t) _end) + PGOFSET) & ~PGOFSET) - KERNEL_BASE);
665 1.1 bsh physical_freeend = physical_end;
666 1.1 bsh free_pages =
667 1.1 bsh (physical_freeend - physical_freestart) / PAGE_SIZE;
668 1.1 bsh
669 1.1 bsh #ifdef VERBOSE_INIT_ARM
670 1.1 bsh /* Tell the user about where all the bits and pieces live. */
671 1.1 bsh printf("%22s Physical Virtual Num\n", " ");
672 1.1 bsh printf("%22s Starting Ending Starting Ending Pages\n", " ");
673 1.1 bsh
674 1.1 bsh static const char mem_fmt[] =
675 1.1 bsh "%20s: 0x%08lx 0x%08lx 0x%08lx 0x%08lx %d\n";
676 1.1 bsh static const char mem_fmt_nov[] =
677 1.1 bsh "%20s: 0x%08lx 0x%08lx %d\n";
678 1.1 bsh
679 1.1 bsh printf(mem_fmt, "SDRAM", physical_start, physical_end-1,
680 1.1 bsh KERN_PHYSTOV(physical_start), KERN_PHYSTOV(physical_end-1),
681 1.1 bsh physmem);
682 1.1 bsh printf(mem_fmt, "text section",
683 1.1 bsh (paddr_t)KERNEL_BASE_phys, KERN_VTOPHYS(etext-1),
684 1.1 bsh (vaddr_t)KERNEL_BASE_virt, (vaddr_t)etext-1,
685 1.1 bsh (int)(round_L_page((size_t)etext - KERNEL_TEXT_BASE) / PAGE_SIZE));
686 1.1 bsh printf(mem_fmt, "data section",
687 1.1 bsh KERN_VTOPHYS(__data_start), KERN_VTOPHYS(_edata),
688 1.1 bsh (vaddr_t)__data_start, (vaddr_t)_edata,
689 1.1 bsh (int)((round_page((vaddr_t)_edata)
690 1.1 bsh - trunc_page((vaddr_t)__data_start)) / PAGE_SIZE));
691 1.1 bsh printf(mem_fmt, "bss section",
692 1.1 bsh KERN_VTOPHYS(__bss_start), KERN_VTOPHYS(__bss_end__),
693 1.1 bsh (vaddr_t)__bss_start, (vaddr_t)__bss_end__,
694 1.1 bsh (int)((round_page((vaddr_t)__bss_end__)
695 1.1 bsh - trunc_page((vaddr_t)__bss_start)) / PAGE_SIZE));
696 1.1 bsh printf(mem_fmt, "L1 page directory",
697 1.1 bsh kernel_l1pt.pv_pa, kernel_l1pt.pv_pa + L1_TABLE_SIZE - 1,
698 1.1 bsh kernel_l1pt.pv_va, kernel_l1pt.pv_va + L1_TABLE_SIZE - 1,
699 1.1 bsh L1_TABLE_SIZE / PAGE_SIZE);
700 1.1 bsh printf(mem_fmt, "Exception Vectors",
701 1.1 bsh systempage.pv_pa, systempage.pv_pa + PAGE_SIZE - 1,
702 1.1 bsh systempage.pv_va, systempage.pv_va + PAGE_SIZE - 1,
703 1.1 bsh 1);
704 1.1 bsh printf(mem_fmt, "FIQ stack",
705 1.1 bsh fiqstack.pv_pa, fiqstack.pv_pa + (FIQ_STACK_SIZE * PAGE_SIZE) - 1,
706 1.1 bsh fiqstack.pv_va, fiqstack.pv_va + (FIQ_STACK_SIZE * PAGE_SIZE) - 1,
707 1.1 bsh FIQ_STACK_SIZE);
708 1.1 bsh printf(mem_fmt, "IRQ stack",
709 1.1 bsh irqstack.pv_pa, irqstack.pv_pa + (IRQ_STACK_SIZE * PAGE_SIZE) - 1,
710 1.1 bsh irqstack.pv_va, irqstack.pv_va + (IRQ_STACK_SIZE * PAGE_SIZE) - 1,
711 1.1 bsh IRQ_STACK_SIZE);
712 1.1 bsh printf(mem_fmt, "ABT stack",
713 1.1 bsh abtstack.pv_pa, abtstack.pv_pa + (ABT_STACK_SIZE * PAGE_SIZE) - 1,
714 1.1 bsh abtstack.pv_va, abtstack.pv_va + (ABT_STACK_SIZE * PAGE_SIZE) - 1,
715 1.1 bsh ABT_STACK_SIZE);
716 1.1 bsh printf(mem_fmt, "UND stack",
717 1.1 bsh undstack.pv_pa, undstack.pv_pa + (UND_STACK_SIZE * PAGE_SIZE) - 1,
718 1.1 bsh undstack.pv_va, undstack.pv_va + (UND_STACK_SIZE * PAGE_SIZE) - 1,
719 1.1 bsh UND_STACK_SIZE);
720 1.1 bsh printf(mem_fmt, "SVC stack",
721 1.1 bsh kernelstack.pv_pa, kernelstack.pv_pa + (UPAGES * PAGE_SIZE) - 1,
722 1.1 bsh kernelstack.pv_va, kernelstack.pv_va + (UPAGES * PAGE_SIZE) - 1,
723 1.1 bsh UPAGES);
724 1.1 bsh printf(mem_fmt_nov, "Message Buffer",
725 1.1 bsh msgbufphys, msgbufphys + round_page(MSGBUFSIZE) - 1, round_page(MSGBUFSIZE) / PAGE_SIZE);
726 1.1 bsh printf(mem_fmt, "Free Memory", physical_freestart, physical_freeend-1,
727 1.1 bsh KERN_PHYSTOV(physical_freestart), KERN_PHYSTOV(physical_freeend-1),
728 1.1 bsh free_pages);
729 1.1 bsh #endif
730 1.1 bsh
731 1.1 bsh /* Switch tables */
732 1.1 bsh #ifdef VERBOSE_INIT_ARM
733 1.1 bsh printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
734 1.1 bsh physical_freestart, free_pages, free_pages);
735 1.1 bsh printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa);
736 1.1 bsh #endif
737 1.1 bsh
738 1.1 bsh cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
739 1.1 bsh cpu_setttb(kernel_l1pt.pv_pa);
740 1.1 bsh cpu_tlb_flushID();
741 1.1 bsh cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
742 1.1 bsh
743 1.1 bsh /*
744 1.1 bsh * Moved from cpu_startup() as data_abort_handler() references
745 1.1 bsh * this during uvm init
746 1.1 bsh */
747 1.1 bsh uvm_lwp_setuarea(&lwp0, kernelstack.pv_va);
748 1.1 bsh
749 1.1 bsh #ifdef VERBOSE_INIT_ARM
750 1.1 bsh printf("bootstrap done.\n");
751 1.1 bsh #endif
752 1.1 bsh
753 1.1 bsh arm32_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
754 1.1 bsh
755 1.1 bsh /*
756 1.1 bsh * Pages were allocated during the secondary bootstrap for the
757 1.1 bsh * stacks for different CPU modes.
758 1.1 bsh * We must now set the r13 registers in the different CPU modes to
759 1.1 bsh * point to these stacks.
760 1.1 bsh * Since the ARM stacks use STMFD etc. we must set r13 to the top end
761 1.1 bsh * of the stack memory.
762 1.1 bsh */
763 1.1 bsh #ifdef VERBOSE_INIT_ARM
764 1.1 bsh printf("init subsystems: stacks ");
765 1.1 bsh #endif
766 1.1 bsh set_stackptr(PSR_FIQ32_MODE, fiqstack.pv_va + FIQ_STACK_SIZE * PAGE_SIZE);
767 1.1 bsh set_stackptr(PSR_IRQ32_MODE, irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
768 1.1 bsh set_stackptr(PSR_ABT32_MODE, abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
769 1.1 bsh set_stackptr(PSR_UND32_MODE, undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
770 1.1 bsh
771 1.1 bsh /*
772 1.1 bsh * Well we should set a data abort handler.
773 1.1 bsh * Once things get going this will change as we will need a proper
774 1.1 bsh * handler.
775 1.1 bsh * Until then we will use a handler that just panics but tells us
776 1.1 bsh * why.
777 1.1 bsh * Initialisation of the vectors will just panic on a data abort.
778 1.1 bsh * This just fills in a slightly better one.
779 1.1 bsh */
780 1.1 bsh #ifdef VERBOSE_INIT_ARM
781 1.1 bsh printf("vectors ");
782 1.1 bsh #endif
783 1.1 bsh data_abort_handler_address = (u_int)data_abort_handler;
784 1.1 bsh prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
785 1.1 bsh undefined_handler_address = (u_int)undefinedinstruction_bounce;
786 1.1 bsh
787 1.1 bsh /* Initialise the undefined instruction handlers */
788 1.1 bsh #ifdef VERBOSE_INIT_ARM
789 1.1 bsh printf("undefined ");
790 1.1 bsh #endif
791 1.1 bsh undefined_init();
792 1.1 bsh
793 1.1 bsh /* Load memory into UVM. */
794 1.1 bsh #ifdef VERBOSE_INIT_ARM
795 1.1 bsh printf("page ");
796 1.1 bsh #endif
797 1.1 bsh uvm_setpagesize(); /* initialize PAGE_SIZE-dependent variables */
798 1.1 bsh uvm_page_physload(atop(physical_freestart), atop(physical_freeend),
799 1.1 bsh atop(physical_freestart), atop(physical_freeend),
800 1.1 bsh VM_FREELIST_DEFAULT);
801 1.1 bsh
802 1.1 bsh /* Boot strap pmap telling it where the kernel page table is */
803 1.1 bsh #ifdef VERBOSE_INIT_ARM
804 1.1 bsh printf("pmap ");
805 1.1 bsh #endif
806 1.1 bsh pmap_bootstrap(KERNEL_VM_BASE, KERNEL_VM_BASE + KERNEL_VM_SIZE);
807 1.1 bsh
808 1.1 bsh #ifdef __HAVE_MEMORY_DISK__
809 1.1 bsh md_root_setconf(memory_disk, sizeof memory_disk);
810 1.1 bsh #endif
811 1.1 bsh
812 1.1 bsh #ifdef VERBOSE_INIT_ARM
813 1.1 bsh printf("done.\n");
814 1.1 bsh #endif
815 1.1 bsh
816 1.1 bsh /* disable power down counter in watch dog,
817 1.1 bsh This must be done within 16 seconds of start-up. */
818 1.1 bsh ioreg16_write(NETWALKER_WDOG_VBASE + IMX_WDOG_WMCR, 0);
819 1.1 bsh
820 1.1 bsh #ifdef IPKDB
821 1.1 bsh /* Initialise ipkdb */
822 1.1 bsh ipkdb_init();
823 1.1 bsh if (boothowto & RB_KDB)
824 1.1 bsh ipkdb_connect(0);
825 1.1 bsh #endif
826 1.1 bsh
827 1.1 bsh #ifdef KGDB
828 1.1 bsh if (boothowto & RB_KDB) {
829 1.1 bsh kgdb_debug_init = 1;
830 1.1 bsh kgdb_connect(1);
831 1.1 bsh }
832 1.1 bsh #endif
833 1.1 bsh
834 1.1 bsh #ifdef DDB
835 1.1 bsh #ifdef VERBOSE_INIT_ARM
836 1.1 bsh printf("ddb ");
837 1.1 bsh #endif
838 1.1 bsh db_machine_init();
839 1.1 bsh
840 1.1 bsh /* Firmware doesn't load symbols. */
841 1.1 bsh ddb_init(0, NULL, NULL);
842 1.1 bsh
843 1.1 bsh if (boothowto & RB_KDB)
844 1.1 bsh Debugger();
845 1.1 bsh #endif
846 1.1 bsh
847 1.1 bsh
848 1.1 bsh
849 1.1 bsh printf("initarm done.\n");
850 1.1 bsh
851 1.1 bsh /* We return the new stack pointer address */
852 1.1 bsh return(kernelstack.pv_va + USPACE_SVC_STACK_TOP);
853 1.1 bsh }
854 1.1 bsh
855 1.1 bsh #if 0
856 1.1 bsh void
857 1.1 bsh process_kernel_args(char *args)
858 1.1 bsh {
859 1.1 bsh
860 1.1 bsh boothowto = 0;
861 1.1 bsh
862 1.1 bsh /* Make a local copy of the bootargs */
863 1.1 bsh strncpy(bootargs, args, MAX_BOOT_STRING);
864 1.1 bsh
865 1.1 bsh args = bootargs;
866 1.1 bsh boot_file = bootargs;
867 1.1 bsh
868 1.1 bsh /* Skip the kernel image filename */
869 1.1 bsh while (*args != ' ' && *args != 0)
870 1.1 bsh ++args;
871 1.1 bsh
872 1.1 bsh if (*args != 0)
873 1.1 bsh *args++ = 0;
874 1.1 bsh
875 1.1 bsh while (*args == ' ')
876 1.1 bsh ++args;
877 1.1 bsh
878 1.1 bsh boot_args = args;
879 1.1 bsh
880 1.1 bsh printf("bootfile: %s\n", boot_file);
881 1.1 bsh printf("bootargs: %s\n", boot_args);
882 1.1 bsh
883 1.1 bsh parse_mi_bootargs(boot_args);
884 1.1 bsh }
885 1.1 bsh #endif
886 1.1 bsh
887 1.1 bsh static void
888 1.1 bsh init_clocks(void)
889 1.1 bsh {
890 1.9 matt cortex_pmc_ccnt_init();
891 1.1 bsh }
892 1.1 bsh
893 1.1 bsh struct iomux_setup {
894 1.6 bsh /* iomux registers are 32-bit wide, but upper 16 bits are not
895 1.6 bsh * used. */
896 1.6 bsh uint16_t reg;
897 1.6 bsh uint16_t val;
898 1.1 bsh };
899 1.1 bsh
900 1.6 bsh #define IOMUX_M(padname, mux) \
901 1.6 bsh IOMUX_DATA(__CONCAT(IOMUXC_SW_MUX_CTL_PAD_,padname), mux)
902 1.6 bsh
903 1.6 bsh #define IOMUX_P(padname, pad) \
904 1.6 bsh IOMUX_DATA(__CONCAT(IOMUXC_SW_PAD_CTL_PAD_,padname), pad)
905 1.6 bsh
906 1.6 bsh #define IOMUX_MP(padname, mux, pad) \
907 1.6 bsh IOMUX_M(padname, mux), \
908 1.6 bsh IOMUX_P(padname, pad)
909 1.6 bsh
910 1.6 bsh
911 1.6 bsh #define IOMUX_DATA(offset, value) \
912 1.6 bsh { \
913 1.6 bsh .reg = (offset), \
914 1.6 bsh .val = (value), \
915 1.1 bsh }
916 1.1 bsh
917 1.1 bsh
918 1.6 bsh /*
919 1.6 bsh * set same values to IOMUX registers as linux kernel does
920 1.6 bsh */
921 1.1 bsh const struct iomux_setup iomux_setup_data[] = {
922 1.6 bsh #define HYS PAD_CTL_HYS
923 1.6 bsh #define ODE PAD_CTL_ODE
924 1.6 bsh #define DSEHIGH PAD_CTL_DSE_HIGH
925 1.6 bsh #define DSEMID PAD_CTL_DSE_MID
926 1.6 bsh #define DSELOW PAD_CTL_DSE_LOW
927 1.6 bsh #define DSEMAX PAD_CTL_DSE_MAX
928 1.6 bsh #define SRE PAD_CTL_SRE
929 1.6 bsh #define KEEPER PAD_CTL_KEEPER
930 1.6 bsh #define PULL PAD_CTL_PULL
931 1.6 bsh #define PU_22K PAD_CTL_PUS_22K_PU
932 1.6 bsh #define PU_47K PAD_CTL_PUS_47K_PU
933 1.6 bsh #define PU_100K PAD_CTL_PUS_100K_PU
934 1.6 bsh #define PD_100K PAD_CTL_PUS_100K_PD
935 1.6 bsh #define HVE PAD_CTL_HVE /* Low output voltage */
936 1.6 bsh
937 1.6 bsh #define ALT0 IOMUX_CONFIG_ALT0
938 1.6 bsh #define ALT1 IOMUX_CONFIG_ALT1
939 1.6 bsh #define ALT2 IOMUX_CONFIG_ALT2
940 1.6 bsh #define ALT3 IOMUX_CONFIG_ALT3
941 1.6 bsh #define ALT4 IOMUX_CONFIG_ALT4
942 1.6 bsh #define ALT5 IOMUX_CONFIG_ALT5
943 1.6 bsh #define ALT6 IOMUX_CONFIG_ALT6
944 1.6 bsh #define ALT7 IOMUX_CONFIG_ALT7
945 1.6 bsh #define SION IOMUX_CONFIG_SION
946 1.6 bsh
947 1.6 bsh /* left button */
948 1.6 bsh IOMUX_MP(EIM_EB2, ALT1, HYS),
949 1.6 bsh /* right button */
950 1.6 bsh IOMUX_MP(EIM_EB3, ALT1, HYS),
951 1.6 bsh
952 1.6 bsh /* UART1 */
953 1.6 bsh IOMUX_MP(UART1_RXD, ALT0, HYS | PULL | DSEHIGH | SRE),
954 1.6 bsh IOMUX_MP(UART1_TXD, ALT0, HYS | PULL | DSEHIGH | SRE),
955 1.6 bsh IOMUX_MP(UART1_RTS, ALT0, HYS | PULL | DSEHIGH),
956 1.6 bsh IOMUX_MP(UART1_CTS, ALT0, HYS | PULL | DSEHIGH),
957 1.6 bsh
958 1.6 bsh /* LCD Display */
959 1.6 bsh IOMUX_M(DI1_PIN2, ALT0),
960 1.6 bsh IOMUX_M(DI1_PIN3, ALT0),
961 1.6 bsh
962 1.6 bsh IOMUX_DATA(IOMUXC_SW_PAD_CTL_GRP_DISP1_PKE0, PAD_CTL_PKE),
963 1.6 bsh #if 0
964 1.6 bsh IOMUX_MP(DISP1_DAT0, ALT0, SRE | DSEMAX | PULL),
965 1.6 bsh IOMUX_MP(DISP1_DAT1, ALT0, SRE | DSEMAX | PULL),
966 1.6 bsh IOMUX_MP(DISP1_DAT2, ALT0, SRE | DSEMAX | PULL),
967 1.6 bsh IOMUX_MP(DISP1_DAT3, ALT0, SRE | DSEMAX | PULL),
968 1.6 bsh IOMUX_MP(DISP1_DAT4, ALT0, SRE | DSEMAX | PULL),
969 1.6 bsh IOMUX_MP(DISP1_DAT5, ALT0, SRE | DSEMAX | PULL),
970 1.6 bsh #endif
971 1.6 bsh IOMUX_M(DISP1_DAT6, ALT0),
972 1.6 bsh IOMUX_M(DISP1_DAT7, ALT0),
973 1.6 bsh IOMUX_M(DISP1_DAT8, ALT0),
974 1.6 bsh IOMUX_M(DISP1_DAT9, ALT0),
975 1.6 bsh IOMUX_M(DISP1_DAT10, ALT0),
976 1.6 bsh IOMUX_M(DISP1_DAT11, ALT0),
977 1.6 bsh IOMUX_M(DISP1_DAT12, ALT0),
978 1.6 bsh IOMUX_M(DISP1_DAT13, ALT0),
979 1.6 bsh IOMUX_M(DISP1_DAT14, ALT0),
980 1.6 bsh IOMUX_M(DISP1_DAT15, ALT0),
981 1.6 bsh IOMUX_M(DISP1_DAT16, ALT0),
982 1.6 bsh IOMUX_M(DISP1_DAT17, ALT0),
983 1.6 bsh IOMUX_M(DISP1_DAT18, ALT0),
984 1.6 bsh IOMUX_M(DISP1_DAT19, ALT0),
985 1.6 bsh IOMUX_M(DISP1_DAT20, ALT0),
986 1.6 bsh IOMUX_M(DISP1_DAT21, ALT0),
987 1.6 bsh IOMUX_M(DISP1_DAT22, ALT0),
988 1.6 bsh IOMUX_M(DISP1_DAT23, ALT0),
989 1.6 bsh
990 1.6 bsh IOMUX_MP(DI1_D0_CS, ALT4, KEEPER | DSEHIGH | SRE), /* GPIO3_3 */
991 1.6 bsh IOMUX_DATA(IOMUXC_GPIO3_IPP_IND_G_IN_3_SELECT_INPUT, INPUT_DAISY_0),
992 1.6 bsh IOMUX_MP(CSI2_D12, ALT3, KEEPER | DSEHIGH | SRE), /* GPIO4_9 */
993 1.6 bsh IOMUX_MP(CSI2_D13, ALT3, KEEPER | DSEHIGH | SRE),
994 1.6 bsh IOMUX_MP(GPIO1_2, ALT0, ODE | DSEHIGH),
995 1.6 bsh IOMUX_MP(EIM_A19, ALT1, SRE | DSEHIGH),
996 1.6 bsh /* XXX VGA pins */
997 1.6 bsh IOMUX_M(DI_GP4, ALT4),
998 1.6 bsh IOMUX_M(GPIO1_8, SION | ALT0),
999 1.1 bsh
1000 1.1 bsh
1001 1.6 bsh #if 0
1002 1.6 bsh IOMUX_MP(GPIO1_2, ALT1, DSEHIGH | ODE), /* LCD backlight by PWM */
1003 1.6 bsh #else
1004 1.6 bsh IOMUX_P(GPIO1_2, DSEHIGH | ODE), /* LCD backlight by GPIO */
1005 1.6 bsh #endif
1006 1.6 bsh IOMUX_MP(GPIO1_8, SION | ALT0, HYS | DSEMID | PU_100K),
1007 1.6 bsh /* I2C1 */
1008 1.6 bsh IOMUX_MP(EIM_D16, SION | ALT4, HYS | ODE | DSEHIGH | SRE),
1009 1.6 bsh IOMUX_MP(EIM_D19, SION | ALT4, SRE), /* SCL */
1010 1.6 bsh IOMUX_MP(EIM_A19, ALT1, SRE | DSEHIGH), /* GPIO2_13 */
1011 1.6 bsh
1012 1.6 bsh #if 0
1013 1.6 bsh IOMUX_MP(EIM_A23, ALT1, 0),
1014 1.6 bsh #else
1015 1.6 bsh IOMUX_M(EIM_A23, ALT1), /* GPIO2_17 */
1016 1.6 bsh #endif
1017 1.6 bsh
1018 1.6 bsh /* BT */
1019 1.6 bsh IOMUX_M(EIM_D20, ALT1), /* GPIO2_4 BT host wakeup */
1020 1.6 bsh IOMUX_M(EIM_D22, ALT1), /* GPIO2_6 BT RESET */
1021 1.6 bsh IOMUX_M(EIM_D23, ALT1), /* GPIO2_7 BT wakeup */
1022 1.6 bsh
1023 1.6 bsh /* UART3 */
1024 1.6 bsh IOMUX_MP(EIM_D24, ALT3, KEEPER | PU_100K | DSEHIGH | SRE),
1025 1.6 bsh IOMUX_MP(EIM_D25, ALT3, KEEPER | PU_100K | DSEHIGH | SRE), /* CTS */
1026 1.6 bsh IOMUX_MP(EIM_D26, ALT3, KEEPER | PU_100K | DSEHIGH | SRE), /* TXD */
1027 1.6 bsh IOMUX_MP(EIM_D27, ALT3, KEEPER | PU_100K | DSEHIGH | SRE), /* RTS */
1028 1.6 bsh IOMUX_M(NANDF_D15, ALT3), /* GPIO3_25 */
1029 1.6 bsh IOMUX_MP(NANDF_D14, ALT3, HYS | PULL | PU_100K ), /* GPIO3_26 */
1030 1.6 bsh IOMUX_M(CSI1_D9, ALT3), /* GPIO3_13 */
1031 1.6 bsh IOMUX_M(CSI1_VSYNC, ALT3), /* GPIO3_14 */
1032 1.6 bsh IOMUX_M(CSI1_HSYNC, ALT3), /* GPIO3_15 */
1033 1.6 bsh
1034 1.6 bsh /* audio pins */
1035 1.6 bsh IOMUX_MP(AUD3_BB_TXD, ALT0, DSEHIGH | PU_100K | SRE),
1036 1.6 bsh /* XXX: linux code:
1037 1.6 bsh (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH |
1038 1.6 bsh PAD_CTL_100K_PU | PAD_CTL_HYS_NONE |
1039 1.6 bsh PAD_CTL_DDR_INPUT_CMOS | PAD_CTL_DRV_VOT_LOW), */
1040 1.6 bsh
1041 1.6 bsh IOMUX_MP(AUD3_BB_RXD, ALT0, KEEPER | DSEHIGH | SRE),
1042 1.6 bsh IOMUX_MP(AUD3_BB_CK, ALT0, KEEPER | DSEHIGH | SRE),
1043 1.6 bsh IOMUX_MP(AUD3_BB_FS, ALT0, KEEPER | DSEHIGH | SRE),
1044 1.6 bsh
1045 1.6 bsh /* headphone detect */
1046 1.6 bsh IOMUX_MP(NANDF_D14, ALT3, HYS | PULL | PU_100K),
1047 1.6 bsh IOMUX_MP(CSPI1_RDY, ALT3, SRE | DSEHIGH),
1048 1.6 bsh /* XXX more audio pins ? */
1049 1.6 bsh
1050 1.6 bsh /* CSPI */
1051 1.6 bsh /* ??? doesn't work ??? */
1052 1.6 bsh IOMUX_P(CSPI1_MOSI, HYS | PULL | PD_100K | DSEHIGH | SRE),
1053 1.6 bsh IOMUX_P(CSPI1_MISO, HYS | PULL | PD_100K | DSEHIGH | SRE),
1054 1.6 bsh IOMUX_M(CSPI1_SS0, ALT3),
1055 1.6 bsh IOMUX_MP(CSPI1_SS1, ALT0, HYS | KEEPER | DSEHIGH | SRE),
1056 1.6 bsh IOMUX_MP(DI1_PIN11, ALT7, HYS | PULL | DSEHIGH | SRE),
1057 1.6 bsh IOMUX_P(CSPI1_SCLK, HYS | KEEPER | DSEHIGH | SRE),
1058 1.6 bsh /* 26M Osc */
1059 1.6 bsh IOMUX_MP(DI1_PIN12, ALT4, KEEPER | DSEHIGH | SRE), /* GPIO3_1 */
1060 1.6 bsh
1061 1.6 bsh /* I2C */
1062 1.6 bsh IOMUX_MP(KEY_COL4, SION | ALT3, SRE),
1063 1.6 bsh IOMUX_DATA(IOMUXC_I2C2_IPP_SCL_IN_SELECT_INPUT, INPUT_DAISY_1),
1064 1.6 bsh IOMUX_MP(KEY_COL5, SION | ALT3, HYS | ODE | DSEHIGH | SRE),
1065 1.6 bsh IOMUX_DATA(IOMUXC_I2C2_IPP_SDA_IN_SELECT_INPUT, INPUT_DAISY_1),
1066 1.6 bsh IOMUX_DATA(IOMUXC_UART3_IPP_UART_RTS_B_SELECT_INPUT, INPUT_DAISY_3),
1067 1.1 bsh #if 1
1068 1.6 bsh /* NAND */
1069 1.6 bsh IOMUX_MP(NANDF_WE_B, ALT0, HVE | DSEHIGH | PULL | PU_47K),
1070 1.6 bsh IOMUX_MP(NANDF_RE_B, ALT0, HVE | DSEHIGH | PULL | PU_47K),
1071 1.6 bsh IOMUX_MP(NANDF_ALE, ALT0, HVE | DSEHIGH | KEEPER),
1072 1.6 bsh IOMUX_MP(NANDF_CLE, ALT0, HVE | DSEHIGH | KEEPER),
1073 1.6 bsh IOMUX_MP(NANDF_WP_B, ALT0, HVE | DSEHIGH | PULL | PU_100K),
1074 1.6 bsh IOMUX_MP(NANDF_RB0, ALT0, HVE | DSELOW | PULL | PU_100K),
1075 1.6 bsh IOMUX_MP(NANDF_RB1, ALT0, HVE | DSELOW | PULL | PU_100K),
1076 1.6 bsh IOMUX_MP(NANDF_D7, ALT0, HVE | DSEHIGH | KEEPER | PU_100K),
1077 1.6 bsh IOMUX_MP(NANDF_D6, ALT0, HVE | DSEHIGH | KEEPER | PU_100K),
1078 1.6 bsh IOMUX_MP(NANDF_D5, ALT0, HVE | DSEHIGH | KEEPER | PU_100K),
1079 1.6 bsh IOMUX_MP(NANDF_D4, ALT0, HVE | DSEHIGH | KEEPER | PU_100K),
1080 1.6 bsh IOMUX_MP(NANDF_D3, ALT0, HVE | DSEHIGH | KEEPER | PU_100K),
1081 1.6 bsh IOMUX_MP(NANDF_D2, ALT0, HVE | DSEHIGH | KEEPER | PU_100K),
1082 1.6 bsh IOMUX_MP(NANDF_D1, ALT0, HVE | DSEHIGH | KEEPER | PU_100K),
1083 1.6 bsh IOMUX_MP(NANDF_D0, ALT0, HVE | DSEHIGH | KEEPER | PU_100K),
1084 1.6 bsh #endif
1085 1.6 bsh
1086 1.6 bsh /* Batttery pins */
1087 1.6 bsh IOMUX_MP(NANDF_D13, ALT3, HYS | DSEHIGH),
1088 1.6 bsh IOMUX_MP(NANDF_D12, ALT3, HYS | DSEHIGH),
1089 1.6 bsh #if 0
1090 1.6 bsh IOMUX_MP(NANDF_D11, ALT3, HYS | DSEHIGH),
1091 1.1 bsh #endif
1092 1.6 bsh IOMUX_MP(NANDF_D10, ALT3, HYS | DSEHIGH),
1093 1.6 bsh
1094 1.6 bsh /* SD1 */
1095 1.6 bsh IOMUX_MP(SD1_CMD, SION | ALT0, DSEHIGH | SRE),
1096 1.6 bsh IOMUX_MP(SD1_CLK, SION | ALT0, KEEPER | PU_47K | DSEHIGH),
1097 1.6 bsh IOMUX_MP(SD1_DATA0, ALT0, DSEHIGH | SRE),
1098 1.6 bsh IOMUX_MP(SD1_DATA1, ALT0, DSEHIGH | SRE),
1099 1.6 bsh IOMUX_MP(SD1_DATA2, ALT0, DSEHIGH | SRE),
1100 1.6 bsh IOMUX_MP(SD1_DATA3, ALT0, DSEHIGH | SRE),
1101 1.6 bsh IOMUX_MP(GPIO1_0, SION | ALT0, HYS | PU_100K),
1102 1.6 bsh
1103 1.6 bsh /* SD2 */
1104 1.6 bsh IOMUX_P(SD2_CMD, HVE | PU_22K | DSEMAX | SRE),
1105 1.6 bsh IOMUX_P(SD2_CLK, HVE | PU_22K | DSEMAX | SRE),
1106 1.6 bsh IOMUX_P(SD2_DATA0, HVE | PU_22K | DSEMAX | SRE),
1107 1.6 bsh IOMUX_P(SD2_DATA1, HVE | PU_22K | DSEMAX | SRE),
1108 1.6 bsh IOMUX_P(SD2_DATA2, HVE | PU_22K | DSEMAX | SRE),
1109 1.6 bsh IOMUX_P(SD2_DATA3, HVE | PU_22K | DSEMAX | SRE),
1110 1.6 bsh
1111 1.6 bsh /* USB */
1112 1.6 bsh IOMUX_MP(USBH1_CLK, ALT0, HYS | KEEPER | DSEHIGH | SRE),
1113 1.6 bsh IOMUX_MP(USBH1_DIR, ALT0, HYS | KEEPER | DSEHIGH | SRE),
1114 1.6 bsh IOMUX_MP(USBH1_STP, ALT0, HYS | KEEPER | DSEHIGH | SRE),
1115 1.6 bsh IOMUX_MP(USBH1_NXT, ALT0, HYS | KEEPER | PU_100K | DSEHIGH | SRE),
1116 1.6 bsh IOMUX_MP(USBH1_DATA0, ALT0, HYS | KEEPER | DSEHIGH | SRE),
1117 1.6 bsh IOMUX_MP(USBH1_DATA1, ALT0, HYS | KEEPER | DSEHIGH | SRE),
1118 1.6 bsh IOMUX_MP(USBH1_DATA2, ALT0, HYS | KEEPER | DSEHIGH | SRE),
1119 1.6 bsh IOMUX_MP(USBH1_DATA3, ALT0, HYS | KEEPER | DSEHIGH | SRE),
1120 1.6 bsh IOMUX_MP(USBH1_DATA4, ALT0, HYS | KEEPER | DSEHIGH | SRE),
1121 1.6 bsh IOMUX_MP(USBH1_DATA5, ALT0, HYS | KEEPER | DSEHIGH | SRE),
1122 1.6 bsh IOMUX_MP(USBH1_DATA6, ALT0, HYS | KEEPER | DSEHIGH | SRE),
1123 1.6 bsh IOMUX_MP(USBH1_DATA7, ALT0, HYS | KEEPER | DSEHIGH | SRE),
1124 1.6 bsh IOMUX_MP(EIM_D17, ALT1, KEEPER | DSEHIGH | SRE),
1125 1.6 bsh IOMUX_MP(EIM_D21, ALT1, KEEPER | DSEHIGH | SRE),
1126 1.6 bsh IOMUX_P(GPIO1_7, /*ALT0,*/ DSEHIGH | SRE), /* USB Hub reset */
1127 1.6 bsh
1128 1.6 bsh #undef ODE
1129 1.6 bsh #undef HYS
1130 1.6 bsh #undef SRE
1131 1.6 bsh #undef PULL
1132 1.6 bsh #undef KEEPER
1133 1.6 bsh #undef PU_22K
1134 1.6 bsh #undef PU_47K
1135 1.6 bsh #undef PU_100K
1136 1.6 bsh #undef PD_100K
1137 1.6 bsh #undef HVE
1138 1.6 bsh #undef DSEMAX
1139 1.6 bsh #undef DSEHIGH
1140 1.6 bsh #undef DSEMID
1141 1.6 bsh #undef DSELOW
1142 1.6 bsh
1143 1.6 bsh #undef ALT0
1144 1.6 bsh #undef ALT1
1145 1.6 bsh #undef ALT2
1146 1.6 bsh #undef ALT3
1147 1.6 bsh #undef ALT4
1148 1.6 bsh #undef ALT5
1149 1.6 bsh #undef ALT6
1150 1.6 bsh #undef ALT7
1151 1.6 bsh #undef SION
1152 1.1 bsh };
1153 1.1 bsh
1154 1.1 bsh static void
1155 1.1 bsh setup_ioports(void)
1156 1.1 bsh {
1157 1.1 bsh int i;
1158 1.1 bsh const struct iomux_setup *p;
1159 1.1 bsh
1160 1.6 bsh /* Initialize all IOMUX registers */
1161 1.1 bsh for (i=0; i < __arraycount(iomux_setup_data); ++i) {
1162 1.1 bsh p = iomux_setup_data + i;
1163 1.1 bsh
1164 1.6 bsh ioreg_write(NETWALKER_IOMUXC_VBASE + p->reg,
1165 1.6 bsh p->val);
1166 1.1 bsh }
1167 1.1 bsh
1168 1.1 bsh
1169 1.1 bsh #if 0 /* already done by bootloader */
1170 1.1 bsh /* GPIO2[22,23]: input (left/right button)
1171 1.1 bsh GPIO2[21]: input (power button) */
1172 1.1 bsh ioreg_write(NETWALKER_GPIO_VBASE(2) + GPIO_DIR,
1173 1.1 bsh ~__BITS(21,23) &
1174 1.1 bsh ioreg_read(NETWALKER_GPIO_VBASE(2) + GPIO_DIR));
1175 1.1 bsh #endif
1176 1.1 bsh
1177 1.1 bsh #if 0 /* already done by bootloader */
1178 1.1 bsh /* GPIO4[12]: input (cover switch) */
1179 1.1 bsh ioreg_write(NETWALKER_GPIO_VBASE(4) + GPIO_DIR,
1180 1.1 bsh ~__BIT(12) &
1181 1.1 bsh ioreg_read(NETWALKER_GPIO_VBASE(4) + GPIO_DIR));
1182 1.1 bsh #endif
1183 1.1 bsh }
1184 1.1 bsh
1185 1.1 bsh
1186 1.1 bsh #ifdef CONSDEVNAME
1187 1.1 bsh const char consdevname[] = CONSDEVNAME;
1188 1.1 bsh
1189 1.1 bsh #ifndef CONMODE
1190 1.1 bsh #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
1191 1.1 bsh #endif
1192 1.1 bsh #ifndef CONSPEED
1193 1.1 bsh #define CONSPEED 115200
1194 1.1 bsh #endif
1195 1.1 bsh
1196 1.1 bsh int consmode = CONMODE;
1197 1.1 bsh int consrate = CONSPEED;
1198 1.1 bsh
1199 1.1 bsh #endif /* CONSDEVNAME */
1200 1.1 bsh
1201 1.1 bsh #ifndef IMXUART_FREQ
1202 1.6 bsh #define IMXUART_FREQ 66500000
1203 1.1 bsh #endif
1204 1.1 bsh
1205 1.1 bsh void
1206 1.1 bsh consinit(void)
1207 1.1 bsh {
1208 1.1 bsh static int consinit_called = 0;
1209 1.1 bsh
1210 1.1 bsh if (consinit_called)
1211 1.1 bsh return;
1212 1.1 bsh
1213 1.1 bsh consinit_called = 1;
1214 1.1 bsh
1215 1.1 bsh #ifdef CONSDEVNAME
1216 1.1 bsh
1217 1.1 bsh #if NIMXUART > 0
1218 1.1 bsh imxuart_set_frequency(IMXUART_FREQ, 2);
1219 1.1 bsh #endif
1220 1.1 bsh
1221 1.1 bsh #if (NIMXUART > 0) && defined(IMXUARTCONSOLE)
1222 1.1 bsh if (strcmp(consdevname, "imxuart") == 0) {
1223 1.1 bsh paddr_t consaddr;
1224 1.1 bsh #ifdef CONADDR
1225 1.1 bsh consaddr = CONADDR;
1226 1.1 bsh #else
1227 1.1 bsh consaddr = IMX51_UART1_BASE;
1228 1.1 bsh #endif
1229 1.1 bsh imxuart_cons_attach(&imx_bs_tag, consaddr, consrate, consmode);
1230 1.1 bsh return;
1231 1.1 bsh }
1232 1.1 bsh #endif
1233 1.1 bsh
1234 1.1 bsh #endif
1235 1.1 bsh
1236 1.1 bsh #if (NWSDISPLAY > 0) && defined(IMXLCDCONSOLE)
1237 1.1 bsh {
1238 1.1 bsh extern void netwalker_cnattach(void);
1239 1.1 bsh netwalker_cnattach();
1240 1.1 bsh }
1241 1.1 bsh #endif
1242 1.1 bsh }
1243 1.1 bsh
1244 1.1 bsh #ifdef KGDB
1245 1.1 bsh #ifndef KGDB_DEVNAME
1246 1.1 bsh #define KGDB_DEVNAME "imxuart"
1247 1.1 bsh #endif
1248 1.1 bsh #ifndef KGDB_DEVMODE
1249 1.1 bsh #define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
1250 1.1 bsh #endif
1251 1.1 bsh
1252 1.1 bsh const char kgdb_devname[20] = KGDB_DEVNAME;
1253 1.1 bsh int kgdb_mode = KGDB_DEVMODE;
1254 1.1 bsh int kgdb_addr = KGDB_DEVADDR;
1255 1.1 bsh extern int kgdb_rate; /* defined in kgdb_stub.c */
1256 1.1 bsh
1257 1.1 bsh void
1258 1.1 bsh kgdb_port_init(void)
1259 1.1 bsh {
1260 1.1 bsh #if (NIMXUART > 0)
1261 1.1 bsh if (strcmp(kgdb_devname, "imxuart") == 0) {
1262 1.1 bsh imxuart_kgdb_attach(&imx_bs_tag, kgdb_addr,
1263 1.1 bsh kgdb_rate, kgdb_mode);
1264 1.1 bsh return;
1265 1.1 bsh }
1266 1.1 bsh
1267 1.1 bsh #endif
1268 1.1 bsh }
1269 1.1 bsh #endif
1270 1.1 bsh
1271 1.1 bsh
1272 1.1 bsh #ifdef DEBUG_IOPORTS
1273 1.1 bsh static void dump_sub(paddr_t addr, size_t size)
1274 1.1 bsh {
1275 1.1 bsh paddr_t end = addr + size;
1276 1.1 bsh
1277 1.1 bsh for (; addr < end; addr += 4) {
1278 1.1 bsh if (addr % 16 == 0)
1279 1.1 bsh printf("%08x: ", (u_int)addr);
1280 1.1 bsh printf("%08x ", ioreg_read(addr));
1281 1.1 bsh
1282 1.1 bsh if (addr % 16 == 12)
1283 1.1 bsh printf("\n");
1284 1.1 bsh }
1285 1.1 bsh printf("\n");
1286 1.1 bsh }
1287 1.1 bsh
1288 1.1 bsh void
1289 1.1 bsh dump_registers(void)
1290 1.1 bsh {
1291 1.1 bsh paddr_t pa;
1292 1.1 bsh int i;
1293 1.1 bsh
1294 1.1 bsh dump_sub(IOMUXC_BASE, IOMUXC_USBOH3_IPP_IND_UH3_STP_SELECT_INPUT + 4);
1295 1.1 bsh
1296 1.1 bsh for (i = 1; i <= 4; ++i) {
1297 1.1 bsh dump_sub(GPIO_BASE(i), GPIO_SIZE);
1298 1.1 bsh }
1299 1.1 bsh
1300 1.1 bsh printf("\nwatchdog: ");
1301 1.1 bsh for (pa = WDOG1_BASE; pa <= WDOG1_BASE + IMX_WDOG_WMCR;
1302 1.1 bsh pa += 2) {
1303 1.1 bsh printf("%04x ", *(volatile uint16_t *)pa);
1304 1.1 bsh }
1305 1.1 bsh printf("\n");
1306 1.1 bsh
1307 1.3 bsh printf("\nCCM\n");
1308 1.3 bsh dump_sub(CCM_BASE, CCM_SIZE);
1309 1.3 bsh
1310 1.1 bsh #if 0
1311 1.1 bsh /* disable power down counter in watch dog,
1312 1.1 bsh This must be done within 16 seconds of start-up. */
1313 1.1 bsh ioreg16_write(NETWALKER_WDOG_VBASE + IMX_WDOG_WMCR, 0);
1314 1.1 bsh
1315 1.1 bsh /* read left/right buttons */
1316 1.1 bsh for (;;) {
1317 1.1 bsh uint32_t reg;
1318 1.1 bsh
1319 1.1 bsh reg = ioreg_read(GPIO_BASE(2) + GPIO_DR);
1320 1.1 bsh printf("\r%08x", reg);
1321 1.1 bsh reg = ioreg_read(GPIO_BASE(4) + GPIO_DR);
1322 1.1 bsh printf(" %08x", reg);
1323 1.1 bsh
1324 1.1 bsh #if 0
1325 1.1 bsh ioreg16_write(WDOG1_BASE + IMX_WDOG_WSR, WSR_MAGIC1);
1326 1.1 bsh ioreg16_write(WDOG1_BASE + IMX_WDOG_WSR, WSR_MAGIC2);
1327 1.1 bsh #endif
1328 1.1 bsh
1329 1.1 bsh }
1330 1.1 bsh #endif
1331 1.1 bsh
1332 1.1 bsh }
1333 1.1 bsh #endif
1334 1.3 bsh
1335 1.3 bsh
1336 1.3 bsh #if 0
1337 1.3 bsh #include <arm/imx/imxgpiovar.h>
1338 1.3 bsh
1339 1.3 bsh void gpio_test(void)
1340 1.3 bsh void
1341 1.3 bsh gpio_test(void)
1342 1.3 bsh {
1343 1.3 bsh int left, right;
1344 1.3 bsh
1345 1.3 bsh gpio_set_direction(GPIO_NO(2, 22), GPIO_DIR_IN);
1346 1.3 bsh gpio_set_direction(GPIO_NO(2, 23), GPIO_DIR_IN);
1347 1.3 bsh
1348 1.3 bsh for (;;) {
1349 1.3 bsh left = gpio_data_read(GPIO_NO(2, 22));
1350 1.3 bsh right = gpio_data_read(GPIO_NO(2, 23));
1351 1.3 bsh
1352 1.3 bsh printf("\r%s %s",
1353 1.3 bsh left ? "off" : "ON ",
1354 1.3 bsh right ? "off" : "ON ");
1355 1.3 bsh }
1356 1.3 bsh }
1357 1.3 bsh #endif
1358