netwalker_machdep.c revision 1.13
1 /* $NetBSD: netwalker_machdep.c,v 1.13 2014/01/24 02:06:03 hkenken Exp $ */ 2 3 /* 4 * Copyright (c) 2002, 2003, 2005, 2010 Genetec Corporation. 5 * All rights reserved. 6 * Written by Hiroyuki Bessho for Genetec Corporation. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 19 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION 21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 * POSSIBILITY OF SUCH DAMAGE. 28 * 29 * Machine dependent functions for kernel setup for Sharp Netwalker. 30 * Based on iq80310_machhdep.c 31 */ 32 /* 33 * Copyright (c) 2001 Wasabi Systems, Inc. 34 * All rights reserved. 35 * 36 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 37 * 38 * Redistribution and use in source and binary forms, with or without 39 * modification, are permitted provided that the following conditions 40 * are met: 41 * 1. Redistributions of source code must retain the above copyright 42 * notice, this list of conditions and the following disclaimer. 43 * 2. Redistributions in binary form must reproduce the above copyright 44 * notice, this list of conditions and the following disclaimer in the 45 * documentation and/or other materials provided with the distribution. 46 * 3. All advertising materials mentioning features or use of this software 47 * must display the following acknowledgement: 48 * This product includes software developed for the NetBSD Project by 49 * Wasabi Systems, Inc. 50 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 51 * or promote products derived from this software without specific prior 52 * written permission. 53 * 54 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 55 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 56 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 57 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 58 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 59 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 60 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 61 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 62 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 63 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 64 * POSSIBILITY OF SUCH DAMAGE. 65 */ 66 67 /* 68 * Copyright (c) 1997,1998 Mark Brinicombe. 69 * Copyright (c) 1997,1998 Causality Limited. 70 * All rights reserved. 71 * 72 * Redistribution and use in source and binary forms, with or without 73 * modification, are permitted provided that the following conditions 74 * are met: 75 * 1. Redistributions of source code must retain the above copyright 76 * notice, this list of conditions and the following disclaimer. 77 * 2. Redistributions in binary form must reproduce the above copyright 78 * notice, this list of conditions and the following disclaimer in the 79 * documentation and/or other materials provided with the distribution. 80 * 3. All advertising materials mentioning features or use of this software 81 * must display the following acknowledgement: 82 * This product includes software developed by Mark Brinicombe 83 * for the NetBSD Project. 84 * 4. The name of the company nor the name of the author may be used to 85 * endorse or promote products derived from this software without specific 86 * prior written permission. 87 * 88 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 89 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 90 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 91 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 92 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 93 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 94 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 95 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 96 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 97 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 98 * SUCH DAMAGE. 99 * 100 * Machine dependent functions for kernel setup for Intel IQ80310 evaluation 101 * boards using RedBoot firmware. 102 */ 103 104 #include <sys/cdefs.h> 105 __KERNEL_RCSID(0, "$NetBSD: netwalker_machdep.c,v 1.13 2014/01/24 02:06:03 hkenken Exp $"); 106 107 #include "opt_ddb.h" 108 #include "opt_kgdb.h" 109 #include "opt_md.h" 110 #include "opt_com.h" 111 #include "imxuart.h" 112 #include "opt_imxuart.h" 113 #include "opt_imx.h" 114 #include "opt_imx51_ipuv3.h" 115 #include "wsdisplay.h" 116 117 #include <sys/param.h> 118 #include <sys/device.h> 119 #include <sys/termios.h> 120 #include <sys/bus.h> 121 122 #include <machine/db_machdep.h> 123 #ifdef KGDB 124 #include <sys/kgdb.h> 125 #endif 126 127 #include <machine/bootconfig.h> 128 129 #include <arm/arm32/machdep.h> 130 131 #include <arm/imx/imx51reg.h> 132 #include <arm/imx/imx51var.h> 133 #include <arm/imx/imxgpioreg.h> 134 #include <arm/imx/imxwdogreg.h> 135 #include <arm/imx/imxuartreg.h> 136 #include <arm/imx/imxuartvar.h> 137 #include <arm/imx/imx51_iomuxreg.h> 138 #include <evbarm/netwalker/netwalker_reg.h> 139 140 #include "ukbd.h" 141 #if (NUKBD > 0) 142 #include <dev/usb/ukbdvar.h> 143 #endif 144 145 /* Kernel text starts 1MB in from the bottom of the kernel address space. */ 146 #define KERNEL_TEXT_BASE (KERNEL_BASE + 0x00100000) 147 #define KERNEL_VM_BASE (KERNEL_BASE + 0x01000000) 148 149 /* 150 * The range 0xc1000000 - 0xccffffff is available for kernel VM space 151 * Core-logic registers and I/O mappings occupy 0xfd000000 - 0xffffffff 152 */ 153 #define KERNEL_VM_SIZE 0x0C000000 154 155 BootConfig bootconfig; /* Boot config storage */ 156 static char bootargs[MAX_BOOT_STRING]; 157 char *boot_args = NULL; 158 159 extern char KERNEL_BASE_phys[]; 160 extern char KERNEL_BASE_virt[]; 161 162 extern int cpu_do_powersave; 163 164 /* 165 * Macros to translate between physical and virtual for a subset of the 166 * kernel address space. *Not* for general use. 167 */ 168 #define KERNEL_BASE_PHYS ((paddr_t)&KERNEL_BASE_phys) 169 #define KERNEL_BASE_VIRT ((vaddr_t)&KERNEL_BASE_virt) 170 #define KERN_VTOPHYS(va) \ 171 ((paddr_t)((vaddr_t)va - KERNEL_BASE_VIRT + KERNEL_BASE_PHYS)) 172 #define KERN_PHYSTOV(pa) \ 173 ((vaddr_t)((paddr_t)pa - KERNEL_BASE_PHYS + KERNEL_BASE_VIRT)) 174 175 176 /* Prototypes */ 177 178 void consinit(void); 179 180 #ifdef KGDB 181 void kgdb_port_init(void); 182 #endif 183 184 static void init_clocks(void); 185 static void setup_ioports(void); 186 187 #ifndef CONSPEED 188 #define CONSPEED B115200 /* What RedBoot uses */ 189 #endif 190 #ifndef CONMODE 191 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 192 #endif 193 194 int comcnspeed = CONSPEED; 195 int comcnmode = CONMODE; 196 197 /* 198 * Static device mappings. These peripheral registers are mapped at 199 * fixed virtual addresses very early in netwalker_start() so that we 200 * can use them while booting the kernel, and stay at the same address 201 * throughout whole kernel's life time. 202 * 203 * We use this table twice; once with bootstrap page table, and once 204 * with kernel's page table which we build up in initarm(). 205 */ 206 207 #define _A(a) ((a) & ~L1_S_OFFSET) 208 #define _S(s) (((s) + L1_S_SIZE - 1) & ~(L1_S_SIZE-1)) 209 210 static const struct pmap_devmap netwalker_devmap[] = { 211 { 212 /* for UART1, IOMUXC */ 213 NETWALKER_IO_VBASE0, 214 _A(NETWALKER_IO_PBASE0), 215 L1_S_SIZE * 4, 216 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE 217 }, 218 {0, 0, 0, 0, 0 } 219 }; 220 221 #ifndef MEMSTART 222 #define MEMSTART 0x90000000 223 #endif 224 #ifndef MEMSIZE 225 #define MEMSIZE 512 226 #endif 227 228 /* 229 * u_int initarm(...) 230 * 231 * Initial entry point on startup. This gets called before main() is 232 * entered. 233 * It should be responsible for setting up everything that must be 234 * in place when main is called. 235 * This includes 236 * Taking a copy of the boot configuration structure. 237 * Initialising the physical console so characters can be printed. 238 * Setting up page tables for the kernel 239 * Relocating the kernel to the bottom of physical memory 240 */ 241 u_int 242 initarm(void *arg) 243 { 244 /* 245 * Heads up ... Setup the CPU / MMU / TLB functions 246 */ 247 if (set_cpufuncs()) 248 panic("cpu not recognized!"); 249 250 /* map some peripheral registers */ 251 pmap_devmap_bootstrap((vaddr_t)armreg_ttbr_read() & -L1_TABLE_SIZE, 252 netwalker_devmap); 253 254 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT); 255 256 /* Register devmap for devices we mapped in start */ 257 pmap_devmap_register(netwalker_devmap); 258 setup_ioports(); 259 260 consinit(); 261 262 #ifdef NO_POWERSAVE 263 cpu_do_powersave=0; 264 #endif 265 266 init_clocks(); 267 268 #ifdef KGDB 269 kgdb_port_init(); 270 #endif 271 272 /* Talk to the user */ 273 printf("\nNetBSD/evbarm (" ___STRING(EVBARM_BOARDTYPE) ") booting ...\n"); 274 275 bootargs[0] = '\0'; 276 277 #if defined(VERBOSE_INIT_ARM) || 1 278 printf("initarm: Configuring system"); 279 printf(", CLIDR=%010o CTR=%#x", 280 armreg_clidr_read(), armreg_ctr_read()); 281 printf("\n"); 282 #endif 283 /* 284 * Ok we have the following memory map 285 * 286 * Physical Address Range Description 287 * ----------------------- ---------------------------------- 288 * 289 * 0x90000000 - 0x97FFFFFF DDR SDRAM (128MByte) 290 * 291 * The initarm() has the responsibility for creating the kernel 292 * page tables. 293 * It must also set up various memory pointers that are used 294 * by pmap etc. 295 */ 296 297 #ifdef VERBOSE_INIT_ARM 298 printf("initarm: Configuring system ...\n"); 299 #endif 300 /* Fake bootconfig structure for the benefit of pmap.c */ 301 /* XXX must make the memory description h/w independent */ 302 bootconfig.dramblocks = 1; 303 bootconfig.dram[0].address = MEMSTART; 304 bootconfig.dram[0].pages = (MEMSIZE * 1024 * 1024) / PAGE_SIZE; 305 306 arm32_bootmem_init(bootconfig.dram[0].address, 307 bootconfig.dram[0].pages * PAGE_SIZE, (uintptr_t)KERNEL_BASE_PHYS); 308 309 arm32_kernel_vm_init(KERNEL_VM_BASE, ARM_VECTORS_HIGH, 0, 310 netwalker_devmap, false); 311 312 /* disable power down counter in watch dog, 313 This must be done within 16 seconds of start-up. */ 314 ioreg16_write(NETWALKER_WDOG_VBASE + IMX_WDOG_WMCR, 0); 315 316 #ifdef BOOTHOWTO 317 boothowto |= BOOTHOWTO; 318 #endif 319 320 #ifdef VERBOSE_INIT_ARM 321 printf("initarm done.\n"); 322 #endif 323 return initarm_common(KERNEL_VM_BASE, KERNEL_VM_SIZE, NULL, 0); 324 } 325 326 327 static void 328 init_clocks(void) 329 { 330 cortex_pmc_ccnt_init(); 331 } 332 333 struct iomux_setup { 334 /* iomux registers are 32-bit wide, but upper 16 bits are not 335 * used. */ 336 uint16_t reg; 337 uint16_t val; 338 }; 339 340 #define IOMUX_M(padname, mux) \ 341 IOMUX_DATA(__CONCAT(IOMUXC_SW_MUX_CTL_PAD_,padname), mux) 342 343 #define IOMUX_P(padname, pad) \ 344 IOMUX_DATA(__CONCAT(IOMUXC_SW_PAD_CTL_PAD_,padname), pad) 345 346 #define IOMUX_MP(padname, mux, pad) \ 347 IOMUX_M(padname, mux), \ 348 IOMUX_P(padname, pad) 349 350 351 #define IOMUX_DATA(offset, value) \ 352 { \ 353 .reg = (offset), \ 354 .val = (value), \ 355 } 356 357 358 /* 359 * set same values to IOMUX registers as linux kernel does 360 */ 361 const struct iomux_setup iomux_setup_data[] = { 362 #define HYS PAD_CTL_HYS 363 #define ODE PAD_CTL_ODE 364 #define DSEHIGH PAD_CTL_DSE_HIGH 365 #define DSEMID PAD_CTL_DSE_MID 366 #define DSELOW PAD_CTL_DSE_LOW 367 #define DSEMAX PAD_CTL_DSE_MAX 368 #define SRE PAD_CTL_SRE 369 #define KEEPER PAD_CTL_KEEPER 370 #define PULL PAD_CTL_PULL 371 #define PU_22K PAD_CTL_PUS_22K_PU 372 #define PU_47K PAD_CTL_PUS_47K_PU 373 #define PU_100K PAD_CTL_PUS_100K_PU 374 #define PD_100K PAD_CTL_PUS_100K_PD 375 #define HVE PAD_CTL_HVE /* Low output voltage */ 376 377 #define ALT0 IOMUX_CONFIG_ALT0 378 #define ALT1 IOMUX_CONFIG_ALT1 379 #define ALT2 IOMUX_CONFIG_ALT2 380 #define ALT3 IOMUX_CONFIG_ALT3 381 #define ALT4 IOMUX_CONFIG_ALT4 382 #define ALT5 IOMUX_CONFIG_ALT5 383 #define ALT6 IOMUX_CONFIG_ALT6 384 #define ALT7 IOMUX_CONFIG_ALT7 385 #define SION IOMUX_CONFIG_SION 386 387 /* left button */ 388 IOMUX_MP(EIM_EB2, ALT1, HYS), 389 /* right button */ 390 IOMUX_MP(EIM_EB3, ALT1, HYS), 391 392 /* UART1 */ 393 IOMUX_MP(UART1_RXD, ALT0, HYS | PULL | DSEHIGH | SRE), 394 IOMUX_MP(UART1_TXD, ALT0, HYS | PULL | DSEHIGH | SRE), 395 IOMUX_MP(UART1_RTS, ALT0, HYS | PULL | DSEHIGH), 396 IOMUX_MP(UART1_CTS, ALT0, HYS | PULL | DSEHIGH), 397 398 /* LCD Display */ 399 IOMUX_M(DI1_PIN2, ALT0), 400 IOMUX_M(DI1_PIN3, ALT0), 401 402 IOMUX_DATA(IOMUXC_SW_PAD_CTL_GRP_DISP1_PKE0, PAD_CTL_PKE), 403 #if 0 404 IOMUX_MP(DISP1_DAT0, ALT0, SRE | DSEMAX | PULL), 405 IOMUX_MP(DISP1_DAT1, ALT0, SRE | DSEMAX | PULL), 406 IOMUX_MP(DISP1_DAT2, ALT0, SRE | DSEMAX | PULL), 407 IOMUX_MP(DISP1_DAT3, ALT0, SRE | DSEMAX | PULL), 408 IOMUX_MP(DISP1_DAT4, ALT0, SRE | DSEMAX | PULL), 409 IOMUX_MP(DISP1_DAT5, ALT0, SRE | DSEMAX | PULL), 410 #endif 411 IOMUX_M(DISP1_DAT6, ALT0), 412 IOMUX_M(DISP1_DAT7, ALT0), 413 IOMUX_M(DISP1_DAT8, ALT0), 414 IOMUX_M(DISP1_DAT9, ALT0), 415 IOMUX_M(DISP1_DAT10, ALT0), 416 IOMUX_M(DISP1_DAT11, ALT0), 417 IOMUX_M(DISP1_DAT12, ALT0), 418 IOMUX_M(DISP1_DAT13, ALT0), 419 IOMUX_M(DISP1_DAT14, ALT0), 420 IOMUX_M(DISP1_DAT15, ALT0), 421 IOMUX_M(DISP1_DAT16, ALT0), 422 IOMUX_M(DISP1_DAT17, ALT0), 423 IOMUX_M(DISP1_DAT18, ALT0), 424 IOMUX_M(DISP1_DAT19, ALT0), 425 IOMUX_M(DISP1_DAT20, ALT0), 426 IOMUX_M(DISP1_DAT21, ALT0), 427 IOMUX_M(DISP1_DAT22, ALT0), 428 IOMUX_M(DISP1_DAT23, ALT0), 429 430 IOMUX_MP(DI1_D0_CS, ALT4, KEEPER | DSEHIGH | SRE), /* GPIO3_3 */ 431 IOMUX_DATA(IOMUXC_GPIO3_IPP_IND_G_IN_3_SELECT_INPUT, INPUT_DAISY_0), 432 IOMUX_MP(CSI2_D12, ALT3, KEEPER | DSEHIGH | SRE), /* GPIO4_9 */ 433 IOMUX_MP(CSI2_D13, ALT3, KEEPER | DSEHIGH | SRE), 434 IOMUX_MP(GPIO1_2, ALT0, ODE | DSEHIGH), 435 IOMUX_MP(EIM_A19, ALT1, SRE | DSEHIGH), 436 /* XXX VGA pins */ 437 IOMUX_M(DI_GP4, ALT4), 438 IOMUX_M(GPIO1_8, SION | ALT0), 439 440 441 #if 0 442 IOMUX_MP(GPIO1_2, ALT1, DSEHIGH | ODE), /* LCD backlight by PWM */ 443 #else 444 IOMUX_P(GPIO1_2, DSEHIGH | ODE), /* LCD backlight by GPIO */ 445 #endif 446 IOMUX_MP(GPIO1_8, SION | ALT0, HYS | DSEMID | PU_100K), 447 /* I2C1 */ 448 IOMUX_MP(EIM_D16, SION | ALT4, HYS | ODE | DSEHIGH | SRE), 449 IOMUX_MP(EIM_D19, SION | ALT4, SRE), /* SCL */ 450 IOMUX_MP(EIM_A19, ALT1, SRE | DSEHIGH), /* GPIO2_13 */ 451 452 #if 0 453 IOMUX_MP(EIM_A23, ALT1, 0), 454 #else 455 IOMUX_M(EIM_A23, ALT1), /* GPIO2_17 */ 456 #endif 457 458 /* BT */ 459 IOMUX_M(EIM_D20, ALT1), /* GPIO2_4 BT host wakeup */ 460 IOMUX_M(EIM_D22, ALT1), /* GPIO2_6 BT RESET */ 461 IOMUX_M(EIM_D23, ALT1), /* GPIO2_7 BT wakeup */ 462 463 /* UART3 */ 464 IOMUX_MP(EIM_D24, ALT3, KEEPER | PU_100K | DSEHIGH | SRE), 465 IOMUX_MP(EIM_D25, ALT3, KEEPER | PU_100K | DSEHIGH | SRE), /* CTS */ 466 IOMUX_MP(EIM_D26, ALT3, KEEPER | PU_100K | DSEHIGH | SRE), /* TXD */ 467 IOMUX_MP(EIM_D27, ALT3, KEEPER | PU_100K | DSEHIGH | SRE), /* RTS */ 468 IOMUX_M(NANDF_D15, ALT3), /* GPIO3_25 */ 469 IOMUX_MP(NANDF_D14, ALT3, HYS | PULL | PU_100K ), /* GPIO3_26 */ 470 IOMUX_M(CSI1_D9, ALT3), /* GPIO3_13 */ 471 IOMUX_M(CSI1_VSYNC, ALT3), /* GPIO3_14 */ 472 IOMUX_M(CSI1_HSYNC, ALT3), /* GPIO3_15 */ 473 474 /* audio pins */ 475 IOMUX_MP(AUD3_BB_TXD, ALT0, DSEHIGH | PU_100K | SRE), 476 /* XXX: linux code: 477 (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | 478 PAD_CTL_100K_PU | PAD_CTL_HYS_NONE | 479 PAD_CTL_DDR_INPUT_CMOS | PAD_CTL_DRV_VOT_LOW), */ 480 481 IOMUX_MP(AUD3_BB_RXD, ALT0, KEEPER | DSEHIGH | SRE), 482 IOMUX_MP(AUD3_BB_CK, ALT0, KEEPER | DSEHIGH | SRE), 483 IOMUX_MP(AUD3_BB_FS, ALT0, KEEPER | DSEHIGH | SRE), 484 485 /* headphone detect */ 486 IOMUX_MP(NANDF_D14, ALT3, HYS | PULL | PU_100K), 487 IOMUX_MP(CSPI1_RDY, ALT3, SRE | DSEHIGH), 488 /* XXX more audio pins ? */ 489 490 /* CSPI */ 491 /* ??? doesn't work ??? */ 492 IOMUX_P(CSPI1_MOSI, HYS | PULL | PD_100K | DSEHIGH | SRE), 493 IOMUX_P(CSPI1_MISO, HYS | PULL | PD_100K | DSEHIGH | SRE), 494 IOMUX_M(CSPI1_SS0, ALT3), 495 IOMUX_MP(CSPI1_SS1, ALT0, HYS | KEEPER | DSEHIGH | SRE), 496 IOMUX_MP(DI1_PIN11, ALT7, HYS | PULL | DSEHIGH | SRE), 497 IOMUX_P(CSPI1_SCLK, HYS | KEEPER | DSEHIGH | SRE), 498 /* 26M Osc */ 499 IOMUX_MP(DI1_PIN12, ALT4, KEEPER | DSEHIGH | SRE), /* GPIO3_1 */ 500 501 /* I2C */ 502 IOMUX_MP(KEY_COL4, SION | ALT3, SRE), 503 IOMUX_DATA(IOMUXC_I2C2_IPP_SCL_IN_SELECT_INPUT, INPUT_DAISY_1), 504 IOMUX_MP(KEY_COL5, SION | ALT3, HYS | ODE | DSEHIGH | SRE), 505 IOMUX_DATA(IOMUXC_I2C2_IPP_SDA_IN_SELECT_INPUT, INPUT_DAISY_1), 506 IOMUX_DATA(IOMUXC_UART3_IPP_UART_RTS_B_SELECT_INPUT, INPUT_DAISY_3), 507 #if 1 508 /* NAND */ 509 IOMUX_MP(NANDF_WE_B, ALT0, HVE | DSEHIGH | PULL | PU_47K), 510 IOMUX_MP(NANDF_RE_B, ALT0, HVE | DSEHIGH | PULL | PU_47K), 511 IOMUX_MP(NANDF_ALE, ALT0, HVE | DSEHIGH | KEEPER), 512 IOMUX_MP(NANDF_CLE, ALT0, HVE | DSEHIGH | KEEPER), 513 IOMUX_MP(NANDF_WP_B, ALT0, HVE | DSEHIGH | PULL | PU_100K), 514 IOMUX_MP(NANDF_RB0, ALT0, HVE | DSELOW | PULL | PU_100K), 515 IOMUX_MP(NANDF_RB1, ALT0, HVE | DSELOW | PULL | PU_100K), 516 IOMUX_MP(NANDF_D7, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 517 IOMUX_MP(NANDF_D6, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 518 IOMUX_MP(NANDF_D5, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 519 IOMUX_MP(NANDF_D4, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 520 IOMUX_MP(NANDF_D3, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 521 IOMUX_MP(NANDF_D2, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 522 IOMUX_MP(NANDF_D1, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 523 IOMUX_MP(NANDF_D0, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 524 #endif 525 526 /* Batttery pins */ 527 IOMUX_MP(NANDF_D13, ALT3, HYS | DSEHIGH), 528 IOMUX_MP(NANDF_D12, ALT3, HYS | DSEHIGH), 529 #if 0 530 IOMUX_MP(NANDF_D11, ALT3, HYS | DSEHIGH), 531 #endif 532 IOMUX_MP(NANDF_D10, ALT3, HYS | DSEHIGH), 533 534 /* SD1 */ 535 IOMUX_MP(SD1_CMD, SION | ALT0, DSEHIGH | SRE), 536 IOMUX_MP(SD1_CLK, SION | ALT0, KEEPER | PU_47K | DSEHIGH), 537 IOMUX_MP(SD1_DATA0, ALT0, DSEHIGH | SRE), 538 IOMUX_MP(SD1_DATA1, ALT0, DSEHIGH | SRE), 539 IOMUX_MP(SD1_DATA2, ALT0, DSEHIGH | SRE), 540 IOMUX_MP(SD1_DATA3, ALT0, DSEHIGH | SRE), 541 IOMUX_MP(GPIO1_0, SION | ALT0, HYS | PU_100K), 542 543 /* SD2 */ 544 IOMUX_P(SD2_CMD, HVE | PU_22K | DSEMAX | SRE), 545 IOMUX_P(SD2_CLK, HVE | PU_22K | DSEMAX | SRE), 546 IOMUX_P(SD2_DATA0, HVE | PU_22K | DSEMAX | SRE), 547 IOMUX_P(SD2_DATA1, HVE | PU_22K | DSEMAX | SRE), 548 IOMUX_P(SD2_DATA2, HVE | PU_22K | DSEMAX | SRE), 549 IOMUX_P(SD2_DATA3, HVE | PU_22K | DSEMAX | SRE), 550 551 /* USB */ 552 IOMUX_MP(USBH1_CLK, ALT0, HYS | KEEPER | DSEHIGH | SRE), 553 IOMUX_MP(USBH1_DIR, ALT0, HYS | KEEPER | DSEHIGH | SRE), 554 IOMUX_MP(USBH1_STP, ALT0, HYS | KEEPER | DSEHIGH | SRE), 555 IOMUX_MP(USBH1_NXT, ALT0, HYS | KEEPER | PU_100K | DSEHIGH | SRE), 556 IOMUX_MP(USBH1_DATA0, ALT0, HYS | KEEPER | DSEHIGH | SRE), 557 IOMUX_MP(USBH1_DATA1, ALT0, HYS | KEEPER | DSEHIGH | SRE), 558 IOMUX_MP(USBH1_DATA2, ALT0, HYS | KEEPER | DSEHIGH | SRE), 559 IOMUX_MP(USBH1_DATA3, ALT0, HYS | KEEPER | DSEHIGH | SRE), 560 IOMUX_MP(USBH1_DATA4, ALT0, HYS | KEEPER | DSEHIGH | SRE), 561 IOMUX_MP(USBH1_DATA5, ALT0, HYS | KEEPER | DSEHIGH | SRE), 562 IOMUX_MP(USBH1_DATA6, ALT0, HYS | KEEPER | DSEHIGH | SRE), 563 IOMUX_MP(USBH1_DATA7, ALT0, HYS | KEEPER | DSEHIGH | SRE), 564 IOMUX_MP(EIM_D17, ALT1, KEEPER | DSEHIGH | SRE), 565 IOMUX_MP(EIM_D21, ALT1, KEEPER | DSEHIGH | SRE), 566 IOMUX_P(GPIO1_7, /*ALT0,*/ DSEHIGH | SRE), /* USB Hub reset */ 567 568 #undef ODE 569 #undef HYS 570 #undef SRE 571 #undef PULL 572 #undef KEEPER 573 #undef PU_22K 574 #undef PU_47K 575 #undef PU_100K 576 #undef PD_100K 577 #undef HVE 578 #undef DSEMAX 579 #undef DSEHIGH 580 #undef DSEMID 581 #undef DSELOW 582 583 #undef ALT0 584 #undef ALT1 585 #undef ALT2 586 #undef ALT3 587 #undef ALT4 588 #undef ALT5 589 #undef ALT6 590 #undef ALT7 591 #undef SION 592 }; 593 594 static void 595 setup_ioports(void) 596 { 597 int i; 598 const struct iomux_setup *p; 599 600 /* Initialize all IOMUX registers */ 601 for (i=0; i < __arraycount(iomux_setup_data); ++i) { 602 p = iomux_setup_data + i; 603 604 ioreg_write(NETWALKER_IOMUXC_VBASE + p->reg, 605 p->val); 606 } 607 608 609 #if 0 /* already done by bootloader */ 610 /* GPIO2[22,23]: input (left/right button) 611 GPIO2[21]: input (power button) */ 612 ioreg_write(NETWALKER_GPIO_VBASE(2) + GPIO_DIR, 613 ~__BITS(21,23) & 614 ioreg_read(NETWALKER_GPIO_VBASE(2) + GPIO_DIR)); 615 #endif 616 617 #if 0 /* already done by bootloader */ 618 /* GPIO4[12]: input (cover switch) */ 619 ioreg_write(NETWALKER_GPIO_VBASE(4) + GPIO_DIR, 620 ~__BIT(12) & 621 ioreg_read(NETWALKER_GPIO_VBASE(4) + GPIO_DIR)); 622 #endif 623 } 624 625 626 #ifdef CONSDEVNAME 627 const char consdevname[] = CONSDEVNAME; 628 629 #ifndef CONMODE 630 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 631 #endif 632 #ifndef CONSPEED 633 #define CONSPEED 115200 634 #endif 635 636 int consmode = CONMODE; 637 int consrate = CONSPEED; 638 639 #endif /* CONSDEVNAME */ 640 641 #ifndef IMXUART_FREQ 642 #define IMXUART_FREQ 66500000 643 #endif 644 645 void 646 consinit(void) 647 { 648 static int consinit_called = 0; 649 650 if (consinit_called) 651 return; 652 653 consinit_called = 1; 654 655 #ifdef CONSDEVNAME 656 657 #if NIMXUART > 0 658 imxuart_set_frequency(IMXUART_FREQ, 2); 659 #endif 660 661 #if (NIMXUART > 0) && defined(IMXUARTCONSOLE) 662 if (strcmp(consdevname, "imxuart") == 0) { 663 paddr_t consaddr; 664 #ifdef CONADDR 665 consaddr = CONADDR; 666 #else 667 consaddr = IMX51_UART1_BASE; 668 #endif 669 imxuart_cons_attach(&imx_bs_tag, consaddr, consrate, consmode); 670 return; 671 } 672 #endif 673 674 #endif 675 676 #if (NWSDISPLAY > 0) && defined(IMXIPUCONSOLE) 677 #if NUKBD > 0 678 ukbd_cnattach(); 679 #endif 680 { 681 extern void netwalker_cnattach(void); 682 netwalker_cnattach(); 683 } 684 #endif 685 } 686 687 #ifdef KGDB 688 #ifndef KGDB_DEVNAME 689 #define KGDB_DEVNAME "imxuart" 690 #endif 691 #ifndef KGDB_DEVMODE 692 #define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 693 #endif 694 695 const char kgdb_devname[20] = KGDB_DEVNAME; 696 int kgdb_mode = KGDB_DEVMODE; 697 int kgdb_addr = KGDB_DEVADDR; 698 extern int kgdb_rate; /* defined in kgdb_stub.c */ 699 700 void 701 kgdb_port_init(void) 702 { 703 #if (NIMXUART > 0) 704 if (strcmp(kgdb_devname, "imxuart") == 0) { 705 imxuart_kgdb_attach(&imx_bs_tag, kgdb_addr, 706 kgdb_rate, kgdb_mode); 707 return; 708 } 709 710 #endif 711 } 712 #endif 713 714 715
Indexes created Wed Oct 01 07:09:59 GMT 2025