netwalker_machdep.c revision 1.14
1 /* $NetBSD: netwalker_machdep.c,v 1.14 2014/03/29 12:00:27 hkenken Exp $ */ 2 3 /* 4 * Copyright (c) 2002, 2003, 2005, 2010 Genetec Corporation. 5 * All rights reserved. 6 * Written by Hiroyuki Bessho for Genetec Corporation. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 19 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION 21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 * POSSIBILITY OF SUCH DAMAGE. 28 * 29 * Machine dependent functions for kernel setup for Sharp Netwalker. 30 * Based on iq80310_machhdep.c 31 */ 32 /* 33 * Copyright (c) 2001 Wasabi Systems, Inc. 34 * All rights reserved. 35 * 36 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 37 * 38 * Redistribution and use in source and binary forms, with or without 39 * modification, are permitted provided that the following conditions 40 * are met: 41 * 1. Redistributions of source code must retain the above copyright 42 * notice, this list of conditions and the following disclaimer. 43 * 2. Redistributions in binary form must reproduce the above copyright 44 * notice, this list of conditions and the following disclaimer in the 45 * documentation and/or other materials provided with the distribution. 46 * 3. All advertising materials mentioning features or use of this software 47 * must display the following acknowledgement: 48 * This product includes software developed for the NetBSD Project by 49 * Wasabi Systems, Inc. 50 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 51 * or promote products derived from this software without specific prior 52 * written permission. 53 * 54 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 55 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 56 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 57 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 58 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 59 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 60 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 61 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 62 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 63 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 64 * POSSIBILITY OF SUCH DAMAGE. 65 */ 66 67 /* 68 * Copyright (c) 1997,1998 Mark Brinicombe. 69 * Copyright (c) 1997,1998 Causality Limited. 70 * All rights reserved. 71 * 72 * Redistribution and use in source and binary forms, with or without 73 * modification, are permitted provided that the following conditions 74 * are met: 75 * 1. Redistributions of source code must retain the above copyright 76 * notice, this list of conditions and the following disclaimer. 77 * 2. Redistributions in binary form must reproduce the above copyright 78 * notice, this list of conditions and the following disclaimer in the 79 * documentation and/or other materials provided with the distribution. 80 * 3. All advertising materials mentioning features or use of this software 81 * must display the following acknowledgement: 82 * This product includes software developed by Mark Brinicombe 83 * for the NetBSD Project. 84 * 4. The name of the company nor the name of the author may be used to 85 * endorse or promote products derived from this software without specific 86 * prior written permission. 87 * 88 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 89 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 90 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 91 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 92 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 93 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 94 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 95 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 96 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 97 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 98 * SUCH DAMAGE. 99 * 100 * Machine dependent functions for kernel setup for Intel IQ80310 evaluation 101 * boards using RedBoot firmware. 102 */ 103 104 #include <sys/cdefs.h> 105 __KERNEL_RCSID(0, "$NetBSD: netwalker_machdep.c,v 1.14 2014/03/29 12:00:27 hkenken Exp $"); 106 107 #include "opt_evbarm_boardtype.h" 108 #include "opt_cputypes.h" 109 #include "opt_ddb.h" 110 #include "opt_kgdb.h" 111 #include "opt_md.h" 112 #include "opt_com.h" 113 #include "imxuart.h" 114 #include "opt_imxuart.h" 115 #include "opt_imx.h" 116 #include "opt_imx51_ipuv3.h" 117 #include "wsdisplay.h" 118 119 #include <sys/param.h> 120 #include <sys/device.h> 121 #include <sys/termios.h> 122 #include <sys/bus.h> 123 124 #include <machine/db_machdep.h> 125 #ifdef KGDB 126 #include <sys/kgdb.h> 127 #endif 128 129 #include <machine/bootconfig.h> 130 131 #include <arm/arm32/machdep.h> 132 133 #include <arm/imx/imx51reg.h> 134 #include <arm/imx/imx51var.h> 135 #include <arm/imx/imxgpioreg.h> 136 #include <arm/imx/imxwdogreg.h> 137 #include <arm/imx/imxuartreg.h> 138 #include <arm/imx/imxuartvar.h> 139 #include <arm/imx/imx51_iomuxreg.h> 140 #include <evbarm/netwalker/netwalker_reg.h> 141 142 #include "ukbd.h" 143 #if (NUKBD > 0) 144 #include <dev/usb/ukbdvar.h> 145 #endif 146 147 /* Kernel text starts 1MB in from the bottom of the kernel address space. */ 148 #define KERNEL_TEXT_BASE (KERNEL_BASE + 0x00100000) 149 #define KERNEL_VM_BASE (KERNEL_BASE + 0x01000000) 150 151 /* 152 * The range 0xc1000000 - 0xccffffff is available for kernel VM space 153 * Core-logic registers and I/O mappings occupy 0xfd000000 - 0xffffffff 154 */ 155 #define KERNEL_VM_SIZE 0x0C000000 156 157 BootConfig bootconfig; /* Boot config storage */ 158 static char bootargs[MAX_BOOT_STRING]; 159 char *boot_args = NULL; 160 161 extern char KERNEL_BASE_phys[]; 162 extern char KERNEL_BASE_virt[]; 163 164 extern int cpu_do_powersave; 165 166 /* 167 * Macros to translate between physical and virtual for a subset of the 168 * kernel address space. *Not* for general use. 169 */ 170 #define KERNEL_BASE_PHYS ((paddr_t)&KERNEL_BASE_phys) 171 #define KERNEL_BASE_VIRT ((vaddr_t)&KERNEL_BASE_virt) 172 #define KERN_VTOPHYS(va) \ 173 ((paddr_t)((vaddr_t)va - KERNEL_BASE_VIRT + KERNEL_BASE_PHYS)) 174 #define KERN_PHYSTOV(pa) \ 175 ((vaddr_t)((paddr_t)pa - KERNEL_BASE_PHYS + KERNEL_BASE_VIRT)) 176 177 178 /* Prototypes */ 179 180 void consinit(void); 181 182 #ifdef KGDB 183 void kgdb_port_init(void); 184 #endif 185 186 static void init_clocks(void); 187 static void setup_ioports(void); 188 189 #ifndef CONSPEED 190 #define CONSPEED B115200 /* What RedBoot uses */ 191 #endif 192 #ifndef CONMODE 193 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 194 #endif 195 196 int comcnspeed = CONSPEED; 197 int comcnmode = CONMODE; 198 199 /* 200 * Static device mappings. These peripheral registers are mapped at 201 * fixed virtual addresses very early in netwalker_start() so that we 202 * can use them while booting the kernel, and stay at the same address 203 * throughout whole kernel's life time. 204 * 205 * We use this table twice; once with bootstrap page table, and once 206 * with kernel's page table which we build up in initarm(). 207 */ 208 209 #define _A(a) ((a) & ~L1_S_OFFSET) 210 #define _S(s) (((s) + L1_S_SIZE - 1) & ~(L1_S_SIZE-1)) 211 212 static const struct pmap_devmap netwalker_devmap[] = { 213 { 214 /* for UART1, IOMUXC */ 215 NETWALKER_IO_VBASE0, 216 _A(NETWALKER_IO_PBASE0), 217 L1_S_SIZE * 4, 218 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE 219 }, 220 {0, 0, 0, 0, 0 } 221 }; 222 223 #ifndef MEMSTART 224 #define MEMSTART 0x90000000 225 #endif 226 #ifndef MEMSIZE 227 #define MEMSIZE 512 228 #endif 229 230 /* 231 * u_int initarm(...) 232 * 233 * Initial entry point on startup. This gets called before main() is 234 * entered. 235 * It should be responsible for setting up everything that must be 236 * in place when main is called. 237 * This includes 238 * Taking a copy of the boot configuration structure. 239 * Initialising the physical console so characters can be printed. 240 * Setting up page tables for the kernel 241 * Relocating the kernel to the bottom of physical memory 242 */ 243 u_int 244 initarm(void *arg) 245 { 246 /* 247 * Heads up ... Setup the CPU / MMU / TLB functions 248 */ 249 if (set_cpufuncs()) 250 panic("cpu not recognized!"); 251 252 /* map some peripheral registers */ 253 pmap_devmap_bootstrap((vaddr_t)armreg_ttbr_read() & -L1_TABLE_SIZE, 254 netwalker_devmap); 255 256 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT); 257 258 /* Register devmap for devices we mapped in start */ 259 pmap_devmap_register(netwalker_devmap); 260 setup_ioports(); 261 262 consinit(); 263 264 #ifdef NO_POWERSAVE 265 cpu_do_powersave=0; 266 #endif 267 268 init_clocks(); 269 270 #ifdef KGDB 271 kgdb_port_init(); 272 #endif 273 274 /* Talk to the user */ 275 printf("\nNetBSD/evbarm (" ___STRING(EVBARM_BOARDTYPE) ") booting ...\n"); 276 277 bootargs[0] = '\0'; 278 279 #if defined(VERBOSE_INIT_ARM) || 1 280 printf("initarm: Configuring system"); 281 printf(", CLIDR=%010o CTR=%#x", 282 armreg_clidr_read(), armreg_ctr_read()); 283 printf("\n"); 284 #endif 285 /* 286 * Ok we have the following memory map 287 * 288 * Physical Address Range Description 289 * ----------------------- ---------------------------------- 290 * 291 * 0x90000000 - 0x97FFFFFF DDR SDRAM (128MByte) 292 * 293 * The initarm() has the responsibility for creating the kernel 294 * page tables. 295 * It must also set up various memory pointers that are used 296 * by pmap etc. 297 */ 298 299 #ifdef VERBOSE_INIT_ARM 300 printf("initarm: Configuring system ...\n"); 301 #endif 302 /* Fake bootconfig structure for the benefit of pmap.c */ 303 /* XXX must make the memory description h/w independent */ 304 bootconfig.dramblocks = 1; 305 bootconfig.dram[0].address = MEMSTART; 306 bootconfig.dram[0].pages = (MEMSIZE * 1024 * 1024) / PAGE_SIZE; 307 308 arm32_bootmem_init(bootconfig.dram[0].address, 309 bootconfig.dram[0].pages * PAGE_SIZE, (uintptr_t)KERNEL_BASE_PHYS); 310 311 arm32_kernel_vm_init(KERNEL_VM_BASE, ARM_VECTORS_HIGH, 0, 312 netwalker_devmap, false); 313 314 /* disable power down counter in watch dog, 315 This must be done within 16 seconds of start-up. */ 316 ioreg16_write(NETWALKER_WDOG_VBASE + IMX_WDOG_WMCR, 0); 317 318 #ifdef BOOTHOWTO 319 boothowto |= BOOTHOWTO; 320 #endif 321 322 #ifdef VERBOSE_INIT_ARM 323 printf("initarm done.\n"); 324 #endif 325 return initarm_common(KERNEL_VM_BASE, KERNEL_VM_SIZE, NULL, 0); 326 } 327 328 329 static void 330 init_clocks(void) 331 { 332 cortex_pmc_ccnt_init(); 333 } 334 335 struct iomux_setup { 336 /* iomux registers are 32-bit wide, but upper 16 bits are not 337 * used. */ 338 uint16_t reg; 339 uint16_t val; 340 }; 341 342 #define IOMUX_M(padname, mux) \ 343 IOMUX_DATA(__CONCAT(IOMUXC_SW_MUX_CTL_PAD_,padname), mux) 344 345 #define IOMUX_P(padname, pad) \ 346 IOMUX_DATA(__CONCAT(IOMUXC_SW_PAD_CTL_PAD_,padname), pad) 347 348 #define IOMUX_MP(padname, mux, pad) \ 349 IOMUX_M(padname, mux), \ 350 IOMUX_P(padname, pad) 351 352 353 #define IOMUX_DATA(offset, value) \ 354 { \ 355 .reg = (offset), \ 356 .val = (value), \ 357 } 358 359 360 /* 361 * set same values to IOMUX registers as linux kernel does 362 */ 363 const struct iomux_setup iomux_setup_data[] = { 364 #define HYS PAD_CTL_HYS 365 #define ODE PAD_CTL_ODE 366 #define DSEHIGH PAD_CTL_DSE_HIGH 367 #define DSEMID PAD_CTL_DSE_MID 368 #define DSELOW PAD_CTL_DSE_LOW 369 #define DSEMAX PAD_CTL_DSE_MAX 370 #define SRE PAD_CTL_SRE 371 #define KEEPER PAD_CTL_KEEPER 372 #define PULL PAD_CTL_PULL 373 #define PU_22K PAD_CTL_PUS_22K_PU 374 #define PU_47K PAD_CTL_PUS_47K_PU 375 #define PU_100K PAD_CTL_PUS_100K_PU 376 #define PD_100K PAD_CTL_PUS_100K_PD 377 #define HVE PAD_CTL_HVE /* Low output voltage */ 378 379 #define ALT0 IOMUX_CONFIG_ALT0 380 #define ALT1 IOMUX_CONFIG_ALT1 381 #define ALT2 IOMUX_CONFIG_ALT2 382 #define ALT3 IOMUX_CONFIG_ALT3 383 #define ALT4 IOMUX_CONFIG_ALT4 384 #define ALT5 IOMUX_CONFIG_ALT5 385 #define ALT6 IOMUX_CONFIG_ALT6 386 #define ALT7 IOMUX_CONFIG_ALT7 387 #define SION IOMUX_CONFIG_SION 388 389 /* left button */ 390 IOMUX_MP(EIM_EB2, ALT1, HYS), 391 /* right button */ 392 IOMUX_MP(EIM_EB3, ALT1, HYS), 393 394 /* UART1 */ 395 IOMUX_MP(UART1_RXD, ALT0, HYS | PULL | DSEHIGH | SRE), 396 IOMUX_MP(UART1_TXD, ALT0, HYS | PULL | DSEHIGH | SRE), 397 IOMUX_MP(UART1_RTS, ALT0, HYS | PULL | DSEHIGH), 398 IOMUX_MP(UART1_CTS, ALT0, HYS | PULL | DSEHIGH), 399 400 /* LCD Display */ 401 IOMUX_M(DI1_PIN2, ALT0), 402 IOMUX_M(DI1_PIN3, ALT0), 403 404 IOMUX_DATA(IOMUXC_SW_PAD_CTL_GRP_DISP1_PKE0, PAD_CTL_PKE), 405 #if 0 406 IOMUX_MP(DISP1_DAT0, ALT0, SRE | DSEMAX | PULL), 407 IOMUX_MP(DISP1_DAT1, ALT0, SRE | DSEMAX | PULL), 408 IOMUX_MP(DISP1_DAT2, ALT0, SRE | DSEMAX | PULL), 409 IOMUX_MP(DISP1_DAT3, ALT0, SRE | DSEMAX | PULL), 410 IOMUX_MP(DISP1_DAT4, ALT0, SRE | DSEMAX | PULL), 411 IOMUX_MP(DISP1_DAT5, ALT0, SRE | DSEMAX | PULL), 412 #endif 413 IOMUX_M(DISP1_DAT6, ALT0), 414 IOMUX_M(DISP1_DAT7, ALT0), 415 IOMUX_M(DISP1_DAT8, ALT0), 416 IOMUX_M(DISP1_DAT9, ALT0), 417 IOMUX_M(DISP1_DAT10, ALT0), 418 IOMUX_M(DISP1_DAT11, ALT0), 419 IOMUX_M(DISP1_DAT12, ALT0), 420 IOMUX_M(DISP1_DAT13, ALT0), 421 IOMUX_M(DISP1_DAT14, ALT0), 422 IOMUX_M(DISP1_DAT15, ALT0), 423 IOMUX_M(DISP1_DAT16, ALT0), 424 IOMUX_M(DISP1_DAT17, ALT0), 425 IOMUX_M(DISP1_DAT18, ALT0), 426 IOMUX_M(DISP1_DAT19, ALT0), 427 IOMUX_M(DISP1_DAT20, ALT0), 428 IOMUX_M(DISP1_DAT21, ALT0), 429 IOMUX_M(DISP1_DAT22, ALT0), 430 IOMUX_M(DISP1_DAT23, ALT0), 431 432 IOMUX_MP(DI1_D0_CS, ALT4, KEEPER | DSEHIGH | SRE), /* GPIO3_3 */ 433 IOMUX_DATA(IOMUXC_GPIO3_IPP_IND_G_IN_3_SELECT_INPUT, INPUT_DAISY_0), 434 IOMUX_MP(CSI2_D12, ALT3, KEEPER | DSEHIGH | SRE), /* GPIO4_9 */ 435 IOMUX_MP(CSI2_D13, ALT3, KEEPER | DSEHIGH | SRE), 436 IOMUX_MP(GPIO1_2, ALT0, ODE | DSEHIGH), 437 IOMUX_MP(EIM_A19, ALT1, SRE | DSEHIGH), 438 /* XXX VGA pins */ 439 IOMUX_M(DI_GP4, ALT4), 440 IOMUX_M(GPIO1_8, SION | ALT0), 441 442 443 #if 0 444 IOMUX_MP(GPIO1_2, ALT1, DSEHIGH | ODE), /* LCD backlight by PWM */ 445 #else 446 IOMUX_P(GPIO1_2, DSEHIGH | ODE), /* LCD backlight by GPIO */ 447 #endif 448 IOMUX_MP(GPIO1_8, SION | ALT0, HYS | DSEMID | PU_100K), 449 /* I2C1 */ 450 IOMUX_MP(EIM_D16, SION | ALT4, HYS | ODE | DSEHIGH | SRE), 451 IOMUX_MP(EIM_D19, SION | ALT4, SRE), /* SCL */ 452 IOMUX_MP(EIM_A19, ALT1, SRE | DSEHIGH), /* GPIO2_13 */ 453 454 #if 0 455 IOMUX_MP(EIM_A23, ALT1, 0), 456 #else 457 IOMUX_M(EIM_A23, ALT1), /* GPIO2_17 */ 458 #endif 459 460 /* BT */ 461 IOMUX_M(EIM_D20, ALT1), /* GPIO2_4 BT host wakeup */ 462 IOMUX_M(EIM_D22, ALT1), /* GPIO2_6 BT RESET */ 463 IOMUX_M(EIM_D23, ALT1), /* GPIO2_7 BT wakeup */ 464 465 /* UART3 */ 466 IOMUX_MP(EIM_D24, ALT3, KEEPER | PU_100K | DSEHIGH | SRE), 467 IOMUX_MP(EIM_D25, ALT3, KEEPER | PU_100K | DSEHIGH | SRE), /* CTS */ 468 IOMUX_MP(EIM_D26, ALT3, KEEPER | PU_100K | DSEHIGH | SRE), /* TXD */ 469 IOMUX_MP(EIM_D27, ALT3, KEEPER | PU_100K | DSEHIGH | SRE), /* RTS */ 470 IOMUX_M(NANDF_D15, ALT3), /* GPIO3_25 */ 471 IOMUX_MP(NANDF_D14, ALT3, HYS | PULL | PU_100K ), /* GPIO3_26 */ 472 473 /* OJ6SH-T25 */ 474 IOMUX_M(CSI1_D9, ALT3), /* GPIO3_13 */ 475 IOMUX_M(CSI1_VSYNC, ALT3), /* GPIO3_14 */ 476 IOMUX_M(CSI1_HSYNC, ALT3), /* GPIO3_15 */ 477 478 /* audio pins */ 479 IOMUX_MP(AUD3_BB_TXD, ALT0, DSEHIGH | PU_100K | SRE), 480 /* XXX: linux code: 481 (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | 482 PAD_CTL_100K_PU | PAD_CTL_HYS_NONE | 483 PAD_CTL_DDR_INPUT_CMOS | PAD_CTL_DRV_VOT_LOW), */ 484 485 IOMUX_MP(AUD3_BB_RXD, ALT0, KEEPER | DSEHIGH | SRE), 486 IOMUX_MP(AUD3_BB_CK, ALT0, KEEPER | DSEHIGH | SRE), 487 IOMUX_MP(AUD3_BB_FS, ALT0, KEEPER | DSEHIGH | SRE), 488 489 /* headphone detect */ 490 IOMUX_MP(NANDF_D14, ALT3, HYS | PULL | PU_100K), 491 IOMUX_MP(CSPI1_RDY, ALT3, SRE | DSEHIGH), 492 /* XXX more audio pins ? */ 493 494 /* CSPI */ 495 IOMUX_MP(CSPI1_MOSI, ALT0, HYS | PULL | PD_100K | DSEHIGH | SRE), 496 IOMUX_MP(CSPI1_MISO, ALT0, HYS | PULL | PD_100K | DSEHIGH | SRE), 497 IOMUX_MP(CSPI1_SCLK, ALT0, HYS | PULL | PD_100K | DSEHIGH | SRE), 498 499 /* SPI CS */ 500 IOMUX_MP(CSPI1_SS0, ALT3, HYS | KEEPER | DSEHIGH | SRE), /* GPIO4[24] */ 501 IOMUX_MP(CSPI1_SS1, ALT3, HYS | KEEPER | DSEHIGH | SRE), /* GPIO4[25] */ 502 IOMUX_MP(DI1_PIN11, ALT4, HYS | PULL | DSEHIGH | SRE), /* GPIO3[0] */ 503 504 /* 26M Osc */ 505 IOMUX_MP(DI1_PIN12, ALT4, KEEPER | DSEHIGH | SRE), /* GPIO3_1 */ 506 507 /* I2C */ 508 IOMUX_MP(KEY_COL4, SION | ALT3, SRE), 509 IOMUX_DATA(IOMUXC_I2C2_IPP_SCL_IN_SELECT_INPUT, INPUT_DAISY_1), 510 IOMUX_MP(KEY_COL5, SION | ALT3, HYS | ODE | DSEHIGH | SRE), 511 IOMUX_DATA(IOMUXC_I2C2_IPP_SDA_IN_SELECT_INPUT, INPUT_DAISY_1), 512 IOMUX_DATA(IOMUXC_UART3_IPP_UART_RTS_B_SELECT_INPUT, INPUT_DAISY_3), 513 514 /* NAND */ 515 IOMUX_MP(NANDF_WE_B, ALT0, HVE | DSEHIGH | PULL | PU_47K), 516 IOMUX_MP(NANDF_RE_B, ALT0, HVE | DSEHIGH | PULL | PU_47K), 517 IOMUX_MP(NANDF_ALE, ALT0, HVE | DSEHIGH | KEEPER), 518 IOMUX_MP(NANDF_CLE, ALT0, HVE | DSEHIGH | KEEPER), 519 IOMUX_MP(NANDF_WP_B, ALT0, HVE | DSEHIGH | PULL | PU_100K), 520 IOMUX_MP(NANDF_RB0, ALT0, HVE | DSELOW | PULL | PU_100K), 521 IOMUX_MP(NANDF_RB1, ALT0, HVE | DSELOW | PULL | PU_100K), 522 IOMUX_MP(NANDF_D7, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 523 IOMUX_MP(NANDF_D6, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 524 IOMUX_MP(NANDF_D5, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 525 IOMUX_MP(NANDF_D4, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 526 IOMUX_MP(NANDF_D3, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 527 IOMUX_MP(NANDF_D2, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 528 IOMUX_MP(NANDF_D1, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 529 IOMUX_MP(NANDF_D0, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 530 531 /* Batttery pins */ 532 IOMUX_MP(NANDF_D13, ALT3, HYS | DSEHIGH), 533 IOMUX_MP(NANDF_D12, ALT3, HYS | DSEHIGH), 534 #if 0 535 IOMUX_MP(NANDF_D11, ALT3, HYS | DSEHIGH), 536 #endif 537 IOMUX_MP(NANDF_D10, ALT3, HYS | DSEHIGH), 538 539 /* SD1 */ 540 IOMUX_MP(SD1_CMD, SION | ALT0, DSEHIGH | SRE), 541 IOMUX_MP(SD1_CLK, SION | ALT0, KEEPER | PU_47K | DSEHIGH), 542 IOMUX_MP(SD1_DATA0, ALT0, DSEHIGH | SRE), 543 IOMUX_MP(SD1_DATA1, ALT0, DSEHIGH | SRE), 544 IOMUX_MP(SD1_DATA2, ALT0, DSEHIGH | SRE), 545 IOMUX_MP(SD1_DATA3, ALT0, DSEHIGH | SRE), 546 IOMUX_MP(GPIO1_0, SION | ALT0, HYS | PU_100K), 547 548 /* SD2 */ 549 IOMUX_P(SD2_CMD, HVE | PU_22K | DSEMAX | SRE), 550 IOMUX_P(SD2_CLK, HVE | PU_22K | DSEMAX | SRE), 551 IOMUX_P(SD2_DATA0, HVE | PU_22K | DSEMAX | SRE), 552 IOMUX_P(SD2_DATA1, HVE | PU_22K | DSEMAX | SRE), 553 IOMUX_P(SD2_DATA2, HVE | PU_22K | DSEMAX | SRE), 554 IOMUX_P(SD2_DATA3, HVE | PU_22K | DSEMAX | SRE), 555 556 /* USB */ 557 IOMUX_MP(USBH1_CLK, ALT0, HYS | KEEPER | DSEHIGH | SRE), 558 IOMUX_MP(USBH1_DIR, ALT0, HYS | KEEPER | DSEHIGH | SRE), 559 IOMUX_MP(USBH1_STP, ALT0, HYS | KEEPER | DSEHIGH | SRE), 560 IOMUX_MP(USBH1_NXT, ALT0, HYS | KEEPER | PU_100K | DSEHIGH | SRE), 561 IOMUX_MP(USBH1_DATA0, ALT0, HYS | KEEPER | DSEHIGH | SRE), 562 IOMUX_MP(USBH1_DATA1, ALT0, HYS | KEEPER | DSEHIGH | SRE), 563 IOMUX_MP(USBH1_DATA2, ALT0, HYS | KEEPER | DSEHIGH | SRE), 564 IOMUX_MP(USBH1_DATA3, ALT0, HYS | KEEPER | DSEHIGH | SRE), 565 IOMUX_MP(USBH1_DATA4, ALT0, HYS | KEEPER | DSEHIGH | SRE), 566 IOMUX_MP(USBH1_DATA5, ALT0, HYS | KEEPER | DSEHIGH | SRE), 567 IOMUX_MP(USBH1_DATA6, ALT0, HYS | KEEPER | DSEHIGH | SRE), 568 IOMUX_MP(USBH1_DATA7, ALT0, HYS | KEEPER | DSEHIGH | SRE), 569 IOMUX_MP(EIM_D17, ALT1, KEEPER | DSEHIGH | SRE), 570 IOMUX_MP(EIM_D21, ALT1, KEEPER | DSEHIGH | SRE), 571 IOMUX_P(GPIO1_7, /*ALT0,*/ DSEHIGH | SRE), /* USB Hub reset */ 572 573 #undef ODE 574 #undef HYS 575 #undef SRE 576 #undef PULL 577 #undef KEEPER 578 #undef PU_22K 579 #undef PU_47K 580 #undef PU_100K 581 #undef PD_100K 582 #undef HVE 583 #undef DSEMAX 584 #undef DSEHIGH 585 #undef DSEMID 586 #undef DSELOW 587 588 #undef ALT0 589 #undef ALT1 590 #undef ALT2 591 #undef ALT3 592 #undef ALT4 593 #undef ALT5 594 #undef ALT6 595 #undef ALT7 596 #undef SION 597 }; 598 599 static void 600 setup_ioports(void) 601 { 602 int i; 603 const struct iomux_setup *p; 604 605 /* Initialize all IOMUX registers */ 606 for (i=0; i < __arraycount(iomux_setup_data); ++i) { 607 p = iomux_setup_data + i; 608 609 ioreg_write(NETWALKER_IOMUXC_VBASE + p->reg, 610 p->val); 611 } 612 613 614 #if 0 /* already done by bootloader */ 615 /* GPIO2[22,23]: input (left/right button) 616 GPIO2[21]: input (power button) */ 617 ioreg_write(NETWALKER_GPIO_VBASE(2) + GPIO_DIR, 618 ~__BITS(21,23) & 619 ioreg_read(NETWALKER_GPIO_VBASE(2) + GPIO_DIR)); 620 #endif 621 622 #if 0 /* already done by bootloader */ 623 /* GPIO4[12]: input (cover switch) */ 624 ioreg_write(NETWALKER_GPIO_VBASE(4) + GPIO_DIR, 625 ~__BIT(12) & 626 ioreg_read(NETWALKER_GPIO_VBASE(4) + GPIO_DIR)); 627 #endif 628 } 629 630 631 #ifdef CONSDEVNAME 632 const char consdevname[] = CONSDEVNAME; 633 634 #ifndef CONMODE 635 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 636 #endif 637 #ifndef CONSPEED 638 #define CONSPEED 115200 639 #endif 640 641 int consmode = CONMODE; 642 int consrate = CONSPEED; 643 644 #endif /* CONSDEVNAME */ 645 646 #ifndef IMXUART_FREQ 647 #define IMXUART_FREQ 66500000 648 #endif 649 650 void 651 consinit(void) 652 { 653 static int consinit_called = 0; 654 655 if (consinit_called) 656 return; 657 658 consinit_called = 1; 659 660 #ifdef CONSDEVNAME 661 662 #if NIMXUART > 0 663 imxuart_set_frequency(IMXUART_FREQ, 2); 664 #endif 665 666 #if (NIMXUART > 0) && defined(IMXUARTCONSOLE) 667 if (strcmp(consdevname, "imxuart") == 0) { 668 paddr_t consaddr; 669 #ifdef CONADDR 670 consaddr = CONADDR; 671 #else 672 consaddr = IMX51_UART1_BASE; 673 #endif 674 imxuart_cons_attach(&imx_bs_tag, consaddr, consrate, consmode); 675 return; 676 } 677 #endif 678 679 #endif 680 681 #if (NWSDISPLAY > 0) && defined(IMXIPUCONSOLE) 682 #if NUKBD > 0 683 ukbd_cnattach(); 684 #endif 685 { 686 extern void netwalker_cnattach(void); 687 netwalker_cnattach(); 688 } 689 #endif 690 } 691 692 #ifdef KGDB 693 #ifndef KGDB_DEVNAME 694 #define KGDB_DEVNAME "imxuart" 695 #endif 696 #ifndef KGDB_DEVMODE 697 #define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 698 #endif 699 700 const char kgdb_devname[20] = KGDB_DEVNAME; 701 int kgdb_mode = KGDB_DEVMODE; 702 int kgdb_addr = KGDB_DEVADDR; 703 extern int kgdb_rate; /* defined in kgdb_stub.c */ 704 705 void 706 kgdb_port_init(void) 707 { 708 #if (NIMXUART > 0) 709 if (strcmp(kgdb_devname, "imxuart") == 0) { 710 imxuart_kgdb_attach(&imx_bs_tag, kgdb_addr, 711 kgdb_rate, kgdb_mode); 712 return; 713 } 714 715 #endif 716 } 717 #endif 718 719 720
Indexes created Wed Oct 01 07:09:59 GMT 2025