netwalker_machdep.c revision 1.16
1 /* $NetBSD: netwalker_machdep.c,v 1.16 2014/05/06 11:22:53 hkenken Exp $ */ 2 3 /* 4 * Copyright (c) 2002, 2003, 2005, 2010 Genetec Corporation. 5 * All rights reserved. 6 * Written by Hiroyuki Bessho for Genetec Corporation. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 19 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION 21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 * POSSIBILITY OF SUCH DAMAGE. 28 * 29 * Machine dependent functions for kernel setup for Sharp Netwalker. 30 * Based on iq80310_machhdep.c 31 */ 32 /* 33 * Copyright (c) 2001 Wasabi Systems, Inc. 34 * All rights reserved. 35 * 36 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 37 * 38 * Redistribution and use in source and binary forms, with or without 39 * modification, are permitted provided that the following conditions 40 * are met: 41 * 1. Redistributions of source code must retain the above copyright 42 * notice, this list of conditions and the following disclaimer. 43 * 2. Redistributions in binary form must reproduce the above copyright 44 * notice, this list of conditions and the following disclaimer in the 45 * documentation and/or other materials provided with the distribution. 46 * 3. All advertising materials mentioning features or use of this software 47 * must display the following acknowledgement: 48 * This product includes software developed for the NetBSD Project by 49 * Wasabi Systems, Inc. 50 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 51 * or promote products derived from this software without specific prior 52 * written permission. 53 * 54 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 55 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 56 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 57 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 58 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 59 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 60 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 61 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 62 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 63 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 64 * POSSIBILITY OF SUCH DAMAGE. 65 */ 66 67 /* 68 * Copyright (c) 1997,1998 Mark Brinicombe. 69 * Copyright (c) 1997,1998 Causality Limited. 70 * All rights reserved. 71 * 72 * Redistribution and use in source and binary forms, with or without 73 * modification, are permitted provided that the following conditions 74 * are met: 75 * 1. Redistributions of source code must retain the above copyright 76 * notice, this list of conditions and the following disclaimer. 77 * 2. Redistributions in binary form must reproduce the above copyright 78 * notice, this list of conditions and the following disclaimer in the 79 * documentation and/or other materials provided with the distribution. 80 * 3. All advertising materials mentioning features or use of this software 81 * must display the following acknowledgement: 82 * This product includes software developed by Mark Brinicombe 83 * for the NetBSD Project. 84 * 4. The name of the company nor the name of the author may be used to 85 * endorse or promote products derived from this software without specific 86 * prior written permission. 87 * 88 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 89 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 90 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 91 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 92 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 93 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 94 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 95 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 96 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 97 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 98 * SUCH DAMAGE. 99 * 100 * Machine dependent functions for kernel setup for Intel IQ80310 evaluation 101 * boards using RedBoot firmware. 102 */ 103 104 #include <sys/cdefs.h> 105 __KERNEL_RCSID(0, "$NetBSD: netwalker_machdep.c,v 1.16 2014/05/06 11:22:53 hkenken Exp $"); 106 107 #include "opt_evbarm_boardtype.h" 108 #include "opt_cputypes.h" 109 #include "opt_ddb.h" 110 #include "opt_kgdb.h" 111 #include "opt_md.h" 112 #include "opt_com.h" 113 #include "imxuart.h" 114 #include "opt_imxuart.h" 115 #include "opt_imx.h" 116 #include "opt_imx51_ipuv3.h" 117 #include "wsdisplay.h" 118 #include "opt_machdep.h" 119 120 #include <sys/param.h> 121 #include <sys/device.h> 122 #include <sys/termios.h> 123 #include <sys/bus.h> 124 125 #include <machine/db_machdep.h> 126 #ifdef KGDB 127 #include <sys/kgdb.h> 128 #endif 129 130 #include <machine/bootconfig.h> 131 132 #include <arm/arm32/machdep.h> 133 134 #include <arm/imx/imx51reg.h> 135 #include <arm/imx/imx51var.h> 136 #include <arm/imx/imxgpioreg.h> 137 #include <arm/imx/imxwdogreg.h> 138 #include <arm/imx/imxuartreg.h> 139 #include <arm/imx/imxuartvar.h> 140 #include <arm/imx/imx51_iomuxreg.h> 141 142 #include <evbarm/netwalker/netwalker_reg.h> 143 #include <evbarm/netwalker/netwalker.h> 144 145 #include "ukbd.h" 146 #if (NUKBD > 0) 147 #include <dev/usb/ukbdvar.h> 148 #endif 149 150 /* Kernel text starts 1MB in from the bottom of the kernel address space. */ 151 #define KERNEL_TEXT_BASE (KERNEL_BASE + 0x00100000) 152 153 BootConfig bootconfig; /* Boot config storage */ 154 static char bootargs[MAX_BOOT_STRING]; 155 char *boot_args = NULL; 156 157 extern char KERNEL_BASE_phys[]; 158 159 extern int cpu_do_powersave; 160 161 /* 162 * Macros to translate between physical and virtual for a subset of the 163 * kernel address space. *Not* for general use. 164 */ 165 #define KERNEL_BASE_PHYS ((paddr_t)KERNEL_BASE_phys) 166 167 168 /* Prototypes */ 169 170 void consinit(void); 171 172 #ifdef KGDB 173 void kgdb_port_init(void); 174 #endif 175 176 static void init_clocks(void); 177 static void setup_ioports(void); 178 179 #ifndef CONSPEED 180 #define CONSPEED B115200 /* What RedBoot uses */ 181 #endif 182 #ifndef CONMODE 183 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 184 #endif 185 186 int comcnspeed = CONSPEED; 187 int comcnmode = CONMODE; 188 189 /* 190 * Static device mappings. These peripheral registers are mapped at 191 * fixed virtual addresses very early in netwalker_start() so that we 192 * can use them while booting the kernel, and stay at the same address 193 * throughout whole kernel's life time. 194 * 195 * We use this table twice; once with bootstrap page table, and once 196 * with kernel's page table which we build up in initarm(). 197 */ 198 199 #define _A(a) ((a) & ~L1_S_OFFSET) 200 #define _S(s) (((s) + L1_S_SIZE - 1) & ~(L1_S_SIZE-1)) 201 202 static const struct pmap_devmap netwalker_devmap[] = { 203 { 204 /* for UART1, IOMUXC */ 205 .pd_va = _A(NETWALKER_IO_VBASE0), 206 .pd_pa = _A(NETWALKER_IO_PBASE0), 207 .pd_size = _S(L1_S_SIZE * 4), 208 .pd_prot = VM_PROT_READ|VM_PROT_WRITE, 209 .pd_cache = PTE_NOCACHE 210 }, 211 {0} 212 }; 213 214 #undef _A 215 #undef _S 216 217 #ifndef MEMSTART 218 #define MEMSTART 0x90000000 219 #endif 220 #ifndef MEMSIZE 221 #define MEMSIZE 512 222 #endif 223 224 /* 225 * u_int initarm(...) 226 * 227 * Initial entry point on startup. This gets called before main() is 228 * entered. 229 * It should be responsible for setting up everything that must be 230 * in place when main is called. 231 * This includes 232 * Taking a copy of the boot configuration structure. 233 * Initialising the physical console so characters can be printed. 234 * Setting up page tables for the kernel 235 * Relocating the kernel to the bottom of physical memory 236 */ 237 u_int 238 initarm(void *arg) 239 { 240 /* 241 * Heads up ... Setup the CPU / MMU / TLB functions 242 */ 243 if (set_cpufuncs()) 244 panic("cpu not recognized!"); 245 246 /* map some peripheral registers */ 247 pmap_devmap_bootstrap((vaddr_t)armreg_ttbr_read() & -L1_TABLE_SIZE, 248 netwalker_devmap); 249 250 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT); 251 252 /* Register devmap for devices we mapped in start */ 253 pmap_devmap_register(netwalker_devmap); 254 setup_ioports(); 255 256 consinit(); 257 258 #ifdef NO_POWERSAVE 259 cpu_do_powersave=0; 260 #endif 261 262 init_clocks(); 263 264 #ifdef KGDB 265 kgdb_port_init(); 266 #endif 267 268 /* Talk to the user */ 269 printf("\nNetBSD/evbarm (" ___STRING(EVBARM_BOARDTYPE) ") booting ...\n"); 270 271 #ifdef BOOT_ARGS 272 char mi_bootargs[] = BOOT_ARGS; 273 parse_mi_bootargs(mi_bootargs); 274 #endif 275 bootargs[0] = '\0'; 276 277 #if defined(VERBOSE_INIT_ARM) || 1 278 printf("initarm: Configuring system"); 279 printf(", CLIDR=%010o CTR=%#x", 280 armreg_clidr_read(), armreg_ctr_read()); 281 printf("\n"); 282 #endif 283 /* 284 * Ok we have the following memory map 285 * 286 * Physical Address Range Description 287 * ----------------------- ---------------------------------- 288 * 289 * 0x90000000 - 0xAFFFFFFF DDR SDRAM (512MByte) 290 * 291 * The initarm() has the responsibility for creating the kernel 292 * page tables. 293 * It must also set up various memory pointers that are used 294 * by pmap etc. 295 */ 296 297 #ifdef VERBOSE_INIT_ARM 298 printf("initarm: Configuring system ...\n"); 299 #endif 300 /* Fake bootconfig structure for the benefit of pmap.c */ 301 /* XXX must make the memory description h/w independent */ 302 bootconfig.dramblocks = 1; 303 bootconfig.dram[0].address = MEMSTART; 304 bootconfig.dram[0].pages = (MEMSIZE * 1024 * 1024) / PAGE_SIZE; 305 306 psize_t ram_size = bootconfig.dram[0].pages * PAGE_SIZE; 307 308 #ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS 309 if (ram_size > KERNEL_VM_BASE - KERNEL_BASE) { 310 printf("%s: dropping RAM size from %luMB to %uMB\n", 311 __func__, (unsigned long) (ram_size >> 20), 312 (KERNEL_VM_BASE - KERNEL_BASE) >> 20); 313 ram_size = KERNEL_VM_BASE - KERNEL_BASE; 314 } 315 #endif 316 317 arm32_bootmem_init(bootconfig.dram[0].address, ram_size, 318 KERNEL_BASE_PHYS); 319 320 #ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS 321 const bool mapallmem_p = true; 322 KASSERT(ram_size <= KERNEL_VM_BASE - KERNEL_BASE); 323 #else 324 const bool mapallmem_p = false; 325 #endif 326 327 arm32_kernel_vm_init(KERNEL_VM_BASE, ARM_VECTORS_HIGH, 0, 328 netwalker_devmap, mapallmem_p); 329 330 /* disable power down counter in watch dog, 331 This must be done within 16 seconds of start-up. */ 332 ioreg16_write(NETWALKER_WDOG_VBASE + IMX_WDOG_WMCR, 0); 333 334 #ifdef BOOTHOWTO 335 boothowto |= BOOTHOWTO; 336 #endif 337 338 #ifdef VERBOSE_INIT_ARM 339 printf("initarm done.\n"); 340 #endif 341 return initarm_common(KERNEL_VM_BASE, KERNEL_VM_SIZE, NULL, 0); 342 } 343 344 345 static void 346 init_clocks(void) 347 { 348 cortex_pmc_ccnt_init(); 349 } 350 351 struct iomux_setup { 352 /* iomux registers are 32-bit wide, but upper 16 bits are not 353 * used. */ 354 uint16_t reg; 355 uint16_t val; 356 }; 357 358 #define IOMUX_M(padname, mux) \ 359 IOMUX_DATA(__CONCAT(IOMUXC_SW_MUX_CTL_PAD_,padname), mux) 360 361 #define IOMUX_P(padname, pad) \ 362 IOMUX_DATA(__CONCAT(IOMUXC_SW_PAD_CTL_PAD_,padname), pad) 363 364 #define IOMUX_MP(padname, mux, pad) \ 365 IOMUX_M(padname, mux), \ 366 IOMUX_P(padname, pad) 367 368 369 #define IOMUX_DATA(offset, value) \ 370 { \ 371 .reg = (offset), \ 372 .val = (value), \ 373 } 374 375 376 /* 377 * set same values to IOMUX registers as linux kernel does 378 */ 379 const struct iomux_setup iomux_setup_data[] = { 380 #define HYS PAD_CTL_HYS 381 #define ODE PAD_CTL_ODE 382 #define DSEHIGH PAD_CTL_DSE_HIGH 383 #define DSEMID PAD_CTL_DSE_MID 384 #define DSELOW PAD_CTL_DSE_LOW 385 #define DSEMAX PAD_CTL_DSE_MAX 386 #define SRE PAD_CTL_SRE 387 #define KEEPER PAD_CTL_KEEPER 388 #define PULL PAD_CTL_PULL 389 #define PU_22K PAD_CTL_PUS_22K_PU 390 #define PU_47K PAD_CTL_PUS_47K_PU 391 #define PU_100K PAD_CTL_PUS_100K_PU 392 #define PD_100K PAD_CTL_PUS_100K_PD 393 #define HVE PAD_CTL_HVE /* Low output voltage */ 394 395 #define ALT0 IOMUX_CONFIG_ALT0 396 #define ALT1 IOMUX_CONFIG_ALT1 397 #define ALT2 IOMUX_CONFIG_ALT2 398 #define ALT3 IOMUX_CONFIG_ALT3 399 #define ALT4 IOMUX_CONFIG_ALT4 400 #define ALT5 IOMUX_CONFIG_ALT5 401 #define ALT6 IOMUX_CONFIG_ALT6 402 #define ALT7 IOMUX_CONFIG_ALT7 403 #define SION IOMUX_CONFIG_SION 404 405 /* left button */ 406 IOMUX_MP(EIM_EB2, ALT1, HYS), 407 /* right button */ 408 IOMUX_MP(EIM_EB3, ALT1, HYS), 409 410 /* UART1 */ 411 IOMUX_MP(UART1_RXD, ALT0, HYS | PULL | DSEHIGH | SRE), 412 IOMUX_MP(UART1_TXD, ALT0, HYS | PULL | DSEHIGH | SRE), 413 IOMUX_MP(UART1_RTS, ALT0, HYS | PULL | DSEHIGH), 414 IOMUX_MP(UART1_CTS, ALT0, HYS | PULL | DSEHIGH), 415 416 /* LCD Display */ 417 IOMUX_M(DI1_PIN2, ALT0), 418 IOMUX_M(DI1_PIN3, ALT0), 419 420 IOMUX_DATA(IOMUXC_SW_PAD_CTL_GRP_DISP1_PKE0, PAD_CTL_PKE), 421 #if 0 422 IOMUX_MP(DISP1_DAT0, ALT0, SRE | DSEMAX | PULL), 423 IOMUX_MP(DISP1_DAT1, ALT0, SRE | DSEMAX | PULL), 424 IOMUX_MP(DISP1_DAT2, ALT0, SRE | DSEMAX | PULL), 425 IOMUX_MP(DISP1_DAT3, ALT0, SRE | DSEMAX | PULL), 426 IOMUX_MP(DISP1_DAT4, ALT0, SRE | DSEMAX | PULL), 427 IOMUX_MP(DISP1_DAT5, ALT0, SRE | DSEMAX | PULL), 428 #endif 429 IOMUX_M(DISP1_DAT6, ALT0), 430 IOMUX_M(DISP1_DAT7, ALT0), 431 IOMUX_M(DISP1_DAT8, ALT0), 432 IOMUX_M(DISP1_DAT9, ALT0), 433 IOMUX_M(DISP1_DAT10, ALT0), 434 IOMUX_M(DISP1_DAT11, ALT0), 435 IOMUX_M(DISP1_DAT12, ALT0), 436 IOMUX_M(DISP1_DAT13, ALT0), 437 IOMUX_M(DISP1_DAT14, ALT0), 438 IOMUX_M(DISP1_DAT15, ALT0), 439 IOMUX_M(DISP1_DAT16, ALT0), 440 IOMUX_M(DISP1_DAT17, ALT0), 441 IOMUX_M(DISP1_DAT18, ALT0), 442 IOMUX_M(DISP1_DAT19, ALT0), 443 IOMUX_M(DISP1_DAT20, ALT0), 444 IOMUX_M(DISP1_DAT21, ALT0), 445 IOMUX_M(DISP1_DAT22, ALT0), 446 IOMUX_M(DISP1_DAT23, ALT0), 447 448 IOMUX_MP(DI1_D0_CS, ALT4, KEEPER | DSEHIGH | SRE), /* GPIO3_3 */ 449 IOMUX_DATA(IOMUXC_GPIO3_IPP_IND_G_IN_3_SELECT_INPUT, INPUT_DAISY_0), 450 IOMUX_MP(CSI2_D12, ALT3, KEEPER | DSEHIGH | SRE), /* GPIO4_9 */ 451 IOMUX_MP(CSI2_D13, ALT3, KEEPER | DSEHIGH | SRE), 452 #if 1 453 IOMUX_MP(GPIO1_2, ALT1, DSEHIGH | ODE), /* LCD backlight by PWM */ 454 #else 455 IOMUX_MP(GPIO1_2, ALT0, DSEHIGH | ODE), /* LCD backlight by GPIO */ 456 #endif 457 IOMUX_MP(EIM_A19, ALT1, SRE | DSEHIGH), 458 /* XXX VGA pins */ 459 IOMUX_M(DI_GP4, ALT4), 460 IOMUX_M(GPIO1_8, SION | ALT0), 461 462 IOMUX_MP(GPIO1_8, SION | ALT0, HYS | DSEMID | PU_100K), 463 /* I2C1 */ 464 IOMUX_MP(EIM_D16, SION | ALT4, HYS | ODE | DSEHIGH | SRE), 465 IOMUX_MP(EIM_D19, SION | ALT4, SRE), /* SCL */ 466 IOMUX_MP(EIM_A19, ALT1, SRE | DSEHIGH), /* GPIO2_13 */ 467 468 #if 0 469 IOMUX_MP(EIM_A23, ALT1, 0), 470 #else 471 IOMUX_M(EIM_A23, ALT1), /* GPIO2_17 */ 472 #endif 473 474 /* BT */ 475 IOMUX_M(EIM_D20, ALT1), /* GPIO2_4 BT host wakeup */ 476 IOMUX_M(EIM_D22, ALT1), /* GPIO2_6 BT RESET */ 477 IOMUX_M(EIM_D23, ALT1), /* GPIO2_7 BT wakeup */ 478 479 /* UART3 */ 480 IOMUX_MP(EIM_D24, ALT3, KEEPER | PU_100K | DSEHIGH | SRE), 481 IOMUX_MP(EIM_D25, ALT3, KEEPER | PU_100K | DSEHIGH | SRE), /* CTS */ 482 IOMUX_MP(EIM_D26, ALT3, KEEPER | PU_100K | DSEHIGH | SRE), /* TXD */ 483 IOMUX_MP(EIM_D27, ALT3, KEEPER | PU_100K | DSEHIGH | SRE), /* RTS */ 484 IOMUX_M(NANDF_D15, ALT3), /* GPIO3_25 */ 485 IOMUX_MP(NANDF_D14, ALT3, HYS | PULL | PU_100K ), /* GPIO3_26 */ 486 487 /* OJ6SH-T25 */ 488 IOMUX_M(CSI1_D9, ALT3), /* GPIO3_13 */ 489 IOMUX_M(CSI1_VSYNC, ALT3), /* GPIO3_14 */ 490 IOMUX_M(CSI1_HSYNC, ALT3), /* GPIO3_15 */ 491 492 /* audio pins */ 493 IOMUX_MP(AUD3_BB_TXD, ALT0, DSEHIGH | PU_100K | SRE), 494 /* XXX: linux code: 495 (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | 496 PAD_CTL_100K_PU | PAD_CTL_HYS_NONE | 497 PAD_CTL_DDR_INPUT_CMOS | PAD_CTL_DRV_VOT_LOW), */ 498 499 IOMUX_MP(AUD3_BB_RXD, ALT0, KEEPER | DSEHIGH | SRE), 500 IOMUX_MP(AUD3_BB_CK, ALT0, KEEPER | DSEHIGH | SRE), 501 IOMUX_MP(AUD3_BB_FS, ALT0, KEEPER | DSEHIGH | SRE), 502 503 /* headphone detect */ 504 IOMUX_MP(NANDF_D14, ALT3, HYS | PULL | PU_100K), 505 IOMUX_MP(CSPI1_RDY, ALT3, SRE | DSEHIGH), 506 /* XXX more audio pins ? */ 507 508 /* CSPI */ 509 IOMUX_MP(CSPI1_MOSI, ALT0, HYS | PULL | PD_100K | DSEHIGH | SRE), 510 IOMUX_MP(CSPI1_MISO, ALT0, HYS | PULL | PD_100K | DSEHIGH | SRE), 511 IOMUX_MP(CSPI1_SCLK, ALT0, HYS | PULL | PD_100K | DSEHIGH | SRE), 512 513 /* SPI CS */ 514 IOMUX_MP(CSPI1_SS0, ALT3, HYS | KEEPER | DSEHIGH | SRE), /* GPIO4[24] */ 515 IOMUX_MP(CSPI1_SS1, ALT3, HYS | KEEPER | DSEHIGH | SRE), /* GPIO4[25] */ 516 IOMUX_MP(DI1_PIN11, ALT4, HYS | PULL | DSEHIGH | SRE), /* GPIO3[0] */ 517 518 /* 26M Osc */ 519 IOMUX_MP(DI1_PIN12, ALT4, KEEPER | DSEHIGH | SRE), /* GPIO3_1 */ 520 521 /* I2C */ 522 IOMUX_MP(KEY_COL4, SION | ALT3, SRE), 523 IOMUX_DATA(IOMUXC_I2C2_IPP_SCL_IN_SELECT_INPUT, INPUT_DAISY_1), 524 IOMUX_MP(KEY_COL5, SION | ALT3, HYS | ODE | DSEHIGH | SRE), 525 IOMUX_DATA(IOMUXC_I2C2_IPP_SDA_IN_SELECT_INPUT, INPUT_DAISY_1), 526 IOMUX_DATA(IOMUXC_UART3_IPP_UART_RTS_B_SELECT_INPUT, INPUT_DAISY_3), 527 528 /* NAND */ 529 IOMUX_MP(NANDF_WE_B, ALT0, HVE | DSEHIGH | PULL | PU_47K), 530 IOMUX_MP(NANDF_RE_B, ALT0, HVE | DSEHIGH | PULL | PU_47K), 531 IOMUX_MP(NANDF_ALE, ALT0, HVE | DSEHIGH | KEEPER), 532 IOMUX_MP(NANDF_CLE, ALT0, HVE | DSEHIGH | KEEPER), 533 IOMUX_MP(NANDF_WP_B, ALT0, HVE | DSEHIGH | PULL | PU_100K), 534 IOMUX_MP(NANDF_RB0, ALT0, HVE | DSELOW | PULL | PU_100K), 535 IOMUX_MP(NANDF_RB1, ALT0, HVE | DSELOW | PULL | PU_100K), 536 IOMUX_MP(NANDF_D7, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 537 IOMUX_MP(NANDF_D6, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 538 IOMUX_MP(NANDF_D5, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 539 IOMUX_MP(NANDF_D4, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 540 IOMUX_MP(NANDF_D3, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 541 IOMUX_MP(NANDF_D2, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 542 IOMUX_MP(NANDF_D1, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 543 IOMUX_MP(NANDF_D0, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 544 545 /* Batttery pins */ 546 IOMUX_MP(NANDF_D13, ALT3, HYS | DSEHIGH), 547 IOMUX_MP(NANDF_D12, ALT3, HYS | DSEHIGH), 548 #if 0 549 IOMUX_MP(NANDF_D11, ALT3, HYS | DSEHIGH), 550 #endif 551 IOMUX_MP(NANDF_D10, ALT3, HYS | DSEHIGH), 552 553 /* SD1 */ 554 IOMUX_MP(SD1_CMD, SION | ALT0, DSEHIGH | SRE), 555 IOMUX_MP(SD1_CLK, SION | ALT0, KEEPER | PU_47K | DSEHIGH), 556 IOMUX_MP(SD1_DATA0, ALT0, DSEHIGH | SRE), 557 IOMUX_MP(SD1_DATA1, ALT0, DSEHIGH | SRE), 558 IOMUX_MP(SD1_DATA2, ALT0, DSEHIGH | SRE), 559 IOMUX_MP(SD1_DATA3, ALT0, DSEHIGH | SRE), 560 IOMUX_MP(GPIO1_0, SION | ALT0, HYS | PU_100K), 561 562 /* SD2 */ 563 IOMUX_P(SD2_CMD, HVE | PU_22K | DSEMAX | SRE), 564 IOMUX_P(SD2_CLK, HVE | PU_22K | DSEMAX | SRE), 565 IOMUX_P(SD2_DATA0, HVE | PU_22K | DSEMAX | SRE), 566 IOMUX_P(SD2_DATA1, HVE | PU_22K | DSEMAX | SRE), 567 IOMUX_P(SD2_DATA2, HVE | PU_22K | DSEMAX | SRE), 568 IOMUX_P(SD2_DATA3, HVE | PU_22K | DSEMAX | SRE), 569 570 /* USB */ 571 IOMUX_MP(USBH1_CLK, ALT0, HYS | KEEPER | DSEHIGH | SRE), 572 IOMUX_MP(USBH1_DIR, ALT0, HYS | KEEPER | DSEHIGH | SRE), 573 IOMUX_MP(USBH1_STP, ALT0, HYS | KEEPER | DSEHIGH | SRE), 574 IOMUX_MP(USBH1_NXT, ALT0, HYS | KEEPER | PU_100K | DSEHIGH | SRE), 575 IOMUX_MP(USBH1_DATA0, ALT0, HYS | KEEPER | DSEHIGH | SRE), 576 IOMUX_MP(USBH1_DATA1, ALT0, HYS | KEEPER | DSEHIGH | SRE), 577 IOMUX_MP(USBH1_DATA2, ALT0, HYS | KEEPER | DSEHIGH | SRE), 578 IOMUX_MP(USBH1_DATA3, ALT0, HYS | KEEPER | DSEHIGH | SRE), 579 IOMUX_MP(USBH1_DATA4, ALT0, HYS | KEEPER | DSEHIGH | SRE), 580 IOMUX_MP(USBH1_DATA5, ALT0, HYS | KEEPER | DSEHIGH | SRE), 581 IOMUX_MP(USBH1_DATA6, ALT0, HYS | KEEPER | DSEHIGH | SRE), 582 IOMUX_MP(USBH1_DATA7, ALT0, HYS | KEEPER | DSEHIGH | SRE), 583 IOMUX_MP(EIM_D17, ALT1, KEEPER | DSEHIGH | SRE), 584 IOMUX_MP(EIM_D21, ALT1, KEEPER | DSEHIGH | SRE), 585 IOMUX_P(GPIO1_7, /*ALT0,*/ DSEHIGH | SRE), /* USB Hub reset */ 586 587 #undef ODE 588 #undef HYS 589 #undef SRE 590 #undef PULL 591 #undef KEEPER 592 #undef PU_22K 593 #undef PU_47K 594 #undef PU_100K 595 #undef PD_100K 596 #undef HVE 597 #undef DSEMAX 598 #undef DSEHIGH 599 #undef DSEMID 600 #undef DSELOW 601 602 #undef ALT0 603 #undef ALT1 604 #undef ALT2 605 #undef ALT3 606 #undef ALT4 607 #undef ALT5 608 #undef ALT6 609 #undef ALT7 610 #undef SION 611 }; 612 613 static void 614 setup_ioports(void) 615 { 616 int i; 617 const struct iomux_setup *p; 618 619 /* Initialize all IOMUX registers */ 620 for (i=0; i < __arraycount(iomux_setup_data); ++i) { 621 p = iomux_setup_data + i; 622 623 ioreg_write(NETWALKER_IOMUXC_VBASE + p->reg, 624 p->val); 625 } 626 } 627 628 629 #ifdef CONSDEVNAME 630 const char consdevname[] = CONSDEVNAME; 631 632 #ifndef CONMODE 633 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 634 #endif 635 #ifndef CONSPEED 636 #define CONSPEED 115200 637 #endif 638 639 int consmode = CONMODE; 640 int consrate = CONSPEED; 641 642 #endif /* CONSDEVNAME */ 643 644 #ifndef IMXUART_FREQ 645 #define IMXUART_FREQ 66500000 646 #endif 647 648 void 649 consinit(void) 650 { 651 static int consinit_called = 0; 652 653 if (consinit_called) 654 return; 655 656 consinit_called = 1; 657 658 #ifdef CONSDEVNAME 659 660 #if NIMXUART > 0 661 imxuart_set_frequency(IMXUART_FREQ, 2); 662 #endif 663 664 #if (NIMXUART > 0) && defined(IMXUARTCONSOLE) 665 if (strcmp(consdevname, "imxuart") == 0) { 666 paddr_t consaddr; 667 #ifdef CONADDR 668 consaddr = CONADDR; 669 #else 670 consaddr = IMX51_UART1_BASE; 671 #endif 672 imxuart_cons_attach(&imx_bs_tag, consaddr, consrate, consmode); 673 return; 674 } 675 #endif 676 677 #endif 678 679 #if (NWSDISPLAY > 0) && defined(IMXIPUCONSOLE) 680 #if NUKBD > 0 681 ukbd_cnattach(); 682 #endif 683 { 684 extern void netwalker_cnattach(void); 685 netwalker_cnattach(); 686 } 687 #endif 688 } 689 690 #ifdef KGDB 691 #ifndef KGDB_DEVNAME 692 #define KGDB_DEVNAME "imxuart" 693 #endif 694 #ifndef KGDB_DEVMODE 695 #define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 696 #endif 697 698 const char kgdb_devname[20] = KGDB_DEVNAME; 699 int kgdb_mode = KGDB_DEVMODE; 700 int kgdb_addr = KGDB_DEVADDR; 701 extern int kgdb_rate; /* defined in kgdb_stub.c */ 702 703 void 704 kgdb_port_init(void) 705 { 706 #if (NIMXUART > 0) 707 if (strcmp(kgdb_devname, "imxuart") == 0) { 708 imxuart_kgdb_attach(&imx_bs_tag, kgdb_addr, 709 kgdb_rate, kgdb_mode); 710 return; 711 } 712 713 #endif 714 } 715 #endif 716 717 718
Indexes created Wed Oct 01 13:09:50 GMT 2025