netwalker_machdep.c revision 1.19
1 /* $NetBSD: netwalker_machdep.c,v 1.19 2015/12/21 04:26:29 hkenken Exp $ */ 2 3 /* 4 * Copyright (c) 2002, 2003, 2005, 2010 Genetec Corporation. 5 * All rights reserved. 6 * Written by Hiroyuki Bessho for Genetec Corporation. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 19 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION 21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 * POSSIBILITY OF SUCH DAMAGE. 28 * 29 * Machine dependent functions for kernel setup for Sharp Netwalker. 30 * Based on iq80310_machhdep.c 31 */ 32 /* 33 * Copyright (c) 2001 Wasabi Systems, Inc. 34 * All rights reserved. 35 * 36 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 37 * 38 * Redistribution and use in source and binary forms, with or without 39 * modification, are permitted provided that the following conditions 40 * are met: 41 * 1. Redistributions of source code must retain the above copyright 42 * notice, this list of conditions and the following disclaimer. 43 * 2. Redistributions in binary form must reproduce the above copyright 44 * notice, this list of conditions and the following disclaimer in the 45 * documentation and/or other materials provided with the distribution. 46 * 3. All advertising materials mentioning features or use of this software 47 * must display the following acknowledgement: 48 * This product includes software developed for the NetBSD Project by 49 * Wasabi Systems, Inc. 50 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 51 * or promote products derived from this software without specific prior 52 * written permission. 53 * 54 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 55 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 56 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 57 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 58 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 59 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 60 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 61 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 62 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 63 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 64 * POSSIBILITY OF SUCH DAMAGE. 65 */ 66 67 /* 68 * Copyright (c) 1997,1998 Mark Brinicombe. 69 * Copyright (c) 1997,1998 Causality Limited. 70 * All rights reserved. 71 * 72 * Redistribution and use in source and binary forms, with or without 73 * modification, are permitted provided that the following conditions 74 * are met: 75 * 1. Redistributions of source code must retain the above copyright 76 * notice, this list of conditions and the following disclaimer. 77 * 2. Redistributions in binary form must reproduce the above copyright 78 * notice, this list of conditions and the following disclaimer in the 79 * documentation and/or other materials provided with the distribution. 80 * 3. All advertising materials mentioning features or use of this software 81 * must display the following acknowledgement: 82 * This product includes software developed by Mark Brinicombe 83 * for the NetBSD Project. 84 * 4. The name of the company nor the name of the author may be used to 85 * endorse or promote products derived from this software without specific 86 * prior written permission. 87 * 88 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 89 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 90 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 91 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 92 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 93 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 94 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 95 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 96 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 97 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 98 * SUCH DAMAGE. 99 * 100 * Machine dependent functions for kernel setup for Intel IQ80310 evaluation 101 * boards using RedBoot firmware. 102 */ 103 104 #include <sys/cdefs.h> 105 __KERNEL_RCSID(0, "$NetBSD: netwalker_machdep.c,v 1.19 2015/12/21 04:26:29 hkenken Exp $"); 106 107 #include "opt_evbarm_boardtype.h" 108 #include "opt_arm_debug.h" 109 #include "opt_cputypes.h" 110 #include "opt_ddb.h" 111 #include "opt_kgdb.h" 112 #include "opt_md.h" 113 #include "opt_com.h" 114 #include "imxuart.h" 115 #include "opt_imxuart.h" 116 #include "opt_imx.h" 117 #include "opt_imx51_ipuv3.h" 118 #include "opt_machdep.h" 119 120 #include <sys/param.h> 121 #include <sys/device.h> 122 #include <sys/reboot.h> 123 #include <sys/termios.h> 124 #include <sys/bus.h> 125 126 #include "genfb.h" 127 #include "netwalker_backlight.h" 128 #include "netwalker_backlightvar.h" 129 130 #include <machine/db_machdep.h> 131 #ifdef KGDB 132 #include <sys/kgdb.h> 133 #endif 134 135 #include <machine/bootconfig.h> 136 #include <machine/autoconf.h> 137 138 #include <arm/arm32/machdep.h> 139 140 #include <arm/imx/imx51reg.h> 141 #include <arm/imx/imx51var.h> 142 #include <arm/imx/imxgpioreg.h> 143 #include <arm/imx/imxwdogreg.h> 144 #include <arm/imx/imxuartreg.h> 145 #include <arm/imx/imxuartvar.h> 146 #include <arm/imx/imx51_iomuxreg.h> 147 148 #include <evbarm/netwalker/netwalker_reg.h> 149 #include <evbarm/netwalker/netwalker.h> 150 151 #include "ukbd.h" 152 #if (NUKBD > 0) 153 #include <dev/usb/ukbdvar.h> 154 #endif 155 156 /* Kernel text starts 1MB in from the bottom of the kernel address space. */ 157 #define KERNEL_TEXT_BASE (KERNEL_BASE + 0x00100000) 158 159 BootConfig bootconfig; /* Boot config storage */ 160 static char bootargs[MAX_BOOT_STRING] = BOOT_ARGS; 161 char *boot_args = NULL; 162 163 extern char KERNEL_BASE_phys[]; 164 165 extern int cpu_do_powersave; 166 167 /* 168 * Macros to translate between physical and virtual for a subset of the 169 * kernel address space. *Not* for general use. 170 */ 171 #define KERNEL_BASE_PHYS ((paddr_t)KERNEL_BASE_phys) 172 173 174 /* Prototypes */ 175 176 void consinit(void); 177 178 #ifdef KGDB 179 void kgdb_port_init(void); 180 #endif 181 182 static void init_clocks(void); 183 static void setup_ioports(void); 184 185 static void netwalker_device_register(device_t, void *); 186 187 #ifndef CONSPEED 188 #define CONSPEED B115200 /* What RedBoot uses */ 189 #endif 190 #ifndef CONMODE 191 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 192 #endif 193 194 int comcnspeed = CONSPEED; 195 int comcnmode = CONMODE; 196 197 /* 198 * Static device mappings. These peripheral registers are mapped at 199 * fixed virtual addresses very early in netwalker_start() so that we 200 * can use them while booting the kernel, and stay at the same address 201 * throughout whole kernel's life time. 202 * 203 * We use this table twice; once with bootstrap page table, and once 204 * with kernel's page table which we build up in initarm(). 205 */ 206 207 #define _A(a) ((a) & ~L1_S_OFFSET) 208 #define _S(s) (((s) + L1_S_SIZE - 1) & ~(L1_S_SIZE-1)) 209 210 static const struct pmap_devmap netwalker_devmap[] = { 211 { 212 /* for UART1, IOMUXC */ 213 .pd_va = _A(NETWALKER_IO_VBASE0), 214 .pd_pa = _A(NETWALKER_IO_PBASE0), 215 .pd_size = _S(L1_S_SIZE * 4), 216 .pd_prot = VM_PROT_READ|VM_PROT_WRITE, 217 .pd_cache = PTE_NOCACHE 218 }, 219 {0} 220 }; 221 222 #undef _A 223 #undef _S 224 225 #ifndef MEMSTART 226 #define MEMSTART 0x90000000 227 #endif 228 #ifndef MEMSIZE 229 #define MEMSIZE 512 230 #endif 231 232 /* 233 * u_int initarm(...) 234 * 235 * Initial entry point on startup. This gets called before main() is 236 * entered. 237 * It should be responsible for setting up everything that must be 238 * in place when main is called. 239 * This includes 240 * Taking a copy of the boot configuration structure. 241 * Initialising the physical console so characters can be printed. 242 * Setting up page tables for the kernel 243 * Relocating the kernel to the bottom of physical memory 244 */ 245 u_int 246 initarm(void *arg) 247 { 248 /* 249 * Heads up ... Setup the CPU / MMU / TLB functions 250 */ 251 if (set_cpufuncs()) 252 panic("cpu not recognized!"); 253 254 /* map some peripheral registers */ 255 pmap_devmap_bootstrap((vaddr_t)armreg_ttbr_read() & -L1_TABLE_SIZE, 256 netwalker_devmap); 257 258 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT); 259 260 /* Register devmap for devices we mapped in start */ 261 pmap_devmap_register(netwalker_devmap); 262 setup_ioports(); 263 264 consinit(); 265 266 #ifdef NO_POWERSAVE 267 cpu_do_powersave=0; 268 #endif 269 270 init_clocks(); 271 272 #ifdef KGDB 273 kgdb_port_init(); 274 #endif 275 276 /* Talk to the user */ 277 printf("\nNetBSD/evbarm (" ___STRING(EVBARM_BOARDTYPE) ") booting ...\n"); 278 279 #ifdef BOOT_ARGS 280 char mi_bootargs[] = BOOT_ARGS; 281 parse_mi_bootargs(mi_bootargs); 282 #endif 283 284 #if defined(VERBOSE_INIT_ARM) || 1 285 printf("initarm: Configuring system"); 286 printf(", CLIDR=%010o CTR=%#x", 287 armreg_clidr_read(), armreg_ctr_read()); 288 printf("\n"); 289 #endif 290 /* 291 * Ok we have the following memory map 292 * 293 * Physical Address Range Description 294 * ----------------------- ---------------------------------- 295 * 296 * 0x90000000 - 0xAFFFFFFF DDR SDRAM (512MByte) 297 * 298 * The initarm() has the responsibility for creating the kernel 299 * page tables. 300 * It must also set up various memory pointers that are used 301 * by pmap etc. 302 */ 303 304 #ifdef VERBOSE_INIT_ARM 305 printf("initarm: Configuring system ...\n"); 306 #endif 307 /* Fake bootconfig structure for the benefit of pmap.c */ 308 /* XXX must make the memory description h/w independent */ 309 bootconfig.dramblocks = 1; 310 bootconfig.dram[0].address = MEMSTART; 311 bootconfig.dram[0].pages = (MEMSIZE * 1024 * 1024) / PAGE_SIZE; 312 313 psize_t ram_size = bootconfig.dram[0].pages * PAGE_SIZE; 314 315 #ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS 316 if (ram_size > KERNEL_VM_BASE - KERNEL_BASE) { 317 printf("%s: dropping RAM size from %luMB to %uMB\n", 318 __func__, (unsigned long) (ram_size >> 20), 319 (KERNEL_VM_BASE - KERNEL_BASE) >> 20); 320 ram_size = KERNEL_VM_BASE - KERNEL_BASE; 321 } 322 #endif 323 324 arm32_bootmem_init(bootconfig.dram[0].address, ram_size, 325 KERNEL_BASE_PHYS); 326 327 #ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS 328 const bool mapallmem_p = true; 329 KASSERT(ram_size <= KERNEL_VM_BASE - KERNEL_BASE); 330 #else 331 const bool mapallmem_p = false; 332 #endif 333 334 arm32_kernel_vm_init(KERNEL_VM_BASE, ARM_VECTORS_HIGH, 0, 335 netwalker_devmap, mapallmem_p); 336 337 /* disable power down counter in watch dog, 338 This must be done within 16 seconds of start-up. */ 339 ioreg16_write(NETWALKER_WDOG_VBASE + IMX_WDOG_WMCR, 0); 340 341 #ifdef BOOTHOWTO 342 boothowto |= BOOTHOWTO; 343 #endif 344 345 boot_args = bootargs; 346 parse_mi_bootargs(boot_args); 347 printf("boot_args : %s\n", boot_args); 348 349 /* we've a specific device_register routine */ 350 evbarm_device_register = netwalker_device_register; 351 352 #ifdef VERBOSE_INIT_ARM 353 printf("initarm done.\n"); 354 #endif 355 return initarm_common(KERNEL_VM_BASE, KERNEL_VM_SIZE, NULL, 0); 356 } 357 358 359 static void 360 init_clocks(void) 361 { 362 cortex_pmc_ccnt_init(); 363 } 364 365 struct iomux_setup { 366 /* iomux registers are 32-bit wide, but upper 16 bits are not 367 * used. */ 368 uint16_t reg; 369 uint16_t val; 370 }; 371 372 #define IOMUX_M(padname, mux) \ 373 IOMUX_DATA(__CONCAT(IOMUXC_SW_MUX_CTL_PAD_,padname), mux) 374 375 #define IOMUX_P(padname, pad) \ 376 IOMUX_DATA(__CONCAT(IOMUXC_SW_PAD_CTL_PAD_,padname), pad) 377 378 #define IOMUX_MP(padname, mux, pad) \ 379 IOMUX_M(padname, mux), \ 380 IOMUX_P(padname, pad) 381 382 383 #define IOMUX_DATA(offset, value) \ 384 { \ 385 .reg = (offset), \ 386 .val = (value), \ 387 } 388 389 390 /* 391 * set same values to IOMUX registers as linux kernel does 392 */ 393 const struct iomux_setup iomux_setup_data[] = { 394 #define HYS PAD_CTL_HYS 395 #define ODE PAD_CTL_ODE 396 #define DSEHIGH PAD_CTL_DSE_HIGH 397 #define DSEMID PAD_CTL_DSE_MID 398 #define DSELOW PAD_CTL_DSE_LOW 399 #define DSEMAX PAD_CTL_DSE_MAX 400 #define SRE PAD_CTL_SRE 401 #define KEEPER PAD_CTL_KEEPER 402 #define PULL PAD_CTL_PULL 403 #define PU_22K PAD_CTL_PUS_22K_PU 404 #define PU_47K PAD_CTL_PUS_47K_PU 405 #define PU_100K PAD_CTL_PUS_100K_PU 406 #define PD_100K PAD_CTL_PUS_100K_PD 407 #define HVE PAD_CTL_HVE /* Low output voltage */ 408 409 #define ALT0 IOMUX_CONFIG_ALT0 410 #define ALT1 IOMUX_CONFIG_ALT1 411 #define ALT2 IOMUX_CONFIG_ALT2 412 #define ALT3 IOMUX_CONFIG_ALT3 413 #define ALT4 IOMUX_CONFIG_ALT4 414 #define ALT5 IOMUX_CONFIG_ALT5 415 #define ALT6 IOMUX_CONFIG_ALT6 416 #define ALT7 IOMUX_CONFIG_ALT7 417 #define SION IOMUX_CONFIG_SION 418 419 /* left button */ 420 IOMUX_MP(EIM_EB2, ALT1, HYS), 421 /* right button */ 422 IOMUX_MP(EIM_EB3, ALT1, HYS), 423 424 /* UART1 */ 425 IOMUX_MP(UART1_RXD, ALT0, HYS | PULL | DSEHIGH | SRE), 426 IOMUX_MP(UART1_TXD, ALT0, HYS | PULL | DSEHIGH | SRE), 427 IOMUX_MP(UART1_RTS, ALT0, HYS | PULL | DSEHIGH), 428 IOMUX_MP(UART1_CTS, ALT0, HYS | PULL | DSEHIGH), 429 430 /* LCD Display */ 431 IOMUX_M(DI1_PIN2, ALT0), 432 IOMUX_M(DI1_PIN3, ALT0), 433 434 IOMUX_DATA(IOMUXC_SW_PAD_CTL_GRP_DISP1_PKE0, PAD_CTL_PKE), 435 #if 0 436 IOMUX_MP(DISP1_DAT0, ALT0, SRE | DSEMAX | PULL), 437 IOMUX_MP(DISP1_DAT1, ALT0, SRE | DSEMAX | PULL), 438 IOMUX_MP(DISP1_DAT2, ALT0, SRE | DSEMAX | PULL), 439 IOMUX_MP(DISP1_DAT3, ALT0, SRE | DSEMAX | PULL), 440 IOMUX_MP(DISP1_DAT4, ALT0, SRE | DSEMAX | PULL), 441 IOMUX_MP(DISP1_DAT5, ALT0, SRE | DSEMAX | PULL), 442 #endif 443 IOMUX_M(DISP1_DAT6, ALT0), 444 IOMUX_M(DISP1_DAT7, ALT0), 445 IOMUX_M(DISP1_DAT8, ALT0), 446 IOMUX_M(DISP1_DAT9, ALT0), 447 IOMUX_M(DISP1_DAT10, ALT0), 448 IOMUX_M(DISP1_DAT11, ALT0), 449 IOMUX_M(DISP1_DAT12, ALT0), 450 IOMUX_M(DISP1_DAT13, ALT0), 451 IOMUX_M(DISP1_DAT14, ALT0), 452 IOMUX_M(DISP1_DAT15, ALT0), 453 IOMUX_M(DISP1_DAT16, ALT0), 454 IOMUX_M(DISP1_DAT17, ALT0), 455 IOMUX_M(DISP1_DAT18, ALT0), 456 IOMUX_M(DISP1_DAT19, ALT0), 457 IOMUX_M(DISP1_DAT20, ALT0), 458 IOMUX_M(DISP1_DAT21, ALT0), 459 IOMUX_M(DISP1_DAT22, ALT0), 460 IOMUX_M(DISP1_DAT23, ALT0), 461 462 IOMUX_MP(DI1_D0_CS, ALT4, KEEPER | DSEHIGH | SRE), /* GPIO3_3 */ 463 IOMUX_DATA(IOMUXC_GPIO3_IPP_IND_G_IN_3_SELECT_INPUT, INPUT_DAISY_0), 464 IOMUX_MP(CSI2_D12, ALT3, KEEPER | DSEHIGH | SRE), /* GPIO4_9 */ 465 IOMUX_MP(CSI2_D13, ALT3, KEEPER | DSEHIGH | SRE), 466 #if 1 467 IOMUX_MP(GPIO1_2, ALT1, DSEHIGH | ODE), /* LCD backlight by PWM */ 468 #else 469 IOMUX_MP(GPIO1_2, ALT0, DSEHIGH | ODE), /* LCD backlight by GPIO */ 470 #endif 471 IOMUX_MP(EIM_A19, ALT1, SRE | DSEHIGH), 472 /* XXX VGA pins */ 473 IOMUX_M(DI_GP4, ALT4), 474 IOMUX_M(GPIO1_8, SION | ALT0), 475 476 IOMUX_MP(GPIO1_8, SION | ALT0, HYS | DSEMID | PU_100K), 477 /* I2C1 */ 478 IOMUX_MP(EIM_D16, SION | ALT4, HYS | ODE | DSEHIGH | SRE), 479 IOMUX_MP(EIM_D19, SION | ALT4, SRE), /* SCL */ 480 IOMUX_MP(EIM_A19, ALT1, SRE | DSEHIGH), /* GPIO2_13 */ 481 482 #if 0 483 IOMUX_MP(EIM_A23, ALT1, 0), 484 #else 485 IOMUX_M(EIM_A23, ALT1), /* GPIO2_17 */ 486 #endif 487 488 /* BT */ 489 IOMUX_M(EIM_D20, ALT1), /* GPIO2_4 BT host wakeup */ 490 IOMUX_M(EIM_D22, ALT1), /* GPIO2_6 BT RESET */ 491 IOMUX_M(EIM_D23, ALT1), /* GPIO2_7 BT wakeup */ 492 493 /* UART3 */ 494 IOMUX_MP(EIM_D24, ALT3, KEEPER | PU_100K | DSEHIGH | SRE), 495 IOMUX_MP(EIM_D25, ALT3, KEEPER | PU_100K | DSEHIGH | SRE), /* CTS */ 496 IOMUX_MP(EIM_D26, ALT3, KEEPER | PU_100K | DSEHIGH | SRE), /* TXD */ 497 IOMUX_MP(EIM_D27, ALT3, KEEPER | PU_100K | DSEHIGH | SRE), /* RTS */ 498 IOMUX_M(NANDF_D15, ALT3), /* GPIO3_25 */ 499 IOMUX_MP(NANDF_D14, ALT3, HYS | PULL | PU_100K ), /* GPIO3_26 */ 500 501 /* OJ6SH-T25 */ 502 IOMUX_M(CSI1_D9, ALT3), /* GPIO3_13 */ 503 IOMUX_M(CSI1_VSYNC, ALT3), /* GPIO3_14 */ 504 IOMUX_M(CSI1_HSYNC, ALT3), /* GPIO3_15 */ 505 506 /* audio pins */ 507 IOMUX_MP(AUD3_BB_TXD, ALT0, DSEHIGH | PU_100K | SRE), 508 /* XXX: linux code: 509 (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | 510 PAD_CTL_100K_PU | PAD_CTL_HYS_NONE | 511 PAD_CTL_DDR_INPUT_CMOS | PAD_CTL_DRV_VOT_LOW), */ 512 513 IOMUX_MP(AUD3_BB_RXD, ALT0, KEEPER | DSEHIGH | SRE), 514 IOMUX_MP(AUD3_BB_CK, ALT0, KEEPER | DSEHIGH | SRE), 515 IOMUX_MP(AUD3_BB_FS, ALT0, KEEPER | DSEHIGH | SRE), 516 517 /* headphone detect */ 518 IOMUX_MP(NANDF_D14, ALT3, HYS | PULL | PU_100K), 519 IOMUX_MP(CSPI1_RDY, ALT3, SRE | DSEHIGH), 520 /* XXX more audio pins ? */ 521 522 /* CSPI */ 523 IOMUX_MP(CSPI1_MOSI, ALT0, HYS | PULL | PD_100K | DSEHIGH | SRE), 524 IOMUX_MP(CSPI1_MISO, ALT0, HYS | PULL | PD_100K | DSEHIGH | SRE), 525 IOMUX_MP(CSPI1_SCLK, ALT0, HYS | PULL | PD_100K | DSEHIGH | SRE), 526 527 /* SPI CS */ 528 IOMUX_MP(CSPI1_SS0, ALT3, HYS | KEEPER | DSEHIGH | SRE), /* GPIO4[24] */ 529 IOMUX_MP(CSPI1_SS1, ALT3, HYS | KEEPER | DSEHIGH | SRE), /* GPIO4[25] */ 530 IOMUX_MP(DI1_PIN11, ALT4, HYS | PULL | DSEHIGH | SRE), /* GPIO3[0] */ 531 532 /* 26M Osc */ 533 IOMUX_MP(DI1_PIN12, ALT4, KEEPER | DSEHIGH | SRE), /* GPIO3_1 */ 534 535 /* I2C */ 536 IOMUX_MP(KEY_COL4, SION | ALT3, SRE), 537 IOMUX_DATA(IOMUXC_I2C2_IPP_SCL_IN_SELECT_INPUT, INPUT_DAISY_1), 538 IOMUX_MP(KEY_COL5, SION | ALT3, HYS | ODE | DSEHIGH | SRE), 539 IOMUX_DATA(IOMUXC_I2C2_IPP_SDA_IN_SELECT_INPUT, INPUT_DAISY_1), 540 IOMUX_DATA(IOMUXC_UART3_IPP_UART_RTS_B_SELECT_INPUT, INPUT_DAISY_3), 541 542 /* NAND */ 543 IOMUX_MP(NANDF_WE_B, ALT0, HVE | DSEHIGH | PULL | PU_47K), 544 IOMUX_MP(NANDF_RE_B, ALT0, HVE | DSEHIGH | PULL | PU_47K), 545 IOMUX_MP(NANDF_ALE, ALT0, HVE | DSEHIGH | KEEPER), 546 IOMUX_MP(NANDF_CLE, ALT0, HVE | DSEHIGH | KEEPER), 547 IOMUX_MP(NANDF_WP_B, ALT0, HVE | DSEHIGH | PULL | PU_100K), 548 IOMUX_MP(NANDF_RB0, ALT0, HVE | DSELOW | PULL | PU_100K), 549 IOMUX_MP(NANDF_RB1, ALT0, HVE | DSELOW | PULL | PU_100K), 550 IOMUX_MP(NANDF_D7, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 551 IOMUX_MP(NANDF_D6, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 552 IOMUX_MP(NANDF_D5, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 553 IOMUX_MP(NANDF_D4, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 554 IOMUX_MP(NANDF_D3, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 555 IOMUX_MP(NANDF_D2, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 556 IOMUX_MP(NANDF_D1, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 557 IOMUX_MP(NANDF_D0, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 558 559 /* Batttery pins */ 560 IOMUX_MP(NANDF_D13, ALT3, HYS | DSEHIGH), 561 IOMUX_MP(NANDF_D12, ALT3, HYS | DSEHIGH), 562 #if 0 563 IOMUX_MP(NANDF_D11, ALT3, HYS | DSEHIGH), 564 #endif 565 IOMUX_MP(NANDF_D10, ALT3, HYS | DSEHIGH), 566 567 /* SD1 */ 568 IOMUX_MP(SD1_CMD, SION | ALT0, DSEHIGH | SRE), 569 IOMUX_MP(SD1_CLK, SION | ALT0, KEEPER | PU_47K | DSEHIGH), 570 IOMUX_MP(SD1_DATA0, ALT0, DSEHIGH | SRE), 571 IOMUX_MP(SD1_DATA1, ALT0, DSEHIGH | SRE), 572 IOMUX_MP(SD1_DATA2, ALT0, DSEHIGH | SRE), 573 IOMUX_MP(SD1_DATA3, ALT0, DSEHIGH | SRE), 574 IOMUX_MP(GPIO1_0, SION | ALT0, HYS | PU_100K), 575 576 /* SD2 */ 577 IOMUX_P(SD2_CMD, HVE | PU_22K | DSEMAX | SRE), 578 IOMUX_P(SD2_CLK, HVE | PU_22K | DSEMAX | SRE), 579 IOMUX_P(SD2_DATA0, HVE | PU_22K | DSEMAX | SRE), 580 IOMUX_P(SD2_DATA1, HVE | PU_22K | DSEMAX | SRE), 581 IOMUX_P(SD2_DATA2, HVE | PU_22K | DSEMAX | SRE), 582 IOMUX_P(SD2_DATA3, HVE | PU_22K | DSEMAX | SRE), 583 584 /* USB */ 585 IOMUX_MP(USBH1_CLK, ALT0, HYS | KEEPER | DSEHIGH | SRE), 586 IOMUX_MP(USBH1_DIR, ALT0, HYS | KEEPER | DSEHIGH | SRE), 587 IOMUX_MP(USBH1_STP, ALT0, HYS | KEEPER | DSEHIGH | SRE), 588 IOMUX_MP(USBH1_NXT, ALT0, HYS | KEEPER | PU_100K | DSEHIGH | SRE), 589 IOMUX_MP(USBH1_DATA0, ALT0, HYS | KEEPER | DSEHIGH | SRE), 590 IOMUX_MP(USBH1_DATA1, ALT0, HYS | KEEPER | DSEHIGH | SRE), 591 IOMUX_MP(USBH1_DATA2, ALT0, HYS | KEEPER | DSEHIGH | SRE), 592 IOMUX_MP(USBH1_DATA3, ALT0, HYS | KEEPER | DSEHIGH | SRE), 593 IOMUX_MP(USBH1_DATA4, ALT0, HYS | KEEPER | DSEHIGH | SRE), 594 IOMUX_MP(USBH1_DATA5, ALT0, HYS | KEEPER | DSEHIGH | SRE), 595 IOMUX_MP(USBH1_DATA6, ALT0, HYS | KEEPER | DSEHIGH | SRE), 596 IOMUX_MP(USBH1_DATA7, ALT0, HYS | KEEPER | DSEHIGH | SRE), 597 IOMUX_MP(EIM_D17, ALT1, KEEPER | DSEHIGH | SRE), 598 IOMUX_MP(EIM_D21, ALT1, KEEPER | DSEHIGH | SRE), 599 IOMUX_P(GPIO1_7, /*ALT0,*/ DSEHIGH | SRE), /* USB Hub reset */ 600 601 #undef ODE 602 #undef HYS 603 #undef SRE 604 #undef PULL 605 #undef KEEPER 606 #undef PU_22K 607 #undef PU_47K 608 #undef PU_100K 609 #undef PD_100K 610 #undef HVE 611 #undef DSEMAX 612 #undef DSEHIGH 613 #undef DSEMID 614 #undef DSELOW 615 616 #undef ALT0 617 #undef ALT1 618 #undef ALT2 619 #undef ALT3 620 #undef ALT4 621 #undef ALT5 622 #undef ALT6 623 #undef ALT7 624 #undef SION 625 }; 626 627 static void 628 setup_ioports(void) 629 { 630 int i; 631 const struct iomux_setup *p; 632 633 /* Initialize all IOMUX registers */ 634 for (i=0; i < __arraycount(iomux_setup_data); ++i) { 635 p = iomux_setup_data + i; 636 637 ioreg_write(NETWALKER_IOMUXC_VBASE + p->reg, 638 p->val); 639 } 640 } 641 642 643 #ifdef CONSDEVNAME 644 const char consdevname[] = CONSDEVNAME; 645 646 #ifndef CONMODE 647 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 648 #endif 649 #ifndef CONSPEED 650 #define CONSPEED 115200 651 #endif 652 653 int consmode = CONMODE; 654 int consrate = CONSPEED; 655 656 #endif /* CONSDEVNAME */ 657 658 #ifndef IMXUART_FREQ 659 #define IMXUART_FREQ 66500000 660 #endif 661 662 void 663 consinit(void) 664 { 665 static int consinit_called = 0; 666 667 if (consinit_called) 668 return; 669 670 consinit_called = 1; 671 672 #ifdef CONSDEVNAME 673 674 #if NIMXUART > 0 675 imxuart_set_frequency(IMXUART_FREQ, 2); 676 #endif 677 678 #if (NIMXUART > 0) && defined(IMXUARTCONSOLE) 679 if (strcmp(consdevname, "imxuart") == 0) { 680 paddr_t consaddr; 681 #ifdef CONADDR 682 consaddr = CONADDR; 683 #else 684 consaddr = IMX51_UART1_BASE; 685 #endif 686 imxuart_cons_attach(&armv7_generic_bs_tag, consaddr, consrate, consmode); 687 return; 688 } 689 #endif 690 #endif 691 } 692 693 static void 694 netwalker_device_register(device_t self, void *aux) 695 { 696 prop_dictionary_t dict = device_properties(self); 697 698 #if NGENFB > 0 699 if (device_is_a(self, "genfb")) { 700 char *ptr; 701 if (get_bootconf_option(boot_args, "console", 702 BOOTOPT_TYPE_STRING, &ptr) && strncmp(ptr, "fb", 2) == 0) { 703 prop_dictionary_set_bool(dict, "is_console", true); 704 #if NUKBD > 0 705 ukbd_cnattach(); 706 #endif 707 } else { 708 prop_dictionary_set_bool(dict, "is_console", false); 709 } 710 #if NNETWALKER_BACKLIGHT > 0 711 netwalker_backlight_genfb_parameter_set(dict); 712 #endif 713 } 714 #endif 715 } 716 717 #ifdef KGDB 718 #ifndef KGDB_DEVNAME 719 #define KGDB_DEVNAME "imxuart" 720 #endif 721 #ifndef KGDB_DEVMODE 722 #define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 723 #endif 724 725 const char kgdb_devname[20] = KGDB_DEVNAME; 726 int kgdb_mode = KGDB_DEVMODE; 727 int kgdb_addr = KGDB_DEVADDR; 728 extern int kgdb_rate; /* defined in kgdb_stub.c */ 729 730 void 731 kgdb_port_init(void) 732 { 733 #if (NIMXUART > 0) 734 if (strcmp(kgdb_devname, "imxuart") == 0) { 735 imxuart_kgdb_attach(&armv7_generic_bs_tag, kgdb_addr, 736 kgdb_rate, kgdb_mode); 737 return; 738 } 739 740 #endif 741 } 742 #endif 743 744 745
Indexes created Wed Oct 01 13:09:50 GMT 2025