netwalker_machdep.c revision 1.21
1 /* $NetBSD: netwalker_machdep.c,v 1.21 2017/09/08 05:29:12 hkenken Exp $ */ 2 3 /* 4 * Copyright (c) 2002, 2003, 2005, 2010 Genetec Corporation. 5 * All rights reserved. 6 * Written by Hiroyuki Bessho for Genetec Corporation. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 19 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION 21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 * POSSIBILITY OF SUCH DAMAGE. 28 * 29 * Machine dependent functions for kernel setup for Sharp Netwalker. 30 * Based on iq80310_machhdep.c 31 */ 32 /* 33 * Copyright (c) 2001 Wasabi Systems, Inc. 34 * All rights reserved. 35 * 36 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 37 * 38 * Redistribution and use in source and binary forms, with or without 39 * modification, are permitted provided that the following conditions 40 * are met: 41 * 1. Redistributions of source code must retain the above copyright 42 * notice, this list of conditions and the following disclaimer. 43 * 2. Redistributions in binary form must reproduce the above copyright 44 * notice, this list of conditions and the following disclaimer in the 45 * documentation and/or other materials provided with the distribution. 46 * 3. All advertising materials mentioning features or use of this software 47 * must display the following acknowledgement: 48 * This product includes software developed for the NetBSD Project by 49 * Wasabi Systems, Inc. 50 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 51 * or promote products derived from this software without specific prior 52 * written permission. 53 * 54 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 55 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 56 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 57 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 58 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 59 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 60 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 61 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 62 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 63 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 64 * POSSIBILITY OF SUCH DAMAGE. 65 */ 66 67 /* 68 * Copyright (c) 1997,1998 Mark Brinicombe. 69 * Copyright (c) 1997,1998 Causality Limited. 70 * All rights reserved. 71 * 72 * Redistribution and use in source and binary forms, with or without 73 * modification, are permitted provided that the following conditions 74 * are met: 75 * 1. Redistributions of source code must retain the above copyright 76 * notice, this list of conditions and the following disclaimer. 77 * 2. Redistributions in binary form must reproduce the above copyright 78 * notice, this list of conditions and the following disclaimer in the 79 * documentation and/or other materials provided with the distribution. 80 * 3. All advertising materials mentioning features or use of this software 81 * must display the following acknowledgement: 82 * This product includes software developed by Mark Brinicombe 83 * for the NetBSD Project. 84 * 4. The name of the company nor the name of the author may be used to 85 * endorse or promote products derived from this software without specific 86 * prior written permission. 87 * 88 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 89 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 90 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 91 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 92 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 93 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 94 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 95 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 96 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 97 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 98 * SUCH DAMAGE. 99 * 100 * Machine dependent functions for kernel setup for Intel IQ80310 evaluation 101 * boards using RedBoot firmware. 102 */ 103 104 #include <sys/cdefs.h> 105 __KERNEL_RCSID(0, "$NetBSD: netwalker_machdep.c,v 1.21 2017/09/08 05:29:12 hkenken Exp $"); 106 107 #include "opt_evbarm_boardtype.h" 108 #include "opt_arm_debug.h" 109 #include "opt_cputypes.h" 110 #include "opt_ddb.h" 111 #include "opt_kgdb.h" 112 #include "opt_md.h" 113 #include "opt_com.h" 114 #include "imxuart.h" 115 #include "opt_imxuart.h" 116 #include "opt_imx.h" 117 #include "opt_imx51_ipuv3.h" 118 #include "opt_machdep.h" 119 120 #include <sys/param.h> 121 #include <sys/device.h> 122 #include <sys/reboot.h> 123 #include <sys/termios.h> 124 #include <sys/bus.h> 125 126 #include "genfb.h" 127 #include "netwalker_backlight.h" 128 #include "netwalker_backlightvar.h" 129 130 #include <machine/db_machdep.h> 131 #ifdef KGDB 132 #include <sys/kgdb.h> 133 #endif 134 135 #include <machine/bootconfig.h> 136 #include <machine/autoconf.h> 137 138 #include <arm/arm32/machdep.h> 139 140 #include <arm/imx/imx51reg.h> 141 #include <arm/imx/imx51var.h> 142 #include <arm/imx/imxgpioreg.h> 143 #include <arm/imx/imxwdogreg.h> 144 #include <arm/imx/imxuartreg.h> 145 #include <arm/imx/imxuartvar.h> 146 #include <arm/imx/imx51_iomuxreg.h> 147 #include <arm/imx/imxgpiovar.h> 148 149 #include <evbarm/netwalker/netwalker_reg.h> 150 #include <evbarm/netwalker/netwalker.h> 151 152 #include "ukbd.h" 153 #if (NUKBD > 0) 154 #include <dev/usb/ukbdvar.h> 155 #endif 156 157 /* Kernel text starts 1MB in from the bottom of the kernel address space. */ 158 #define KERNEL_TEXT_BASE (KERNEL_BASE + 0x00100000) 159 160 BootConfig bootconfig; /* Boot config storage */ 161 static char bootargs[MAX_BOOT_STRING] = BOOT_ARGS; 162 char *boot_args = NULL; 163 164 extern char KERNEL_BASE_phys[]; 165 166 extern int cpu_do_powersave; 167 168 /* 169 * Macros to translate between physical and virtual for a subset of the 170 * kernel address space. *Not* for general use. 171 */ 172 #define KERNEL_BASE_PHYS ((paddr_t)KERNEL_BASE_phys) 173 174 175 /* Prototypes */ 176 177 void consinit(void); 178 179 #ifdef KGDB 180 void kgdb_port_init(void); 181 #endif 182 183 static void init_clocks(void); 184 static void setup_ioports(void); 185 186 static void netwalker_device_register(device_t, void *); 187 188 #ifndef CONSPEED 189 #define CONSPEED B115200 /* What RedBoot uses */ 190 #endif 191 #ifndef CONMODE 192 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 193 #endif 194 195 int comcnspeed = CONSPEED; 196 int comcnmode = CONMODE; 197 198 /* 199 * Static device mappings. These peripheral registers are mapped at 200 * fixed virtual addresses very early in netwalker_start() so that we 201 * can use them while booting the kernel, and stay at the same address 202 * throughout whole kernel's life time. 203 * 204 * We use this table twice; once with bootstrap page table, and once 205 * with kernel's page table which we build up in initarm(). 206 */ 207 208 #define _A(a) ((a) & ~L1_S_OFFSET) 209 #define _S(s) (((s) + L1_S_SIZE - 1) & ~(L1_S_SIZE-1)) 210 211 static const struct pmap_devmap netwalker_devmap[] = { 212 { 213 /* for UART1, IOMUXC */ 214 .pd_va = _A(NETWALKER_IO_VBASE0), 215 .pd_pa = _A(NETWALKER_IO_PBASE0), 216 .pd_size = _S(L1_S_SIZE * 4), 217 .pd_prot = VM_PROT_READ|VM_PROT_WRITE, 218 .pd_cache = PTE_NOCACHE 219 }, 220 {0} 221 }; 222 223 #undef _A 224 #undef _S 225 226 #ifndef MEMSTART 227 #define MEMSTART 0x90000000 228 #endif 229 #ifndef MEMSIZE 230 #define MEMSIZE 512 231 #endif 232 233 /* 234 * u_int initarm(...) 235 * 236 * Initial entry point on startup. This gets called before main() is 237 * entered. 238 * It should be responsible for setting up everything that must be 239 * in place when main is called. 240 * This includes 241 * Taking a copy of the boot configuration structure. 242 * Initialising the physical console so characters can be printed. 243 * Setting up page tables for the kernel 244 * Relocating the kernel to the bottom of physical memory 245 */ 246 u_int 247 initarm(void *arg) 248 { 249 /* 250 * Heads up ... Setup the CPU / MMU / TLB functions 251 */ 252 if (set_cpufuncs()) 253 panic("cpu not recognized!"); 254 255 /* map some peripheral registers */ 256 pmap_devmap_bootstrap((vaddr_t)armreg_ttbr_read() & -L1_TABLE_SIZE, 257 netwalker_devmap); 258 259 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT); 260 261 /* Register devmap for devices we mapped in start */ 262 pmap_devmap_register(netwalker_devmap); 263 setup_ioports(); 264 265 consinit(); 266 267 #ifdef NO_POWERSAVE 268 cpu_do_powersave=0; 269 #endif 270 271 init_clocks(); 272 273 #ifdef KGDB 274 kgdb_port_init(); 275 #endif 276 277 /* Talk to the user */ 278 printf("\nNetBSD/evbarm (" ___STRING(EVBARM_BOARDTYPE) ") booting ...\n"); 279 280 #ifdef BOOT_ARGS 281 char mi_bootargs[] = BOOT_ARGS; 282 parse_mi_bootargs(mi_bootargs); 283 #endif 284 285 #if defined(VERBOSE_INIT_ARM) || 1 286 printf("initarm: Configuring system"); 287 printf(", CLIDR=%010o CTR=%#x", 288 armreg_clidr_read(), armreg_ctr_read()); 289 printf("\n"); 290 #endif 291 /* 292 * Ok we have the following memory map 293 * 294 * Physical Address Range Description 295 * ----------------------- ---------------------------------- 296 * 297 * 0x90000000 - 0xAFFFFFFF DDR SDRAM (512MByte) 298 * 299 * The initarm() has the responsibility for creating the kernel 300 * page tables. 301 * It must also set up various memory pointers that are used 302 * by pmap etc. 303 */ 304 305 #ifdef VERBOSE_INIT_ARM 306 printf("initarm: Configuring system ...\n"); 307 #endif 308 /* Fake bootconfig structure for the benefit of pmap.c */ 309 /* XXX must make the memory description h/w independent */ 310 bootconfig.dramblocks = 1; 311 bootconfig.dram[0].address = MEMSTART; 312 bootconfig.dram[0].pages = (MEMSIZE * 1024 * 1024) / PAGE_SIZE; 313 314 psize_t ram_size = bootconfig.dram[0].pages * PAGE_SIZE; 315 316 #ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS 317 if (ram_size > KERNEL_VM_BASE - KERNEL_BASE) { 318 printf("%s: dropping RAM size from %luMB to %uMB\n", 319 __func__, (unsigned long) (ram_size >> 20), 320 (KERNEL_VM_BASE - KERNEL_BASE) >> 20); 321 ram_size = KERNEL_VM_BASE - KERNEL_BASE; 322 } 323 #endif 324 325 arm32_bootmem_init(bootconfig.dram[0].address, ram_size, 326 KERNEL_BASE_PHYS); 327 328 #ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS 329 const bool mapallmem_p = true; 330 KASSERT(ram_size <= KERNEL_VM_BASE - KERNEL_BASE); 331 #else 332 const bool mapallmem_p = false; 333 #endif 334 335 arm32_kernel_vm_init(KERNEL_VM_BASE, ARM_VECTORS_HIGH, 0, 336 netwalker_devmap, mapallmem_p); 337 338 /* disable power down counter in watch dog, 339 This must be done within 16 seconds of start-up. */ 340 ioreg16_write(NETWALKER_WDOG_VBASE + IMX_WDOG_WMCR, 0); 341 342 #ifdef BOOTHOWTO 343 boothowto |= BOOTHOWTO; 344 #endif 345 346 boot_args = bootargs; 347 parse_mi_bootargs(boot_args); 348 printf("boot_args : %s\n", boot_args); 349 350 /* we've a specific device_register routine */ 351 evbarm_device_register = netwalker_device_register; 352 353 #ifdef VERBOSE_INIT_ARM 354 printf("initarm done.\n"); 355 #endif 356 return initarm_common(KERNEL_VM_BASE, KERNEL_VM_SIZE, NULL, 0); 357 } 358 359 360 static void 361 init_clocks(void) 362 { 363 cortex_pmc_ccnt_init(); 364 } 365 366 struct iomux_setup { 367 /* iomux registers are 32-bit wide, but upper 16 bits are not 368 * used. */ 369 uint16_t reg; 370 uint16_t val; 371 }; 372 373 #define IOMUX_M(padname, mux) \ 374 IOMUX_DATA(__CONCAT(IOMUXC_SW_MUX_CTL_PAD_,padname), mux) 375 376 #define IOMUX_P(padname, pad) \ 377 IOMUX_DATA(__CONCAT(IOMUXC_SW_PAD_CTL_PAD_,padname), pad) 378 379 #define IOMUX_MP(padname, mux, pad) \ 380 IOMUX_M(padname, mux), \ 381 IOMUX_P(padname, pad) 382 383 384 #define IOMUX_DATA(offset, value) \ 385 { \ 386 .reg = (offset), \ 387 .val = (value), \ 388 } 389 390 391 /* 392 * set same values to IOMUX registers as linux kernel does 393 */ 394 const struct iomux_setup iomux_setup_data[] = { 395 #define HYS PAD_CTL_HYS 396 #define ODE PAD_CTL_ODE 397 #define DSEHIGH PAD_CTL_DSE_HIGH 398 #define DSEMID PAD_CTL_DSE_MID 399 #define DSELOW PAD_CTL_DSE_LOW 400 #define DSEMAX PAD_CTL_DSE_MAX 401 #define SRE PAD_CTL_SRE 402 #define KEEPER PAD_CTL_KEEPER 403 #define PULL PAD_CTL_PULL 404 #define PU_22K PAD_CTL_PUS_22K_PU 405 #define PU_47K PAD_CTL_PUS_47K_PU 406 #define PU_100K PAD_CTL_PUS_100K_PU 407 #define PD_100K PAD_CTL_PUS_100K_PD 408 #define HVE PAD_CTL_HVE /* Low output voltage */ 409 410 #define ALT0 IOMUX_CONFIG_ALT0 411 #define ALT1 IOMUX_CONFIG_ALT1 412 #define ALT2 IOMUX_CONFIG_ALT2 413 #define ALT3 IOMUX_CONFIG_ALT3 414 #define ALT4 IOMUX_CONFIG_ALT4 415 #define ALT5 IOMUX_CONFIG_ALT5 416 #define ALT6 IOMUX_CONFIG_ALT6 417 #define ALT7 IOMUX_CONFIG_ALT7 418 #define SION IOMUX_CONFIG_SION 419 420 /* left button */ 421 IOMUX_MP(EIM_EB2, ALT1, HYS), 422 /* right button */ 423 IOMUX_MP(EIM_EB3, ALT1, HYS), 424 425 /* UART1 */ 426 IOMUX_MP(UART1_RXD, ALT0, HYS | PULL | DSEHIGH | SRE), 427 IOMUX_MP(UART1_TXD, ALT0, HYS | PULL | DSEHIGH | SRE), 428 IOMUX_MP(UART1_RTS, ALT0, HYS | PULL | DSEHIGH), 429 IOMUX_MP(UART1_CTS, ALT0, HYS | PULL | DSEHIGH), 430 431 /* LCD Display */ 432 IOMUX_M(DI1_PIN2, ALT0), 433 IOMUX_M(DI1_PIN3, ALT0), 434 435 IOMUX_DATA(IOMUXC_SW_PAD_CTL_GRP_DISP1_PKE0, PAD_CTL_PKE), 436 #if 0 437 IOMUX_MP(DISP1_DAT0, ALT0, SRE | DSEMAX | PULL), 438 IOMUX_MP(DISP1_DAT1, ALT0, SRE | DSEMAX | PULL), 439 IOMUX_MP(DISP1_DAT2, ALT0, SRE | DSEMAX | PULL), 440 IOMUX_MP(DISP1_DAT3, ALT0, SRE | DSEMAX | PULL), 441 IOMUX_MP(DISP1_DAT4, ALT0, SRE | DSEMAX | PULL), 442 IOMUX_MP(DISP1_DAT5, ALT0, SRE | DSEMAX | PULL), 443 #endif 444 IOMUX_M(DISP1_DAT6, ALT0), 445 IOMUX_M(DISP1_DAT7, ALT0), 446 IOMUX_M(DISP1_DAT8, ALT0), 447 IOMUX_M(DISP1_DAT9, ALT0), 448 IOMUX_M(DISP1_DAT10, ALT0), 449 IOMUX_M(DISP1_DAT11, ALT0), 450 IOMUX_M(DISP1_DAT12, ALT0), 451 IOMUX_M(DISP1_DAT13, ALT0), 452 IOMUX_M(DISP1_DAT14, ALT0), 453 IOMUX_M(DISP1_DAT15, ALT0), 454 IOMUX_M(DISP1_DAT16, ALT0), 455 IOMUX_M(DISP1_DAT17, ALT0), 456 IOMUX_M(DISP1_DAT18, ALT0), 457 IOMUX_M(DISP1_DAT19, ALT0), 458 IOMUX_M(DISP1_DAT20, ALT0), 459 IOMUX_M(DISP1_DAT21, ALT0), 460 IOMUX_M(DISP1_DAT22, ALT0), 461 IOMUX_M(DISP1_DAT23, ALT0), 462 463 IOMUX_MP(DI1_D0_CS, ALT4, KEEPER | DSEHIGH | SRE), /* GPIO3_3 */ 464 IOMUX_DATA(IOMUXC_GPIO3_IPP_IND_G_IN_3_SELECT_INPUT, INPUT_DAISY_0), 465 IOMUX_MP(CSI2_D12, ALT3, KEEPER | DSEHIGH | SRE), /* GPIO4_9 */ 466 IOMUX_MP(CSI2_D13, ALT3, KEEPER | DSEHIGH | SRE), 467 IOMUX_MP(GPIO1_2, ALT1, DSEHIGH | ODE), /* LCD backlight by PWM */ 468 469 IOMUX_MP(EIM_A19, ALT1, SRE | DSEHIGH), /* GPIO2_13 */ 470 471 /* XXX VGA pins */ 472 IOMUX_M(DI_GP4, ALT4), 473 IOMUX_MP(GPIO1_8, SION | ALT0, HYS | DSEMID | PU_100K), 474 475 /* I2C1 */ 476 IOMUX_MP(EIM_D16, SION | ALT4, HYS | ODE | DSEHIGH | SRE), /* SDA */ 477 IOMUX_MP(EIM_D19, SION | ALT4, SRE), /* SCL */ 478 IOMUX_DATA(IOMUXC_I2C1_IPP_SDA_IN_SELECT_INPUT, INPUT_DAISY_0), 479 IOMUX_DATA(IOMUXC_I2C1_IPP_SCL_IN_SELECT_INPUT, INPUT_DAISY_0), 480 481 IOMUX_M(EIM_A23, ALT1), /* GPIO2_17 */ 482 483 /* BT */ 484 IOMUX_M(EIM_D20, ALT1), /* GPIO2_4 BT host wakeup */ 485 IOMUX_M(EIM_D22, ALT1), /* GPIO2_6 BT RESET */ 486 IOMUX_M(EIM_D23, ALT1), /* GPIO2_7 BT wakeup */ 487 488 /* UART3 */ 489 IOMUX_MP(EIM_D24, ALT3, KEEPER | PU_100K | DSEHIGH | SRE), 490 IOMUX_MP(EIM_D25, ALT3, KEEPER | PU_100K | DSEHIGH | SRE), /* CTS */ 491 IOMUX_MP(EIM_D26, ALT3, KEEPER | PU_100K | DSEHIGH | SRE), /* TXD */ 492 IOMUX_MP(EIM_D27, ALT3, KEEPER | PU_100K | DSEHIGH | SRE), /* RTS */ 493 IOMUX_M(NANDF_D15, ALT3), /* GPIO3_25 */ 494 IOMUX_MP(NANDF_D14, ALT3, HYS | PULL | PU_100K ), /* GPIO3_26 */ 495 IOMUX_DATA(IOMUXC_UART3_IPP_UART_RTS_B_SELECT_INPUT, INPUT_DAISY_3), 496 497 /* OJ6SH-T25 */ 498 IOMUX_M(CSI1_D9, ALT3), /* GPIO3_13 */ 499 IOMUX_M(CSI1_VSYNC, ALT3), /* GPIO3_14 */ 500 IOMUX_M(CSI1_HSYNC, ALT3), /* GPIO3_15 */ 501 502 /* audio pins */ 503 IOMUX_MP(AUD3_BB_TXD, ALT0, DSEHIGH | PU_100K | SRE), 504 /* XXX: linux code: 505 (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | 506 PAD_CTL_100K_PU | PAD_CTL_HYS_NONE | 507 PAD_CTL_DDR_INPUT_CMOS | PAD_CTL_DRV_VOT_LOW), */ 508 509 IOMUX_MP(AUD3_BB_RXD, ALT0, KEEPER | DSEHIGH | SRE), 510 IOMUX_MP(AUD3_BB_CK, ALT0, KEEPER | DSEHIGH | SRE), 511 IOMUX_MP(AUD3_BB_FS, ALT0, KEEPER | DSEHIGH | SRE), 512 513 /* headphone detect */ 514 IOMUX_MP(NANDF_D14, ALT3, HYS | PULL | PU_100K), 515 IOMUX_MP(CSPI1_RDY, ALT3, SRE | DSEHIGH), 516 /* XXX more audio pins ? */ 517 518 /* CSPI */ 519 IOMUX_MP(CSPI1_MOSI, ALT0, HYS | PULL | PD_100K | DSEHIGH | SRE), 520 IOMUX_MP(CSPI1_MISO, ALT0, HYS | PULL | PD_100K | DSEHIGH | SRE), 521 IOMUX_MP(CSPI1_SCLK, ALT0, HYS | PULL | PD_100K | DSEHIGH | SRE), 522 523 /* SPI CS */ 524 IOMUX_MP(CSPI1_SS0, ALT3, HYS | KEEPER | DSEHIGH | SRE), /* GPIO4[24] */ 525 IOMUX_MP(CSPI1_SS1, ALT3, HYS | KEEPER | DSEHIGH | SRE), /* GPIO4[25] */ 526 IOMUX_MP(DI1_PIN11, ALT4, HYS | PULL | DSEHIGH | SRE), /* GPIO3[0] */ 527 528 /* 26M Osc */ 529 IOMUX_MP(DI1_PIN12, ALT4, KEEPER | DSEHIGH | SRE), /* GPIO3_1 */ 530 531 /* I2C2 */ 532 IOMUX_MP(KEY_COL5, SION | ALT3, HYS | ODE | DSEHIGH | SRE), /* SDA */ 533 IOMUX_MP(KEY_COL4, SION | ALT3, SRE), /* SCL */ 534 IOMUX_DATA(IOMUXC_I2C2_IPP_SCL_IN_SELECT_INPUT, INPUT_DAISY_1), 535 IOMUX_DATA(IOMUXC_I2C2_IPP_SDA_IN_SELECT_INPUT, INPUT_DAISY_1), 536 537 /* NAND */ 538 IOMUX_MP(NANDF_WE_B, ALT0, HVE | DSEHIGH | PULL | PU_47K), 539 IOMUX_MP(NANDF_RE_B, ALT0, HVE | DSEHIGH | PULL | PU_47K), 540 IOMUX_MP(NANDF_ALE, ALT0, HVE | DSEHIGH | KEEPER), 541 IOMUX_MP(NANDF_CLE, ALT0, HVE | DSEHIGH | KEEPER), 542 IOMUX_MP(NANDF_WP_B, ALT0, HVE | DSEHIGH | PULL | PU_100K), 543 IOMUX_MP(NANDF_RB0, ALT0, HVE | DSELOW | PULL | PU_100K), 544 IOMUX_MP(NANDF_RB1, ALT0, HVE | DSELOW | PULL | PU_100K), 545 IOMUX_MP(NANDF_D7, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 546 IOMUX_MP(NANDF_D6, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 547 IOMUX_MP(NANDF_D5, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 548 IOMUX_MP(NANDF_D4, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 549 IOMUX_MP(NANDF_D3, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 550 IOMUX_MP(NANDF_D2, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 551 IOMUX_MP(NANDF_D1, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 552 IOMUX_MP(NANDF_D0, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 553 554 /* Batttery pins */ 555 IOMUX_MP(NANDF_D13, ALT3, HYS | DSEHIGH), 556 IOMUX_MP(NANDF_D12, ALT3, HYS | DSEHIGH), 557 #if 0 558 IOMUX_MP(NANDF_D11, ALT3, HYS | DSEHIGH), 559 #endif 560 IOMUX_MP(NANDF_D10, ALT3, HYS | DSEHIGH), 561 562 /* SD1 */ 563 IOMUX_MP(SD1_CMD, SION | ALT0, DSEHIGH | SRE), 564 IOMUX_MP(SD1_CLK, SION | ALT0, KEEPER | PU_47K | DSEHIGH), 565 IOMUX_MP(SD1_DATA0, ALT0, DSEHIGH | SRE), 566 IOMUX_MP(SD1_DATA1, ALT0, DSEHIGH | SRE), 567 IOMUX_MP(SD1_DATA2, ALT0, DSEHIGH | SRE), 568 IOMUX_MP(SD1_DATA3, ALT0, DSEHIGH | SRE), 569 IOMUX_MP(GPIO1_0, SION | ALT0, HYS | PU_100K), 570 571 /* SD2 */ 572 IOMUX_P(SD2_CMD, HVE | PU_22K | DSEMAX | SRE), 573 IOMUX_P(SD2_CLK, HVE | PU_22K | DSEMAX | SRE), 574 IOMUX_P(SD2_DATA0, HVE | PU_22K | DSEMAX | SRE), 575 IOMUX_P(SD2_DATA1, HVE | PU_22K | DSEMAX | SRE), 576 IOMUX_P(SD2_DATA2, HVE | PU_22K | DSEMAX | SRE), 577 IOMUX_P(SD2_DATA3, HVE | PU_22K | DSEMAX | SRE), 578 579 /* USB */ 580 IOMUX_MP(USBH1_CLK, ALT0, HYS | KEEPER | DSEHIGH | SRE), 581 IOMUX_MP(USBH1_DIR, ALT0, HYS | KEEPER | DSEHIGH | SRE), 582 IOMUX_MP(USBH1_STP, ALT0, HYS | KEEPER | DSEHIGH | SRE), 583 IOMUX_MP(USBH1_NXT, ALT0, HYS | KEEPER | PU_100K | DSEHIGH | SRE), 584 IOMUX_MP(USBH1_DATA0, ALT0, HYS | KEEPER | DSEHIGH | SRE), 585 IOMUX_MP(USBH1_DATA1, ALT0, HYS | KEEPER | DSEHIGH | SRE), 586 IOMUX_MP(USBH1_DATA2, ALT0, HYS | KEEPER | DSEHIGH | SRE), 587 IOMUX_MP(USBH1_DATA3, ALT0, HYS | KEEPER | DSEHIGH | SRE), 588 IOMUX_MP(USBH1_DATA4, ALT0, HYS | KEEPER | DSEHIGH | SRE), 589 IOMUX_MP(USBH1_DATA5, ALT0, HYS | KEEPER | DSEHIGH | SRE), 590 IOMUX_MP(USBH1_DATA6, ALT0, HYS | KEEPER | DSEHIGH | SRE), 591 IOMUX_MP(USBH1_DATA7, ALT0, HYS | KEEPER | DSEHIGH | SRE), 592 IOMUX_MP(EIM_D17, ALT1, KEEPER | DSEHIGH | SRE), 593 IOMUX_MP(EIM_D21, ALT1, KEEPER | DSEHIGH | SRE), 594 IOMUX_P(GPIO1_7, /*ALT0,*/ DSEHIGH | SRE), /* USB Hub reset */ 595 596 #undef ODE 597 #undef HYS 598 #undef SRE 599 #undef PULL 600 #undef KEEPER 601 #undef PU_22K 602 #undef PU_47K 603 #undef PU_100K 604 #undef PD_100K 605 #undef HVE 606 #undef DSEMAX 607 #undef DSEHIGH 608 #undef DSEMID 609 #undef DSELOW 610 611 #undef ALT0 612 #undef ALT1 613 #undef ALT2 614 #undef ALT3 615 #undef ALT4 616 #undef ALT5 617 #undef ALT6 618 #undef ALT7 619 #undef SION 620 }; 621 622 static void 623 setup_ioports(void) 624 { 625 int i; 626 const struct iomux_setup *p; 627 628 /* Initialize all IOMUX registers */ 629 for (i=0; i < __arraycount(iomux_setup_data); ++i) { 630 p = iomux_setup_data + i; 631 632 ioreg_write(NETWALKER_IOMUXC_VBASE + p->reg, 633 p->val); 634 } 635 } 636 637 638 #ifdef CONSDEVNAME 639 const char consdevname[] = CONSDEVNAME; 640 641 #ifndef CONMODE 642 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 643 #endif 644 #ifndef CONSPEED 645 #define CONSPEED 115200 646 #endif 647 648 int consmode = CONMODE; 649 int consrate = CONSPEED; 650 651 #endif /* CONSDEVNAME */ 652 653 #ifndef IMXUART_FREQ 654 #define IMXUART_FREQ 66500000 655 #endif 656 657 void 658 consinit(void) 659 { 660 static int consinit_called = 0; 661 662 if (consinit_called) 663 return; 664 665 consinit_called = 1; 666 667 #ifdef CONSDEVNAME 668 669 #if NIMXUART > 0 670 imxuart_set_frequency(IMXUART_FREQ, 2); 671 #endif 672 673 #if (NIMXUART > 0) && defined(IMXUARTCONSOLE) 674 if (strcmp(consdevname, "imxuart") == 0) { 675 paddr_t consaddr; 676 #ifdef CONADDR 677 consaddr = CONADDR; 678 #else 679 consaddr = IMX51_UART1_BASE; 680 #endif 681 imxuart_cnattach(&armv7_generic_bs_tag, consaddr, consrate, consmode); 682 return; 683 } 684 #endif 685 #endif 686 } 687 688 static void 689 netwalker_device_register(device_t self, void *aux) 690 { 691 prop_dictionary_t dict = device_properties(self); 692 693 #if NGENFB > 0 694 if (device_is_a(self, "genfb")) { 695 char *ptr; 696 if (get_bootconf_option(boot_args, "console", 697 BOOTOPT_TYPE_STRING, &ptr) && strncmp(ptr, "fb", 2) == 0) { 698 prop_dictionary_set_bool(dict, "is_console", true); 699 #if NUKBD > 0 700 ukbd_cnattach(); 701 #endif 702 } else { 703 prop_dictionary_set_bool(dict, "is_console", false); 704 } 705 #if NNETWALKER_BACKLIGHT > 0 706 netwalker_backlight_genfb_parameter_set(dict); 707 #endif 708 } 709 #endif 710 } 711 712 #ifdef KGDB 713 #ifndef KGDB_DEVNAME 714 #define KGDB_DEVNAME "imxuart" 715 #endif 716 #ifndef KGDB_DEVMODE 717 #define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 718 #endif 719 720 const char kgdb_devname[20] = KGDB_DEVNAME; 721 int kgdb_mode = KGDB_DEVMODE; 722 int kgdb_addr = KGDB_DEVADDR; 723 extern int kgdb_rate; /* defined in kgdb_stub.c */ 724 725 void 726 kgdb_port_init(void) 727 { 728 #if (NIMXUART > 0) 729 if (strcmp(kgdb_devname, "imxuart") == 0) { 730 imxuart_kgdb_attach(&armv7_generic_bs_tag, kgdb_addr, 731 kgdb_rate, kgdb_mode); 732 return; 733 } 734 735 #endif 736 } 737 #endif 738 739 740
Indexes created Wed Oct 01 13:09:50 GMT 2025