netwalker_machdep.c revision 1.6
1 /* $NetBSD: netwalker_machdep.c,v 1.6 2012/04/15 10:34:14 bsh Exp $ */ 2 3 /* 4 * Copyright (c) 2002, 2003, 2005, 2010 Genetec Corporation. 5 * All rights reserved. 6 * Written by Hiroyuki Bessho for Genetec Corporation. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 19 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION 21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 * POSSIBILITY OF SUCH DAMAGE. 28 * 29 * Machine dependent functions for kernel setup for Sharp Netwalker. 30 * Based on iq80310_machhdep.c 31 */ 32 /* 33 * Copyright (c) 2001 Wasabi Systems, Inc. 34 * All rights reserved. 35 * 36 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 37 * 38 * Redistribution and use in source and binary forms, with or without 39 * modification, are permitted provided that the following conditions 40 * are met: 41 * 1. Redistributions of source code must retain the above copyright 42 * notice, this list of conditions and the following disclaimer. 43 * 2. Redistributions in binary form must reproduce the above copyright 44 * notice, this list of conditions and the following disclaimer in the 45 * documentation and/or other materials provided with the distribution. 46 * 3. All advertising materials mentioning features or use of this software 47 * must display the following acknowledgement: 48 * This product includes software developed for the NetBSD Project by 49 * Wasabi Systems, Inc. 50 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 51 * or promote products derived from this software without specific prior 52 * written permission. 53 * 54 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 55 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 56 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 57 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 58 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 59 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 60 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 61 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 62 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 63 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 64 * POSSIBILITY OF SUCH DAMAGE. 65 */ 66 67 /* 68 * Copyright (c) 1997,1998 Mark Brinicombe. 69 * Copyright (c) 1997,1998 Causality Limited. 70 * All rights reserved. 71 * 72 * Redistribution and use in source and binary forms, with or without 73 * modification, are permitted provided that the following conditions 74 * are met: 75 * 1. Redistributions of source code must retain the above copyright 76 * notice, this list of conditions and the following disclaimer. 77 * 2. Redistributions in binary form must reproduce the above copyright 78 * notice, this list of conditions and the following disclaimer in the 79 * documentation and/or other materials provided with the distribution. 80 * 3. All advertising materials mentioning features or use of this software 81 * must display the following acknowledgement: 82 * This product includes software developed by Mark Brinicombe 83 * for the NetBSD Project. 84 * 4. The name of the company nor the name of the author may be used to 85 * endorse or promote products derived from this software without specific 86 * prior written permission. 87 * 88 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 89 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 90 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 91 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 92 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 93 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 94 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 95 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 96 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 97 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 98 * SUCH DAMAGE. 99 * 100 * Machine dependent functions for kernel setup for Intel IQ80310 evaluation 101 * boards using RedBoot firmware. 102 */ 103 104 #include <sys/cdefs.h> 105 __KERNEL_RCSID(0, "$NetBSD: netwalker_machdep.c,v 1.6 2012/04/15 10:34:14 bsh Exp $"); 106 107 #include "opt_ddb.h" 108 #include "opt_kgdb.h" 109 #include "opt_ipkdb.h" 110 #include "opt_pmap_debug.h" 111 #include "opt_md.h" 112 #include "opt_com.h" 113 #include "imxuart.h" 114 #include "opt_imxuart.h" 115 #include "opt_imx.h" 116 117 #include <sys/param.h> 118 #include <sys/device.h> 119 #include <sys/systm.h> 120 #include <sys/kernel.h> 121 #include <sys/exec.h> 122 #include <sys/proc.h> 123 #include <sys/msgbuf.h> 124 #include <sys/reboot.h> 125 #include <sys/termios.h> 126 #include <sys/ksyms.h> 127 128 #include <uvm/uvm_extern.h> 129 130 #include <sys/conf.h> 131 #include <dev/cons.h> 132 #include <dev/md.h> 133 134 #include <machine/db_machdep.h> 135 #include <ddb/db_sym.h> 136 #include <ddb/db_extern.h> 137 #ifdef KGDB 138 #include <sys/kgdb.h> 139 #endif 140 141 #include <machine/bootconfig.h> 142 #include <sys/bus.h> 143 #include <machine/cpu.h> 144 #include <machine/frame.h> 145 #include <arm/undefined.h> 146 147 #include <arm/arm32/pte.h> 148 #include <arm/arm32/machdep.h> 149 150 #include <arm/imx/imx51reg.h> 151 #include <arm/imx/imx51var.h> 152 #include <arm/imx/imxgpioreg.h> 153 #include <arm/imx/imxwdogreg.h> 154 #include <arm/imx/imxuartreg.h> 155 #include <arm/imx/imxuartvar.h> 156 #include <arm/imx/imx51_iomuxreg.h> 157 #include <evbarm/netwalker/netwalker_reg.h> 158 159 /* Kernel text starts 1MB in from the bottom of the kernel address space. */ 160 #define KERNEL_TEXT_BASE (KERNEL_BASE + 0x00100000) 161 #define KERNEL_VM_BASE (KERNEL_BASE + 0x01000000) 162 163 /* 164 * The range 0xc1000000 - 0xccffffff is available for kernel VM space 165 * Core-logic registers and I/O mappings occupy 0xfd000000 - 0xffffffff 166 */ 167 #define KERNEL_VM_SIZE 0x0C000000 168 169 170 /* 171 * Address to call from cpu_reset() to reset the machine. 172 * This is machine architecture dependent as it varies depending 173 * on where the ROM appears when you turn the MMU off. 174 */ 175 176 u_int cpu_reset_address = 0; 177 178 /* Define various stack sizes in pages */ 179 #define FIQ_STACK_SIZE 1 180 #define IRQ_STACK_SIZE 1 181 #define ABT_STACK_SIZE 1 182 #ifdef IPKDB 183 #define UND_STACK_SIZE 2 184 #else 185 #define UND_STACK_SIZE 1 186 #endif 187 188 BootConfig bootconfig; /* Boot config storage */ 189 char *boot_args = NULL; 190 char *boot_file = NULL; 191 192 vm_offset_t physical_start; 193 vm_offset_t physical_freestart; 194 vm_offset_t physical_freeend; 195 vm_offset_t physical_end; 196 u_int free_pages; 197 vm_offset_t pagetables_start; 198 199 /*int debug_flags;*/ 200 #ifndef PMAP_STATIC_L1S 201 int max_processes = 64; /* Default number */ 202 #endif /* !PMAP_STATIC_L1S */ 203 204 /* Physical and virtual addresses for some global pages */ 205 pv_addr_t fiqstack; 206 pv_addr_t irqstack; 207 pv_addr_t undstack; 208 pv_addr_t abtstack; 209 pv_addr_t kernelstack; 210 211 vm_offset_t msgbufphys; 212 213 extern u_int data_abort_handler_address; 214 extern u_int prefetch_abort_handler_address; 215 extern u_int undefined_handler_address; 216 extern char KERNEL_BASE_phys[]; 217 extern char KERNEL_BASE_virt[]; 218 extern char etext[], __data_start[], _edata[], __bss_start[], __bss_end__[]; 219 extern char _end[]; 220 extern int cpu_do_powersave; 221 222 #define KERNEL_PT_SYS 0 /* Page table for mapping proc0 zero page */ 223 #define KERNEL_PT_KERNEL 1 /* Page table for mapping kernel */ 224 #define KERNEL_PT_KERNEL_NUM 4 225 #define KERNEL_PT_VMDATA (KERNEL_PT_KERNEL+KERNEL_PT_KERNEL_NUM) 226 /* Page tables for mapping kernel VM */ 227 #define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */ 228 #define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM) 229 230 pv_addr_t kernel_pt_table[NUM_KERNEL_PTS]; 231 232 /* 233 * Macros to translate between physical and virtual for a subset of the 234 * kernel address space. *Not* for general use. 235 */ 236 #define KERNEL_BASE_PHYS ((paddr_t)&KERNEL_BASE_phys) 237 #define KERNEL_BASE_VIRT ((vaddr_t)&KERNEL_BASE_virt) 238 #define KERN_VTOPHYS(va) \ 239 ((paddr_t)((vaddr_t)va - KERNEL_BASE_VIRT + KERNEL_BASE_PHYS)) 240 #define KERN_PHYSTOV(pa) \ 241 ((vaddr_t)((paddr_t)pa - KERNEL_BASE_PHYS + KERNEL_BASE_VIRT)) 242 243 244 /* Prototypes */ 245 246 void consinit(void); 247 #if 0 248 void process_kernel_args(char *); 249 #endif 250 251 #ifdef KGDB 252 void kgdb_port_init(void); 253 #endif 254 void change_clock(uint32_t v); 255 256 static void init_clocks(void); 257 static void setup_ioports(void); 258 #ifdef DEBUG_IOPORTS 259 void dump_registers(void); 260 #endif 261 262 bs_protos(bs_notimpl); 263 264 #ifndef CONSPEED 265 #define CONSPEED B115200 /* What RedBoot uses */ 266 #endif 267 #ifndef CONMODE 268 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 269 #endif 270 271 int comcnspeed = CONSPEED; 272 int comcnmode = CONMODE; 273 274 /* 275 * void cpu_reboot(int howto, char *bootstr) 276 * 277 * Reboots the system 278 * 279 * Deal with any syncing, unmounting, dumping and shutdown hooks, 280 * then reset the CPU. 281 */ 282 void 283 cpu_reboot(int howto, char *bootstr) 284 { 285 #ifdef DIAGNOSTIC 286 /* info */ 287 printf("boot: howto=%08x curproc=%p\n", howto, curproc); 288 #endif 289 290 /* 291 * If we are still cold then hit the air brakes 292 * and crash to earth fast 293 */ 294 if (cold) { 295 doshutdownhooks(); 296 pmf_system_shutdown(boothowto); 297 printf("The operating system has halted.\n"); 298 printf("Please press any key to reboot.\n\n"); 299 cngetc(); 300 printf("rebooting...\n"); 301 cpu_reset(); 302 /*NOTREACHED*/ 303 } 304 305 /* Disable console buffering */ 306 /* cnpollc(1);*/ 307 308 /* 309 * If RB_NOSYNC was not specified sync the discs. 310 * Note: Unless cold is set to 1 here, syslogd will die during the 311 * unmount. It looks like syslogd is getting woken up only to find 312 * that it cannot page part of the binary in as the filesystem has 313 * been unmounted. 314 */ 315 if (!(howto & RB_NOSYNC)) 316 bootsync(); 317 318 /* Say NO to interrupts */ 319 splhigh(); 320 321 /* Do a dump if requested. */ 322 if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP) 323 dumpsys(); 324 325 /* Run any shutdown hooks */ 326 doshutdownhooks(); 327 328 pmf_system_shutdown(boothowto); 329 330 /* Make sure IRQ's are disabled */ 331 IRQdisable; 332 333 if (howto & RB_HALT) { 334 printf("The operating system has halted.\n"); 335 printf("Please press any key to reboot.\n\n"); 336 cngetc(); 337 } 338 339 printf("rebooting...\n"); 340 cpu_reset(); 341 /*NOTREACHED*/ 342 } 343 344 /* 345 * Static device mappings. These peripheral registers are mapped at 346 * fixed virtual addresses very early in netwalker_start() so that we 347 * can use them while booting the kernel, and stay at the same address 348 * throughout whole kernel's life time. 349 * 350 * We use this table twice; once with bootstrap page table, and once 351 * with kernel's page table which we build up in initarm(). 352 */ 353 354 #define _A(a) ((a) & ~L1_S_OFFSET) 355 #define _S(s) (((s) + L1_S_SIZE - 1) & ~(L1_S_SIZE-1)) 356 357 static const struct pmap_devmap netwalker_devmap[] = { 358 { 359 /* for UART1, IOMUXC */ 360 NETWALKER_IO_VBASE0, 361 _A(NETWALKER_IO_PBASE0), 362 L1_S_SIZE * 4, 363 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE 364 }, 365 {0, 0, 0, 0, 0 } 366 }; 367 368 #ifndef MEMSTART 369 #define MEMSTART 0x90000000 370 #endif 371 #ifndef MEMSIZE 372 #define MEMSIZE 512 373 #endif 374 375 /* 376 * u_int initarm(...) 377 * 378 * Initial entry point on startup. This gets called before main() is 379 * entered. 380 * It should be responsible for setting up everything that must be 381 * in place when main is called. 382 * This includes 383 * Taking a copy of the boot configuration structure. 384 * Initialising the physical console so characters can be printed. 385 * Setting up page tables for the kernel 386 * Relocating the kernel to the bottom of physical memory 387 */ 388 u_int 389 initarm(void *arg) 390 { 391 int loop; 392 int loop1; 393 vaddr_t l1pagetable; 394 395 #ifdef RBFLAGS 396 boothowto |= RBFLAGS; 397 #endif 398 399 disable_interrupts(I32_bit|F32_bit); 400 /* XXX move to netwalker_start.S */ 401 402 /* Register devmap for devices we mapped in start */ 403 pmap_devmap_register(netwalker_devmap); 404 405 setup_ioports(); 406 407 consinit(); 408 409 #ifdef DEBUG_IOPORTS 410 dump_registers(); 411 #endif 412 413 /* 414 * Heads up ... Setup the CPU / MMU / TLB functions 415 */ 416 if (set_cpufuncs()) 417 panic("cpu not recognized!"); 418 419 #ifdef NO_POWERSAVE 420 cpu_do_powersave=0; 421 #endif 422 423 init_clocks(); 424 425 #ifdef KGDB 426 kgdb_port_init(); 427 #endif 428 429 /* Talk to the user */ 430 printf("\nNetBSD/evbarm (netwalker) booting ...\n"); 431 432 /* 433 * Ok we have the following memory map 434 * 435 * Physical Address Range Description 436 * ----------------------- ---------------------------------- 437 * 438 * 0x90000000 - 0x97FFFFFF DDR SDRAM (128MByte) 439 * 440 * The initarm() has the responsibility for creating the kernel 441 * page tables. 442 * It must also set up various memory pointers that are used 443 * by pmap etc. 444 */ 445 446 #if 0 447 /* 448 * Examine the boot args string for options we need to know about 449 * now. 450 */ 451 process_kernel_args((char *)nwbootinfo.bt_args); 452 #endif 453 454 #ifdef VERBOSE_INIT_ARM 455 printf("initarm: Configuring system ...\n"); 456 #endif 457 /* Fake bootconfig structure for the benefit of pmap.c */ 458 /* XXX must make the memory description h/w independent */ 459 bootconfig.dramblocks = 1; 460 bootconfig.dram[0].address = MEMSTART; 461 bootconfig.dram[0].pages = (MEMSIZE * 1024 * 1024)/ PAGE_SIZE; 462 463 /* 464 * Set up the variables that define the availablilty of 465 * physical memory. For now, we're going to set 466 * physical_freestart to 0x80100000 (where the kernel 467 * was loaded), and allocate the memory we need downwards. 468 * If we get too close to the bottom of SDRAM, we 469 * will panic. We will update physical_freestart and 470 * physical_freeend later to reflect what pmap_bootstrap() 471 * wants to see. 472 * 473 * XXX pmap_bootstrap() needs an enema. 474 */ 475 physical_start = bootconfig.dram[0].address; 476 physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE); 477 478 physical_freestart = 0x90000000UL; /* top of loadaddres */ 479 physical_freeend = 0x90100000UL; /* base of kernel */ 480 481 physmem = (physical_end - physical_start) / PAGE_SIZE; 482 483 #ifdef VERBOSE_INIT_ARM 484 /* Tell the user about the memory */ 485 printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem, 486 physical_start, physical_end - 1); 487 #endif 488 489 /* 490 * Okay, the kernel starts 1MB in from the bottom of physical 491 * memory. We are going to allocate our bootstrap pages downwards 492 * from there. 493 * 494 * We need to allocate some fixed page tables to get the kernel 495 * going. We allocate one page directory and a number of page 496 * tables and store the physical addresses in the kernel_pt_table 497 * array. 498 * 499 * The kernel page directory must be on a 16K boundary. The page 500 * tables must be on 4K boundaries. What we do is allocate the 501 * page directory on the first 16K boundary that we encounter, and 502 * the page tables on 4K boundaries otherwise. Since we allocate 503 * at least 3 L2 page tables, we are guaranteed to encounter at 504 * least one 16K aligned region. 505 */ 506 507 #ifdef VERBOSE_INIT_ARM 508 printf("Allocating page tables\n"); 509 #endif 510 511 free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE; 512 513 #ifdef VERBOSE_INIT_ARM 514 printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n", 515 physical_freestart, free_pages, free_pages); 516 #endif 517 518 /* Define a macro to simplify memory allocation */ 519 #define valloc_pages(var, np) \ 520 alloc_pages((var).pv_pa, (np)); \ 521 (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start; 522 523 #define alloc_pages(var, np) \ 524 physical_freeend -= ((np) * PAGE_SIZE); \ 525 if (physical_freeend < physical_freestart) \ 526 panic("initarm: out of memory"); \ 527 (var) = physical_freeend; \ 528 free_pages -= (np); \ 529 memset((char *)(var), 0, ((np) * PAGE_SIZE)); 530 531 loop1 = 0; 532 for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) { 533 /* Are we 16KB aligned for an L1 ? */ 534 if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0 535 && kernel_l1pt.pv_pa == 0) { 536 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE); 537 } else { 538 valloc_pages(kernel_pt_table[loop1], 539 L2_TABLE_SIZE / PAGE_SIZE); 540 ++loop1; 541 } 542 } 543 544 /* This should never be able to happen but better confirm that. */ 545 if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE-1)) != 0) 546 panic("initarm: Failed to align the kernel page directory"); 547 548 /* 549 * Allocate a page for the system page mapped to V0x00000000 550 * This page will just contain the system vectors and can be 551 * shared by all processes. 552 */ 553 valloc_pages(systempage, 1); 554 systempage.pv_va = ARM_VECTORS_HIGH; 555 556 /* Allocate stacks for all modes */ 557 valloc_pages(fiqstack, FIQ_STACK_SIZE); 558 valloc_pages(irqstack, IRQ_STACK_SIZE); 559 valloc_pages(abtstack, ABT_STACK_SIZE); 560 valloc_pages(undstack, UND_STACK_SIZE); 561 valloc_pages(kernelstack, UPAGES); 562 563 #ifdef VERBOSE_INIT_ARM 564 printf("FIQ stack: p0x%08lx v0x%08lx\n", fiqstack.pv_pa, 565 fiqstack.pv_va); 566 printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa, 567 irqstack.pv_va); 568 printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa, 569 abtstack.pv_va); 570 printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa, 571 undstack.pv_va); 572 printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa, 573 kernelstack.pv_va); 574 #endif 575 576 alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE); 577 578 /* 579 * Ok we have allocated physical pages for the primary kernel 580 * page tables 581 */ 582 583 #ifdef VERBOSE_INIT_ARM 584 printf("Creating L1 page table at p0x%08lx v0x%08lx\n", 585 kernel_l1pt.pv_pa, kernel_l1pt.pv_va); 586 #endif 587 588 /* 589 * Now we start construction of the L1 page table 590 * We start by mapping the L2 page tables into the L1. 591 * This means that we can replace L1 mappings later on if necessary 592 */ 593 l1pagetable = kernel_l1pt.pv_pa; 594 595 /* Map the L2 pages tables in the L1 page table */ 596 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH & ~(0x00400000 - 1), 597 &kernel_pt_table[KERNEL_PT_SYS]); 598 for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++) 599 pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000, 600 &kernel_pt_table[KERNEL_PT_KERNEL + loop]); 601 for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++) 602 pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000, 603 &kernel_pt_table[KERNEL_PT_VMDATA + loop]); 604 605 /* update the top of the kernel VM */ 606 pmap_curmaxkvaddr = 607 KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000); 608 609 #ifdef VERBOSE_INIT_ARM 610 printf("Mapping kernel\n"); 611 #endif 612 613 /* Now we fill in the L2 pagetable for the kernel static code/data */ 614 #define round_L_page(x) (((x) + L2_L_OFFSET) & L2_L_FRAME) 615 { 616 size_t textsize = round_L_page((size_t)etext - KERNEL_TEXT_BASE); 617 size_t totalsize = round_L_page((size_t)_end - KERNEL_TEXT_BASE); 618 u_int logical; 619 620 621 #ifdef VERBOSE_INIT_ARM 622 printf("%s: etext %lx, _end %lx\n", 623 __func__, (uintptr_t)etext, (uintptr_t)_end); 624 printf("%s: textsize %#lx, totalsize %#lx\n", 625 __func__, textsize, totalsize); 626 #endif 627 logical = 0x00100000; /* offset of kernel in RAM */ 628 629 /* Map text section read-only. */ 630 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical, 631 physical_start + logical, textsize, 632 VM_PROT_READ|VM_PROT_EXECUTE, PTE_CACHE); 633 634 /* Map data and bss sections read-write. */ 635 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical, 636 physical_start + logical, totalsize - textsize, 637 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 638 } 639 640 #ifdef VERBOSE_INIT_ARM 641 printf("Constructing L2 page tables\n"); 642 #endif 643 644 /* Map the stack pages */ 645 pmap_map_chunk(l1pagetable, fiqstack.pv_va, fiqstack.pv_pa, 646 FIQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 647 pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa, 648 IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 649 pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa, 650 ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 651 pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa, 652 UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 653 pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa, 654 UPAGES * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 655 656 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa, 657 L1_TABLE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_PAGETABLE); 658 659 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) { 660 pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va, 661 kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE, 662 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 663 } 664 665 /* Map the vector page. */ 666 #if 0 667 /* MULTI-ICE requires that page 0 is NC/NB so that it can download the 668 * cache-clean code there. */ 669 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa, 670 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE); 671 #else 672 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa, 673 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 674 #endif 675 676 /* 677 * map integrated peripherals at same address in l1pagetable 678 * so that we can continue to use console. 679 */ 680 pmap_devmap_bootstrap(l1pagetable, netwalker_devmap); 681 682 /* 683 * Now we have the real page tables in place so we can switch to them. 684 * Once this is done we will be running with the REAL kernel page 685 * tables. 686 */ 687 688 /* 689 * Update the physical_freestart/physical_freeend/free_pages 690 * variables. 691 */ 692 physical_freestart = physical_start + 693 (((((uintptr_t) _end) + PGOFSET) & ~PGOFSET) - KERNEL_BASE); 694 physical_freeend = physical_end; 695 free_pages = 696 (physical_freeend - physical_freestart) / PAGE_SIZE; 697 698 #ifdef VERBOSE_INIT_ARM 699 /* Tell the user about where all the bits and pieces live. */ 700 printf("%22s Physical Virtual Num\n", " "); 701 printf("%22s Starting Ending Starting Ending Pages\n", " "); 702 703 static const char mem_fmt[] = 704 "%20s: 0x%08lx 0x%08lx 0x%08lx 0x%08lx %d\n"; 705 static const char mem_fmt_nov[] = 706 "%20s: 0x%08lx 0x%08lx %d\n"; 707 708 printf(mem_fmt, "SDRAM", physical_start, physical_end-1, 709 KERN_PHYSTOV(physical_start), KERN_PHYSTOV(physical_end-1), 710 physmem); 711 printf(mem_fmt, "text section", 712 (paddr_t)KERNEL_BASE_phys, KERN_VTOPHYS(etext-1), 713 (vaddr_t)KERNEL_BASE_virt, (vaddr_t)etext-1, 714 (int)(round_L_page((size_t)etext - KERNEL_TEXT_BASE) / PAGE_SIZE)); 715 printf(mem_fmt, "data section", 716 KERN_VTOPHYS(__data_start), KERN_VTOPHYS(_edata), 717 (vaddr_t)__data_start, (vaddr_t)_edata, 718 (int)((round_page((vaddr_t)_edata) 719 - trunc_page((vaddr_t)__data_start)) / PAGE_SIZE)); 720 printf(mem_fmt, "bss section", 721 KERN_VTOPHYS(__bss_start), KERN_VTOPHYS(__bss_end__), 722 (vaddr_t)__bss_start, (vaddr_t)__bss_end__, 723 (int)((round_page((vaddr_t)__bss_end__) 724 - trunc_page((vaddr_t)__bss_start)) / PAGE_SIZE)); 725 printf(mem_fmt, "L1 page directory", 726 kernel_l1pt.pv_pa, kernel_l1pt.pv_pa + L1_TABLE_SIZE - 1, 727 kernel_l1pt.pv_va, kernel_l1pt.pv_va + L1_TABLE_SIZE - 1, 728 L1_TABLE_SIZE / PAGE_SIZE); 729 printf(mem_fmt, "Exception Vectors", 730 systempage.pv_pa, systempage.pv_pa + PAGE_SIZE - 1, 731 systempage.pv_va, systempage.pv_va + PAGE_SIZE - 1, 732 1); 733 printf(mem_fmt, "FIQ stack", 734 fiqstack.pv_pa, fiqstack.pv_pa + (FIQ_STACK_SIZE * PAGE_SIZE) - 1, 735 fiqstack.pv_va, fiqstack.pv_va + (FIQ_STACK_SIZE * PAGE_SIZE) - 1, 736 FIQ_STACK_SIZE); 737 printf(mem_fmt, "IRQ stack", 738 irqstack.pv_pa, irqstack.pv_pa + (IRQ_STACK_SIZE * PAGE_SIZE) - 1, 739 irqstack.pv_va, irqstack.pv_va + (IRQ_STACK_SIZE * PAGE_SIZE) - 1, 740 IRQ_STACK_SIZE); 741 printf(mem_fmt, "ABT stack", 742 abtstack.pv_pa, abtstack.pv_pa + (ABT_STACK_SIZE * PAGE_SIZE) - 1, 743 abtstack.pv_va, abtstack.pv_va + (ABT_STACK_SIZE * PAGE_SIZE) - 1, 744 ABT_STACK_SIZE); 745 printf(mem_fmt, "UND stack", 746 undstack.pv_pa, undstack.pv_pa + (UND_STACK_SIZE * PAGE_SIZE) - 1, 747 undstack.pv_va, undstack.pv_va + (UND_STACK_SIZE * PAGE_SIZE) - 1, 748 UND_STACK_SIZE); 749 printf(mem_fmt, "SVC stack", 750 kernelstack.pv_pa, kernelstack.pv_pa + (UPAGES * PAGE_SIZE) - 1, 751 kernelstack.pv_va, kernelstack.pv_va + (UPAGES * PAGE_SIZE) - 1, 752 UPAGES); 753 printf(mem_fmt_nov, "Message Buffer", 754 msgbufphys, msgbufphys + round_page(MSGBUFSIZE) - 1, round_page(MSGBUFSIZE) / PAGE_SIZE); 755 printf(mem_fmt, "Free Memory", physical_freestart, physical_freeend-1, 756 KERN_PHYSTOV(physical_freestart), KERN_PHYSTOV(physical_freeend-1), 757 free_pages); 758 #endif 759 760 /* Switch tables */ 761 #ifdef VERBOSE_INIT_ARM 762 printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n", 763 physical_freestart, free_pages, free_pages); 764 printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa); 765 #endif 766 767 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT); 768 cpu_setttb(kernel_l1pt.pv_pa); 769 cpu_tlb_flushID(); 770 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)); 771 772 /* 773 * Moved from cpu_startup() as data_abort_handler() references 774 * this during uvm init 775 */ 776 uvm_lwp_setuarea(&lwp0, kernelstack.pv_va); 777 778 #ifdef VERBOSE_INIT_ARM 779 printf("bootstrap done.\n"); 780 #endif 781 782 arm32_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL); 783 784 /* 785 * Pages were allocated during the secondary bootstrap for the 786 * stacks for different CPU modes. 787 * We must now set the r13 registers in the different CPU modes to 788 * point to these stacks. 789 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 790 * of the stack memory. 791 */ 792 #ifdef VERBOSE_INIT_ARM 793 printf("init subsystems: stacks "); 794 #endif 795 set_stackptr(PSR_FIQ32_MODE, fiqstack.pv_va + FIQ_STACK_SIZE * PAGE_SIZE); 796 set_stackptr(PSR_IRQ32_MODE, irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE); 797 set_stackptr(PSR_ABT32_MODE, abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE); 798 set_stackptr(PSR_UND32_MODE, undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE); 799 800 /* 801 * Well we should set a data abort handler. 802 * Once things get going this will change as we will need a proper 803 * handler. 804 * Until then we will use a handler that just panics but tells us 805 * why. 806 * Initialisation of the vectors will just panic on a data abort. 807 * This just fills in a slightly better one. 808 */ 809 #ifdef VERBOSE_INIT_ARM 810 printf("vectors "); 811 #endif 812 data_abort_handler_address = (u_int)data_abort_handler; 813 prefetch_abort_handler_address = (u_int)prefetch_abort_handler; 814 undefined_handler_address = (u_int)undefinedinstruction_bounce; 815 816 /* Initialise the undefined instruction handlers */ 817 #ifdef VERBOSE_INIT_ARM 818 printf("undefined "); 819 #endif 820 undefined_init(); 821 822 /* Load memory into UVM. */ 823 #ifdef VERBOSE_INIT_ARM 824 printf("page "); 825 #endif 826 uvm_setpagesize(); /* initialize PAGE_SIZE-dependent variables */ 827 uvm_page_physload(atop(physical_freestart), atop(physical_freeend), 828 atop(physical_freestart), atop(physical_freeend), 829 VM_FREELIST_DEFAULT); 830 831 /* Boot strap pmap telling it where the kernel page table is */ 832 #ifdef VERBOSE_INIT_ARM 833 printf("pmap "); 834 #endif 835 pmap_bootstrap(KERNEL_VM_BASE, KERNEL_VM_BASE + KERNEL_VM_SIZE); 836 837 #ifdef __HAVE_MEMORY_DISK__ 838 md_root_setconf(memory_disk, sizeof memory_disk); 839 #endif 840 841 #ifdef VERBOSE_INIT_ARM 842 printf("done.\n"); 843 #endif 844 845 /* disable power down counter in watch dog, 846 This must be done within 16 seconds of start-up. */ 847 ioreg16_write(NETWALKER_WDOG_VBASE + IMX_WDOG_WMCR, 0); 848 849 #ifdef IPKDB 850 /* Initialise ipkdb */ 851 ipkdb_init(); 852 if (boothowto & RB_KDB) 853 ipkdb_connect(0); 854 #endif 855 856 #ifdef KGDB 857 if (boothowto & RB_KDB) { 858 kgdb_debug_init = 1; 859 kgdb_connect(1); 860 } 861 #endif 862 863 #ifdef DDB 864 #ifdef VERBOSE_INIT_ARM 865 printf("ddb "); 866 #endif 867 db_machine_init(); 868 869 /* Firmware doesn't load symbols. */ 870 ddb_init(0, NULL, NULL); 871 872 if (boothowto & RB_KDB) 873 Debugger(); 874 #endif 875 876 877 878 printf("initarm done.\n"); 879 880 /* We return the new stack pointer address */ 881 return(kernelstack.pv_va + USPACE_SVC_STACK_TOP); 882 } 883 884 #if 0 885 void 886 process_kernel_args(char *args) 887 { 888 889 boothowto = 0; 890 891 /* Make a local copy of the bootargs */ 892 strncpy(bootargs, args, MAX_BOOT_STRING); 893 894 args = bootargs; 895 boot_file = bootargs; 896 897 /* Skip the kernel image filename */ 898 while (*args != ' ' && *args != 0) 899 ++args; 900 901 if (*args != 0) 902 *args++ = 0; 903 904 while (*args == ' ') 905 ++args; 906 907 boot_args = args; 908 909 printf("bootfile: %s\n", boot_file); 910 printf("bootargs: %s\n", boot_args); 911 912 parse_mi_bootargs(boot_args); 913 } 914 #endif 915 916 static void 917 init_clocks(void) 918 { 919 extern void cortexa8_pmc_ccnt_init(void); 920 921 cortexa8_pmc_ccnt_init(); 922 } 923 924 struct iomux_setup { 925 /* iomux registers are 32-bit wide, but upper 16 bits are not 926 * used. */ 927 uint16_t reg; 928 uint16_t val; 929 }; 930 931 #define IOMUX_M(padname, mux) \ 932 IOMUX_DATA(__CONCAT(IOMUXC_SW_MUX_CTL_PAD_,padname), mux) 933 934 #define IOMUX_P(padname, pad) \ 935 IOMUX_DATA(__CONCAT(IOMUXC_SW_PAD_CTL_PAD_,padname), pad) 936 937 #define IOMUX_MP(padname, mux, pad) \ 938 IOMUX_M(padname, mux), \ 939 IOMUX_P(padname, pad) 940 941 942 #define IOMUX_DATA(offset, value) \ 943 { \ 944 .reg = (offset), \ 945 .val = (value), \ 946 } 947 948 949 /* 950 * set same values to IOMUX registers as linux kernel does 951 */ 952 const struct iomux_setup iomux_setup_data[] = { 953 #define HYS PAD_CTL_HYS 954 #define ODE PAD_CTL_ODE 955 #define DSEHIGH PAD_CTL_DSE_HIGH 956 #define DSEMID PAD_CTL_DSE_MID 957 #define DSELOW PAD_CTL_DSE_LOW 958 #define DSEMAX PAD_CTL_DSE_MAX 959 #define SRE PAD_CTL_SRE 960 #define KEEPER PAD_CTL_KEEPER 961 #define PULL PAD_CTL_PULL 962 #define PU_22K PAD_CTL_PUS_22K_PU 963 #define PU_47K PAD_CTL_PUS_47K_PU 964 #define PU_100K PAD_CTL_PUS_100K_PU 965 #define PD_100K PAD_CTL_PUS_100K_PD 966 #define HVE PAD_CTL_HVE /* Low output voltage */ 967 968 #define ALT0 IOMUX_CONFIG_ALT0 969 #define ALT1 IOMUX_CONFIG_ALT1 970 #define ALT2 IOMUX_CONFIG_ALT2 971 #define ALT3 IOMUX_CONFIG_ALT3 972 #define ALT4 IOMUX_CONFIG_ALT4 973 #define ALT5 IOMUX_CONFIG_ALT5 974 #define ALT6 IOMUX_CONFIG_ALT6 975 #define ALT7 IOMUX_CONFIG_ALT7 976 #define SION IOMUX_CONFIG_SION 977 978 /* left button */ 979 IOMUX_MP(EIM_EB2, ALT1, HYS), 980 /* right button */ 981 IOMUX_MP(EIM_EB3, ALT1, HYS), 982 983 /* UART1 */ 984 IOMUX_MP(UART1_RXD, ALT0, HYS | PULL | DSEHIGH | SRE), 985 IOMUX_MP(UART1_TXD, ALT0, HYS | PULL | DSEHIGH | SRE), 986 IOMUX_MP(UART1_RTS, ALT0, HYS | PULL | DSEHIGH), 987 IOMUX_MP(UART1_CTS, ALT0, HYS | PULL | DSEHIGH), 988 989 /* LCD Display */ 990 IOMUX_M(DI1_PIN2, ALT0), 991 IOMUX_M(DI1_PIN3, ALT0), 992 993 IOMUX_DATA(IOMUXC_SW_PAD_CTL_GRP_DISP1_PKE0, PAD_CTL_PKE), 994 #if 0 995 IOMUX_MP(DISP1_DAT0, ALT0, SRE | DSEMAX | PULL), 996 IOMUX_MP(DISP1_DAT1, ALT0, SRE | DSEMAX | PULL), 997 IOMUX_MP(DISP1_DAT2, ALT0, SRE | DSEMAX | PULL), 998 IOMUX_MP(DISP1_DAT3, ALT0, SRE | DSEMAX | PULL), 999 IOMUX_MP(DISP1_DAT4, ALT0, SRE | DSEMAX | PULL), 1000 IOMUX_MP(DISP1_DAT5, ALT0, SRE | DSEMAX | PULL), 1001 #endif 1002 IOMUX_M(DISP1_DAT6, ALT0), 1003 IOMUX_M(DISP1_DAT7, ALT0), 1004 IOMUX_M(DISP1_DAT8, ALT0), 1005 IOMUX_M(DISP1_DAT9, ALT0), 1006 IOMUX_M(DISP1_DAT10, ALT0), 1007 IOMUX_M(DISP1_DAT11, ALT0), 1008 IOMUX_M(DISP1_DAT12, ALT0), 1009 IOMUX_M(DISP1_DAT13, ALT0), 1010 IOMUX_M(DISP1_DAT14, ALT0), 1011 IOMUX_M(DISP1_DAT15, ALT0), 1012 IOMUX_M(DISP1_DAT16, ALT0), 1013 IOMUX_M(DISP1_DAT17, ALT0), 1014 IOMUX_M(DISP1_DAT18, ALT0), 1015 IOMUX_M(DISP1_DAT19, ALT0), 1016 IOMUX_M(DISP1_DAT20, ALT0), 1017 IOMUX_M(DISP1_DAT21, ALT0), 1018 IOMUX_M(DISP1_DAT22, ALT0), 1019 IOMUX_M(DISP1_DAT23, ALT0), 1020 1021 IOMUX_MP(DI1_D0_CS, ALT4, KEEPER | DSEHIGH | SRE), /* GPIO3_3 */ 1022 IOMUX_DATA(IOMUXC_GPIO3_IPP_IND_G_IN_3_SELECT_INPUT, INPUT_DAISY_0), 1023 IOMUX_MP(CSI2_D12, ALT3, KEEPER | DSEHIGH | SRE), /* GPIO4_9 */ 1024 IOMUX_MP(CSI2_D13, ALT3, KEEPER | DSEHIGH | SRE), 1025 IOMUX_MP(GPIO1_2, ALT0, ODE | DSEHIGH), 1026 IOMUX_MP(EIM_A19, ALT1, SRE | DSEHIGH), 1027 /* XXX VGA pins */ 1028 IOMUX_M(DI_GP4, ALT4), 1029 IOMUX_M(GPIO1_8, SION | ALT0), 1030 1031 1032 #if 0 1033 IOMUX_MP(GPIO1_2, ALT1, DSEHIGH | ODE), /* LCD backlight by PWM */ 1034 #else 1035 IOMUX_P(GPIO1_2, DSEHIGH | ODE), /* LCD backlight by GPIO */ 1036 #endif 1037 IOMUX_MP(GPIO1_8, SION | ALT0, HYS | DSEMID | PU_100K), 1038 /* I2C1 */ 1039 IOMUX_MP(EIM_D16, SION | ALT4, HYS | ODE | DSEHIGH | SRE), 1040 IOMUX_MP(EIM_D19, SION | ALT4, SRE), /* SCL */ 1041 IOMUX_MP(EIM_A19, ALT1, SRE | DSEHIGH), /* GPIO2_13 */ 1042 1043 #if 0 1044 IOMUX_MP(EIM_A23, ALT1, 0), 1045 #else 1046 IOMUX_M(EIM_A23, ALT1), /* GPIO2_17 */ 1047 #endif 1048 1049 /* BT */ 1050 IOMUX_M(EIM_D20, ALT1), /* GPIO2_4 BT host wakeup */ 1051 IOMUX_M(EIM_D22, ALT1), /* GPIO2_6 BT RESET */ 1052 IOMUX_M(EIM_D23, ALT1), /* GPIO2_7 BT wakeup */ 1053 1054 /* UART3 */ 1055 IOMUX_MP(EIM_D24, ALT3, KEEPER | PU_100K | DSEHIGH | SRE), 1056 IOMUX_MP(EIM_D25, ALT3, KEEPER | PU_100K | DSEHIGH | SRE), /* CTS */ 1057 IOMUX_MP(EIM_D26, ALT3, KEEPER | PU_100K | DSEHIGH | SRE), /* TXD */ 1058 IOMUX_MP(EIM_D27, ALT3, KEEPER | PU_100K | DSEHIGH | SRE), /* RTS */ 1059 IOMUX_M(NANDF_D15, ALT3), /* GPIO3_25 */ 1060 IOMUX_MP(NANDF_D14, ALT3, HYS | PULL | PU_100K ), /* GPIO3_26 */ 1061 IOMUX_M(CSI1_D9, ALT3), /* GPIO3_13 */ 1062 IOMUX_M(CSI1_VSYNC, ALT3), /* GPIO3_14 */ 1063 IOMUX_M(CSI1_HSYNC, ALT3), /* GPIO3_15 */ 1064 1065 /* audio pins */ 1066 IOMUX_MP(AUD3_BB_TXD, ALT0, DSEHIGH | PU_100K | SRE), 1067 /* XXX: linux code: 1068 (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | 1069 PAD_CTL_100K_PU | PAD_CTL_HYS_NONE | 1070 PAD_CTL_DDR_INPUT_CMOS | PAD_CTL_DRV_VOT_LOW), */ 1071 1072 IOMUX_MP(AUD3_BB_RXD, ALT0, KEEPER | DSEHIGH | SRE), 1073 IOMUX_MP(AUD3_BB_CK, ALT0, KEEPER | DSEHIGH | SRE), 1074 IOMUX_MP(AUD3_BB_FS, ALT0, KEEPER | DSEHIGH | SRE), 1075 1076 /* headphone detect */ 1077 IOMUX_MP(NANDF_D14, ALT3, HYS | PULL | PU_100K), 1078 IOMUX_MP(CSPI1_RDY, ALT3, SRE | DSEHIGH), 1079 /* XXX more audio pins ? */ 1080 1081 /* CSPI */ 1082 /* ??? doesn't work ??? */ 1083 IOMUX_P(CSPI1_MOSI, HYS | PULL | PD_100K | DSEHIGH | SRE), 1084 IOMUX_P(CSPI1_MISO, HYS | PULL | PD_100K | DSEHIGH | SRE), 1085 IOMUX_M(CSPI1_SS0, ALT3), 1086 IOMUX_MP(CSPI1_SS1, ALT0, HYS | KEEPER | DSEHIGH | SRE), 1087 IOMUX_MP(DI1_PIN11, ALT7, HYS | PULL | DSEHIGH | SRE), 1088 IOMUX_P(CSPI1_SCLK, HYS | KEEPER | DSEHIGH | SRE), 1089 /* 26M Osc */ 1090 IOMUX_MP(DI1_PIN12, ALT4, KEEPER | DSEHIGH | SRE), /* GPIO3_1 */ 1091 1092 /* I2C */ 1093 IOMUX_MP(KEY_COL4, SION | ALT3, SRE), 1094 IOMUX_DATA(IOMUXC_I2C2_IPP_SCL_IN_SELECT_INPUT, INPUT_DAISY_1), 1095 IOMUX_MP(KEY_COL5, SION | ALT3, HYS | ODE | DSEHIGH | SRE), 1096 IOMUX_DATA(IOMUXC_I2C2_IPP_SDA_IN_SELECT_INPUT, INPUT_DAISY_1), 1097 IOMUX_DATA(IOMUXC_UART3_IPP_UART_RTS_B_SELECT_INPUT, INPUT_DAISY_3), 1098 #if 1 1099 /* NAND */ 1100 IOMUX_MP(NANDF_WE_B, ALT0, HVE | DSEHIGH | PULL | PU_47K), 1101 IOMUX_MP(NANDF_RE_B, ALT0, HVE | DSEHIGH | PULL | PU_47K), 1102 IOMUX_MP(NANDF_ALE, ALT0, HVE | DSEHIGH | KEEPER), 1103 IOMUX_MP(NANDF_CLE, ALT0, HVE | DSEHIGH | KEEPER), 1104 IOMUX_MP(NANDF_WP_B, ALT0, HVE | DSEHIGH | PULL | PU_100K), 1105 IOMUX_MP(NANDF_RB0, ALT0, HVE | DSELOW | PULL | PU_100K), 1106 IOMUX_MP(NANDF_RB1, ALT0, HVE | DSELOW | PULL | PU_100K), 1107 IOMUX_MP(NANDF_D7, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 1108 IOMUX_MP(NANDF_D6, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 1109 IOMUX_MP(NANDF_D5, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 1110 IOMUX_MP(NANDF_D4, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 1111 IOMUX_MP(NANDF_D3, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 1112 IOMUX_MP(NANDF_D2, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 1113 IOMUX_MP(NANDF_D1, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 1114 IOMUX_MP(NANDF_D0, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 1115 #endif 1116 1117 /* Batttery pins */ 1118 IOMUX_MP(NANDF_D13, ALT3, HYS | DSEHIGH), 1119 IOMUX_MP(NANDF_D12, ALT3, HYS | DSEHIGH), 1120 #if 0 1121 IOMUX_MP(NANDF_D11, ALT3, HYS | DSEHIGH), 1122 #endif 1123 IOMUX_MP(NANDF_D10, ALT3, HYS | DSEHIGH), 1124 1125 /* SD1 */ 1126 IOMUX_MP(SD1_CMD, SION | ALT0, DSEHIGH | SRE), 1127 IOMUX_MP(SD1_CLK, SION | ALT0, KEEPER | PU_47K | DSEHIGH), 1128 IOMUX_MP(SD1_DATA0, ALT0, DSEHIGH | SRE), 1129 IOMUX_MP(SD1_DATA1, ALT0, DSEHIGH | SRE), 1130 IOMUX_MP(SD1_DATA2, ALT0, DSEHIGH | SRE), 1131 IOMUX_MP(SD1_DATA3, ALT0, DSEHIGH | SRE), 1132 IOMUX_MP(GPIO1_0, SION | ALT0, HYS | PU_100K), 1133 1134 /* SD2 */ 1135 IOMUX_P(SD2_CMD, HVE | PU_22K | DSEMAX | SRE), 1136 IOMUX_P(SD2_CLK, HVE | PU_22K | DSEMAX | SRE), 1137 IOMUX_P(SD2_DATA0, HVE | PU_22K | DSEMAX | SRE), 1138 IOMUX_P(SD2_DATA1, HVE | PU_22K | DSEMAX | SRE), 1139 IOMUX_P(SD2_DATA2, HVE | PU_22K | DSEMAX | SRE), 1140 IOMUX_P(SD2_DATA3, HVE | PU_22K | DSEMAX | SRE), 1141 1142 /* USB */ 1143 IOMUX_MP(USBH1_CLK, ALT0, HYS | KEEPER | DSEHIGH | SRE), 1144 IOMUX_MP(USBH1_DIR, ALT0, HYS | KEEPER | DSEHIGH | SRE), 1145 IOMUX_MP(USBH1_STP, ALT0, HYS | KEEPER | DSEHIGH | SRE), 1146 IOMUX_MP(USBH1_NXT, ALT0, HYS | KEEPER | PU_100K | DSEHIGH | SRE), 1147 IOMUX_MP(USBH1_DATA0, ALT0, HYS | KEEPER | DSEHIGH | SRE), 1148 IOMUX_MP(USBH1_DATA1, ALT0, HYS | KEEPER | DSEHIGH | SRE), 1149 IOMUX_MP(USBH1_DATA2, ALT0, HYS | KEEPER | DSEHIGH | SRE), 1150 IOMUX_MP(USBH1_DATA3, ALT0, HYS | KEEPER | DSEHIGH | SRE), 1151 IOMUX_MP(USBH1_DATA4, ALT0, HYS | KEEPER | DSEHIGH | SRE), 1152 IOMUX_MP(USBH1_DATA5, ALT0, HYS | KEEPER | DSEHIGH | SRE), 1153 IOMUX_MP(USBH1_DATA6, ALT0, HYS | KEEPER | DSEHIGH | SRE), 1154 IOMUX_MP(USBH1_DATA7, ALT0, HYS | KEEPER | DSEHIGH | SRE), 1155 IOMUX_MP(EIM_D17, ALT1, KEEPER | DSEHIGH | SRE), 1156 IOMUX_MP(EIM_D21, ALT1, KEEPER | DSEHIGH | SRE), 1157 IOMUX_P(GPIO1_7, /*ALT0,*/ DSEHIGH | SRE), /* USB Hub reset */ 1158 1159 #undef ODE 1160 #undef HYS 1161 #undef SRE 1162 #undef PULL 1163 #undef KEEPER 1164 #undef PU_22K 1165 #undef PU_47K 1166 #undef PU_100K 1167 #undef PD_100K 1168 #undef HVE 1169 #undef DSEMAX 1170 #undef DSEHIGH 1171 #undef DSEMID 1172 #undef DSELOW 1173 1174 #undef ALT0 1175 #undef ALT1 1176 #undef ALT2 1177 #undef ALT3 1178 #undef ALT4 1179 #undef ALT5 1180 #undef ALT6 1181 #undef ALT7 1182 #undef SION 1183 }; 1184 1185 static void 1186 setup_ioports(void) 1187 { 1188 int i; 1189 const struct iomux_setup *p; 1190 1191 /* Initialize all IOMUX registers */ 1192 for (i=0; i < __arraycount(iomux_setup_data); ++i) { 1193 p = iomux_setup_data + i; 1194 1195 ioreg_write(NETWALKER_IOMUXC_VBASE + p->reg, 1196 p->val); 1197 } 1198 1199 1200 #if 0 /* already done by bootloader */ 1201 /* GPIO2[22,23]: input (left/right button) 1202 GPIO2[21]: input (power button) */ 1203 ioreg_write(NETWALKER_GPIO_VBASE(2) + GPIO_DIR, 1204 ~__BITS(21,23) & 1205 ioreg_read(NETWALKER_GPIO_VBASE(2) + GPIO_DIR)); 1206 #endif 1207 1208 #if 0 /* already done by bootloader */ 1209 /* GPIO4[12]: input (cover switch) */ 1210 ioreg_write(NETWALKER_GPIO_VBASE(4) + GPIO_DIR, 1211 ~__BIT(12) & 1212 ioreg_read(NETWALKER_GPIO_VBASE(4) + GPIO_DIR)); 1213 #endif 1214 } 1215 1216 1217 #ifdef CONSDEVNAME 1218 const char consdevname[] = CONSDEVNAME; 1219 1220 #ifndef CONMODE 1221 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 1222 #endif 1223 #ifndef CONSPEED 1224 #define CONSPEED 115200 1225 #endif 1226 1227 int consmode = CONMODE; 1228 int consrate = CONSPEED; 1229 1230 #endif /* CONSDEVNAME */ 1231 1232 #ifndef IMXUART_FREQ 1233 #define IMXUART_FREQ 66500000 1234 #endif 1235 1236 void 1237 consinit(void) 1238 { 1239 static int consinit_called = 0; 1240 1241 if (consinit_called) 1242 return; 1243 1244 consinit_called = 1; 1245 1246 #ifdef CONSDEVNAME 1247 1248 #if NIMXUART > 0 1249 imxuart_set_frequency(IMXUART_FREQ, 2); 1250 #endif 1251 1252 #if (NIMXUART > 0) && defined(IMXUARTCONSOLE) 1253 if (strcmp(consdevname, "imxuart") == 0) { 1254 paddr_t consaddr; 1255 #ifdef CONADDR 1256 consaddr = CONADDR; 1257 #else 1258 consaddr = IMX51_UART1_BASE; 1259 #endif 1260 imxuart_cons_attach(&imx_bs_tag, consaddr, consrate, consmode); 1261 return; 1262 } 1263 #endif 1264 1265 #endif 1266 1267 #if (NWSDISPLAY > 0) && defined(IMXLCDCONSOLE) 1268 { 1269 extern void netwalker_cnattach(void); 1270 netwalker_cnattach(); 1271 } 1272 #endif 1273 } 1274 1275 #ifdef KGDB 1276 #ifndef KGDB_DEVNAME 1277 #define KGDB_DEVNAME "imxuart" 1278 #endif 1279 #ifndef KGDB_DEVMODE 1280 #define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 1281 #endif 1282 1283 const char kgdb_devname[20] = KGDB_DEVNAME; 1284 int kgdb_mode = KGDB_DEVMODE; 1285 int kgdb_addr = KGDB_DEVADDR; 1286 extern int kgdb_rate; /* defined in kgdb_stub.c */ 1287 1288 void 1289 kgdb_port_init(void) 1290 { 1291 #if (NIMXUART > 0) 1292 if (strcmp(kgdb_devname, "imxuart") == 0) { 1293 imxuart_kgdb_attach(&imx_bs_tag, kgdb_addr, 1294 kgdb_rate, kgdb_mode); 1295 return; 1296 } 1297 1298 #endif 1299 } 1300 #endif 1301 1302 1303 #ifdef DEBUG_IOPORTS 1304 static void dump_sub(paddr_t addr, size_t size) 1305 { 1306 paddr_t end = addr + size; 1307 1308 for (; addr < end; addr += 4) { 1309 if (addr % 16 == 0) 1310 printf("%08x: ", (u_int)addr); 1311 printf("%08x ", ioreg_read(addr)); 1312 1313 if (addr % 16 == 12) 1314 printf("\n"); 1315 } 1316 printf("\n"); 1317 } 1318 1319 void 1320 dump_registers(void) 1321 { 1322 paddr_t pa; 1323 int i; 1324 1325 dump_sub(IOMUXC_BASE, IOMUXC_USBOH3_IPP_IND_UH3_STP_SELECT_INPUT + 4); 1326 1327 for (i = 1; i <= 4; ++i) { 1328 dump_sub(GPIO_BASE(i), GPIO_SIZE); 1329 } 1330 1331 printf("\nwatchdog: "); 1332 for (pa = WDOG1_BASE; pa <= WDOG1_BASE + IMX_WDOG_WMCR; 1333 pa += 2) { 1334 printf("%04x ", *(volatile uint16_t *)pa); 1335 } 1336 printf("\n"); 1337 1338 printf("\nCCM\n"); 1339 dump_sub(CCM_BASE, CCM_SIZE); 1340 1341 #if 0 1342 /* disable power down counter in watch dog, 1343 This must be done within 16 seconds of start-up. */ 1344 ioreg16_write(NETWALKER_WDOG_VBASE + IMX_WDOG_WMCR, 0); 1345 1346 /* read left/right buttons */ 1347 for (;;) { 1348 uint32_t reg; 1349 1350 reg = ioreg_read(GPIO_BASE(2) + GPIO_DR); 1351 printf("\r%08x", reg); 1352 reg = ioreg_read(GPIO_BASE(4) + GPIO_DR); 1353 printf(" %08x", reg); 1354 1355 #if 0 1356 ioreg16_write(WDOG1_BASE + IMX_WDOG_WSR, WSR_MAGIC1); 1357 ioreg16_write(WDOG1_BASE + IMX_WDOG_WSR, WSR_MAGIC2); 1358 #endif 1359 1360 } 1361 #endif 1362 1363 } 1364 #endif 1365 1366 1367 #if 0 1368 #include <arm/imx/imxgpiovar.h> 1369 1370 void gpio_test(void) 1371 void 1372 gpio_test(void) 1373 { 1374 int left, right; 1375 1376 gpio_set_direction(GPIO_NO(2, 22), GPIO_DIR_IN); 1377 gpio_set_direction(GPIO_NO(2, 23), GPIO_DIR_IN); 1378 1379 for (;;) { 1380 left = gpio_data_read(GPIO_NO(2, 22)); 1381 right = gpio_data_read(GPIO_NO(2, 23)); 1382 1383 printf("\r%s %s", 1384 left ? "off" : "ON ", 1385 right ? "off" : "ON "); 1386 } 1387 } 1388 #endif 1389
Indexes created Wed Oct 01 07:09:59 GMT 2025