netwalker_machdep.c revision 1.7
1 /* $NetBSD: netwalker_machdep.c,v 1.7 2012/07/29 00:07:09 matt Exp $ */ 2 3 /* 4 * Copyright (c) 2002, 2003, 2005, 2010 Genetec Corporation. 5 * All rights reserved. 6 * Written by Hiroyuki Bessho for Genetec Corporation. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 19 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION 21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 * POSSIBILITY OF SUCH DAMAGE. 28 * 29 * Machine dependent functions for kernel setup for Sharp Netwalker. 30 * Based on iq80310_machhdep.c 31 */ 32 /* 33 * Copyright (c) 2001 Wasabi Systems, Inc. 34 * All rights reserved. 35 * 36 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 37 * 38 * Redistribution and use in source and binary forms, with or without 39 * modification, are permitted provided that the following conditions 40 * are met: 41 * 1. Redistributions of source code must retain the above copyright 42 * notice, this list of conditions and the following disclaimer. 43 * 2. Redistributions in binary form must reproduce the above copyright 44 * notice, this list of conditions and the following disclaimer in the 45 * documentation and/or other materials provided with the distribution. 46 * 3. All advertising materials mentioning features or use of this software 47 * must display the following acknowledgement: 48 * This product includes software developed for the NetBSD Project by 49 * Wasabi Systems, Inc. 50 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 51 * or promote products derived from this software without specific prior 52 * written permission. 53 * 54 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 55 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 56 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 57 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 58 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 59 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 60 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 61 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 62 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 63 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 64 * POSSIBILITY OF SUCH DAMAGE. 65 */ 66 67 /* 68 * Copyright (c) 1997,1998 Mark Brinicombe. 69 * Copyright (c) 1997,1998 Causality Limited. 70 * All rights reserved. 71 * 72 * Redistribution and use in source and binary forms, with or without 73 * modification, are permitted provided that the following conditions 74 * are met: 75 * 1. Redistributions of source code must retain the above copyright 76 * notice, this list of conditions and the following disclaimer. 77 * 2. Redistributions in binary form must reproduce the above copyright 78 * notice, this list of conditions and the following disclaimer in the 79 * documentation and/or other materials provided with the distribution. 80 * 3. All advertising materials mentioning features or use of this software 81 * must display the following acknowledgement: 82 * This product includes software developed by Mark Brinicombe 83 * for the NetBSD Project. 84 * 4. The name of the company nor the name of the author may be used to 85 * endorse or promote products derived from this software without specific 86 * prior written permission. 87 * 88 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 89 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 90 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 91 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 92 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 93 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 94 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 95 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 96 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 97 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 98 * SUCH DAMAGE. 99 * 100 * Machine dependent functions for kernel setup for Intel IQ80310 evaluation 101 * boards using RedBoot firmware. 102 */ 103 104 #include <sys/cdefs.h> 105 __KERNEL_RCSID(0, "$NetBSD: netwalker_machdep.c,v 1.7 2012/07/29 00:07:09 matt Exp $"); 106 107 #include "opt_ddb.h" 108 #include "opt_kgdb.h" 109 #include "opt_ipkdb.h" 110 #include "opt_pmap_debug.h" 111 #include "opt_md.h" 112 #include "opt_com.h" 113 #include "imxuart.h" 114 #include "opt_imxuart.h" 115 #include "opt_imx.h" 116 117 #include <sys/param.h> 118 #include <sys/device.h> 119 #include <sys/systm.h> 120 #include <sys/kernel.h> 121 #include <sys/exec.h> 122 #include <sys/proc.h> 123 #include <sys/msgbuf.h> 124 #include <sys/reboot.h> 125 #include <sys/termios.h> 126 #include <sys/ksyms.h> 127 128 #include <uvm/uvm_extern.h> 129 130 #include <sys/conf.h> 131 #include <dev/cons.h> 132 #include <dev/md.h> 133 134 #include <machine/db_machdep.h> 135 #include <ddb/db_sym.h> 136 #include <ddb/db_extern.h> 137 #ifdef KGDB 138 #include <sys/kgdb.h> 139 #endif 140 141 #include <machine/bootconfig.h> 142 #include <sys/bus.h> 143 #include <machine/cpu.h> 144 #include <machine/frame.h> 145 #include <arm/undefined.h> 146 147 #include <arm/arm32/pte.h> 148 #include <arm/arm32/machdep.h> 149 150 #include <arm/imx/imx51reg.h> 151 #include <arm/imx/imx51var.h> 152 #include <arm/imx/imxgpioreg.h> 153 #include <arm/imx/imxwdogreg.h> 154 #include <arm/imx/imxuartreg.h> 155 #include <arm/imx/imxuartvar.h> 156 #include <arm/imx/imx51_iomuxreg.h> 157 #include <evbarm/netwalker/netwalker_reg.h> 158 159 /* Kernel text starts 1MB in from the bottom of the kernel address space. */ 160 #define KERNEL_TEXT_BASE (KERNEL_BASE + 0x00100000) 161 #define KERNEL_VM_BASE (KERNEL_BASE + 0x01000000) 162 163 /* 164 * The range 0xc1000000 - 0xccffffff is available for kernel VM space 165 * Core-logic registers and I/O mappings occupy 0xfd000000 - 0xffffffff 166 */ 167 #define KERNEL_VM_SIZE 0x0C000000 168 169 170 /* 171 * Address to call from cpu_reset() to reset the machine. 172 * This is machine architecture dependent as it varies depending 173 * on where the ROM appears when you turn the MMU off. 174 */ 175 176 u_int cpu_reset_address = 0; 177 178 /* Define various stack sizes in pages */ 179 #define FIQ_STACK_SIZE 1 180 #define IRQ_STACK_SIZE 1 181 #define ABT_STACK_SIZE 1 182 #ifdef IPKDB 183 #define UND_STACK_SIZE 2 184 #else 185 #define UND_STACK_SIZE 1 186 #endif 187 188 BootConfig bootconfig; /* Boot config storage */ 189 char *boot_args = NULL; 190 char *boot_file = NULL; 191 192 vm_offset_t physical_start; 193 vm_offset_t physical_freestart; 194 vm_offset_t physical_freeend; 195 vm_offset_t physical_end; 196 u_int free_pages; 197 vm_offset_t pagetables_start; 198 199 /*int debug_flags;*/ 200 #ifndef PMAP_STATIC_L1S 201 int max_processes = 64; /* Default number */ 202 #endif /* !PMAP_STATIC_L1S */ 203 204 vm_offset_t msgbufphys; 205 206 extern char KERNEL_BASE_phys[]; 207 extern char KERNEL_BASE_virt[]; 208 extern char etext[], __data_start[], _edata[], __bss_start[], __bss_end__[]; 209 extern char _end[]; 210 extern int cpu_do_powersave; 211 212 #define KERNEL_PT_SYS 0 /* Page table for mapping proc0 zero page */ 213 #define KERNEL_PT_KERNEL 1 /* Page table for mapping kernel */ 214 #define KERNEL_PT_KERNEL_NUM 4 215 #define KERNEL_PT_VMDATA (KERNEL_PT_KERNEL+KERNEL_PT_KERNEL_NUM) 216 /* Page tables for mapping kernel VM */ 217 #define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */ 218 #define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM) 219 220 pv_addr_t kernel_pt_table[NUM_KERNEL_PTS]; 221 222 /* 223 * Macros to translate between physical and virtual for a subset of the 224 * kernel address space. *Not* for general use. 225 */ 226 #define KERNEL_BASE_PHYS ((paddr_t)&KERNEL_BASE_phys) 227 #define KERNEL_BASE_VIRT ((vaddr_t)&KERNEL_BASE_virt) 228 #define KERN_VTOPHYS(va) \ 229 ((paddr_t)((vaddr_t)va - KERNEL_BASE_VIRT + KERNEL_BASE_PHYS)) 230 #define KERN_PHYSTOV(pa) \ 231 ((vaddr_t)((paddr_t)pa - KERNEL_BASE_PHYS + KERNEL_BASE_VIRT)) 232 233 234 /* Prototypes */ 235 236 void consinit(void); 237 #if 0 238 void process_kernel_args(char *); 239 #endif 240 241 #ifdef KGDB 242 void kgdb_port_init(void); 243 #endif 244 void change_clock(uint32_t v); 245 246 static void init_clocks(void); 247 static void setup_ioports(void); 248 #ifdef DEBUG_IOPORTS 249 void dump_registers(void); 250 #endif 251 252 bs_protos(bs_notimpl); 253 254 #ifndef CONSPEED 255 #define CONSPEED B115200 /* What RedBoot uses */ 256 #endif 257 #ifndef CONMODE 258 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 259 #endif 260 261 int comcnspeed = CONSPEED; 262 int comcnmode = CONMODE; 263 264 /* 265 * void cpu_reboot(int howto, char *bootstr) 266 * 267 * Reboots the system 268 * 269 * Deal with any syncing, unmounting, dumping and shutdown hooks, 270 * then reset the CPU. 271 */ 272 void 273 cpu_reboot(int howto, char *bootstr) 274 { 275 #ifdef DIAGNOSTIC 276 /* info */ 277 printf("boot: howto=%08x curproc=%p\n", howto, curproc); 278 #endif 279 280 /* 281 * If we are still cold then hit the air brakes 282 * and crash to earth fast 283 */ 284 if (cold) { 285 doshutdownhooks(); 286 pmf_system_shutdown(boothowto); 287 printf("The operating system has halted.\n"); 288 printf("Please press any key to reboot.\n\n"); 289 cngetc(); 290 printf("rebooting...\n"); 291 cpu_reset(); 292 /*NOTREACHED*/ 293 } 294 295 /* Disable console buffering */ 296 /* cnpollc(1);*/ 297 298 /* 299 * If RB_NOSYNC was not specified sync the discs. 300 * Note: Unless cold is set to 1 here, syslogd will die during the 301 * unmount. It looks like syslogd is getting woken up only to find 302 * that it cannot page part of the binary in as the filesystem has 303 * been unmounted. 304 */ 305 if (!(howto & RB_NOSYNC)) 306 bootsync(); 307 308 /* Say NO to interrupts */ 309 splhigh(); 310 311 /* Do a dump if requested. */ 312 if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP) 313 dumpsys(); 314 315 /* Run any shutdown hooks */ 316 doshutdownhooks(); 317 318 pmf_system_shutdown(boothowto); 319 320 /* Make sure IRQ's are disabled */ 321 IRQdisable; 322 323 if (howto & RB_HALT) { 324 printf("The operating system has halted.\n"); 325 printf("Please press any key to reboot.\n\n"); 326 cngetc(); 327 } 328 329 printf("rebooting...\n"); 330 cpu_reset(); 331 /*NOTREACHED*/ 332 } 333 334 /* 335 * Static device mappings. These peripheral registers are mapped at 336 * fixed virtual addresses very early in netwalker_start() so that we 337 * can use them while booting the kernel, and stay at the same address 338 * throughout whole kernel's life time. 339 * 340 * We use this table twice; once with bootstrap page table, and once 341 * with kernel's page table which we build up in initarm(). 342 */ 343 344 #define _A(a) ((a) & ~L1_S_OFFSET) 345 #define _S(s) (((s) + L1_S_SIZE - 1) & ~(L1_S_SIZE-1)) 346 347 static const struct pmap_devmap netwalker_devmap[] = { 348 { 349 /* for UART1, IOMUXC */ 350 NETWALKER_IO_VBASE0, 351 _A(NETWALKER_IO_PBASE0), 352 L1_S_SIZE * 4, 353 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE 354 }, 355 {0, 0, 0, 0, 0 } 356 }; 357 358 #ifndef MEMSTART 359 #define MEMSTART 0x90000000 360 #endif 361 #ifndef MEMSIZE 362 #define MEMSIZE 512 363 #endif 364 365 /* 366 * u_int initarm(...) 367 * 368 * Initial entry point on startup. This gets called before main() is 369 * entered. 370 * It should be responsible for setting up everything that must be 371 * in place when main is called. 372 * This includes 373 * Taking a copy of the boot configuration structure. 374 * Initialising the physical console so characters can be printed. 375 * Setting up page tables for the kernel 376 * Relocating the kernel to the bottom of physical memory 377 */ 378 u_int 379 initarm(void *arg) 380 { 381 int loop; 382 int loop1; 383 vaddr_t l1pagetable; 384 385 #ifdef RBFLAGS 386 boothowto |= RBFLAGS; 387 #endif 388 389 disable_interrupts(I32_bit|F32_bit); 390 /* XXX move to netwalker_start.S */ 391 392 /* Register devmap for devices we mapped in start */ 393 pmap_devmap_register(netwalker_devmap); 394 395 setup_ioports(); 396 397 consinit(); 398 399 #ifdef DEBUG_IOPORTS 400 dump_registers(); 401 #endif 402 403 /* 404 * Heads up ... Setup the CPU / MMU / TLB functions 405 */ 406 if (set_cpufuncs()) 407 panic("cpu not recognized!"); 408 409 #ifdef NO_POWERSAVE 410 cpu_do_powersave=0; 411 #endif 412 413 init_clocks(); 414 415 #ifdef KGDB 416 kgdb_port_init(); 417 #endif 418 419 /* Talk to the user */ 420 printf("\nNetBSD/evbarm (netwalker) booting ...\n"); 421 422 /* 423 * Ok we have the following memory map 424 * 425 * Physical Address Range Description 426 * ----------------------- ---------------------------------- 427 * 428 * 0x90000000 - 0x97FFFFFF DDR SDRAM (128MByte) 429 * 430 * The initarm() has the responsibility for creating the kernel 431 * page tables. 432 * It must also set up various memory pointers that are used 433 * by pmap etc. 434 */ 435 436 #if 0 437 /* 438 * Examine the boot args string for options we need to know about 439 * now. 440 */ 441 process_kernel_args((char *)nwbootinfo.bt_args); 442 #endif 443 444 #ifdef VERBOSE_INIT_ARM 445 printf("initarm: Configuring system ...\n"); 446 #endif 447 /* Fake bootconfig structure for the benefit of pmap.c */ 448 /* XXX must make the memory description h/w independent */ 449 bootconfig.dramblocks = 1; 450 bootconfig.dram[0].address = MEMSTART; 451 bootconfig.dram[0].pages = (MEMSIZE * 1024 * 1024)/ PAGE_SIZE; 452 453 /* 454 * Set up the variables that define the availablilty of 455 * physical memory. For now, we're going to set 456 * physical_freestart to 0x80100000 (where the kernel 457 * was loaded), and allocate the memory we need downwards. 458 * If we get too close to the bottom of SDRAM, we 459 * will panic. We will update physical_freestart and 460 * physical_freeend later to reflect what pmap_bootstrap() 461 * wants to see. 462 * 463 * XXX pmap_bootstrap() needs an enema. 464 */ 465 physical_start = bootconfig.dram[0].address; 466 physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE); 467 468 physical_freestart = 0x90000000UL; /* top of loadaddres */ 469 physical_freeend = 0x90100000UL; /* base of kernel */ 470 471 physmem = (physical_end - physical_start) / PAGE_SIZE; 472 473 #ifdef VERBOSE_INIT_ARM 474 /* Tell the user about the memory */ 475 printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem, 476 physical_start, physical_end - 1); 477 #endif 478 479 /* 480 * Okay, the kernel starts 1MB in from the bottom of physical 481 * memory. We are going to allocate our bootstrap pages downwards 482 * from there. 483 * 484 * We need to allocate some fixed page tables to get the kernel 485 * going. We allocate one page directory and a number of page 486 * tables and store the physical addresses in the kernel_pt_table 487 * array. 488 * 489 * The kernel page directory must be on a 16K boundary. The page 490 * tables must be on 4K boundaries. What we do is allocate the 491 * page directory on the first 16K boundary that we encounter, and 492 * the page tables on 4K boundaries otherwise. Since we allocate 493 * at least 3 L2 page tables, we are guaranteed to encounter at 494 * least one 16K aligned region. 495 */ 496 497 #ifdef VERBOSE_INIT_ARM 498 printf("Allocating page tables\n"); 499 #endif 500 501 free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE; 502 503 #ifdef VERBOSE_INIT_ARM 504 printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n", 505 physical_freestart, free_pages, free_pages); 506 #endif 507 508 /* Define a macro to simplify memory allocation */ 509 #define valloc_pages(var, np) \ 510 alloc_pages((var).pv_pa, (np)); \ 511 (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start; 512 513 #define alloc_pages(var, np) \ 514 physical_freeend -= ((np) * PAGE_SIZE); \ 515 if (physical_freeend < physical_freestart) \ 516 panic("initarm: out of memory"); \ 517 (var) = physical_freeend; \ 518 free_pages -= (np); \ 519 memset((char *)(var), 0, ((np) * PAGE_SIZE)); 520 521 loop1 = 0; 522 for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) { 523 /* Are we 16KB aligned for an L1 ? */ 524 if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0 525 && kernel_l1pt.pv_pa == 0) { 526 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE); 527 } else { 528 valloc_pages(kernel_pt_table[loop1], 529 L2_TABLE_SIZE / PAGE_SIZE); 530 ++loop1; 531 } 532 } 533 534 /* This should never be able to happen but better confirm that. */ 535 if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE-1)) != 0) 536 panic("initarm: Failed to align the kernel page directory"); 537 538 /* 539 * Allocate a page for the system page mapped to V0x00000000 540 * This page will just contain the system vectors and can be 541 * shared by all processes. 542 */ 543 valloc_pages(systempage, 1); 544 systempage.pv_va = ARM_VECTORS_HIGH; 545 546 /* Allocate stacks for all modes */ 547 valloc_pages(fiqstack, FIQ_STACK_SIZE); 548 valloc_pages(irqstack, IRQ_STACK_SIZE); 549 valloc_pages(abtstack, ABT_STACK_SIZE); 550 valloc_pages(undstack, UND_STACK_SIZE); 551 valloc_pages(kernelstack, UPAGES); 552 553 #ifdef VERBOSE_INIT_ARM 554 printf("FIQ stack: p0x%08lx v0x%08lx\n", fiqstack.pv_pa, 555 fiqstack.pv_va); 556 printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa, 557 irqstack.pv_va); 558 printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa, 559 abtstack.pv_va); 560 printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa, 561 undstack.pv_va); 562 printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa, 563 kernelstack.pv_va); 564 #endif 565 566 alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE); 567 568 /* 569 * Ok we have allocated physical pages for the primary kernel 570 * page tables 571 */ 572 573 #ifdef VERBOSE_INIT_ARM 574 printf("Creating L1 page table at p0x%08lx v0x%08lx\n", 575 kernel_l1pt.pv_pa, kernel_l1pt.pv_va); 576 #endif 577 578 /* 579 * Now we start construction of the L1 page table 580 * We start by mapping the L2 page tables into the L1. 581 * This means that we can replace L1 mappings later on if necessary 582 */ 583 l1pagetable = kernel_l1pt.pv_pa; 584 585 /* Map the L2 pages tables in the L1 page table */ 586 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH & ~(0x00400000 - 1), 587 &kernel_pt_table[KERNEL_PT_SYS]); 588 for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++) 589 pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000, 590 &kernel_pt_table[KERNEL_PT_KERNEL + loop]); 591 for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++) 592 pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000, 593 &kernel_pt_table[KERNEL_PT_VMDATA + loop]); 594 595 /* update the top of the kernel VM */ 596 pmap_curmaxkvaddr = 597 KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000); 598 599 #ifdef VERBOSE_INIT_ARM 600 printf("Mapping kernel\n"); 601 #endif 602 603 /* Now we fill in the L2 pagetable for the kernel static code/data */ 604 #define round_L_page(x) (((x) + L2_L_OFFSET) & L2_L_FRAME) 605 { 606 size_t textsize = round_L_page((size_t)etext - KERNEL_TEXT_BASE); 607 size_t totalsize = round_L_page((size_t)_end - KERNEL_TEXT_BASE); 608 u_int logical; 609 610 611 #ifdef VERBOSE_INIT_ARM 612 printf("%s: etext %lx, _end %lx\n", 613 __func__, (uintptr_t)etext, (uintptr_t)_end); 614 printf("%s: textsize %#lx, totalsize %#lx\n", 615 __func__, textsize, totalsize); 616 #endif 617 logical = 0x00100000; /* offset of kernel in RAM */ 618 619 /* Map text section read-only. */ 620 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical, 621 physical_start + logical, textsize, 622 VM_PROT_READ|VM_PROT_EXECUTE, PTE_CACHE); 623 624 /* Map data and bss sections read-write. */ 625 logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical, 626 physical_start + logical, totalsize - textsize, 627 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 628 } 629 630 #ifdef VERBOSE_INIT_ARM 631 printf("Constructing L2 page tables\n"); 632 #endif 633 634 /* Map the stack pages */ 635 pmap_map_chunk(l1pagetable, fiqstack.pv_va, fiqstack.pv_pa, 636 FIQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 637 pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa, 638 IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 639 pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa, 640 ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 641 pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa, 642 UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 643 pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa, 644 UPAGES * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE); 645 646 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa, 647 L1_TABLE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_PAGETABLE); 648 649 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) { 650 pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va, 651 kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE, 652 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 653 } 654 655 /* Map the vector page. */ 656 #if 0 657 /* MULTI-ICE requires that page 0 is NC/NB so that it can download the 658 * cache-clean code there. */ 659 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa, 660 VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE); 661 #else 662 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa, 663 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 664 #endif 665 666 /* 667 * map integrated peripherals at same address in l1pagetable 668 * so that we can continue to use console. 669 */ 670 pmap_devmap_bootstrap(l1pagetable, netwalker_devmap); 671 672 /* 673 * Now we have the real page tables in place so we can switch to them. 674 * Once this is done we will be running with the REAL kernel page 675 * tables. 676 */ 677 678 /* 679 * Update the physical_freestart/physical_freeend/free_pages 680 * variables. 681 */ 682 physical_freestart = physical_start + 683 (((((uintptr_t) _end) + PGOFSET) & ~PGOFSET) - KERNEL_BASE); 684 physical_freeend = physical_end; 685 free_pages = 686 (physical_freeend - physical_freestart) / PAGE_SIZE; 687 688 #ifdef VERBOSE_INIT_ARM 689 /* Tell the user about where all the bits and pieces live. */ 690 printf("%22s Physical Virtual Num\n", " "); 691 printf("%22s Starting Ending Starting Ending Pages\n", " "); 692 693 static const char mem_fmt[] = 694 "%20s: 0x%08lx 0x%08lx 0x%08lx 0x%08lx %d\n"; 695 static const char mem_fmt_nov[] = 696 "%20s: 0x%08lx 0x%08lx %d\n"; 697 698 printf(mem_fmt, "SDRAM", physical_start, physical_end-1, 699 KERN_PHYSTOV(physical_start), KERN_PHYSTOV(physical_end-1), 700 physmem); 701 printf(mem_fmt, "text section", 702 (paddr_t)KERNEL_BASE_phys, KERN_VTOPHYS(etext-1), 703 (vaddr_t)KERNEL_BASE_virt, (vaddr_t)etext-1, 704 (int)(round_L_page((size_t)etext - KERNEL_TEXT_BASE) / PAGE_SIZE)); 705 printf(mem_fmt, "data section", 706 KERN_VTOPHYS(__data_start), KERN_VTOPHYS(_edata), 707 (vaddr_t)__data_start, (vaddr_t)_edata, 708 (int)((round_page((vaddr_t)_edata) 709 - trunc_page((vaddr_t)__data_start)) / PAGE_SIZE)); 710 printf(mem_fmt, "bss section", 711 KERN_VTOPHYS(__bss_start), KERN_VTOPHYS(__bss_end__), 712 (vaddr_t)__bss_start, (vaddr_t)__bss_end__, 713 (int)((round_page((vaddr_t)__bss_end__) 714 - trunc_page((vaddr_t)__bss_start)) / PAGE_SIZE)); 715 printf(mem_fmt, "L1 page directory", 716 kernel_l1pt.pv_pa, kernel_l1pt.pv_pa + L1_TABLE_SIZE - 1, 717 kernel_l1pt.pv_va, kernel_l1pt.pv_va + L1_TABLE_SIZE - 1, 718 L1_TABLE_SIZE / PAGE_SIZE); 719 printf(mem_fmt, "Exception Vectors", 720 systempage.pv_pa, systempage.pv_pa + PAGE_SIZE - 1, 721 systempage.pv_va, systempage.pv_va + PAGE_SIZE - 1, 722 1); 723 printf(mem_fmt, "FIQ stack", 724 fiqstack.pv_pa, fiqstack.pv_pa + (FIQ_STACK_SIZE * PAGE_SIZE) - 1, 725 fiqstack.pv_va, fiqstack.pv_va + (FIQ_STACK_SIZE * PAGE_SIZE) - 1, 726 FIQ_STACK_SIZE); 727 printf(mem_fmt, "IRQ stack", 728 irqstack.pv_pa, irqstack.pv_pa + (IRQ_STACK_SIZE * PAGE_SIZE) - 1, 729 irqstack.pv_va, irqstack.pv_va + (IRQ_STACK_SIZE * PAGE_SIZE) - 1, 730 IRQ_STACK_SIZE); 731 printf(mem_fmt, "ABT stack", 732 abtstack.pv_pa, abtstack.pv_pa + (ABT_STACK_SIZE * PAGE_SIZE) - 1, 733 abtstack.pv_va, abtstack.pv_va + (ABT_STACK_SIZE * PAGE_SIZE) - 1, 734 ABT_STACK_SIZE); 735 printf(mem_fmt, "UND stack", 736 undstack.pv_pa, undstack.pv_pa + (UND_STACK_SIZE * PAGE_SIZE) - 1, 737 undstack.pv_va, undstack.pv_va + (UND_STACK_SIZE * PAGE_SIZE) - 1, 738 UND_STACK_SIZE); 739 printf(mem_fmt, "SVC stack", 740 kernelstack.pv_pa, kernelstack.pv_pa + (UPAGES * PAGE_SIZE) - 1, 741 kernelstack.pv_va, kernelstack.pv_va + (UPAGES * PAGE_SIZE) - 1, 742 UPAGES); 743 printf(mem_fmt_nov, "Message Buffer", 744 msgbufphys, msgbufphys + round_page(MSGBUFSIZE) - 1, round_page(MSGBUFSIZE) / PAGE_SIZE); 745 printf(mem_fmt, "Free Memory", physical_freestart, physical_freeend-1, 746 KERN_PHYSTOV(physical_freestart), KERN_PHYSTOV(physical_freeend-1), 747 free_pages); 748 #endif 749 750 /* Switch tables */ 751 #ifdef VERBOSE_INIT_ARM 752 printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n", 753 physical_freestart, free_pages, free_pages); 754 printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa); 755 #endif 756 757 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT); 758 cpu_setttb(kernel_l1pt.pv_pa); 759 cpu_tlb_flushID(); 760 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)); 761 762 /* 763 * Moved from cpu_startup() as data_abort_handler() references 764 * this during uvm init 765 */ 766 uvm_lwp_setuarea(&lwp0, kernelstack.pv_va); 767 768 #ifdef VERBOSE_INIT_ARM 769 printf("bootstrap done.\n"); 770 #endif 771 772 arm32_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL); 773 774 /* 775 * Pages were allocated during the secondary bootstrap for the 776 * stacks for different CPU modes. 777 * We must now set the r13 registers in the different CPU modes to 778 * point to these stacks. 779 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 780 * of the stack memory. 781 */ 782 #ifdef VERBOSE_INIT_ARM 783 printf("init subsystems: stacks "); 784 #endif 785 set_stackptr(PSR_FIQ32_MODE, fiqstack.pv_va + FIQ_STACK_SIZE * PAGE_SIZE); 786 set_stackptr(PSR_IRQ32_MODE, irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE); 787 set_stackptr(PSR_ABT32_MODE, abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE); 788 set_stackptr(PSR_UND32_MODE, undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE); 789 790 /* 791 * Well we should set a data abort handler. 792 * Once things get going this will change as we will need a proper 793 * handler. 794 * Until then we will use a handler that just panics but tells us 795 * why. 796 * Initialisation of the vectors will just panic on a data abort. 797 * This just fills in a slightly better one. 798 */ 799 #ifdef VERBOSE_INIT_ARM 800 printf("vectors "); 801 #endif 802 data_abort_handler_address = (u_int)data_abort_handler; 803 prefetch_abort_handler_address = (u_int)prefetch_abort_handler; 804 undefined_handler_address = (u_int)undefinedinstruction_bounce; 805 806 /* Initialise the undefined instruction handlers */ 807 #ifdef VERBOSE_INIT_ARM 808 printf("undefined "); 809 #endif 810 undefined_init(); 811 812 /* Load memory into UVM. */ 813 #ifdef VERBOSE_INIT_ARM 814 printf("page "); 815 #endif 816 uvm_setpagesize(); /* initialize PAGE_SIZE-dependent variables */ 817 uvm_page_physload(atop(physical_freestart), atop(physical_freeend), 818 atop(physical_freestart), atop(physical_freeend), 819 VM_FREELIST_DEFAULT); 820 821 /* Boot strap pmap telling it where the kernel page table is */ 822 #ifdef VERBOSE_INIT_ARM 823 printf("pmap "); 824 #endif 825 pmap_bootstrap(KERNEL_VM_BASE, KERNEL_VM_BASE + KERNEL_VM_SIZE); 826 827 #ifdef __HAVE_MEMORY_DISK__ 828 md_root_setconf(memory_disk, sizeof memory_disk); 829 #endif 830 831 #ifdef VERBOSE_INIT_ARM 832 printf("done.\n"); 833 #endif 834 835 /* disable power down counter in watch dog, 836 This must be done within 16 seconds of start-up. */ 837 ioreg16_write(NETWALKER_WDOG_VBASE + IMX_WDOG_WMCR, 0); 838 839 #ifdef IPKDB 840 /* Initialise ipkdb */ 841 ipkdb_init(); 842 if (boothowto & RB_KDB) 843 ipkdb_connect(0); 844 #endif 845 846 #ifdef KGDB 847 if (boothowto & RB_KDB) { 848 kgdb_debug_init = 1; 849 kgdb_connect(1); 850 } 851 #endif 852 853 #ifdef DDB 854 #ifdef VERBOSE_INIT_ARM 855 printf("ddb "); 856 #endif 857 db_machine_init(); 858 859 /* Firmware doesn't load symbols. */ 860 ddb_init(0, NULL, NULL); 861 862 if (boothowto & RB_KDB) 863 Debugger(); 864 #endif 865 866 867 868 printf("initarm done.\n"); 869 870 /* We return the new stack pointer address */ 871 return(kernelstack.pv_va + USPACE_SVC_STACK_TOP); 872 } 873 874 #if 0 875 void 876 process_kernel_args(char *args) 877 { 878 879 boothowto = 0; 880 881 /* Make a local copy of the bootargs */ 882 strncpy(bootargs, args, MAX_BOOT_STRING); 883 884 args = bootargs; 885 boot_file = bootargs; 886 887 /* Skip the kernel image filename */ 888 while (*args != ' ' && *args != 0) 889 ++args; 890 891 if (*args != 0) 892 *args++ = 0; 893 894 while (*args == ' ') 895 ++args; 896 897 boot_args = args; 898 899 printf("bootfile: %s\n", boot_file); 900 printf("bootargs: %s\n", boot_args); 901 902 parse_mi_bootargs(boot_args); 903 } 904 #endif 905 906 static void 907 init_clocks(void) 908 { 909 extern void cortexa8_pmc_ccnt_init(void); 910 911 cortexa8_pmc_ccnt_init(); 912 } 913 914 struct iomux_setup { 915 /* iomux registers are 32-bit wide, but upper 16 bits are not 916 * used. */ 917 uint16_t reg; 918 uint16_t val; 919 }; 920 921 #define IOMUX_M(padname, mux) \ 922 IOMUX_DATA(__CONCAT(IOMUXC_SW_MUX_CTL_PAD_,padname), mux) 923 924 #define IOMUX_P(padname, pad) \ 925 IOMUX_DATA(__CONCAT(IOMUXC_SW_PAD_CTL_PAD_,padname), pad) 926 927 #define IOMUX_MP(padname, mux, pad) \ 928 IOMUX_M(padname, mux), \ 929 IOMUX_P(padname, pad) 930 931 932 #define IOMUX_DATA(offset, value) \ 933 { \ 934 .reg = (offset), \ 935 .val = (value), \ 936 } 937 938 939 /* 940 * set same values to IOMUX registers as linux kernel does 941 */ 942 const struct iomux_setup iomux_setup_data[] = { 943 #define HYS PAD_CTL_HYS 944 #define ODE PAD_CTL_ODE 945 #define DSEHIGH PAD_CTL_DSE_HIGH 946 #define DSEMID PAD_CTL_DSE_MID 947 #define DSELOW PAD_CTL_DSE_LOW 948 #define DSEMAX PAD_CTL_DSE_MAX 949 #define SRE PAD_CTL_SRE 950 #define KEEPER PAD_CTL_KEEPER 951 #define PULL PAD_CTL_PULL 952 #define PU_22K PAD_CTL_PUS_22K_PU 953 #define PU_47K PAD_CTL_PUS_47K_PU 954 #define PU_100K PAD_CTL_PUS_100K_PU 955 #define PD_100K PAD_CTL_PUS_100K_PD 956 #define HVE PAD_CTL_HVE /* Low output voltage */ 957 958 #define ALT0 IOMUX_CONFIG_ALT0 959 #define ALT1 IOMUX_CONFIG_ALT1 960 #define ALT2 IOMUX_CONFIG_ALT2 961 #define ALT3 IOMUX_CONFIG_ALT3 962 #define ALT4 IOMUX_CONFIG_ALT4 963 #define ALT5 IOMUX_CONFIG_ALT5 964 #define ALT6 IOMUX_CONFIG_ALT6 965 #define ALT7 IOMUX_CONFIG_ALT7 966 #define SION IOMUX_CONFIG_SION 967 968 /* left button */ 969 IOMUX_MP(EIM_EB2, ALT1, HYS), 970 /* right button */ 971 IOMUX_MP(EIM_EB3, ALT1, HYS), 972 973 /* UART1 */ 974 IOMUX_MP(UART1_RXD, ALT0, HYS | PULL | DSEHIGH | SRE), 975 IOMUX_MP(UART1_TXD, ALT0, HYS | PULL | DSEHIGH | SRE), 976 IOMUX_MP(UART1_RTS, ALT0, HYS | PULL | DSEHIGH), 977 IOMUX_MP(UART1_CTS, ALT0, HYS | PULL | DSEHIGH), 978 979 /* LCD Display */ 980 IOMUX_M(DI1_PIN2, ALT0), 981 IOMUX_M(DI1_PIN3, ALT0), 982 983 IOMUX_DATA(IOMUXC_SW_PAD_CTL_GRP_DISP1_PKE0, PAD_CTL_PKE), 984 #if 0 985 IOMUX_MP(DISP1_DAT0, ALT0, SRE | DSEMAX | PULL), 986 IOMUX_MP(DISP1_DAT1, ALT0, SRE | DSEMAX | PULL), 987 IOMUX_MP(DISP1_DAT2, ALT0, SRE | DSEMAX | PULL), 988 IOMUX_MP(DISP1_DAT3, ALT0, SRE | DSEMAX | PULL), 989 IOMUX_MP(DISP1_DAT4, ALT0, SRE | DSEMAX | PULL), 990 IOMUX_MP(DISP1_DAT5, ALT0, SRE | DSEMAX | PULL), 991 #endif 992 IOMUX_M(DISP1_DAT6, ALT0), 993 IOMUX_M(DISP1_DAT7, ALT0), 994 IOMUX_M(DISP1_DAT8, ALT0), 995 IOMUX_M(DISP1_DAT9, ALT0), 996 IOMUX_M(DISP1_DAT10, ALT0), 997 IOMUX_M(DISP1_DAT11, ALT0), 998 IOMUX_M(DISP1_DAT12, ALT0), 999 IOMUX_M(DISP1_DAT13, ALT0), 1000 IOMUX_M(DISP1_DAT14, ALT0), 1001 IOMUX_M(DISP1_DAT15, ALT0), 1002 IOMUX_M(DISP1_DAT16, ALT0), 1003 IOMUX_M(DISP1_DAT17, ALT0), 1004 IOMUX_M(DISP1_DAT18, ALT0), 1005 IOMUX_M(DISP1_DAT19, ALT0), 1006 IOMUX_M(DISP1_DAT20, ALT0), 1007 IOMUX_M(DISP1_DAT21, ALT0), 1008 IOMUX_M(DISP1_DAT22, ALT0), 1009 IOMUX_M(DISP1_DAT23, ALT0), 1010 1011 IOMUX_MP(DI1_D0_CS, ALT4, KEEPER | DSEHIGH | SRE), /* GPIO3_3 */ 1012 IOMUX_DATA(IOMUXC_GPIO3_IPP_IND_G_IN_3_SELECT_INPUT, INPUT_DAISY_0), 1013 IOMUX_MP(CSI2_D12, ALT3, KEEPER | DSEHIGH | SRE), /* GPIO4_9 */ 1014 IOMUX_MP(CSI2_D13, ALT3, KEEPER | DSEHIGH | SRE), 1015 IOMUX_MP(GPIO1_2, ALT0, ODE | DSEHIGH), 1016 IOMUX_MP(EIM_A19, ALT1, SRE | DSEHIGH), 1017 /* XXX VGA pins */ 1018 IOMUX_M(DI_GP4, ALT4), 1019 IOMUX_M(GPIO1_8, SION | ALT0), 1020 1021 1022 #if 0 1023 IOMUX_MP(GPIO1_2, ALT1, DSEHIGH | ODE), /* LCD backlight by PWM */ 1024 #else 1025 IOMUX_P(GPIO1_2, DSEHIGH | ODE), /* LCD backlight by GPIO */ 1026 #endif 1027 IOMUX_MP(GPIO1_8, SION | ALT0, HYS | DSEMID | PU_100K), 1028 /* I2C1 */ 1029 IOMUX_MP(EIM_D16, SION | ALT4, HYS | ODE | DSEHIGH | SRE), 1030 IOMUX_MP(EIM_D19, SION | ALT4, SRE), /* SCL */ 1031 IOMUX_MP(EIM_A19, ALT1, SRE | DSEHIGH), /* GPIO2_13 */ 1032 1033 #if 0 1034 IOMUX_MP(EIM_A23, ALT1, 0), 1035 #else 1036 IOMUX_M(EIM_A23, ALT1), /* GPIO2_17 */ 1037 #endif 1038 1039 /* BT */ 1040 IOMUX_M(EIM_D20, ALT1), /* GPIO2_4 BT host wakeup */ 1041 IOMUX_M(EIM_D22, ALT1), /* GPIO2_6 BT RESET */ 1042 IOMUX_M(EIM_D23, ALT1), /* GPIO2_7 BT wakeup */ 1043 1044 /* UART3 */ 1045 IOMUX_MP(EIM_D24, ALT3, KEEPER | PU_100K | DSEHIGH | SRE), 1046 IOMUX_MP(EIM_D25, ALT3, KEEPER | PU_100K | DSEHIGH | SRE), /* CTS */ 1047 IOMUX_MP(EIM_D26, ALT3, KEEPER | PU_100K | DSEHIGH | SRE), /* TXD */ 1048 IOMUX_MP(EIM_D27, ALT3, KEEPER | PU_100K | DSEHIGH | SRE), /* RTS */ 1049 IOMUX_M(NANDF_D15, ALT3), /* GPIO3_25 */ 1050 IOMUX_MP(NANDF_D14, ALT3, HYS | PULL | PU_100K ), /* GPIO3_26 */ 1051 IOMUX_M(CSI1_D9, ALT3), /* GPIO3_13 */ 1052 IOMUX_M(CSI1_VSYNC, ALT3), /* GPIO3_14 */ 1053 IOMUX_M(CSI1_HSYNC, ALT3), /* GPIO3_15 */ 1054 1055 /* audio pins */ 1056 IOMUX_MP(AUD3_BB_TXD, ALT0, DSEHIGH | PU_100K | SRE), 1057 /* XXX: linux code: 1058 (PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH | 1059 PAD_CTL_100K_PU | PAD_CTL_HYS_NONE | 1060 PAD_CTL_DDR_INPUT_CMOS | PAD_CTL_DRV_VOT_LOW), */ 1061 1062 IOMUX_MP(AUD3_BB_RXD, ALT0, KEEPER | DSEHIGH | SRE), 1063 IOMUX_MP(AUD3_BB_CK, ALT0, KEEPER | DSEHIGH | SRE), 1064 IOMUX_MP(AUD3_BB_FS, ALT0, KEEPER | DSEHIGH | SRE), 1065 1066 /* headphone detect */ 1067 IOMUX_MP(NANDF_D14, ALT3, HYS | PULL | PU_100K), 1068 IOMUX_MP(CSPI1_RDY, ALT3, SRE | DSEHIGH), 1069 /* XXX more audio pins ? */ 1070 1071 /* CSPI */ 1072 /* ??? doesn't work ??? */ 1073 IOMUX_P(CSPI1_MOSI, HYS | PULL | PD_100K | DSEHIGH | SRE), 1074 IOMUX_P(CSPI1_MISO, HYS | PULL | PD_100K | DSEHIGH | SRE), 1075 IOMUX_M(CSPI1_SS0, ALT3), 1076 IOMUX_MP(CSPI1_SS1, ALT0, HYS | KEEPER | DSEHIGH | SRE), 1077 IOMUX_MP(DI1_PIN11, ALT7, HYS | PULL | DSEHIGH | SRE), 1078 IOMUX_P(CSPI1_SCLK, HYS | KEEPER | DSEHIGH | SRE), 1079 /* 26M Osc */ 1080 IOMUX_MP(DI1_PIN12, ALT4, KEEPER | DSEHIGH | SRE), /* GPIO3_1 */ 1081 1082 /* I2C */ 1083 IOMUX_MP(KEY_COL4, SION | ALT3, SRE), 1084 IOMUX_DATA(IOMUXC_I2C2_IPP_SCL_IN_SELECT_INPUT, INPUT_DAISY_1), 1085 IOMUX_MP(KEY_COL5, SION | ALT3, HYS | ODE | DSEHIGH | SRE), 1086 IOMUX_DATA(IOMUXC_I2C2_IPP_SDA_IN_SELECT_INPUT, INPUT_DAISY_1), 1087 IOMUX_DATA(IOMUXC_UART3_IPP_UART_RTS_B_SELECT_INPUT, INPUT_DAISY_3), 1088 #if 1 1089 /* NAND */ 1090 IOMUX_MP(NANDF_WE_B, ALT0, HVE | DSEHIGH | PULL | PU_47K), 1091 IOMUX_MP(NANDF_RE_B, ALT0, HVE | DSEHIGH | PULL | PU_47K), 1092 IOMUX_MP(NANDF_ALE, ALT0, HVE | DSEHIGH | KEEPER), 1093 IOMUX_MP(NANDF_CLE, ALT0, HVE | DSEHIGH | KEEPER), 1094 IOMUX_MP(NANDF_WP_B, ALT0, HVE | DSEHIGH | PULL | PU_100K), 1095 IOMUX_MP(NANDF_RB0, ALT0, HVE | DSELOW | PULL | PU_100K), 1096 IOMUX_MP(NANDF_RB1, ALT0, HVE | DSELOW | PULL | PU_100K), 1097 IOMUX_MP(NANDF_D7, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 1098 IOMUX_MP(NANDF_D6, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 1099 IOMUX_MP(NANDF_D5, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 1100 IOMUX_MP(NANDF_D4, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 1101 IOMUX_MP(NANDF_D3, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 1102 IOMUX_MP(NANDF_D2, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 1103 IOMUX_MP(NANDF_D1, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 1104 IOMUX_MP(NANDF_D0, ALT0, HVE | DSEHIGH | KEEPER | PU_100K), 1105 #endif 1106 1107 /* Batttery pins */ 1108 IOMUX_MP(NANDF_D13, ALT3, HYS | DSEHIGH), 1109 IOMUX_MP(NANDF_D12, ALT3, HYS | DSEHIGH), 1110 #if 0 1111 IOMUX_MP(NANDF_D11, ALT3, HYS | DSEHIGH), 1112 #endif 1113 IOMUX_MP(NANDF_D10, ALT3, HYS | DSEHIGH), 1114 1115 /* SD1 */ 1116 IOMUX_MP(SD1_CMD, SION | ALT0, DSEHIGH | SRE), 1117 IOMUX_MP(SD1_CLK, SION | ALT0, KEEPER | PU_47K | DSEHIGH), 1118 IOMUX_MP(SD1_DATA0, ALT0, DSEHIGH | SRE), 1119 IOMUX_MP(SD1_DATA1, ALT0, DSEHIGH | SRE), 1120 IOMUX_MP(SD1_DATA2, ALT0, DSEHIGH | SRE), 1121 IOMUX_MP(SD1_DATA3, ALT0, DSEHIGH | SRE), 1122 IOMUX_MP(GPIO1_0, SION | ALT0, HYS | PU_100K), 1123 1124 /* SD2 */ 1125 IOMUX_P(SD2_CMD, HVE | PU_22K | DSEMAX | SRE), 1126 IOMUX_P(SD2_CLK, HVE | PU_22K | DSEMAX | SRE), 1127 IOMUX_P(SD2_DATA0, HVE | PU_22K | DSEMAX | SRE), 1128 IOMUX_P(SD2_DATA1, HVE | PU_22K | DSEMAX | SRE), 1129 IOMUX_P(SD2_DATA2, HVE | PU_22K | DSEMAX | SRE), 1130 IOMUX_P(SD2_DATA3, HVE | PU_22K | DSEMAX | SRE), 1131 1132 /* USB */ 1133 IOMUX_MP(USBH1_CLK, ALT0, HYS | KEEPER | DSEHIGH | SRE), 1134 IOMUX_MP(USBH1_DIR, ALT0, HYS | KEEPER | DSEHIGH | SRE), 1135 IOMUX_MP(USBH1_STP, ALT0, HYS | KEEPER | DSEHIGH | SRE), 1136 IOMUX_MP(USBH1_NXT, ALT0, HYS | KEEPER | PU_100K | DSEHIGH | SRE), 1137 IOMUX_MP(USBH1_DATA0, ALT0, HYS | KEEPER | DSEHIGH | SRE), 1138 IOMUX_MP(USBH1_DATA1, ALT0, HYS | KEEPER | DSEHIGH | SRE), 1139 IOMUX_MP(USBH1_DATA2, ALT0, HYS | KEEPER | DSEHIGH | SRE), 1140 IOMUX_MP(USBH1_DATA3, ALT0, HYS | KEEPER | DSEHIGH | SRE), 1141 IOMUX_MP(USBH1_DATA4, ALT0, HYS | KEEPER | DSEHIGH | SRE), 1142 IOMUX_MP(USBH1_DATA5, ALT0, HYS | KEEPER | DSEHIGH | SRE), 1143 IOMUX_MP(USBH1_DATA6, ALT0, HYS | KEEPER | DSEHIGH | SRE), 1144 IOMUX_MP(USBH1_DATA7, ALT0, HYS | KEEPER | DSEHIGH | SRE), 1145 IOMUX_MP(EIM_D17, ALT1, KEEPER | DSEHIGH | SRE), 1146 IOMUX_MP(EIM_D21, ALT1, KEEPER | DSEHIGH | SRE), 1147 IOMUX_P(GPIO1_7, /*ALT0,*/ DSEHIGH | SRE), /* USB Hub reset */ 1148 1149 #undef ODE 1150 #undef HYS 1151 #undef SRE 1152 #undef PULL 1153 #undef KEEPER 1154 #undef PU_22K 1155 #undef PU_47K 1156 #undef PU_100K 1157 #undef PD_100K 1158 #undef HVE 1159 #undef DSEMAX 1160 #undef DSEHIGH 1161 #undef DSEMID 1162 #undef DSELOW 1163 1164 #undef ALT0 1165 #undef ALT1 1166 #undef ALT2 1167 #undef ALT3 1168 #undef ALT4 1169 #undef ALT5 1170 #undef ALT6 1171 #undef ALT7 1172 #undef SION 1173 }; 1174 1175 static void 1176 setup_ioports(void) 1177 { 1178 int i; 1179 const struct iomux_setup *p; 1180 1181 /* Initialize all IOMUX registers */ 1182 for (i=0; i < __arraycount(iomux_setup_data); ++i) { 1183 p = iomux_setup_data + i; 1184 1185 ioreg_write(NETWALKER_IOMUXC_VBASE + p->reg, 1186 p->val); 1187 } 1188 1189 1190 #if 0 /* already done by bootloader */ 1191 /* GPIO2[22,23]: input (left/right button) 1192 GPIO2[21]: input (power button) */ 1193 ioreg_write(NETWALKER_GPIO_VBASE(2) + GPIO_DIR, 1194 ~__BITS(21,23) & 1195 ioreg_read(NETWALKER_GPIO_VBASE(2) + GPIO_DIR)); 1196 #endif 1197 1198 #if 0 /* already done by bootloader */ 1199 /* GPIO4[12]: input (cover switch) */ 1200 ioreg_write(NETWALKER_GPIO_VBASE(4) + GPIO_DIR, 1201 ~__BIT(12) & 1202 ioreg_read(NETWALKER_GPIO_VBASE(4) + GPIO_DIR)); 1203 #endif 1204 } 1205 1206 1207 #ifdef CONSDEVNAME 1208 const char consdevname[] = CONSDEVNAME; 1209 1210 #ifndef CONMODE 1211 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 1212 #endif 1213 #ifndef CONSPEED 1214 #define CONSPEED 115200 1215 #endif 1216 1217 int consmode = CONMODE; 1218 int consrate = CONSPEED; 1219 1220 #endif /* CONSDEVNAME */ 1221 1222 #ifndef IMXUART_FREQ 1223 #define IMXUART_FREQ 66500000 1224 #endif 1225 1226 void 1227 consinit(void) 1228 { 1229 static int consinit_called = 0; 1230 1231 if (consinit_called) 1232 return; 1233 1234 consinit_called = 1; 1235 1236 #ifdef CONSDEVNAME 1237 1238 #if NIMXUART > 0 1239 imxuart_set_frequency(IMXUART_FREQ, 2); 1240 #endif 1241 1242 #if (NIMXUART > 0) && defined(IMXUARTCONSOLE) 1243 if (strcmp(consdevname, "imxuart") == 0) { 1244 paddr_t consaddr; 1245 #ifdef CONADDR 1246 consaddr = CONADDR; 1247 #else 1248 consaddr = IMX51_UART1_BASE; 1249 #endif 1250 imxuart_cons_attach(&imx_bs_tag, consaddr, consrate, consmode); 1251 return; 1252 } 1253 #endif 1254 1255 #endif 1256 1257 #if (NWSDISPLAY > 0) && defined(IMXLCDCONSOLE) 1258 { 1259 extern void netwalker_cnattach(void); 1260 netwalker_cnattach(); 1261 } 1262 #endif 1263 } 1264 1265 #ifdef KGDB 1266 #ifndef KGDB_DEVNAME 1267 #define KGDB_DEVNAME "imxuart" 1268 #endif 1269 #ifndef KGDB_DEVMODE 1270 #define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 1271 #endif 1272 1273 const char kgdb_devname[20] = KGDB_DEVNAME; 1274 int kgdb_mode = KGDB_DEVMODE; 1275 int kgdb_addr = KGDB_DEVADDR; 1276 extern int kgdb_rate; /* defined in kgdb_stub.c */ 1277 1278 void 1279 kgdb_port_init(void) 1280 { 1281 #if (NIMXUART > 0) 1282 if (strcmp(kgdb_devname, "imxuart") == 0) { 1283 imxuart_kgdb_attach(&imx_bs_tag, kgdb_addr, 1284 kgdb_rate, kgdb_mode); 1285 return; 1286 } 1287 1288 #endif 1289 } 1290 #endif 1291 1292 1293 #ifdef DEBUG_IOPORTS 1294 static void dump_sub(paddr_t addr, size_t size) 1295 { 1296 paddr_t end = addr + size; 1297 1298 for (; addr < end; addr += 4) { 1299 if (addr % 16 == 0) 1300 printf("%08x: ", (u_int)addr); 1301 printf("%08x ", ioreg_read(addr)); 1302 1303 if (addr % 16 == 12) 1304 printf("\n"); 1305 } 1306 printf("\n"); 1307 } 1308 1309 void 1310 dump_registers(void) 1311 { 1312 paddr_t pa; 1313 int i; 1314 1315 dump_sub(IOMUXC_BASE, IOMUXC_USBOH3_IPP_IND_UH3_STP_SELECT_INPUT + 4); 1316 1317 for (i = 1; i <= 4; ++i) { 1318 dump_sub(GPIO_BASE(i), GPIO_SIZE); 1319 } 1320 1321 printf("\nwatchdog: "); 1322 for (pa = WDOG1_BASE; pa <= WDOG1_BASE + IMX_WDOG_WMCR; 1323 pa += 2) { 1324 printf("%04x ", *(volatile uint16_t *)pa); 1325 } 1326 printf("\n"); 1327 1328 printf("\nCCM\n"); 1329 dump_sub(CCM_BASE, CCM_SIZE); 1330 1331 #if 0 1332 /* disable power down counter in watch dog, 1333 This must be done within 16 seconds of start-up. */ 1334 ioreg16_write(NETWALKER_WDOG_VBASE + IMX_WDOG_WMCR, 0); 1335 1336 /* read left/right buttons */ 1337 for (;;) { 1338 uint32_t reg; 1339 1340 reg = ioreg_read(GPIO_BASE(2) + GPIO_DR); 1341 printf("\r%08x", reg); 1342 reg = ioreg_read(GPIO_BASE(4) + GPIO_DR); 1343 printf(" %08x", reg); 1344 1345 #if 0 1346 ioreg16_write(WDOG1_BASE + IMX_WDOG_WSR, WSR_MAGIC1); 1347 ioreg16_write(WDOG1_BASE + IMX_WDOG_WSR, WSR_MAGIC2); 1348 #endif 1349 1350 } 1351 #endif 1352 1353 } 1354 #endif 1355 1356 1357 #if 0 1358 #include <arm/imx/imxgpiovar.h> 1359 1360 void gpio_test(void) 1361 void 1362 gpio_test(void) 1363 { 1364 int left, right; 1365 1366 gpio_set_direction(GPIO_NO(2, 22), GPIO_DIR_IN); 1367 gpio_set_direction(GPIO_NO(2, 23), GPIO_DIR_IN); 1368 1369 for (;;) { 1370 left = gpio_data_read(GPIO_NO(2, 22)); 1371 right = gpio_data_read(GPIO_NO(2, 23)); 1372 1373 printf("\r%s %s", 1374 left ? "off" : "ON ", 1375 right ? "off" : "ON "); 1376 } 1377 } 1378 #endif 1379
Indexes created Thu Oct 02 14:10:14 GMT 2025